CN111883063A - Pixel circuit, display panel and display device - Google Patents
Pixel circuit, display panel and display device Download PDFInfo
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- 230000001629 suppression Effects 0.000 claims abstract description 55
- 238000003860 storage Methods 0.000 claims abstract description 24
- 239000003990 capacitor Substances 0.000 claims description 11
- 230000000694 effects Effects 0.000 abstract description 8
- 239000010410 layer Substances 0.000 description 44
- 238000010586 diagram Methods 0.000 description 19
- 239000000758 substrate Substances 0.000 description 11
- 239000002184 metal Substances 0.000 description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- 208000032005 Spinocerebellar ataxia with axonal neuropathy type 2 Diseases 0.000 description 5
- 230000009471 action Effects 0.000 description 5
- 208000033361 autosomal recessive with axonal neuropathy 2 spinocerebellar ataxia Diseases 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 102100036285 25-hydroxyvitamin D-1 alpha hydroxylase, mitochondrial Human genes 0.000 description 2
- 101000875403 Homo sapiens 25-hydroxyvitamin D-1 alpha hydroxylase, mitochondrial Proteins 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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Abstract
The embodiment of the invention discloses a pixel circuit, a display panel and a display device, wherein the pixel circuit comprises a driving module, a data writing module, a storage module, a light-emitting module and a voltage fluctuation suppression module; the data writing module is used for writing data voltage into the control end of the driving module; the storage module is used for storing the voltage written into the control end of the drive module; the voltage fluctuation suppression module is connected between the first power line and the second power line and used for suppressing voltage fluctuation on the first power line, voltage provided by the first power line is output to the driving module through the voltage fluctuation suppression module, and the driving module drives the light-emitting module to emit light according to voltage of the control end. According to the technical scheme provided by the embodiment of the invention, the voltage fluctuation suppression module is used for suppressing the disturbance signal in the voltage provided by the first power line, so that the voltage fluctuation on the first power line can be suppressed, the fluctuation of the driving current output by the driving module is further reduced, the light-emitting uniformity of the light-emitting module is favorably improved, and the display effect is improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a pixel circuit, a display panel and a display device.
Background
An Organic Light Emitting Diode (OLED) display device has the characteristics of low power consumption, low production cost, self-luminescence, and the like, and has become a research hotspot in the current field.
A conventional display device generally includes a pixel circuit, wherein the pixel circuit includes a driving transistor, the driving transistor is connected to a power line, and the power line supplies a power voltage to the driving transistor; and writing a data voltage into the grid electrode of the driving transistor, and generating a driving current by the driving transistor under the action of the power voltage so as to drive the light-emitting device to emit light. In general, a power voltage inevitably has a disturbing signal, so that the power voltage fluctuates to influence the stability of a driving current, thereby causing a non-uniform light emission phenomenon of a display device.
Disclosure of Invention
Embodiments of the present invention provide a pixel circuit, a display panel, and a display device, so as to reduce fluctuation of a power supply voltage, thereby reducing fluctuation of a driving current, and facilitating improvement of a display effect.
In a first aspect, an embodiment of the present invention provides a pixel circuit, including: the device comprises a driving module, a data writing module, a storage module, a light emitting module and a voltage fluctuation suppression module;
the data writing module is connected between a data line and the driving module and used for writing data voltage into the control end of the driving module;
the storage module is connected with the control end of the driving module and used for storing the voltage written into the control end of the driving module;
the voltage fluctuation suppression module is connected between a first power line and a second power line, the voltage fluctuation suppression module is used for suppressing voltage fluctuation on the first power line, the driving module and the light-emitting module are connected between the voltage fluctuation suppression module and the second power line, voltage provided by the first power line is output to the driving module through the voltage fluctuation suppression module, and the driving module is used for providing a driving signal to the light-emitting module according to voltage of a control end to drive the light-emitting module to emit light.
Optionally, the voltage fluctuation suppression module includes a first resistor and a first transistor;
the first end of the first resistor is connected with the first power line, the second end of the first resistor is connected with the first pole of the first transistor, the second pole of the first transistor is connected with the second power line, the grid electrode of the first transistor is connected with the second pole of the first transistor, and the driving module is connected between the second end of the first resistor and the second power line.
Optionally, the voltage fluctuation suppression module includes at least two first resistors and at least two first transistors in one-to-one correspondence with the first resistors;
a first pole of a first one of the first transistors is connected to the first power line through a first resistor, and a second pole of a last one of the first transistors is connected to the second power line;
for two adjacent first transistors, the second pole of the former first transistor is connected to the first pole of the latter first transistor through one first resistor;
the gate of each of the first transistors is connected to the second pole thereof.
Optionally, the first transistor operates in a saturation region.
Optionally, the voltage on the first power line and the output voltage of the voltage fluctuation suppression module satisfy an exponential relationship, and the exponent is 1/2.
Optionally, the driving module includes a second transistor, the data writing module includes a third transistor, the light emitting module includes a light emitting diode, and the storage module includes a storage capacitor;
a gate of the third transistor is connected to a first scan signal line, a first pole of the third transistor is connected to the data line, and a second pole of the third transistor is connected to a first pole of the second transistor;
the pixel circuit further comprises a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor and an eighth transistor;
a gate of the fourth transistor is connected to the first scan signal line, a first pole of the fourth transistor is connected to a gate of the second transistor, and a second pole of the fourth transistor is connected to a second pole of the second transistor;
a gate of the fifth transistor is connected to a second scan signal line, a first pole of the fifth transistor receives a reference voltage, and a second pole of the fifth transistor is connected to a gate of the second transistor; a gate of the sixth transistor is connected to the second scanning signal line, a first pole of the sixth transistor receives a reference voltage, a second pole of the sixth transistor is connected to an anode of the light emitting diode, and a cathode of the light emitting diode is connected to the second power line;
the gates of the seventh transistor and the eighth transistor are both connected with a light-emitting control signal line, the first pole of the seventh transistor is connected with the second end of the first resistor, and the second pole of the seventh transistor is connected with the first pole of the second transistor; a first pole of the eighth transistor is connected to the second pole of the second transistor, and a second pole of the eighth transistor is connected to the anode of the light emitting diode.
In a second aspect, an embodiment of the present invention further provides a display panel, where the display panel includes the pixel circuit described in the first aspect.
Optionally, the voltage fluctuation suppression module includes a first resistor and a first transistor;
a first end of the first resistor is connected with the first power line, a second end of the first resistor is connected with a first pole of the first transistor, a second pole of the first transistor is connected with the second power line, a grid electrode of the first transistor is connected with the second pole of the first transistor, and the driving module is connected between the second end of the first resistor and the second power line;
the display panel further comprises a connecting terminal, the connecting terminal is used for inputting power voltage, the connecting terminal is connected with the first power line, and the farther the distance from the connecting terminal along the extending direction of the first power line is, the smaller the resistance value of the first resistor in the pixel circuit connected with the first power line is.
Optionally, the display panel further includes a cathode layer constituting a cathode of the light emitting module, and the second pole of the first transistor in each of the pixel circuits is connected to each other and to the cathode layer.
In a third aspect, an embodiment of the present invention further provides a display device, including the display panel according to the second aspect.
According to the technical scheme provided by the embodiment of the invention, the data writing module 120 writes data voltage into the control end g of the driving module 110, and the driving module 110 provides driving current for the light emitting module 140 according to the voltage of the control end g so as to drive the light emitting module 140 to normally emit light; and connect the voltage fluctuation suppression module 150 between first power line and second power line, the voltage that the first power line provides is exported to the drive module 110 after the voltage fluctuation suppression module 150, the voltage fluctuation suppression module 150 can suppress the voltage fluctuation on the first power line through suppressing the disturbance signal in the voltage that the first power line provides, thus can reduce the fluctuation of the voltage that the first power line provides, and then reduced the fluctuation of the drive current that the drive module 110 outputs, help to improve the luminous uniformity of the light-emitting module 140, improve the display effect.
Drawings
Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 3 is a characteristic curve of a first transistor according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 5 is a driving timing diagram of a pixel circuit according to an embodiment of the invention;
FIG. 6 is a waveform diagram of a power supply voltage of the prior art;
FIG. 7 is a waveform diagram of a power supply voltage according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As described in the background, in the conventional display panel, the driving transistor is usually directly connected to the power line, and when the power voltage on the power line fluctuates due to the presence of the disturbance signal, the driving current output from the driving transistor is affected. When the power supply voltage fluctuates, the driving currents generated by the driving transistors have obvious differences, and the control accuracy degree of each driving current directly influences the light emitting degree of the display, so that the brightness of pixels is inconsistent, and the display uniformity of the display device is influenced.
In view of the foregoing problems, embodiments of the present invention provide a pixel circuit capable of suppressing fluctuation of a power supply voltage, thereby reducing fluctuation of a driving current, improving light emission uniformity, and improving a display effect. Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention, and referring to fig. 1, the pixel circuit includes: the driving module 110, the data writing module 120, the storage module 130, the light emitting module 140 and the voltage fluctuation suppression module 150; the data writing module 120 is connected between the data line and the driving module 110, and is configured to write a data voltage Vdata to the control terminal g of the driving module 110; the storage module 130 is connected to the control terminal g of the driving module 110, and is configured to store the voltage written into the control terminal g of the driving module 110; the voltage fluctuation suppression module 150 is connected between the first power line and the second power line, the voltage fluctuation suppression module 150 is configured to suppress voltage fluctuation on the first power line, the driving module 110 and the light emitting module 140 are connected between the voltage fluctuation suppression module 150 and the second power line, the voltage provided by the first power line is output to the driving module 110 through the voltage fluctuation suppression module 150, and the driving module 110 is configured to provide a driving signal to the light emitting module 140 according to the voltage of the control terminal g to drive the light emitting module to emit light.
Specifically, the pixel circuit includes at least a data writing phase and a light emitting phase in normal operation. In the data writing phase, the data writing module 120 may be turned on in response to the first Scan signal Scan1 of the first Scan signal line, and after the data writing module 120 is turned on, the data voltage Vdata on the data line is written into the control terminal g of the driving module 110 and the one end of the storage module 130, which is a process of charging the storage module 130, and after the charging is completed, the data voltage Vdata is stored in the storage module 130. In the light emitting phase, the memory module 130 maintains the voltage level of the control terminal g of the driving module 110 as the data voltage Vdata, and under the action of the data voltage Vdata and the voltage VDD on the first power line, the driving module 110 generates a driving signal to drive the light emitting module 140 to emit light, where the driving signal may be a driving current. The voltage VDD on the first power line is a dc voltage and is affected by the power itself or external electromagnetic interference, and the voltage VDD on the first power line is usually doped with a disturbance signal, which makes the dc voltage VDD fluctuate, so that the driving current output by the driving module 110 fluctuates, which is not favorable for the light emitting uniformity of the light emitting module 140. The voltage fluctuation suppression module 150 is connected between the first power line and the second power line, the voltage on the first power line is output to the driving module 110 through the voltage fluctuation suppression module 150, and the voltage fluctuation suppression module 150 can suppress the disturbance signal, that is, the voltage fluctuation suppression module 150 can reduce the effective value of the disturbance signal. Therefore, after the voltage VDD provided by the first power line passes through the voltage fluctuation suppression module 150, the fluctuation of the voltage VDD is reduced, so that the fluctuation of the driving current of the light emitting module 140 is reduced, which is beneficial to improving the light emitting uniformity of the light emitting module 140.
According to the technical scheme provided by the embodiment of the invention, data voltage is written into the control end g of the driving module 110 through the data writing module 120, and the driving module 110 provides driving current for the light emitting module 140 according to the voltage of the control end g so as to drive the light emitting module 140 to normally emit light; and connect the voltage fluctuation suppression module 150 between first power line and second power line, the voltage that the first power line provides is exported to the drive module 110 after the voltage fluctuation suppression module 150, the voltage fluctuation suppression module 150 can suppress the voltage fluctuation on the first power line through suppressing the disturbance signal in the voltage that the first power line provides, thus can reduce the fluctuation of the voltage that the first power line provides, and then reduced the fluctuation of the drive current that the drive module 110 outputs, help to improve the luminous uniformity of the light-emitting module 140, improve the display effect.
It should be noted that the pixel circuit shown in fig. 1 is only an exemplary structure of the embodiment of the present invention, and in practical applications, the pixel circuit of the embodiment of the present invention may also be a pixel circuit structure in other forms, which is not limited in this respect.
Fig. 2 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, wherein the pixel circuit shown in fig. 2 is an embodiment of the pixel circuit shown in fig. 1. On the basis of the above technical solution, referring to fig. 2, the voltage fluctuation suppression module 150 includes a first resistor R1 and a first transistor T1; a first end of the first resistor R1 is connected to the first power line, a second end of the first resistor R1 is connected to a first pole of the first transistor T1, a second pole of the first transistor T1 is connected to the second power line, a gate of the first transistor T1 is connected to a second pole of the first transistor T1, and the driving module 110 is connected between the second end of the first resistor R1 and the second power line.
The driving module 110 includes a second transistor T2, the data writing module 120 includes a third transistor T3, the light emitting module 140 includes a light emitting diode D1, and the memory module 130 includes a storage capacitor C1; a gate of the second transistor T2 is connected to a data line through the third transistor T3, a gate of the third transistor T3 is connected to the first scan signal line, the storage capacitor C1 is connected between the gate and the first pole of the second transistor T2, a second pole of the second transistor T2 is connected to an anode of the light emitting diode D1, and a cathode of the light emitting diode D1 is connected to the second power supply line.
Illustratively, in the data writing phase, the data writing module 120 is controlled to be turned on, and the data voltage Vdata on the data line is written into the control terminal g of the driving module 110 and the end of the memory module 130 connected to the control terminal g of the driving module 110. Due to the disturbance signal of the voltage VDD on the first power line, the voltage VDD fluctuates, and the fluctuating voltage makes the driving current output by the driving module 110 unstable. Therefore, the voltage VDD on the first power line is output to the driving module 110 through the voltage fluctuation suppression module 150 cascaded by the first resistor R1 and the first transistor T1, and the voltage fluctuation suppression module 150 suppresses the voltage VDD fluctuation on the first power line to reduce the fluctuation of the voltage VDD on the first power line. In the light emitting phase, the storage module 130 maintains the potential of the control terminal g of the driving module 110 as the data voltage Vdata, and the driving module 110 generates the driving current to drive the light emitting module 140 to emit light under the action of the data voltage Vdata and the voltage output by the voltage fluctuation suppression module 150.
Further, the first transistor T1 operates in a saturation region. Specifically, the first transistor T1 operates in a saturation region and may be equivalent to a variable resistor. The first transistor T1 is diode connected, i.e. the gate of the first transistor T1 is connected to its second pole, so that the first transistor T1 exhibits different resistances in different current states. Fig. 3 is a characteristic curve of the first transistor according to the embodiment of the invention, referring to fig. 3, according to the characteristic curve of the first transistor, when the first transistor T1 operates in the saturation region, a slope of a tangent at an intersection of a voltage curve at the first pole of the first transistor T1 (i.e., an output voltage of the voltage fluctuation suppression module 150) and the characteristic curve is 1/R, and a slope of a connection line between the intersection and the origin of coordinates is 1/R, where R is an equivalent resistance of the first transistor T1 in the dc state, and R is an equivalent resistance of the first transistor T1 in the ac state. As can be seen from fig. 3, the slope of the tangent is greater than the slope of the connection line between the intersection point and the origin of coordinates, i.e., R > R, that is, in the dc state, the equivalent resistance of the first transistor T1 is greater; in the ac state, the equivalent resistance of the first transistor T1 is small. Therefore, when the dc voltage VDD provided by the first power line includes the ac disturbance voltage, the first transistor T1 presents a smaller impedance in the ac state, and the first resistor R1 is not affected by ac or dc, so that the first resistor R1 receives the ac disturbance voltage as much as the ac disturbance voltage. For the ac disturbance voltage, the first resistor R1 divides the ac disturbance voltage more than the first transistor T1, so that the ac disturbance voltage in the voltage output by the voltage fluctuation suppression module 150 to the first pole of the second transistor T2 is reduced, that is, the fluctuation of the voltage VDD supplied by the first power line is reduced.
Illustratively, the first transistor T1, the second transistor T2, and the third transistor T3 are all p-type transistors. The first Scan signal line outputs the first Scan signal Scan1 to the gate of the third transistor T3, and when the first Scan signal Scan1 is at a low level, the third transistor T3 is turned on, and the data voltage Vdata on the data line connected to the third transistor T3 is written into the gate of the second transistor T2, while charging the storage capacitor C1; the storage capacitor C1 maintains the potential of the gate of the second transistor T2 at the data voltage Vdata. The voltage VDD provided by the first power line includes ac perturbation voltage, and since the first transistor T1 presents a low-resistance state to the ac perturbation voltage, the first resistor R1 bears a same amount of divided ac perturbation voltage, which reduces the ac perturbation voltage in the voltage outputted from the second terminal of the first resistor R1 to the second pole of the second transistor T2, so that the power voltage of the second pole of the second transistor T2 is more stable. Under the action of the data voltage Vdata and the voltage output by the voltage fluctuation suppression module 150, the second transistor T2 outputs a stable driving current, so that the light emitting uniformity of the light emitting diode D1 is improved, and the display effect is improved.
Fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, in which, based on the above technical solution, the driving module 110 includes a second transistor T2, the data writing module 120 includes a third transistor T3, the light emitting module 140 includes a light emitting diode D1, and the storage module 130 includes a storage capacitor C1; a gate electrode of the third transistor T3 is connected to the first scan signal line, a first electrode of the third transistor T3 is connected to the data line, and a second electrode of the third transistor T3 is connected to the first electrode of the second transistor T2; the pixel circuit further includes a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and an eighth transistor T8; a gate of the fourth transistor T4 is connected to the first scan signal line, a first pole of the fourth transistor T4 is connected to the gate of the second transistor T2, and a second pole of the fourth transistor T4 is connected to the second pole of the second transistor T2; a gate of the fifth transistor T5 is connected to the second scan signal line, a first pole of the fifth transistor T5 is inputted with the reference voltage Vref, and a second pole of the fifth transistor T5 is connected to the gate of the second transistor T2; a gate of the sixth transistor T6 is connected to the second scan signal line, a first pole of the sixth transistor T6 receives the reference voltage Vref, a second pole of the sixth transistor T6 is connected to an anode of the light emitting diode D1, and a cathode of the light emitting diode D1 is connected to the second power line; gates of the seventh transistor T7 and the eighth transistor T8 are both connected to the light emission control signal line, a first pole of the seventh transistor T7 is connected to the second terminal of the first resistor R1, and a second pole of the seventh transistor T7 is connected to the first pole of the second transistor T2; a first pole of the eighth transistor T8 is connected to a second pole of the second transistor T2, and a second pole of the eighth transistor T8 is connected to an anode of the light emitting diode D1.
In particular, in a display panel, there are usually millions of second transistors T2, and due to the limitation of the manufacturing process, the threshold voltage of each second transistor T2 is different, which easily causes the difference of the driving current output by the second transistor T2. The fourth transistor T4 is used to implement threshold voltage compensation of the second transistor T2, so as to reduce the difference of the driving currents, thereby improving the display effect of the display panel. The fourth transistor T4 may be a dual-gate transistor, and in the working process of the pixel circuit, the leakage current discharged from the fourth transistor T4 to the gate of the second transistor T2 may be reduced, so as to further maintain the stability of the gate voltage of the second transistor T2, which is beneficial to improving the display effect of the display panel.
The fifth transistor T5 and the sixth transistor T6 are used for initialization of the second transistor T2 and the light emitting diode D1, respectively. A reference voltage Vref is input to a first pole of the fifth transistor T5 and a first pole of the sixth transistor T6, and when the fifth transistor T5 and the sixth transistor T6 are turned on according to the second Scan signal Scan2 output from the second Scan signal line, the reference voltage Vref is written to the gate of the second transistor T2 and the anode of the light emitting diode D1 through the fifth transistor T5 and the sixth transistor T6, respectively, and potentials of the gate of the second transistor T2 and the anode of the light emitting diode D1 are initialized to the reference voltage Vref. The seventh transistor T7 and the eighth transistor T8 are used for controlling the light emitting diode D1 to emit light, in a light emitting period, the seventh transistor T7 and the eighth transistor T8 are turned on, the second transistor T2 generates a driving current under the action of the data voltage Vdata and the voltage output by the voltage fluctuation suppression module 150, and outputs the driving current to the anode of the light emitting diode D1 through the eighth transistor T8 to drive the light emitting diode D1 to emit light, the cathode of the light emitting diode D1 is connected to a second power line, and the voltage on the second power line is usually a negative value.
As an alternative implementation manner of the embodiment of the present invention, fig. 5 is a driving timing diagram of a pixel circuit according to the embodiment of the present invention, where the driving timing diagram can be applied to the pixel circuit shown in fig. 4. Taking the pixel circuit shown in fig. 4 as an example, the working principle of the pixel circuit provided by the embodiment of the invention is specifically described with reference to fig. 5. In the pixel circuit provided in this embodiment, the first transistor T1 to the eighth transistor T8 may be both p-type and n-type. In the following, the first to eighth transistors T1 to T8 are all p-type transistors, which are taken as an example for the following embodiments of the present invention.
The pixel circuit provided by the embodiment of the invention comprises an initialization phase t1, a data writing phase t2 and a light emitting phase t 3.
In the initialization stage T1, the emission control signal EM output by the emission control signal line is at a high level, the seventh transistor T7 and the eighth transistor T8 are turned off, the first Scan signal Scan1 output by the first Scan signal line is at a high level, the third transistor T3 and the fourth transistor T4 are turned off, the second Scan signal Scan2 output by the second Scan signal line is at a low level, the fifth transistor T5 and the sixth transistor T6 are turned on, the reference voltage Vref is written to the gate of the second transistor T2 through the fifth transistor T5, and the potential of the gate of the second transistor T2 is initialized to the potential of the reference voltage Vref. The reference voltage Vref is also written to the anode of the light emitting diode D1 through the sixth transistor T6, and the potential of the anode of the light emitting diode D1 is initialized to the potential of the reference voltage Vref.
In the data writing period T2, the emission control signal EM output by the emission control signal line is at a high level, the seventh transistor T7 and the eighth transistor T8 are turned off, the first Scan signal Scan1 output by the first Scan signal line is at a low level, the third transistor T3 and the fourth transistor T4 are turned on, the second Scan signal Scan2 output by the second Scan signal line is at a high level, and the fifth transistor T5 and the sixth transistor T6 are turned off. The data voltage Vdata on the data line is written to the gate of the second transistor T2 and the storage capacitor C1 through the third transistor T3, the second transistor T2, and the fourth transistor T4, and at the same time, the second transistor T2 threshold voltage compensation is achieved through the fourth transistor T4. At this time, the storage capacitor C1 holds the gate potential of the second transistor T2 at Vdata- | Vth |, where Vth is the threshold voltage of the second transistor T2.
In the light emission period T3, the light emission control signal EM output by the light emission control signal line is at a low level, the seventh transistor T7 and the eighth transistor T8 are turned on, the first Scan signal Scan1 output by the first Scan signal line is at a high level, the third transistor T3 and the fourth transistor T4 are turned off, the second Scan signal Scan2 output by the second Scan signal line is at a high level, and the fifth transistor T5 and the sixth transistor T6 are turned off. Since the seventh transistor T7 is turned on, the voltage Vb output from the voltage fluctuation suppressing module 150 is applied to the first pole of the second transistor T2 through the seventh transistor T7 to supply the power voltage to the second transistor T2. The first transistor T1 operates in the saturation region, and the first transistor T1 is diode connected, so that the first transistor T1 exhibits low impedance in the ac state, i.e., the equivalent resistance of the first transistor T1 is small in the ac state. Since the resistance value of the first resistor R1 is fixed, the first resistor R1 divides the ac disturbance voltage Δ V more than the first transistor T1 with respect to the ac disturbance voltage Δ V. The first power line, the first resistor R1, the first transistor T1 and the second power line form a path, and when the voltage VDD including the ac perturbation voltage Δ V is provided by the first power line, the ac perturbation voltage Δ V generates more voltage drop on the first resistor R1, thereby reducing the ac perturbation voltage in the voltage Vb output by the voltage fluctuation suppression module 150. The voltage Vb is written to the anode of the light emitting diode D1 through the seventh transistor T7, the second transistor T2, and the eighth transistor T8, the voltage VSS on the second power line is written to the cathode of the light emitting diode D1, and the second transistor T2 generates a driving current to drive the light emitting diode D1 to emit light. Since the disturbance component in the voltage Vb is reduced (that is, the voltage fluctuation of the voltage Vb is reduced), the fluctuation of the driving current output by the second transistor T2 is reduced, so that the driving current is more stable, which is beneficial to improving the light emitting uniformity of the light emitting diode D1.
As an alternative implementation manner of the embodiment of the present invention, the voltage VDD on the first power line and the output voltage Vb of the voltage fluctuation suppression module 150 satisfy an exponential relationship, and the exponent is 1/2. Specifically, in the voltage fluctuation suppression module 150, the current I flowing through the first resistor R1R1Can be expressed as
VDD is VDD1+ Δ V, VDD1 is a dc voltage component, and Δ V is an ac disturbance voltage component. A current I flowing through the first transistor T1T1Is composed of
Wherein, the voltage V between the gate and the first pole of the first transistor T1gsVg is the gate voltage of the first transistor T1, Vs is the first voltage of the first transistor T1, and Vs is equal to Vb, and Vg is VSS since the gate of the first transistor T1 is connected to the second power line. Using the second power line as an example, VSS is 0V, so VgsWhen Vg-Vs is 0-Vb, the current I flowing through the first transistor T1 is knownT1Can be expressed as
Where μ is the carrier mobility, W/L is the width-to-length ratio of the gate of the first transistor T1, CoxIs the capacitance per unit area of the gate oxide layer of the first transistor T1. According to IR1＝IT1It can be seen that the voltage output by the voltage fluctuation suppression module 150
As can be seen from the formula, Vb and Δ V are in an open square relationship, so that Δ V is greatly reduced after the open square calculation, and the alternating-current disturbance voltage in Vb is obviously reduced. Since the dc component of the voltage VDD supplied from the first power line is reduced after the voltage VDD passes through the voltage fluctuation suppression circuit 150, it is necessary to increase the voltage value of the voltage VDD supplied from the first power line appropriately in practical applications. Fig. 6 is a waveform diagram of a power supply voltage in the prior art, and fig. 7 is a waveform diagram of a power supply voltage according to an embodiment of the invention. It should be noted that the power supply voltage described herein refers to a voltage applied to the source of the driving transistor (i.e., the voltage VDD provided by the first power line) in the prior art, and for the technical solution of the embodiment of the present invention, the power supply voltage refers to a voltage Vb output by the voltage fluctuation suppression module 150; and only the ac perturbation voltage av is shown in fig. 6 and 7. Illustratively, the magnitude of the ac disturbance voltage Δ V included in the voltage VDD provided by the first power line is 100mV, as can be seen from fig. 6 and 7, the ac disturbance voltage in the voltage applied to the source of the driving transistor in the prior art is 100mV, whereas the ac disturbance voltage in the voltage Vb output by the voltage fluctuation suppression module 150 in the technical solution provided by the embodiment of the present invention is 50mV, which significantly reduces the voltage fluctuation, and is further beneficial to improving the light emitting efficiency of the light emitting diode D1, so that the light emitting diode D1 emits light more uniformly.
As an alternative implementation manner of the embodiment of the present invention, fig. 8 is a schematic structural diagram of another pixel circuit provided in the embodiment of the present invention, and based on the above technical solution, the voltage fluctuation suppressing module 150 includes at least two first resistors R1 and at least two first transistors T1 in one-to-one correspondence with the first resistors R1; a first pole of the first transistor T1 is connected to the first power line through a first resistor R1, and a second pole of the last first transistor T1 is connected to the second power line; for two adjacent first transistors T1, the second pole of the previous first transistor T1 is connected to the first pole of the next first transistor T1 through a first resistor R1; the gate of each first transistor T1 is connected to its second pole.
Specifically, the voltage fluctuation suppression module 150 may include a plurality of first resistors R1, and first transistors T1 connected in one-to-one correspondence with the plurality of first resistors R1. For convenience of description, the first resistor is referred to as R11, the second first resistor is referred to as R12, the third first resistor is referred to as R13 … …, and so on, the first transistor is referred to as T11, the second first transistor is referred to as T12, and the third first transistor is referred to as T13 … …, and so on. Illustratively, the voltage fluctuation suppressing module 150 includes three first transistors T1 and three first resistors R1, a first terminal of the first resistor R11 is connected to the first power line, a second terminal of the first resistor R11 is connected to a first pole of the first transistor T11, a second terminal of the first transistor T11 is connected to a first pole of the second first transistor T12 through the second first resistor R12, a second pole of the second first transistor T12 is connected to a first pole of the third first transistor T13 through the third first resistor R13, and a second pole of the third first transistor T13 is connected to the second power line; the gates of the first transistor T11, the second transistor T12 and the third transistor T13 are all connected to their second poles. By arranging the voltage fluctuation suppressing module 150 in such a manner that the plurality of first resistors R1 and the first transistor T1 are sequentially superimposed, the ac perturbation voltage Δ V in the voltage VDD supplied from the first power line can be reduced to a minimum. That is to say, the alternating-current disturbance voltage Δ V in the voltage VDD provided by the first power line is suppressed layer by layer, so that the influence of the driving current in the pixel circuit of the alternating-current disturbance voltage Δ V is minimized, the stability of the driving current can be ensured to the greatest extent, and the light emitting uniformity of the light emitting diode D1 is further improved.
Further, the embodiment of the invention also provides a display panel. The display panel provided by the embodiment of the invention comprises the pixel circuits provided by any embodiment of the invention, and the plurality of pixel circuits are arrayed in the display panel. Fig. 9 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and with reference to fig. 2 and fig. 9, a description is given of an example in which the display panel according to the embodiment of the present invention includes the pixel circuit shown in fig. 2. The voltage fluctuation suppression module 150 includes a first resistor R1 and a first transistor T1; a first end of the first resistor R1 is connected to a first power line, a second end of the first resistor R1 is connected to a first pole of the first transistor T1, a second pole of the first transistor R1 is connected to a second power line, a gate of the first transistor R1 is connected to a second pole of the first transistor R1, and the driving module 110 is connected between the second end of the first resistor R1 and the second power line; the display panel further includes a connection terminal 110, the connection terminal 110 being for inputting the power supply voltage VDD, the connection terminal 110 being connected to the first power supply line 101, the resistance value of the first resistor R1 in the pixel circuit EX connected to the first power supply line 101 being smaller the farther from the connection terminal 110 in the extending direction of the first power supply line 101.
Specifically, the display panel may include a display area 100 and a non-display area 200. A connection terminal 110 may be disposed at an edge of the display panel, and the connection terminal 110 is connected to the first power line 101 for inputting the power voltage VDD. The connection terminal 110 may also be connected to the second power line 102 to supply a cathode voltage to the light emitting module 140. The first power line 101 may be a metal trace having a certain impedance, and the farther from the connection terminal 110 along the extending direction of the first power line 101 from the connection terminal 110 (i.e., the longer the first power line 101), the greater the impedance on the first power line 101. The first resistor R1 is connected to the first power line 101, and the equivalent resistor at the end of the first resistor R1 connected to the first pole of the second transistor T2 is the sum of the impedance of the first power line 101 and the resistance of the first resistor R1. In a case where the ac disturbance voltage suppression effect is kept constant, the resistance of the first resistor R1 is reduced as the impedance of the first power line 101 increases, so that the equivalent resistance of the first resistor R1 connected to the first terminal of the second transistor T2 is not changed. Illustratively, the connection terminal 110 inputs the power supply voltage VDD and is connected to the first resistor R1 in each pixel circuit EX through the first power supply line 101, and the first pixel circuit EX1 is farther from the connection terminal 110 than the fourth pixel circuit EX4 is from the connection terminal 110 in the extending direction of the first power supply line 101, and therefore, the resistance value of the first resistor R1 connected to the first power supply line 101 in the first pixel circuit EX1 is smaller than the resistance value of the first resistor R1 in the fourth pixel circuit EX 4.
The display panel comprises the pixel circuit EX provided by any embodiment of the invention, and further comprises a scanning driving circuit 210, a display driving chip 220, a plurality of data lines (D1, D2, D3 … …), a plurality of scanning lines (S1, S2, S3 … …); the port of the scan driving circuit 210 is electrically connected to the scan line, and the port of the display driving chip 220 is electrically connected to the data line. Fig. 9 exemplarily shows the data voltage input terminal Vdata, the first Scan signal input terminal Scan1, and the second Scan signal input terminal Scan2 of the pixel circuit EX corresponding to one pixel. The display panel provided in the embodiment of the present invention includes the pixel circuit EX provided in any embodiment of the present invention, and therefore, the display panel has the above-mentioned advantages, which are not described herein again.
In other embodiments, the first resistor R1 may be formed of polysilicon, which is compatible with the transistor and therefore can be formed at the same time as the transistor. For example, the polysilicon layer is doped by ion implantation to control its sheet resistance (film resistance), and then the polysilicon deposited on the field region is photo-etched to the shape of the resistor strip.
Optionally, fig. 10 is a schematic structural diagram of another display panel provided in the embodiment of the present invention. On the basis of the above technical solution, referring to fig. 2 and 10, a buffer layer 21 is disposed on one side of a substrate 20, the buffer layer 21 can play a role in buffering and isolating water and oxygen, and prevents impurities on the substrate 20 from affecting an array substrate, and the buffer layer 21 can be made of silicon oxide. Forming a polysilicon layer 111, a gate insulating layer 22 and a first metal layer in sequence on the buffer layer 21 at a side away from the substrate 20, wherein the polysilicon layer 111 may include a channel region, a source region and a drain region in sequence; in the fabrication process of the pixel circuit, the first metal layer includes the gate electrode 112, and the gate insulating layer 22 is used for electrical insulation between the gate electrode 112 and the polysilicon layer 111. The side of the first metal layer, which is far away from the substrate 20, further comprises a capacitor insulating layer 23, the side of the capacitor insulating layer 23, which is far away from the substrate 20, is formed with a second metal layer, the side of the second metal layer, which is far away from the substrate 20, further comprises an interlayer insulating layer 24, the side of the interlayer insulating layer 24, which is far away from the substrate 20, comprises a third metal layer, the third metal layer comprises a first pole 113 and a second pole 114 of the thin film transistor 110, wherein the first pole 113 is a source electrode, and the second pole 114 is a drain electrode; the first and second poles 113 and 114 are connected to the polysilicon layer 111 through vias, respectively. The interlayer insulating layer 24 further includes an insulating layer 25 and a fourth metal layer including the first power supply line 160 on a side away from the substrate 20. A planarization layer 26 is further included in a layer of the fourth metal layer 160 away from the substrate 20, a light emitting device layer is included on a side of the planarization layer 26 away from the substrate 20, the light emitting device layer includes an anode 141, a light emitting layer 142, and a cathode 143, and the pixel defining layer 27 is used to define a plurality of light emitting devices. The first electrode 1132, the second electrode 1142 and the gate 1122 form a first transistor T1 in the pixel circuit, the display panel provided by the embodiment of the present invention further includes a cathode layer 143 forming a cathode of the light emitting module 140, and the second electrodes 1142 of the first transistors T1 in the pixel circuits are connected to each other and to the cathode layer 143. The advantage of this arrangement is that the second electrodes 1142 of the first transistors T1 in all the pixel circuits in the display panel are connected to each other and to the cathode layer 143 constituting the cathode of the light emitting module 140, that is, the film layer formed by connecting the second electrodes 1142 of all the first transistors T1 is connected in parallel to the cathode layer 142, so that the impedance of the cathode layer 1143 in the pixel circuits can be reduced, which is favorable for improving the light emitting efficiency of the light emitting module 140.
In addition, the embodiment of the invention also provides a display device which comprises the display panel provided by any embodiment of the invention. The display device provided by the embodiment of the invention comprises the pixel circuit provided by any embodiment of the invention, so that the display device has the beneficial effects, and the description is omitted.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A pixel circuit, comprising: the device comprises a driving module, a data writing module, a storage module, a light emitting module and a voltage fluctuation suppression module;
the data writing module is connected between a data line and the driving module and used for writing data voltage into the control end of the driving module;
the storage module is connected with the control end of the driving module and used for storing the voltage written into the control end of the driving module;
the voltage fluctuation suppression module is connected between a first power line and a second power line, the voltage fluctuation suppression module is used for suppressing voltage fluctuation on the first power line, the driving module and the light-emitting module are connected between the voltage fluctuation suppression module and the second power line, voltage provided by the first power line is output to the driving module through the voltage fluctuation suppression module, and the driving module is used for providing a driving signal to the light-emitting module according to voltage of a control end to drive the light-emitting module to emit light.
2. The pixel circuit according to claim 1, wherein the voltage fluctuation suppression module includes a first resistor and a first transistor;
the first end of the first resistor is connected with the first power line, the second end of the first resistor is connected with the first pole of the first transistor, the second pole of the first transistor is connected with the second power line, the grid electrode of the first transistor is connected with the second pole of the first transistor, and the driving module is connected between the second end of the first resistor and the second power line.
3. The pixel circuit according to claim 1, wherein the voltage fluctuation suppression module includes at least two first resistors and at least two first transistors in one-to-one correspondence with the first resistors;
a first pole of a first one of the first transistors is connected to the first power line through a first resistor, and a second pole of a last one of the first transistors is connected to the second power line;
for two adjacent first transistors, the second pole of the former first transistor is connected to the first pole of the latter first transistor through one first resistor;
the gate of each of the first transistors is connected to the second pole thereof.
4. A pixel circuit according to claim 2 or 3, wherein the first transistor operates in a saturation region.
5. The pixel circuit according to claim 1, wherein the voltage on the first power line and the output voltage of the voltage fluctuation suppression module satisfy an exponential relationship, the exponent being 1/2.
6. The pixel circuit according to claim 2, wherein the driving module includes a second transistor, the data writing module includes a third transistor, the light emitting module includes a light emitting diode, and the storage module includes a storage capacitor;
a gate of the third transistor is connected to a first scan signal line, a first pole of the third transistor is connected to the data line, and a second pole of the third transistor is connected to a first pole of the second transistor;
the pixel circuit further comprises a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor and an eighth transistor;
a gate of the fourth transistor is connected to the first scan signal line, a first pole of the fourth transistor is connected to a gate of the second transistor, and a second pole of the fourth transistor is connected to a second pole of the second transistor;
a gate of the fifth transistor is connected to a second scan signal line, a first pole of the fifth transistor receives a reference voltage, and a second pole of the fifth transistor is connected to a gate of the second transistor; a gate of the sixth transistor is connected to the second scanning signal line, a first pole of the sixth transistor receives a reference voltage, a second pole of the sixth transistor is connected to an anode of the light emitting diode, and a cathode of the light emitting diode is connected to the second power line;
the gates of the seventh transistor and the eighth transistor are both connected with a light-emitting control signal line, the first pole of the seventh transistor is connected with the second end of the first resistor, and the second pole of the seventh transistor is connected with the first pole of the second transistor; a first pole of the eighth transistor is connected to the second pole of the second transistor, and a second pole of the eighth transistor is connected to the anode of the light emitting diode.
7. A display panel comprising the pixel circuit of claim 1 arranged in an array.
8. The display panel according to claim 7, wherein the voltage fluctuation suppressing module comprises a first resistor and a first transistor;
a first end of the first resistor is connected with the first power line, a second end of the first resistor is connected with a first pole of the first transistor, a second pole of the first transistor is connected with the second power line, a grid electrode of the first transistor is connected with the second pole of the first transistor, and the driving module is connected between the second end of the first resistor and the second power line;
the display panel further comprises a connecting terminal, the connecting terminal is used for inputting power voltage, the connecting terminal is connected with the first power line, and the farther the distance from the connecting terminal along the extending direction of the first power line is, the smaller the resistance value of the first resistor in the pixel circuit connected with the first power line is.
9. The display panel according to claim 8, further comprising a cathode layer which constitutes a cathode of the light-emitting module, wherein the second pole of the first transistor in each of the pixel circuits is connected to each other and to the cathode layer.
10. A display device characterized by comprising the display panel according to any one of claims 7 to 9.
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| CN113421521A (en) * | 2021-06-15 | 2021-09-21 | Tcl华星光电技术有限公司 | Backlight driving circuit, driving method and backlight module |
| CN113990252A (en) * | 2021-11-01 | 2022-01-28 | 厦门天马显示科技有限公司 | Drive circuit and display module |
| CN113990252B (en) * | 2021-11-01 | 2023-03-10 | 厦门天马显示科技有限公司 | Drive circuit and display module |
| CN114373417A (en) * | 2022-01-17 | 2022-04-19 | 武汉华星光电半导体显示技术有限公司 | Display device and electronic apparatus |
| CN114613330A (en) * | 2022-04-12 | 2022-06-10 | 昆山国显光电有限公司 | Display panel, driving method of display panel and display device |
| CN114613330B (en) * | 2022-04-12 | 2023-10-17 | 昆山国显光电有限公司 | Display panel, driving method of display panel and display device |
| WO2023236675A1 (en) * | 2022-06-08 | 2023-12-14 | 云谷（固安）科技有限公司 | Display driving method and apparatus for display screen, and device and medium |
| WO2024051200A1 (en) * | 2022-09-06 | 2024-03-14 | 惠科股份有限公司 | Pixel circuit, display panel and display apparatus |
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