CN111856981A - IO controller - Google Patents
IO controller Download PDFInfo
- Publication number
- CN111856981A CN111856981A CN201910340971.3A CN201910340971A CN111856981A CN 111856981 A CN111856981 A CN 111856981A CN 201910340971 A CN201910340971 A CN 201910340971A CN 111856981 A CN111856981 A CN 111856981A
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- China
- Prior art keywords
- connector
- input
- controller
- board
- output
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- Pending
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- 230000005611 electricity Effects 0.000 claims 1
- 238000013461 design Methods 0.000 abstract description 3
- 238000012423 maintenance Methods 0.000 abstract description 2
- 230000008859 change Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 238000009658 destructive testing Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25257—Microcontroller
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Abstract
The invention provides an IO controller, which comprises a shell, a core board and an input/output bottom board, wherein the core board is provided with a first connector, the input/output bottom board is provided with a second connector, and the core board and the input/output bottom board are electrically connected through the first connector and the second connector; the invention adopts the design of the upper and lower layers of circuit boards to isolate part of electromagnetic interference from space; when the input/output bottom plate which is easy to damage is damaged, only the bottom plate with the same model needs to be replaced, the original control program does not need to be programmed again, the economy is realized, the time is saved, and the maintenance cost is reduced.
Description
Technical Field
The invention relates to an automatic control system, in particular to an IO controller.
Background
The existing IO controller is designed by a single circuit board, and a power supply, an input/output interface, a control chip and the like are arranged on one printed circuit board. The components on the circuit board are densely arranged, and the anti-interference capability and the electromagnetic compatibility are not easy to be in compliance; once the circuit board has a local failure, the whole circuit board needs to be replaced or repaired, and the redundancy and the economy are poor.
Disclosure of Invention
In view of the above disadvantages of the prior art, an object of the present invention is to provide an IO controller, which is used to solve the problems in the prior art that the arrangement of components of a circuit board is dense, and the interference resistance and the electromagnetic compatibility are not easy to be compliant; and the circuit board has local faults and is not easy to replace.
In order to achieve the above and other related objects, the present invention provides an IO controller, which includes a housing, a core board, and an input/output board, wherein the core board is installed with a first connector, the input/output board is installed with a second connector, and the core board and the input/output board are electrically connected through the first connector and the second connector.
In an embodiment of the present invention, the core board includes a microcontroller chip.
In an embodiment of the present invention, the input/output backplane includes a power module and an IO interface module.
In an embodiment of the invention, the plurality of terminals of the IO interface module are symmetrically disposed on two sides of the input/output backplane.
In an embodiment of the invention, the first connector is a female socket, and the second connector is a pin header.
In an embodiment of the invention, the number of the first connectors and the second connectors is plural and matched with each other.
In an embodiment of the invention, the core board is coaxial with and parallel to the input/output board, and the core board is located above the input/output board.
In an embodiment of the invention, an area of the input/output backplane is larger than an area of the core board.
As described above, the IO controller of the present invention has the following advantageous effects: through the layered design, the power supply and the input/output interface part which are easy to generate interference are placed at the bottom, and the controller chip which is easy to be interfered is placed on the top layer circuit board, so that part of electromagnetic interference is isolated from space. In addition, due to the adoption of the layered design, when the bottom plate which is easy to damage is damaged, only the bottom plate with the same model needs to be replaced without replacing the whole controller, the original control program does not need to be rewritten, the economy and the time saving are realized, and the maintenance cost is reduced.
Drawings
Fig. 1 shows a front view of the structure of the present invention.
Fig. 2 shows a top view of the structure of the present invention.
Wherein, 1, a core board; 2. an input-output backplane; 3. a first connector; 4. a second connector; 5. a power supply module; 6. And an IO interface module.
Detailed Description
The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will become apparent to those skilled in the art from the present disclosure.
Please refer to fig. 1 and fig. 2. It should be understood that the structures, ratios, sizes, and the like shown in the drawings and described in the specification are only used for matching with the disclosure of the specification, so as to be understood and read by those skilled in the art, and are not used to limit the conditions under which the present invention can be implemented, so that the present invention has no technical significance, and any structural modification, ratio relationship change, or size adjustment should still fall within the scope of the present invention without affecting the efficacy and the achievable purpose of the present invention. In addition, the terms "upper", "lower", "left", "right", "middle" and "one" used in the present specification are for clarity of description, and are not intended to limit the scope of the present invention, and the relative relationship between the terms and the terms is not to be construed as a scope of the present invention.
Referring to fig. 1, the present invention provides an IO controller, which includes a housing, a core board 1 and an input/output board 2, wherein the core board 1 is mounted with a first connector 3, the input/output board 2 is mounted with a second connector 4, and the core board 1 and the input/output board 2 are electrically connected through the first connector 3 and the second connector 4.
The core board 1 includes a microcontroller chip.
Referring to fig. 2, the input/output backplane 2 includes an IO interface module 6, and a plurality of terminals of the IO interface module 6 are symmetrically disposed on two sides of the input/output backplane 2.
Referring to fig. 1, the input/output backplane 2 includes a power module 5, and an external power source is connected to the input/output backplane 2 through an IO interface module 6, and supplies power to the IO controller after being filtered and stepped down by the power module 5.
Referring to fig. 1, the first connector 3 is a female socket, and the second connector 4 is a pin header. The number of the first connector 3 and the second connector 4 is plural and matched with each other. When mounting, the first connector 3 on the core board 1 is aligned with the second connector 4 on the input/output board 2, and the mounting is performed vertically downward, and after mounting, it is confirmed that there is no gap or misalignment between the first connector 3 and the second connector 4.
Referring to fig. 2, the core board 1 is coaxial with and parallel to the input/output board 2, the core board 1 is located above the input/output board 2, and the area of the input/output board 2 is larger than that of the core board 1.
When in use, the first connector 3 on the core board 1 is aligned with the second connector 4 on the input/output board 2 and vertically mounted downwards, and after mounting, no gap or dislocation between the first connector 3 and the second connector 4 is confirmed, and the shell is mounted. Outside power cord and signal line are connected on IO interface module 6, and external power source carries out filtering step-down through power module 5, and external signal is handled through isolation module, and the power and the signal after the processing are through first connector 3 and the input of second connector 4 nuclear core plate 1, and microcontroller chip handles received signal, and the relay module is exported control signal to rethread first connector 3 and second connector 4, control IO controller action.
Through comparison and test, the controller with the new structure has obvious improvement on the anti-interference capability, and because the controller is isolated from a main interference input source in space, the input and the output are isolated through photoelectricity, the interference which is coupled in through circuit wiring in the original structure is obviously reduced;
the novel structure is subjected to extreme destructive testing, the circuit board of the top-layer microcontroller is kept intact under the conditions of power module damage, input channel damage, output relay heavy load damage and the like, and the novel bottom plate can be immediately put into operation after being replaced.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (8)
1. An IO controller, includes shell, its characterized in that: still include nuclear core plate, input/output bottom plate, install first connector on the nuclear core plate, install the second connector on the input/output bottom plate, nuclear core plate and input/output bottom plate realize the electricity through first connector and second connector and connect.
2. The IO controller of claim 1, wherein: the core board includes a microcontroller chip.
3. The IO controller of claim 1, wherein: the input and output bottom plate comprises a power module and an IO interface module.
4. The IO controller of claim 3, wherein: and a plurality of wiring ends of the IO interface module are symmetrically arranged on two sides of the input/output bottom plate.
5. The IO controller of claim 1, wherein: the first connector is a female socket, and the second connector is a pin header.
6. The IO controller of claim 1, wherein: the number of the first connector and the second connector is multiple and matched with each other.
7. The IO controller of claim 1, wherein: the core board is coaxial with the input and output bottom board and parallel to each other, and the core board is located above the input and output bottom board.
8. The IO controller of claim 1, wherein: the area of the input and output bottom plate is larger than that of the core plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910340971.3A CN111856981A (en) | 2019-04-25 | 2019-04-25 | IO controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910340971.3A CN111856981A (en) | 2019-04-25 | 2019-04-25 | IO controller |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111856981A true CN111856981A (en) | 2020-10-30 |
Family
ID=72951595
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910340971.3A Pending CN111856981A (en) | 2019-04-25 | 2019-04-25 | IO controller |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111856981A (en) |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201681290U (en) * | 2010-01-22 | 2010-12-22 | 三一重机有限公司 | General equipment controller |
| CN102750843A (en) * | 2012-07-13 | 2012-10-24 | 上海易教信息科技有限公司 | Smart class cloud terminal based on Internet of Things |
| CN104111622A (en) * | 2014-06-16 | 2014-10-22 | 福建睿能科技股份有限公司 | Mechanical equipment and operation box thereof |
| CN203930437U (en) * | 2014-06-16 | 2014-11-05 | 福建睿能科技股份有限公司 | Automation equipment and control system thereof, control device |
| CN106855468A (en) * | 2015-12-09 | 2017-06-16 | 重庆市涪陵区德翔机电设备有限公司 | A kind of embedded electromechanical device state monitoring and fault diagnosis system |
| CN206313908U (en) * | 2016-10-20 | 2017-07-07 | 南京熊猫电子股份有限公司 | A kind of high definition movable video monitoring equipment |
| US9861002B1 (en) * | 2016-10-20 | 2018-01-02 | Rockwell Automation Technologies, Inc. | Single channel I/O in a modular sub-chassis |
| CN108732987A (en) * | 2018-06-14 | 2018-11-02 | 广东工业大学 | It can customize the embedded soft PLC control system and its design method of I/O port numbers |
-
2019
- 2019-04-25 CN CN201910340971.3A patent/CN111856981A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201681290U (en) * | 2010-01-22 | 2010-12-22 | 三一重机有限公司 | General equipment controller |
| CN102750843A (en) * | 2012-07-13 | 2012-10-24 | 上海易教信息科技有限公司 | Smart class cloud terminal based on Internet of Things |
| CN104111622A (en) * | 2014-06-16 | 2014-10-22 | 福建睿能科技股份有限公司 | Mechanical equipment and operation box thereof |
| CN203930437U (en) * | 2014-06-16 | 2014-11-05 | 福建睿能科技股份有限公司 | Automation equipment and control system thereof, control device |
| CN106855468A (en) * | 2015-12-09 | 2017-06-16 | 重庆市涪陵区德翔机电设备有限公司 | A kind of embedded electromechanical device state monitoring and fault diagnosis system |
| CN206313908U (en) * | 2016-10-20 | 2017-07-07 | 南京熊猫电子股份有限公司 | A kind of high definition movable video monitoring equipment |
| US9861002B1 (en) * | 2016-10-20 | 2018-01-02 | Rockwell Automation Technologies, Inc. | Single channel I/O in a modular sub-chassis |
| CN108732987A (en) * | 2018-06-14 | 2018-11-02 | 广东工业大学 | It can customize the embedded soft PLC control system and its design method of I/O port numbers |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20201030 |
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| RJ01 | Rejection of invention patent application after publication |