CN111850555B

CN111850555B - Method for preparing high-coupling-efficiency induction type superconducting edge detector and structure

Info

Publication number: CN111850555B
Application number: CN202010504529.2A
Authority: CN
Inventors: 王雪深; 钟青; 李劲劲; 钟源; 徐骁龙; 曹文会
Original assignee: National Institute of Metrology
Current assignee: National Institute of Metrology
Priority date: 2020-06-05
Filing date: 2020-06-05
Publication date: 2022-10-25
Anticipated expiration: 2040-06-05
Also published as: CN111850555A

Abstract

The application relates to a preparation method and a structure of an induction type superconducting edge detector with high coupling efficiency. The superconducting quantum interference device structure has a third superconducting thin film structure with a superconducting transition temperature. The superconducting transition edge structure arranged in a ring hole formed by surrounding the superconducting quantum interference device structure comprises a first superconducting thin film structure. When the superconducting transition temperature is reached, after photons or other particles are incident, the absorption of the superconducting transition edge structure on the incident light generates corresponding temperature rise, the effective area of the superconducting transition edge structure is reduced, the inductance of the superconducting quantum interference device structure is increased, and the output voltage is increased. The gap hole prepared by the preparation method of the high-coupling-efficiency induction type superconducting edge detector is in a nanometer level, the detection area of the superconducting transition edge structure is increased, the preparation difficulty of the superconducting quantum interference device structure is reduced, and the coupling efficiency of the superconducting quantum interference device structure and the superconducting transition edge structure is improved.

Description

Method for preparing high-coupling-efficiency induction type superconducting edge detector and structure

Technical Field

The application relates to the technical field of electronic devices, in particular to a preparation method and a structure of an induction type superconducting edge detector with high coupling efficiency.

Background

Superconducting transition edge detectors (TES) are an extremely sensitive detector. Its main structure is a superconducting film, and its working temp. is between its superconducting state and normal state, i.e. its resistance is between zero and normal value. Compared with a normal-temperature semiconductor single photon detector, such as an avalanche diode or a photomultiplier, the superconducting transition edge detector has the advantages of photon number resolution capability, energy resolution capability, high response speed and low detection energy, and is widely applied to the fields of precision measurement, astronomical detection, quantum communication, biological fluorescence sensing and the like.

Superconducting Quantum Interference devices (SQUIDs) are the most sensitive magnetic flux-voltage sensors at present, can precisely measure physical quantities such as magnetic fields (gradients), currents, voltages, displacements and the like which can be converted into magnetic fluxes through self-inductance and mutual inductance, and have wide application in the aspects of precision measurement, aerospace, geophysical, ocean exploration, biology, medicine and the like.

An induction superconducting edge detector (ISTED) is used for detecting a single photon between 4K and 8K and has the functions of a superconducting transition edge detector and a superconducting quantum interference device. When the induction type superconducting edge detector is at the temperature of superconducting transition, photons or other particles are incident, and then the superconducting film of the induction type superconducting edge detector absorbs the incident light to generate corresponding temperature rise, so that the effective area of the superconducting film is reduced. Meanwhile, the inductance of the inductive superconducting edge detector is increased, the output voltage is increased, and the voltage increase is in direct proportion to the energy of absorbed light. Therefore, the better the coupling between the superconducting thin film of the inductive superconducting edge probe and the inductive structure, the higher the sensitivity of the measurement.

However, in the conventional method for manufacturing the induction type superconducting edge detector with high coupling efficiency, as the detection area of the superconducting film is larger, the difficulty in manufacturing the inductance structure is higher, so that the coupling efficiency between the superconducting film of the induction type superconducting edge detector and the inductance structure is lower, and the measurement sensitivity of the induction type superconducting edge detector is reduced.

Disclosure of Invention

In view of the above, it is necessary to provide a method and a structure for manufacturing an inductive superconducting edge probe with high coupling efficiency.

In order to achieve the above object, in one aspect, the present application provides a method for manufacturing an inductive superconducting edge probe with high coupling efficiency, including the following steps:

providing a substrate, and sequentially preparing a total reflection thin film structure, a first insulating structure, a first superconducting thin film structure and a second insulating structure on the surface of the substrate; wherein the total reflection thin film structure, the first insulating structure, the first superconducting thin film structure, and the second insulating structure form a superconducting transition edge structure;

sequentially preparing a sacrificial layer and a second superconducting thin film on the surface of the second insulating structure far away from the first superconducting thin film structure, and extending to the substrate to cover the superconducting transition edge structure;

preparing a second mask layer on the surface of the second superconducting thin film far away from the sacrificial layer;

according to the second mask layer, etching the surface, far away from the sacrificial layer, of the second superconducting thin film to the sacrificial layer, removing the second mask layer, and forming a second superconducting thin film structure on the surface of the sacrificial layer;

grinding the surface of the second superconducting thin film structure, which is far away from the second insulating structure, until the sacrificial layer is ground, and forming a third superconducting thin film structure on the surface of the sacrificial layer;

etching the sacrificial layer on the surface of the sacrificial layer far away from the second insulating structure, the surface of the sacrificial layer far away from the substrate, and the sacrificial layer between the side wall of the third superconducting thin film structure and the side wall of the superconducting transition edge structure to form a sacrificial structure;

wherein the sacrificial structure and the third superconducting thin film structure form a superconducting quantum interference device structure, and a gap hole is formed between the superconducting quantum interference device structure and the superconducting transition edge structure.

In one embodiment, the aperture of the aperture is between 50 nanometers and 150 nanometers.

In one embodiment, a total reflection thin film structure, a first insulating structure, a first superconducting thin film structure, and a second insulating structure are sequentially prepared on a surface of the substrate, and before the steps, the method further includes the following steps:

preparing a reflecting layer, a first insulating layer, a first superconducting film and a second insulating layer on the surface of the substrate in sequence;

preparing a first mask layer on the surface of the second insulating layer far away from the first superconducting thin film;

and etching the surface of the second insulating layer, which is far away from the first superconducting thin film, to the substrate according to the first mask layer, removing the first mask layer, and sequentially preparing the total reflection thin film structure, the first insulating structure, the first superconducting thin film structure and the second insulating structure on the surface of the substrate.

In one embodiment, a gap hole is formed between the superconducting quantum interference device structure and the superconducting transition edge structure, after the step, the method further comprises the steps of:

and etching the surface of the third superconducting thin film structure far away from the sacrificial structure according to the nano bridge junction pattern until reaching the substrate to prepare the nano bridge.

In one embodiment, a sacrificial layer and a second superconducting thin film are sequentially prepared on the surface of the second insulating structure far away from the first superconducting thin film structure, and extend to the substrate to cover the superconducting transition edge structure, and the method includes the following steps:

adopting a magnetron sputtering method, setting the sputtering pressure range to be 5mTorr to 7mTorr, setting the sputtering power range of the sacrificial layer material to be 500W to 600W, preparing the sacrificial layer on the surface of the second insulating structure far away from the first superconducting thin film structure, and extending the sacrificial layer to the substrate to cover the superconducting transition edge structure;

and adopting a magnetron sputtering method, setting the sputtering gas pressure range to be 5mTorr to 7mTorr, setting the sputtering power range of the second superconducting thin film material to be 500W to 600W, and preparing the second superconducting thin film on the surface of the sacrificial layer far away from the substrate.

In one embodiment, according to the second mask layer, etching the surface of the second superconducting thin film far away from the sacrificial layer to the sacrificial layer, removing the second mask layer, and forming a second superconducting thin film structure on the surface of the sacrificial layer, the steps include:

according to the second mask layer, a reactive ion etching method is adopted, the pressure range is set to be 15mTorr to 20mTorr, the power range is set to be 50W to 70W, and etching gas SF is used ₆ And etching the surface of the second superconducting thin film far away from the sacrificial layer with the flow range of 30sccm to 40sccm until the sacrificial layer is etched to form the second superconducting thin film structure.

In one embodiment, the surface of the second superconducting thin film structure away from the second insulating structure is ground to the sacrificial layer, and a third superconducting thin film structure is formed on the surface of the sacrificial layer, including:

and grinding the surface of the second superconducting thin film structure, which is far away from the second insulating structure, by adopting a chemical mechanical polishing method, exposing the sacrificial layer and forming the third superconducting thin film structure.

In one embodiment, the step of etching the sacrificial layer on the surface of the sacrificial layer far away from the second insulating structure, the surface of the sacrificial layer far away from the substrate, and the sacrificial layer between the sidewall of the third superconducting thin film structure and the sidewall of the superconducting transition edge structure to form a sacrificial structure includes:

and etching the sacrificial layer among the exposed sacrificial layer, the third superconducting thin film structure side wall and the superconducting transition edge structure side wall by adopting a wet etching method to form the sacrificial structure.

In one embodiment, the present application provides an inductive superconducting edge detector structure with high coupling efficiency. The high-coupling-efficiency inductive superconducting edge detector structure comprises a substrate, a superconducting transition edge structure and a superconducting quantum interference device structure. The superconducting transition edge structure is located on the surface of the substrate. The superconducting quantum interference device structure is located on the surface of the substrate. And the superconducting quantum interference device structure surrounds the superconducting transition edge structure. And a gap hole is formed between the superconducting quantum interference device structure and the superconducting transition edge structure.

In one embodiment, the superconducting quantum interference device structure includes a plurality of nano-bridges and a plurality of third superconducting thin film structures. The plurality of third superconducting thin film structures are connected through the plurality of nano-bridges.

In the preparation method and the structure of the high-coupling-efficiency induction type superconducting edge detector, in the step S10, the substrate is a smooth substrate with high resistivity and small roughness. Specifically, the substrate includes, but is not limited to, a magnesium oxide single crystal substrate, a silicon substrate, a sapphire substrate, or the like. The total reflection film structure can be made of reflection materials such as an aluminum reflection film layer, a copper reflection film layer or a silver reflection film layer. The first insulating structure and the second insulating structure may be made of insulating materials such as silicon oxide or silicon nitride. The first superconducting thin film structure may be a superconducting material such as Nb.

Forming a Josephson junction structure through the first insulating structure, the first superconducting thin film structure, and the second insulating structure. When the working temperature of the first superconducting thin film structure is in a narrow range between the superconducting state and the normal state, namely the resistance is between zero and the normal value, the function of a superconducting transition edge detector can be realized. That is, the superconducting transition edge structure is a longitudinal structure of a superconducting transition edge detector formed on the surface of the substrate.

In S20, the step of preparing the sacrificial layer and the second superconducting thin film on the surface of the second insulating structure may be to prepare the sacrificial layer and the second superconducting thin film on the surface of the superconducting transition edge structure, and cover the surface and the sidewall of the superconducting transition edge structure. The sacrificial layer may be made of the same material as the total reflection thin film structure, and may be made of a reflective material such as an aluminum reflective thin film layer, a copper reflective thin film layer, or a silver reflective thin film layer. The second superconducting thin film may be the same as the first superconducting thin film, and may be a superconducting material such as niobium, niobium-silicon, or the like.

At this time, the sacrificial layer and the second superconducting thin film are prepared on the surface of the second insulating structure. The contact surface of the sacrificial layer and the second superconducting thin film forms a medium interface. The sacrificial layer and the contact surface of the second insulating structure form a medium interface. The contact surface of the second insulating structure and the first superconducting thin film structure forms a medium interface. The contact surface of the first superconducting thin film structure and the first insulating structure forms a medium interface. And the contact surfaces of the first insulating structure and the total reflection film structure form a medium interface. Through a plurality of interfaces of different media, an optical resonant cavity can be formed, and the functions of optical energy feedback and the like are provided.

In the S30 and the S40, a positive ultraviolet photoresist such as AZ6112 is used for spin-coating and baking, a contact ultraviolet lithography machine is used for overlay alignment, the alignment accuracy can be 1 μm, and the second mask layer is prepared after post-baking, exposure and development. At this time, the second superconducting thin film is etched through the second mask layer until the sacrificial layer, and the second superconducting thin film structure is formed.

In S50, a surface of the second superconducting thin film structure opposite to the second insulating structure is polished to expose the sacrificial layer, thereby forming the third superconducting thin film structure.

And in the step S60, etching the surface of the sacrificial layer opposite to the second insulating structure to expose the second insulating structure. And etching the surface of the sacrificial layer opposite to the substrate to expose the substrate. And simultaneously, etching the sacrificial layer between the side wall of the third superconducting thin film structure and the side wall of the superconducting transition edge structure. At this time, the sacrificial layer between the third superconducting thin film structure and the substrate is left, and the sacrificial structure is formed. The sacrificial structure and the third superconducting thin film structure form the superconducting quantum interference device structure and surround to form an annular hole to surround the superconducting transition edge structure.

And after the sacrificial layer between the superconducting quantum interference device structure and the superconducting transition edge structure is etched, the gap hole is formed. The superconducting quantum interference device structure includes the third superconducting thin film structure having a superconducting transition temperature. The superconducting transition edge structure disposed in an annular ring formed by the surrounding of the superconducting quantum interference device structure comprises a first superconducting thin film structure. When the superconducting transition temperature is reached, after photons or other particles are incident, the absorption of the superconducting transition edge structure on incident light generates corresponding temperature rise, the effective area of the superconducting transition edge structure is reduced, the inductance of the superconducting quantum interference device structure is increased, and the output voltage is increased. At this time, the voltage increase amount of the superconducting quantum interference device structure is proportional to the energy of absorbed light. In addition, by the preparation method of the high-coupling-efficiency induction type superconducting edge detector, the gap hole between the prepared superconducting quantum interference device structure and the superconducting transition edge structure is small, and a nano-scale gap can be prepared.

Therefore, by the method for manufacturing the high-coupling-efficiency inductive superconducting edge detector, the superconducting quantum interference device structure, the superconducting transition edge structure and the gap hole are manufactured on the surface of the substrate, and the coupling between the superconducting quantum interference device structure and the superconducting transition edge structure can be improved. Meanwhile, by the preparation method of the high-coupling-efficiency induction type superconducting edge detector, the detection area of the superconducting transition edge structure is increased, the preparation difficulty of the superconducting quantum interference device structure can be reduced, and the coupling efficiency of the superconducting quantum interference device structure and the superconducting transition edge structure is improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic process flow diagram of a method for manufacturing an inductive superconducting edge probe with high coupling efficiency according to an embodiment.

FIG. 2 is a cross-sectional view of a reflective layer, a first insulating layer, a first superconducting thin film, and a second insulating layer according to an embodiment.

FIG. 3 is a cross-sectional view illustrating etching of the first insulating structure, the first superconducting thin film structure, and the second insulating structure according to an embodiment.

FIG. 4 is a cross-sectional view of a superconducting transition edge structure provided in an embodiment.

FIG. 5 is a cross-sectional view of a sacrificial layer and a second superconducting thin film provided in an embodiment.

Fig. 6 is a schematic cross-sectional view illustrating etching of the second superconducting thin film by the second mask layer according to an embodiment.

Fig. 7 is a schematic top view illustrating etching of the second superconducting thin film by the second mask layer according to an embodiment.

FIG. 8 is a schematic cross-sectional view of a third superconducting thin film structure provided in an embodiment.

FIG. 9 is a cross-sectional view of a superconducting transition edge structure and a superconducting quantum interference device structure provided in an embodiment.

FIG. 10 is a schematic top view of a superconducting transition edge structure and a superconducting quantum interference device structure provided in an embodiment.

FIG. 11 is a cross-sectional view of an etched region provided in an embodiment.

FIG. 12 is a schematic top view of an etched region provided in an embodiment.

FIG. 13 is a top view of an inductive superconducting edge finder configuration with high coupling efficiency according to an embodiment.

FIG. 14 is a schematic top view of an inductive superconducting edge probe structure with high coupling efficiency provided in an embodiment.

Description of reference numerals: the superconducting thin film structure comprises a substrate-10, a total reflection thin film structure-210, a first insulating structure-310, a first superconducting thin film structure-410, a second insulating structure-510, a superconducting transition edge structure-100, a sacrificial layer-70, a second superconducting thin film-80, a second mask layer-620, a second superconducting thin film structure-810, a third superconducting thin film structure-811, a sacrificial structure-710, a superconducting quantum interference device structure-200, a slit hole-300, a reflecting layer-20, a first insulating layer-30, a first superconducting thin film-40, a second insulating layer-50, a first mask layer-610, a nano bridge-201 and an etching region-90.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

It will be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it can be directly on, adjacent to, connected or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and/or sections, these elements, components, regions, layers, doping types and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or section from another element, component, region, layer, doping type or section. Thus, a first element, component, region, layer, doping type or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application; for example, the first doping type may be made the second doping type, and similarly, the second doping type may be made the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

Spatial relational terms, such as "under," "below," "under," "over," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" can encompass both an orientation of above and below. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations) and the spatial descriptors used herein interpreted accordingly.

As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, in this specification, the term "and/or" includes any and all combinations of the associated listed items.

Embodiments of the application are described herein with reference to cross-sectional views that are schematic illustrations of idealized embodiments (and intermediate structures) of the application, such that variations from the shapes shown are to be expected due to, for example, manufacturing techniques and/or tolerances. Thus, embodiments of the present application should not be limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing techniques. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present application.

Referring to fig. 1, the present application provides a method for manufacturing an inductive superconducting edge probe with high coupling efficiency, which includes the following steps:

s10, providing a substrate 10, and sequentially preparing a total reflection thin film structure 210, a first insulating structure 310, a first superconducting thin film structure 410 and a second insulating structure 510 on the surface of the substrate 10; wherein the total reflection thin film structure 210, the first insulating structure 310, the first superconducting thin film structure 410, and the second insulating structure 510 form a superconducting transition edge structure 100;

s20, sequentially preparing a sacrificial layer 70 and a second superconducting thin film 80 on the surface of the second insulating structure 510 away from the first superconducting thin film structure 410, and extending to the substrate 10 to cover the superconducting transition edge structure 100;

s30, preparing a second mask layer 620 on the surface, far away from the sacrificial layer 70, of the second superconducting thin film 80;

s40, according to the second mask layer 620, etching the surface, far away from the sacrificial layer 70, of the second superconducting thin film 80 until the sacrificial layer 70 is etched, then, with the etched structure as a mask, corroding the sacrificial layer 70 by adopting a wet method, removing the second mask layer 620, and forming a second superconducting thin film structure 810 on the surface of the sacrificial layer 70;

s50, grinding the surface of the second superconducting thin film structure 810 away from the second insulating structure 510 until reaching the sacrificial layer 70, and forming a third superconducting thin film structure 811 on the surface of the sacrificial layer 70;

s60, etching the sacrificial layer 70 between the surface of the sacrificial layer 70 away from the second insulating structure 510, the surface of the sacrificial layer 70 away from the substrate 10, and the sidewall of the third superconducting thin film structure 811 and the sidewall of the superconducting transition edge structure 100 to form a sacrificial structure 710;

wherein the sacrificial structure 710 and the third superconducting thin film structure 811 form a superconducting quantum interference device structure 200, and a slit hole 300 is formed between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100.

In this embodiment, referring to fig. 2, fig. 3 and fig. 4, in S10, the substrate 10 is a flat substrate with high resistivity and small roughness. Specifically, the substrate 10 includes, but is not limited to, a magnesium oxide single crystal substrate, a silicon substrate, a sapphire substrate, or the like. The total reflection thin film structure 210 may be an aluminum reflection thin film layer, a copper reflection thin film layer, or a silver reflection thin film layer. The first insulating structure 310 and the second insulating structure 510 may be made of an insulating material such as silicon oxide or silicon nitride. The first superconducting thin film structure 410 may be a superconducting material such as Nb.

A josephson junction structure is formed through the first insulating structure 310, the first superconducting thin film structure 410, and the second insulating structure 510. When the operating temperature of the first superconducting thin film structure 410 is within a narrow range between its superconducting state and its normal state, i.e., the resistance is between zero and its normal value, the superconducting transition edge detector function can be realized. That is, the superconducting transition edge structure 100 is a longitudinal structure of the superconducting transition edge detector formed on the surface of the substrate 10.

In the S20, referring to fig. 5, the sacrificial layer 70 and the second superconducting thin film 80 are prepared on the surface of the second insulating structure 510, which can be understood as preparing the sacrificial layer 70 and the second superconducting thin film 80 on the surface of the superconducting transition edge structure 100, and covering the surface and the sidewall of the superconducting transition edge structure 100. The sacrificial layer 70 may be an aluminum thin film. The second superconducting thin film 80 may be made of the same material as the first superconducting thin film structure 410, and may be made of a superconducting material such as niobium, niobium-silicon, or the like.

At this time, the sacrificial layer 70 and the second superconducting thin film 80 are prepared on the surface of the second insulating structure 510. The contact surface of the sacrificial layer 70 and the second superconducting thin film 80 forms a medium interface. The sacrificial layer 70 forms a dielectric interface with the contact surface of the second insulating structure 510. The second insulating structure 510 forms a dielectric interface with the contact surface of the first superconducting thin film structure 410. The first superconducting thin film structure 410 forms a dielectric interface with the contact surface of the first insulating structure 310. The first insulating structure 310 forms a medium interface with the contact surface of the total reflection thin film structure 210. Through a plurality of interfaces of different media, an optical resonant cavity can be formed, and the functions of optical energy feedback and the like are provided.

In S30 and S40, referring to fig. 6 and 7, a positive uv photoresist, such as AZ6112, is used to perform spin coating and baking, and a contact uv lithography machine is used to perform overlay alignment, where the alignment accuracy may be 1 μm, and the second mask layer 620 is prepared after post-baking, exposure, and development. At this time, the second superconducting thin film 80 is etched through the second mask layer 620 until reaching the sacrificial layer 70, so as to form the second superconducting thin film structure 810.

In S50, referring to fig. 8, a surface of the second superconducting thin film structure 810 opposite to the second insulating structure 510 is polished to expose the sacrificial layer 70, thereby forming the third superconducting thin film structure 811.

In S60, referring to fig. 9 and 10, a surface of the sacrificial layer 70 opposite to the second insulating structure 510 is etched to expose the second insulating structure 510. And, the surface of the sacrificial layer 70 opposite to the substrate 10 is etched to expose the substrate 10. Meanwhile, the sacrificial layer 70 between the sidewall of the third superconducting thin film structure 811 and the sidewall of the superconducting transition edge structure 100 is etched. At this time, the sacrificial layer 70 between the third superconducting thin film structure 811 and the substrate 10 is left to form the sacrificial structure 710. The sacrificial structure 710 and the third superconducting thin film structure 811 form the superconducting quantum interference device structure 200 and surround to form an annular ring to surround the superconducting transition edge structure 100.

The slot 300 is formed after the sacrificial layer 70 between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100 is etched. The superconducting quantum interference device structure 200 includes the third superconducting thin film structure 811 having a superconducting transition temperature. The superconducting transition edge structure 100 disposed in the annular ring formed by the surrounding of the superconducting quantum interference device structure 200 includes a first superconducting thin film structure 410. When the superconducting transition temperature is reached, after photons or other particles are incident, the absorption of the superconducting transition edge structure 100 on the incident light generates a corresponding temperature rise, the effective area of the superconducting transition edge structure 100 is reduced, the inductance of the superconducting quantum interference device structure 200 is increased, and the output voltage is increased. At this time, the voltage of the superconducting quantum interference device structure 200 is increased by an amount proportional to the energy of absorbed light. In addition, by the method for manufacturing the high-coupling-efficiency inductive superconducting edge detector, the gap hole 300 between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100 is small, and a nano-scale gap can be manufactured.

Therefore, by the method for manufacturing an inductive superconducting edge detector with high coupling efficiency, the superconducting quantum interference device structure 200, the superconducting transition edge structure 100 and the slit hole 300 are manufactured on the surface of the substrate 10, and the coupling between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100 can be improved. Meanwhile, by the preparation method of the high-coupling-efficiency induction type superconducting edge detector, the detection area of the superconducting transition edge structure 100 is increased, the preparation difficulty of the superconducting quantum interference device structure 200 can be reduced, and the coupling efficiency of the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100 is improved.

In one embodiment, the gap of the gap aperture 300 is between 50 nanometers and 150 nanometers.

In this embodiment, the gap of the gap hole 300 is 50nm to 150nm, which reduces the size of the gap to submicron, increases the detection area of the superconducting transition edge structure 100, improves the coupling between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100, and further improves the measurement sensitivity of the inductive superconducting edge detector.

In one embodiment, a total reflection thin film structure 210, a first insulating structure 310, a first superconducting thin film structure 410, and a second insulating structure 510 are sequentially formed on the surface of the substrate 10, and before the steps, the method further includes the following steps:

s110, preparing a reflecting layer 20, a first insulating layer 30, a first superconducting thin film 40 and a second insulating layer 50 on the surface of the substrate 10 in sequence;

s120, preparing a first mask layer 610 on the surface of the second insulating layer 50 away from the first superconducting thin film 40;

s130, according to the first mask layer 610, etching the surface of the second insulating layer 50 away from the first superconducting thin film 40 to the substrate 10, removing the first mask layer 610, and sequentially preparing the total reflection thin film structure 210, the first insulating structure 310, the first superconducting thin film structure 410, and the second insulating structure 510 on the surface of the substrate 10.

In the S110, referring to FIG. 2, the background pressure of the sputtering chamber is better than 6X 10 by the magnetron sputtering method ^-8 Torr, setting the sputtering pressure in the range of 4mTorr to 6mTorr, and the sputtering power of the aluminum material in the range of 500W to 600W, the reflective layer 20 is deposited on the surface of the substrate 10.

Moreover, the magnetron sputtering method is adopted, and the background pressure of the sputtering chamber is better than 3 multiplied by 10 ^-8 Torr, setting the sputtering gas pressure to be in the range of 4mTorr to 6mTorr, the sputtering power of the Nb material to be in the range of 400W to 600W, and depositing the first superconducting thin film 40 on the surface of the first insulating layer 30 away from the reflecting layer 20.

Adopting a low-temperature plasma-assisted chemical vapor deposition method to grow at the temperature below 100 ℃. Depositing the first insulating layer 30 (SiO in this embodiment) with a thickness of 350nm to 370nm on the surface of the reflective layer 20 away from the substrate 10 by setting a deposition temperature range of 50 ℃ to 60 ℃, a pressure range of 5mTorr to 6mTorr, an oxygen flow range of 15sccm to 25sccm, and a silane flow range of 40sccm to 60sccm ₂ A film). And, setting a chamber pressure of 6mTorr to 8mTorr, a flow rate of nitrogen of 4sccm to 10sccm, and a flow rate of silane of 40sccm to 60sccm, and depositing the second insulating layer 50 (SiNx thin film in this embodiment) with a thickness of 90nm to 110nm on the surface of the first superconducting thin film 40 away from the first insulating layer 30.

And (3) adopting a low-temperature plasma assisted chemical vapor deposition method, setting a deposition temperature range, a pressure range, an oxygen flow range and a silane flow range, and depositing the silicon dioxide film. Setting a pressure range, a nitrogen flow range and a silane flow range, depositing the SiNx film to form SiO ₂ And SiN _x The double-layer structure can adjust the stress of the first insulating layer 30 and the second insulating layer 50, so that the overall stress of the first insulating layer 30 and the second insulating layer 50 is reduced, the superconducting characteristics of the first superconducting thin film 40 are not affected, and the performance and the stability of the superconducting circuit device can be effectively improved.

In S120, referring to fig. 3, a positive ultraviolet photoresist (such as AZ 6112) is used to perform photoresist leveling and baking, and a contact ultraviolet lithography machine is used to perform overlay alignment, where the alignment accuracy may be 1 μm, and after performing post-baking, exposure, and development, the first mask layer 610 is prepared on the surface of the second insulating layer 50 away from the first superconducting thin film 40. The first mask layer 610 has a structure of TES photoresist.

In S130, referring to FIG. 3, a fluorine-based dry etching process is adopted, the etching pressure is set to be 7mT to 8mT, the power of reactive ion etching is set to be 20W to 30W, SF ₆ The gas flow rate is 4sccm to 6sccm, C ₄ F ₈ The gas flow is 40sccm to 50sccm, and the surface of the second insulating layer 50 away from the first superconducting thin film 40 is etched to the reflective layer 20 according to the first mask layer 610. And the first mask layer 610 is removed.

Meanwhile, the structure formed by the first insulating structure 310, the first superconducting thin film structure 410 and the second insulating structure 510 is used as a mask, and the reflective layer 20 is etched by using an alkaline aluminum etchant, so as to form the total reflection thin film structure 210. At this time, the total reflection thin film structure 210, the first insulating structure 310, the first superconducting thin film structure 410, and the second insulating structure 510 are sequentially prepared on the surface of the substrate 10.

By adopting the reactive ion etching method and setting the gas flow range, the proportion of etching gas is adjusted, the occurrence of etching errors can be avoided, and the accurate and stable control of the etching process is realized.

In one embodiment, S20, sequentially preparing a sacrificial layer 70 and a second superconducting thin film 80 on the surface of the second insulating structure 510 away from the first superconducting thin film structure 410, and extending to the substrate 10 to cover the superconducting transition edge structure 100, includes:

s210, setting a sputtering pressure range to be 5mTorr to 7mTorr and a sputtering power range of a sacrificial layer material to be 500W to 600W by using a magnetron sputtering method, preparing the sacrificial layer 70 on the surface of the second insulating structure 510 away from the first superconducting thin film structure 410, and extending to the substrate 10 to cover the superconducting transition edge structure 100;

s220, adopting a magnetron sputtering method, setting the sputtering air pressure range to be 5mTorr to 7mTorr, setting the sputtering power range of the second superconducting thin film material to be 500W to 600W, and preparing the second superconducting thin film 80 on the surface of the sacrificial layer 70 far away from the substrate 10.

In this embodiment, the sacrificial layer 70 is an aluminum film sacrificial layer with a thickness of 50nm to 150nm. The second superconducting thin film 80 is a niobium film with a thickness of 100nm to 200nm. The sacrificial layer 70 and the second superconducting thin film 80 are sequentially prepared on the surface of the second insulating structure 510 by a magnetron sputtering method. In the magnetron sputtering preparation process, the stress of the sacrificial layer 70 and the second superconducting thin film 80 can be changed by adjusting the sputtering gas pressure, the sputtering power, or both the sputtering gas pressure and the sputtering power. At this time, the stress of the sacrificial layer 70 and the second superconducting thin film 80 can be adjusted by adjusting and controlling the sputtering gas pressure or/and the sputtering power, so that the overall stress of the sacrificial layer 70 and the second superconducting thin film 80 is reduced, and the film performance is improved. Therefore, the performance and the stability of the device are effectively improved.

In an embodiment, in step S40, according to the second mask layer 620, etching the surface of the second superconducting thin film 80 away from the sacrificial layer 70 to the sacrificial layer 70, and removing the second mask layer 620 to form a second superconducting thin film structure 810 on the surface of the sacrificial layer 70, where the steps include:

according to the second mask layer 620, a reactive ion etching method is adopted, the pressure range is set to be 15mTorr to 20mTorr, the power range is set to be 50W to 70W, and etching gas SF is adopted ₆ And etching the surface of the second superconducting thin film 80 far away from the sacrificial layer 70 with the flow rate ranging from 30sccm to 40sccm until the sacrificial layer 70 is etched to form the second superconducting thin film structure 810.

In this embodiment, a reactive ion etching method is adopted, the etching pressure is set to be in a range of 15mTorr to 20mTorr, the power is set to be in a range of 50W to 70W, and etching gas SF is used ₆ The flow range is 30sccm to 40sccm, and the second superconducting thin film 80 is etched, so that the occurrence of etching errors can be avoided, and the sacrificial layer 70 cannot be etched under the condition that unnecessary parts of the second superconducting thin film 80 are completely etched. Therefore, the etching process of the second superconducting thin film 80 can be accurately and stably controlled, the line precision is improved, and the performance of the prepared device is improved.

In one embodiment, S50, the surface of the second superconducting thin film structure 810 away from the second insulating structure 510 is ground to the sacrificial layer 70, and a third superconducting thin film structure 811 is formed on the surface of the sacrificial layer 70, including:

and grinding the surface of the second superconducting thin film structure 810, which is far away from the second insulating structure 510, by using a chemical mechanical polishing method, so as to expose the sacrificial layer 70, thereby forming the third superconducting thin film structure 811.

In this embodiment, a Chemical Mechanical Polishing (CMP) method is used to polish the second superconducting thin film structure 810 corresponding to the second insulating structure 510 to expose the sacrificial layer 70, i.e., polish off the sacrificial layer 70 on the superconducting transition edge structure 100. By the chemical mechanical polishing method, a flat surface free from scratches and contamination with impurities can be obtained without affecting the surface of the sacrificial layer 70 exposed.

In one embodiment, S60, etching the sacrificial layer 70 between the surface of the sacrificial layer 70 away from the second insulating structure 510, the surface of the sacrificial layer 70 away from the substrate 10, the sidewall of the third superconducting thin film structure 811 and the sidewall of the superconducting transition edge structure 100 to form a sacrificial structure 710, includes:

and etching the sacrificial layer 70 between the exposed side walls of the sacrificial layer 70, the third superconducting thin film structure 811 and the superconducting transition edge structure 100 by using a wet etching method to form the sacrificial structure 710.

In this embodiment, the superconducting transition edge structure 100 is used as a mask, and the sacrificial layer 70 is etched by using an aluminum etchant, so as to remove the sacrificial layer 70 exposed by the superconducting quantum interference device structure 200 and CMP polishing. The sacrificial layer 70 between the third superconducting thin film structure 811 and the substrate 10 is left to prepare and form the sacrificial structure 710. Thereby, the slit aperture 300 is formed between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100. The narrow gap of the gap hole 300 is 50nm to 150nm.

The sacrificial layer 70 (aluminum film) is pure chemically etched by a wet etching method (aluminum etchant), has excellent selectivity, and only the sacrificial layer 70 is etched to finally form the sacrificial structure 710.

In one embodiment, S60, a gap hole 300 is formed between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100, and after the steps, the method further comprises the steps of:

s70, according to the nano bridge junction graph, etching the surface, far away from the sacrificial structure 710, of the third superconducting thin film structure 811 to the substrate 10, and preparing the nano bridge 201.

In this embodiment, referring to fig. 11, 12, and 13, according to the bridge junction pattern, a focused ion beam etching method is adopted, gallium ions are accelerated by setting a voltage range of 20KV to 40KV, and bombard a region to be removed, such as an etching region 90 in fig. 12, which can etch the third superconducting thin film structure 811 and the sacrificial structure 710 with a low dimension and a small size. At this time, the third superconducting thin film structure 811 is bombarded away from the surface of the sacrificial structure 710, and is etched to the substrate 10, so as to form the nano-bridge 201. The nano-bridge 201 is a nano-scale structure. The process is controllable and stable by a focused ion beam etching method, and the prepared junction array chip can meet the requirements of alternating-current and direct-current base standard operation of quantum voltage.

In this embodiment, according to the bridge pattern, an electron beam lithography method is adopted, and a ZEP520 glue is adopted on the surface of the third superconducting thin film structure 811 away from the sacrificial structure 710, and after glue homogenizing, baking and exposure, a photoresist mask layer structure is prepared.

According to the structure of the photoresist mask layer, a reactive ion etching method is adopted, the etching pressure range is set to be 10mTorr to 20mTorr, the power range is set to be 40W to 100W, and etching gas SF is set ₆ In a range of 20sccm to 40sccm, the surface of the third superconducting thin film structure 811 away from the sacrificial structure 710 is etched. Wherein, the etching is carried out by a dry etching machine. Setting the etching pressure at 15mT, the power of reactive ion etching at 50W ₆ And etching the surface of the third superconducting thin film structure 811 away from the sacrificial structure 710 until the substrate 10 with the gas flow rate of 30 sccm.

The electron beam lithography method and the reactive ion etching method are combined to set the etching pressure range, the power range and the etching gas SF ₆ In this range, the surface of the third superconducting thin film structure 811 away from the sacrificial structure 710 is etched, so that the occurrence of etching errors can be avoided, and the other parts cannot be etched under the condition that the unnecessary parts of the third superconducting thin film structure 811 and the sacrificial structure 710 are completely etched. Therefore, the etching process of the third superconducting thin film structure 811 and the sacrificial structure 710 can be accurately and stably controlled, and the improvement is achievedThe precision of the lines improves the performance of the prepared device.

Therefore, by the method for manufacturing the high-coupling-efficiency inductive superconducting edge detector, a chip of the high-coupling-efficiency inductive superconducting edge detector structure can be manufactured, the manufacturing difficulty is reduced, and the coupling efficiency of the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100 is improved.

Referring to fig. 11, 12, 13 and 14, in one embodiment, the present application provides a high coupling efficiency inductive superconducting edge probe structure. The high coupling efficiency inductive superconducting edge detector structure includes a substrate 10, a superconducting transition edge structure 100, and a superconducting quantum interference device structure 200. The superconducting transition edge structure 100 is located on the surface of the substrate 10. The superconducting quantum interference device structure 200 is located on the surface of the substrate 10. And the superconducting quantum interference device structure 200 surrounds the superconducting transition edge structure 100. A slit aperture 300 is formed between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100.

In this embodiment, the substrate 10 is a flat substrate with high resistivity and small roughness. The superconducting quantum interference device structure 200 is surrounded to form a ring hole, and the superconducting transition edge structure 100 is arranged in the ring hole. At this time, the superconducting quantum interference device structure 200 surrounds the superconducting transition edge structure 100. The gap hole 300 is formed between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100, when the superconducting transition temperature is reached, after photons or other particles are incident, the absorption of the superconducting transition edge structure 100 to the incident light generates corresponding temperature rise, the effective area of the superconducting transition edge structure 100 is reduced, the inductance of the superconducting quantum interference device structure 200 is increased, and the output voltage is increased. The voltage increase of the superconducting quantum interference device structure 200 is proportional to the energy of the absorbed light. By providing the slit aperture 300 between the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100, the coupling efficiency of the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100 can be ensured while increasing the detection area of the superconducting transition edge structure 100. Therefore, the coupling efficiency of the superconducting quantum interference device structure 200 and the superconducting transition edge structure 100 is improved through the high-coupling-efficiency inductive superconducting edge detector structure, and the measurement sensitivity of the inductive superconducting edge detector is further improved.

In one embodiment, the superconducting quantum interference device structure 200 includes a plurality of nano-bridges 201 and a plurality of third superconducting thin film structures 811. The plurality of third superconducting thin film structures 811 are connected to each other by the plurality of nanobridge 201.

In this embodiment, the plurality of third superconducting thin film structures 811 are connected by the nano-bridge 201 to form the superconducting quantum interference device structure 200. The superconducting quantum interference device structure 200 and the superconducting transition edge structure 100 form the high coupling efficiency inductive superconducting edge detector structure. The nanobridge 201 includes a second superconducting thin film layer and a sacrificial layer, so that a plurality of third superconducting thin film structures 811 can be connected in series.

In one embodiment, the superconducting transition edge structure 100 includes a total reflection thin film structure 210, a first insulating structure 310, a first superconducting thin film structure 410, and a second insulating structure 510. The total reflection thin film structure 210, the first insulating structure 310, the first superconducting thin film structure 410, and the second insulating structure 510 are sequentially disposed on the substrate 10.

In the description herein, references to the description of "some embodiments," "other embodiments," "desired embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.

The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features of the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent application shall be subject to the appended claims.

Claims

1. A preparation method of an induction type superconducting edge detector with high coupling efficiency is characterized by comprising the following steps:

providing a substrate (10), and sequentially preparing a total reflection thin film structure (210), a first insulating structure (310), a first superconducting thin film structure (410) and a second insulating structure (510) on the surface of the substrate (10); wherein the total reflective thin film structure (210), the first insulating structure (310), the first superconducting thin film structure (410), and the second insulating structure (510) form a superconducting transition edge structure (100);

sequentially preparing a sacrificial layer (70) and a second superconducting thin film (80) on the surface of the second insulating structure (510) far away from the first superconducting thin film structure (410), and extending to the substrate (10) to cover the superconducting transition edge structure (100);

preparing a second mask layer (620) on the surface of the second superconducting thin film (80) far away from the sacrificial layer (70);

according to the second mask layer (620), etching the surface, far away from the sacrificial layer (70), of the second superconducting thin film (80) until the sacrificial layer (70) is etched, removing the second mask layer (620), and forming a second superconducting thin film structure (810) on the surface of the sacrificial layer (70);

grinding the surface, far away from the second insulating structure (510), of the second superconducting thin film structure (810) until the sacrificial layer (70) is reached, and forming a third superconducting thin film structure (811) on the surface of the sacrificial layer (70);

etching the sacrificial layer (70) on the surface of the sacrificial layer (70) far away from the second insulating structure (510), the surface of the sacrificial layer (70) far away from the substrate (10), and the sacrificial layer (70) between the sidewall of the third superconducting thin film structure (811) and the sidewall of the superconducting transition edge structure (100) to form a sacrificial structure (710);

wherein the sacrificial structure (710) and the third superconducting thin film structure (811) form a superconducting quantum interference device structure (200), and a gap hole (300) is formed between the superconducting quantum interference device structure (200) and the superconducting transition edge structure (100).

2. The method of claim 1, wherein the gap of the gap hole (300) is 50nm to 150nm.

3. The method for preparing the high-coupling-efficiency inductive superconducting edge probe according to claim 1, wherein a total reflection thin film structure (210), a first insulating structure (310), a first superconducting thin film structure (410) and a second insulating structure (510) are prepared on the surface of the substrate (10) in sequence, and before the steps, the method further comprises the following steps:

preparing a reflecting layer (20), a first insulating layer (30), a first superconducting thin film (40) and a second insulating layer (50) on the surface of the substrate (10) in sequence;

preparing a first mask layer (610) on the surface of the second insulating layer (50) far away from the first superconducting thin film (40);

according to the first mask layer (610), etching the surface, far away from the first superconducting thin film (40), of the second insulating layer (50) to the substrate (10), removing the first mask layer (610), and sequentially preparing the total reflection thin film structure (210), the first insulating structure (310), the first superconducting thin film structure (410) and the second insulating structure (510) on the surface of the substrate (10).

4. The method for preparing a high coupling efficiency inductive superconducting edge probe according to claim 1, wherein a gap hole (300) is formed between the superconducting quantum interference device structure (200) and the superconducting transition edge structure (100), and after the steps, the method further comprises the steps of:

s70, according to the nano bridge junction graph, etching the surface, far away from the sacrificial structure (710), of the third superconducting thin film structure (811) to the substrate (10) to prepare a nano bridge (201).

5. The method for preparing the high-coupling-efficiency inductive superconducting edge probe according to claim 1, wherein a sacrificial layer (70) and a second superconducting thin film (80) are sequentially prepared on the surface of the second insulating structure (510) away from the first superconducting thin film structure (410) and extend to the substrate (10) to cover the superconducting transition edge structure (100), and the steps include:

setting the sputtering gas pressure range to be 5mTorr to 7mTorr and the sputtering power range of the sacrificial layer material to be 500W to 600W by adopting a magnetron sputtering method, preparing the sacrificial layer (70) on the surface of the second insulating structure (510) far away from the first superconducting thin film structure (410), and extending to the substrate (10) to cover the superconducting transition edge structure (100);

and (2) preparing the second superconducting film (80) on the surface of the sacrificial layer (70) far away from the substrate (10) by adopting a magnetron sputtering method and setting the sputtering gas pressure to be 5mTorr to 7mTorr and the sputtering power of the second superconducting film material to be 500W to 600W.

6. The method for preparing the high-coupling-efficiency inductive superconducting edge detector according to claim 1, wherein according to the second mask layer (620), the surface of the second superconducting thin film (80) far away from the sacrificial layer (70) is etched until reaching the sacrificial layer (70), the second mask layer (620) is removed, and a second superconducting thin film structure (810) is formed on the surface of the sacrificial layer (70), and the method comprises the following steps:

according to the second mask layer (620), a reactive ion etching method is adopted, the pressure range is set to be 15mTorr to 20mTorr, the power range is set to be 50W to 70W, and etching gas is usedBulk SF ₆ And etching the surface of the second superconducting thin film (80) far away from the sacrificial layer (70) at the flow rate ranging from 30sccm to 40sccm until the sacrificial layer (70) is etched to form the second superconducting thin film structure (810).

7. The method for preparing the high-coupling-efficiency inductive superconducting edge probe according to claim 1, wherein the step of grinding the surface of the second superconducting thin film structure (810) away from the second insulating structure (510) to the sacrificial layer (70) to form a third superconducting thin film structure (811) on the surface of the sacrificial layer (70) comprises:

and grinding the surface of the second superconducting thin film structure (810) far away from the second insulating structure (510) by adopting a chemical mechanical polishing method to expose the sacrificial layer (70) so as to form the third superconducting thin film structure (811).

8. The method for preparing the high-coupling-efficiency inductive superconducting edge probe according to claim 7, wherein the sacrificial layer (70) is etched on a surface of the sacrificial layer (70) far away from the second insulating structure (510), a surface of the sacrificial layer (70) far away from the substrate (10), and the sacrificial layer (70) between a sidewall of the third superconducting thin film structure (811) and a sidewall of the superconducting transition edge structure (100), so as to form a sacrificial structure (710), and the method comprises:

and etching the sacrificial layer (70) among the exposed side walls of the sacrificial layer (70), the third superconducting thin film structure (811) and the superconducting transition edge structure (100) by adopting a wet etching method to form the sacrificial structure (710).

9. A high coupling efficiency inductive superconducting edge probe structure, which is prepared by the high coupling efficiency inductive superconducting edge probe preparation method of any one of claims 1-8, and is characterized by comprising the following steps:

a substrate (10);

a superconducting transition edge structure (100) located on the substrate (10) surface;

the superconducting quantum interference device structure (200) is positioned on the surface of the substrate (10), and the superconducting quantum interference device structure (200) surrounds the superconducting transition edge structure (100);

a gap aperture (300) is formed between the superconducting quantum interference device structure (200) and the superconducting transition edge structure (100).

10. The high coupling efficiency inductive superconducting edge detector structure of claim 9, wherein the superconducting quantum interference device structure (200) comprises:

a plurality of nanobridge (201);

a plurality of third superconducting thin film structures (811), the plurality of third superconducting thin film structures (811) being connected to each other by the plurality of nanobridge (201).