CN111834376A - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN111834376A CN111834376A CN201911294947.7A CN201911294947A CN111834376A CN 111834376 A CN111834376 A CN 111834376A CN 201911294947 A CN201911294947 A CN 201911294947A CN 111834376 A CN111834376 A CN 111834376A
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- 238000012986 modification Methods 0.000 description 2
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- 229910052782 aluminium Inorganic materials 0.000 description 1
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
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- 229910044991 metal oxide Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
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Abstract
The invention discloses an array substrate, a display panel and a display device. The array substrate is provided with a first area and a second area at least partially surrounding the first area, and comprises: the first wires penetrate through the first region and the second region along the extending direction of the first wires, and each first wire comprises a first wire section and a transparent second wire section which are connected with each other, wherein the length of the second wire section is larger than or equal to the width of the first region along the extending direction of the first wires. The voltage drop of the first conducting wire in the first area and the voltage drop of the first conducting wire in the second area of the array substrate are consistent, and the phenomenon of screen splitting is avoided.
Description
Technical Field
The invention belongs to the technical field of display, and particularly relates to an array substrate, a display panel and a display device.
Background
With the development of electronic equipment, the requirement of a user on the screen occupation ratio is higher and higher, and the comprehensive display screen receives more and more attention in the industry.
The camera is arranged below the partial area of the screen body of the comprehensive display screen, the screen body with the camera area is used for normal display when the camera is not started, and the display is not carried out when the camera is started. However, in general display of a display screen, a display effect of a screen body of a camera area is different from a display effect of a screen body of a non-camera area, so that a split screen problem exists in the display screen.
Disclosure of Invention
The embodiment of the invention provides an array substrate, a display panel and a display device, and aims to improve the display uniformity of the display panel.
In a first aspect, the present invention provides an array substrate having a first region and a second region at least partially surrounding the first region, the array substrate comprising: the first wires at least partially penetrate through the first area and the second area along the extending direction of the first wires, each first wire comprises a first wire section and a transparent second wire section which are electrically connected with each other, and the length of each second wire section is larger than or equal to the width of the first area along the extending direction of the first wire.
According to one aspect of the invention, the connection lines of the same-side end points of the plurality of second conducting wire segments are perpendicular to the extending direction of the first conducting wire and are connected with the outermost points of the first area contour along the extending direction of the first conducting wire.
According to an aspect of the invention, the first area comprises an irregular shape, or a rectangle, or a circle, or a drop shape.
According to an aspect of the invention, the first conductive line comprises a data line and/or a supply voltage line.
According to an aspect of the present invention, the array substrate further includes a power voltage line, the power voltage line includes a plurality of first conductive lines and a plurality of second conductive lines disposed in a different layer from the first conductive lines, an extending direction of the second conductive lines is perpendicular to an extending direction of the first conductive lines, and the first conductive lines are electrically connected to the second conductive lines.
According to one aspect of the invention, the first conductor segment is disposed in a same layer as the second conductor segment; or the first conducting wire section and the second conducting wire section are arranged in different layers and are electrically connected through the through hole.
According to an aspect of the present invention, the array substrate further includes a pixel circuit including a plurality of thin film transistors; the first conducting wire section and the second conducting wire section are arranged on the same layer and are arranged on the same layer as the source drain metal layer of the thin film transistor.
In a second aspect, the present invention provides a display panel, which has a first display region and a second display region at least partially surrounding the first display region, wherein a light transmittance of the first display region is greater than a light transmittance of the second display region, and the display panel includes the array substrate of any of the above embodiments, wherein the first region is disposed in the first display region, and the second region is disposed in the second display region.
According to one aspect of the invention, the display panel further comprises a pixel layer, the pixel layer is arranged on one side of the array substrate in a stacked mode, the pixel layer comprises a plurality of sub-pixels arranged in an array mode, and the orthographic projection of the first conducting wire on the array substrate is located between the orthographic projections of two adjacent columns of sub-pixels on the array substrate; preferably, the area between two adjacent columns of sub-pixels of the array substrate includes two first conducting wires arranged in an insulating manner, and the two first conducting wires are respectively a data line and a power supply voltage line.
In a third aspect, the present invention provides a display device including the display panel of any one of the above embodiments.
In the embodiment of the invention, the second wire section of the first wire, which is positioned in the first area, is a transparent wire, so that the light transmittance of the first area can be improved, and further, when photosensitive components such as a camera and the like are arranged on one side of the first area, the imaging effect is improved. The first wires in the second area and the first wires penetrating through the first area and the second area simultaneously adopt a splicing mode of the first wire sections and the transparent second wire sections, so that the first wires in the first area and the second area are consistent, the voltage drop of the first wires in the first area and the second area is consistent, and the phenomenon of screen splitting caused by inconsistent display effect of the area corresponding to the first area and the display effect of the area corresponding to the second area along two sides of the extending direction of the first wires when the first wires are connected to a pixel circuit to drive pixels to emit light can be avoided.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 5 is a schematic top view of a power voltage line according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 7 is a schematic top view of a display device according to an embodiment of the invention;
fig. 8 is a sectional view B-B in fig. 7.
In the figure:
100-an array substrate; 10-a first wire; 11-a first wire segment; 12-a second wire segment; 13-a via hole; 20-a second wire;
200-a display panel;
300-a display device; 30-a photosensitive component;
AA 1-first area; AA 2-second area; AA 3-first display area; AA 4-second display area; l1, L2-reference line; s1 — first surface; s2 — a second surface; x-the direction of extension of the first conductor.
Detailed Description
Features and exemplary embodiments of various aspects of the present invention will be described in detail below, and in order to make objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It will be understood that when a layer, region or layer is referred to as being "on" or "over" another layer, region or layer in describing the structure of the component, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
The array substrate, the display panel and the display device according to the embodiments of the invention are described in detail with reference to fig. 1 to 8. Some well-known structures are shown hidden or transparently in the figure for the sake of clarity in illustrating the structures associated with the present invention.
Referring to fig. 1 to 4, fig. 1 is a schematic structural diagram of an array substrate according to an embodiment of the present invention; fig. 2 is a schematic structural diagram of another array substrate according to an embodiment of the present invention; fig. 3 is a schematic structural diagram of another array substrate according to an embodiment of the present invention; fig. 4 is a schematic structural diagram of another array substrate according to an embodiment of the present invention. The array substrate 100 of the embodiment of the invention has a first area AA1 and a second area AA2 at least partially surrounding the first area AA 1. The array substrate 100 includes a plurality of first conductive lines 10, and the plurality of first conductive lines 10 may extend along, for example, an X direction in the figure.
At least a part of the first wires 10 of the plurality of first wires 10 penetrate through the first area AA1 and the second area AA2 along the extending direction of the first wires 10, each of the first wires 10 includes a first wire segment 11 and a transparent second wire segment 12 electrically connected to each other, and the length of the second wire segment 12 is greater than or equal to the width of the first area AA1 along the direction X of the first wires 10.
In this embodiment, the second wire segment 12 of the first wire 10 located in the first area AA1 is a transparent wire, which can improve the light transmittance of the first area AA1, and further improve the imaging effect when a photosensitive element such as a camera is disposed on one side of the first area AA 1. The first wires 10 in the second area AA2 and the first wires 10 passing through the first area AA1 and the second area AA2 at the same time are all spliced by the first wire segments 11 and the transparent second wire segments 12, so that all the first wires 10 in the array substrate are consistent, and the voltage drops of the first wires 10 passing through the first area AA1 and the second area AA2 at the same position in the column direction as those of the first wires 10 only in the second area are consistent, thereby avoiding the screen splitting phenomenon caused by the inconsistent display effect of the area corresponding to the first area AA1 and the display effect of the area corresponding to the second area AA2 on both sides of the extending direction X of the first wires 10 when the first wires 10 are connected to the pixel circuit to drive the pixel to emit light.
In this embodiment, some of the plurality of first wires 10 may be located only in the second area AA 2.
Note that, in the present embodiment, the width of the first area AA1 in the extending direction X of the first wire 10 refers to the maximum width occupied by the first area AA1 in the direction X shown in the drawing. In this embodiment, the shape of the first region is not limited, and may be regular or irregular. The shape of the first region may be, for example, circular, rectangular, or drop-shaped. For example, referring to fig. 3, if the first area AA1 is irregular, the first area AA1 has two points that are relatively farthest apart along the X direction, and two reference lines L1 and L2 perpendicular to the X direction are provided at the two points, the maximum width occupied by the first area AA1 along the extending direction X of the first conductive line 10 is the distance between the two reference lines L1 and L2, and each transparent second conductive line 12 is located right between the two reference lines L1 and L2 or extends out of the area between the two reference lines L1 and L2.
In this embodiment, the arrangement of the first area AA1 and the second area AA2 is not limited. For example, as shown in fig. 1 to 3, the first area AA1 may be completely surrounded by the second area AA 2. For example, as shown in fig. 4, the first area AA1 may be partially enclosed by the second area AA 2. The first area AA1 may be located at an edge of the array substrate 100 or at a central position of the array substrate 100.
In some alternative embodiments, the connection lines of the same-side end points of the plurality of second conductive line segments 10 are perpendicular to the extending direction X of the first conductive line 10, and are connected to the outermost points of the contour of the first area AA1 along the extending direction X of the first conductive line 10. For example, as shown in fig. 1 to 4, two connecting lines of the end points on the same side of the second conducting wire segments 10 are the two reference lines L1 and L2 in the figure, and the second conducting wire segment 12 is located in the region between the two reference lines L1 and L2. I.e. the length of the second conductor segment 12 is equal to the width of the first area AA1 in the extension direction X of the first conductor 10. Since the transparent second wire segment 12 may be made of Indium Tin Oxide (ITO) or Indium zinc Oxide (izo), the first wire segment 11 may be made of metal with relatively low resistivity, such as aluminum or silver, the resistance of the second wire segment 12 is generally greater than that of the first wire segment 11, and the material of the second wire segment 12 is generally low in cost performance, the length of the second wire segment 12 is equal to the width of the first area AA1 along the extending direction X of the first wire 10, so that the overall resistance of the first wire 10 can be relatively reduced, and the cost can be saved.
In some alternative embodiments, referring to fig. 1, the first area AA1 is a rectangle, one side of the rectangle is parallel to the extending direction X of the first conductive line 10, and the second conductive line segment 12 is located in an area of the rectangle extending along a direction perpendicular to the extending direction X of the first conductive line 10, that is, in an area defined by two reference lines L1 and L2 in the figure.
In other alternative embodiments, as shown in FIG. 2, the first region is circular. The second wire 12 is located in a region where the diameter of the circle in the extending direction X of the first wire 10 occupies the width and extends to both sides perpendicular to the extending direction X of the first wire 10, that is, in a region defined by two reference lines L1 and L2 in the drawing.
In some optional embodiments, the array substrate 100 further includes a pixel circuit including a plurality of thin film transistors for controlling light emission of the corresponding pixels. The specific structure of the pixel circuit is not limited in the present invention, and for example, structures such as 2T1C and 7T1C may be adopted, where "T" in the embodiment of the present invention refers to a thin film transistor, "C" refers to a capacitor, and the present invention is also not limited in the specific connection structure between the thin film transistor and the capacitor in each pixel circuit.
In some alternative embodiments, the first conductive line 10 may be a data line, each data line extending along a longitudinal direction of the array substrate 100, and may be located between corresponding columns of pixels, for electrically connecting with a pixel circuit of each pixel to drive the corresponding pixel to emit light for display.
In some alternative embodiments, the first conductive line 10 may be a power supply voltage line, each power supply voltage line extending along the longitudinal direction of the array substrate 100, and may be located between corresponding columns of pixels for electrically connecting with a pixel circuit of each pixel to provide a power supply signal for each pixel circuit.
In other alternative embodiments, the array substrate 100 may include power voltage lines for providing power signals to the pixel circuits to drive the pixels to emit light for display. In this embodiment, please refer to fig. 5, wherein fig. 5 is a schematic top view illustrating a power voltage line according to an embodiment of the present invention, the power voltage line includes the first conductive lines 10 and the second conductive lines 20 disposed in different layers from the first conductive lines 10, an extending direction of the second conductive lines 20 is perpendicular to an extending direction of the first conductive lines 10, and the first conductive lines 10 are electrically connected to the second conductive lines 20. For example, the first conductive lines 10 may be disposed on the same layer as the source/drain metal layers of the thin film transistor, the second conductive lines 20 may be disposed on the same layer as the gate metal layers of the thin film transistor, and the first conductive lines 10 and the second conductive lines 20 are electrically connected through the vias 13.
In this embodiment, the power supply voltage line is provided in a grid-like structure where the first wire 10 and the second wire 20 intersect, so that the resistance of the power supply voltage line can be reduced, and the voltage drop can be reduced. Moreover, a part of the power voltage wires are arranged to be a spliced structure of the first wire section 11 and the transparent second wire section 12, so that the light transmittance of the first area AA1 can be increased, and each first wire 10 is arranged to be the same spliced structure, so that the first wires 10 of the first area AA1 and the second area AA2 are the same, and thus, when the first area AA1 and the second area AA2 are connected to the pixel circuit to drive the pixel to emit light, the display effect of the area corresponding to the first area AA1 is not the same as the display effect of the area corresponding to the second area AA2 on two sides of the extending direction X perpendicular to the first wires 10, and the screen splitting phenomenon is caused.
In the above embodiments, the first conducting wire segment 11 and the second conducting wire segment 12 may be disposed in the same layer. For example, the first wire segment 11 and the second wire segment 12 may be disposed in the same layer as the source/drain metal layer of the tft. In a specific manufacturing process, the first conductive line segment 11 may be patterned first, and then the transparent second conductive line segment 12 may be formed through a patterning process, where the first conductive line segment 11 and the second conductive line segment 12 are directly electrically connected.
In the above embodiments, the first conductive line segment 11 and the second conductive line segment 12 may be disposed in different layers. In a specific manufacturing process, the first conductive line segment 11 may be patterned first, then the insulating layer may be formed on the first conductive line segment 11, then the via hole may be formed on the insulating layer, and then the transparent second conductive line segment 12 may be formed on the insulating layer through the patterning process, and the transparent second conductive line segment 12 may be electrically connected to the first conductive line segment 11 through the via hole.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a display panel 200 according to an embodiment of the present invention. The display panel 200 of the embodiment of the invention has the first display area AA3 and the second display area AA4 at least partially surrounding the first display area AA3, and the light transmittance of the first display area AA3 is greater than that of the second display area AA 4. The display panel 200 includes the array substrate 100 shown in fig. 1 in the above embodiments.
The display panel 200 in this embodiment includes the array substrate 100 of any one of the embodiments, wherein the first area AA1 is disposed corresponding to the first display area AA3 of the display panel 200, and the second area AA2 is disposed corresponding to the second display area AA4 of the display panel 200.
Herein, it is preferable that the light transmittance of the first display area AA3 is 15% or more. In order to ensure that the light transmittance of the first display area AA3 is greater than 15%, even greater than 40%, or even higher, the light transmittance of at least some functional film layers of the display panel 200 in the first display area AA3 is greater than 80%, and even greater than 90%.
According to the display panel 200 of the embodiment of the invention, the light transmittance of the first display area AA3 is greater than that of the second display area AA4, so that the display panel 200 can integrate the photosensitive component 30 on the back of the first display area AA3, and the photosensitive component 30 such as a camera is integrated under a screen, and meanwhile, the first display area AA3 can display a picture, so that the display area of the display panel 200 is increased, and the full-screen design of the display device is realized.
According to the display panel 200 of the embodiment of the invention, since the display panel 200 of the embodiment of the invention adopts the array substrate 100 of any one of the embodiments, the second wire segment 12 of the first wire 10 located in the first display area AA3 is a transparent wire, which can improve the light transmittance of the first display area AA3, and further improve the imaging or photosensitive effect when the photosensitive element 30 such as a camera is disposed on one side of the area. The first wire 10 in the second display area AA4 and the first wire 10 in the first display area AA3 and the second display area AA4 both adopt a splicing manner of the first wire segment 11 and the transparent second wire segment 12, so that the first wires 10 in the first display area AA3 and the second display area AA4 are consistent, and the voltage drops of the first wires 10 in the first display area AA3 and the second display area AA4 are consistent, thereby avoiding the screen splitting phenomenon caused by inconsistent display effect of the first display area AA3 and the display effect of the second display area AA4 on both sides of the extending direction X perpendicular to the first wires 10 when the first wires are connected to the pixel circuit to drive the pixel to emit light.
Since the display panel 200 of the embodiment of the invention includes the array substrate 100 of any of the embodiments, it has the beneficial effects of the array substrate 100 of any of the embodiments, and thus, the description thereof is omitted.
In some optional embodiments, the display panel 200 of the present embodiment is stacked on one side of the array substrate 100 to form a pixel layer, where the pixel layer includes a plurality of sub-pixels arranged in an array. In order to further improve the light transmittance of the first display area AA3 and facilitate the arrangement of pixel circuits of sub-pixels in the first display area AA3, the pixel density (pixelper inc, PPI) in the first display area AA3 is less than that of the second display area AA 4.
In some alternative embodiments, the orthographic projection of the first conductive line 10 on the array substrate 100 is located between the orthographic projections of two adjacent columns of sub-pixels on the array substrate 100. In this embodiment, the orthographic projection of the first conducting wire 10 on the array substrate 100 is located between the orthographic projections of two adjacent columns of sub-pixels on the array substrate 100, and the orthographic projection of the first conducting wire 10 on the array substrate 100 may be partially overlapped with the orthographic projection of two adjacent columns of sub-pixels on the array substrate 100, or may not be overlapped, which is not limited in the present invention.
Optionally, the area between the sub-pixels of the two corresponding adjacent columns of the array substrate 100 may include two first conductive lines 10 disposed side by side, where one first conductive line 10 is a data line, and the other first conductive line 10 is a power voltage line. Illustratively, taking a display panel with 400PPI size of 6 inches as an example, the line widths of the two first conductive lines may be 3 μm to 40 μm, for example, 5 μm, 10 μm, 20 μm, and the like. The line widths of the two first wires arranged side by side can be the same or different, and can be selected according to actual requirements.
The invention further provides a display device 300, and the display device 300 comprises the display panel 200 of any of the above embodiments.
Referring to fig. 7 and 8, fig. 7 is a schematic top view of a display device according to an embodiment of the present invention, and fig. 8 is a cross-sectional view B-B in fig. 7. In the display device 300 of the present embodiment, the display panel 200 may be the display panel 200 of one of the above embodiments, and the display panel 200 includes a first surface S1 and a second surface S2 opposite to each other, where the first surface S1 is a display surface. The display device 300 further includes a photosensitive assembly 30, the photosensitive assembly 30 is located on the second surface S2 side of the display panel, and the photosensitive assembly 30 corresponds to the first display area AA 3.
The photosensitive member 30 may be an image capturing device for capturing external image information. In this embodiment, the photosensitive component 30 is a Complementary Metal Oxide Semiconductor (CMOS) image capture device, and in some other embodiments, the photosensitive component 30 may also be a Charge-coupled device (CCD) image capture device or other types of image capture devices. It is understood that the photosensitive component 30 can not be limited to an image capture device, for example, in some embodiments, the photosensitive component 30 can also be an infrared sensor, a proximity sensor, an infrared lens, a flood sensing element, an ambient light sensor, a dot matrix projector, and the like. In addition, the display device 300 may further integrate other components, such as a handset, a speaker, etc., on the second surface S2 of the display panel 10.
The display device 300 of the present embodiment includes the display panel 200 of any of the above embodiments, and the second wire segment 12 of the first wire 10 located in the first display area AA3 is a transparent wire, which can improve the light transmittance of the first display area AA3, and further improve the imaging or photosensitive effect when the photosensitive component 30 such as a camera is disposed on one side of the area. The first wire 10 in the second display area AA4 and the first wire 10 in the first display area AA3 and the second display area AA4 both adopt a splicing manner of the first wire segment 11 and the transparent second wire segment 12, so that the first wires 10 in the first display area AA3 and the second display area AA4 are consistent, and the voltage drops of the first wires 10 in the first display area AA3 and the second display area AA4 are consistent, thereby avoiding the screen splitting phenomenon caused by inconsistent display effect of the first display area AA3 and the display effect of the second display area AA4 on both sides of the extending direction X perpendicular to the first wires 10 when the first wires are connected to the pixel circuit to drive the pixel to emit light.
In accordance with the above-described embodiments of the present invention, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.
Claims (10)
1. An array substrate having a first region and a second region at least partially surrounding the first region, the array substrate comprising:
the first conductive lines at least partially penetrate through the first region and the second region along the extending direction of the first conductive lines, each first conductive line comprises a first conductive line segment and a transparent second conductive line segment which are electrically connected with each other, and the length of each second conductive line segment is larger than or equal to the width of each first region along the extending direction of the corresponding first conductive line.
2. The array substrate of claim 1, wherein a connection line between the same side ends of the plurality of second conductive line segments is perpendicular to the extending direction of the first conductive line, and the connection line passes through an outermost point of the first area profile along the extending direction of the first conductive line.
3. The array substrate of claim 2, wherein the first region has an irregular shape, or a rectangular shape, or a circular shape, or a drop shape.
4. The array substrate of claim 1, wherein the first conductive line comprises a data line and/or a power voltage line.
5. The array substrate of claim 1, further comprising a power voltage line, wherein the power voltage line comprises the plurality of first conductive lines and a plurality of second conductive lines disposed in a different layer from the first conductive lines, the second conductive lines extend in a direction perpendicular to the first conductive lines, and the first conductive lines are electrically connected to the second conductive lines.
6. The array substrate of claim 1, wherein the first conductive line segment and the second conductive line segment are disposed in the same layer; or
The first lead section and the second lead section are arranged in different layers and are electrically connected through a through hole.
7. The array substrate of claim 6, further comprising a pixel circuit, wherein the pixel circuit comprises a plurality of thin film transistors;
the first conducting wire section and the second conducting wire section are arranged on the same layer, and are arranged on the same layer with the source drain metal layer of the thin film transistor.
8. A display panel having a first display region and a second display region at least partially surrounding the first display region, the first display region having a light transmittance greater than that of the second display region, the display panel comprising the array substrate according to any one of claims 1 to 7, wherein the first region is disposed corresponding to the first display region, and the second region is disposed corresponding to the second display region.
9. The display panel according to claim 8, wherein the display panel further comprises a pixel layer, the pixel layer is stacked on one side of the array substrate, the pixel layer comprises a plurality of sub-pixels arranged in an array, and an orthographic projection of the first conducting wire on the array substrate is located between orthographic projections of two adjacent columns of sub-pixels on the array substrate;
preferably, the area between two adjacent columns of sub-pixels corresponding to the array substrate includes two first wires arranged in an insulating manner, and the two first wires are respectively a data line and a power supply voltage line.
10. A display device characterized by comprising the display panel according to any one of claims 8 to 9.
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