CN111834209A - Semiconductor device and method of forming the same - Google Patents

Semiconductor device and method of forming the same Download PDF

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Publication number
CN111834209A
CN111834209A CN201910324956.XA CN201910324956A CN111834209A CN 111834209 A CN111834209 A CN 111834209A CN 201910324956 A CN201910324956 A CN 201910324956A CN 111834209 A CN111834209 A CN 111834209A
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layer
dielectric layer
oxygen
forming
oxygen absorption
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金吉松
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity

Abstract

A semiconductor device and a forming method thereof are provided, the forming method comprises the following steps: forming a stack layer on the inner wall of the opening, and performing a first process or a second process to form a target high-K dielectric layer after the stack layer is formed; the first process comprises the following steps: performing first annealing treatment to enable the stacked layer to form a transition high-K dielectric layer; forming an oxygen absorption structure on the surface of the transition high-K dielectric layer; performing second annealing treatment, wherein the oxygen absorption structure absorbs partial oxygen in the transition high-K dielectric layer, so that the transition high-K dielectric layer forms a target high-K dielectric layer; the second process comprises the following steps: forming an oxygen absorption structure on the surface of the stacked layer; and annealing to enable the stacked layer to form a target high-K dielectric layer, wherein the oxygen absorption structure absorbs part of oxygen in the target high-K dielectric layer in the process of forming the target high-K dielectric layer. The method improves process compatibility.

Description

Semiconductor device and method of forming the same
Technical Field
The present invention relates to the field of semiconductor manufacturing, and more particularly, to a semiconductor device and a method for forming the same.
Background
High K dielectric materials are one material commonly used in semiconductor devices. For example, as the integration of MOS transistors is higher and higher, the voltage and current required for the operation of MOS transistors are continuously reduced, the speed of switching MOS transistors is increased, and the requirements for semiconductor processes are greatly increased, so that a High-K Material (High-K Material) is used as a gate dielectric layer in the industry to better isolate the gate structure from other parts of the MOS transistors and reduce leakage current.
However, the process compatibility of the method for forming the semiconductor device with the high-K gate dielectric layer is poor.
Disclosure of Invention
The invention provides a semiconductor device and a forming method thereof, which aims to improve the process compatibility.
In order to solve the above problems, the present invention provides a method for forming a semiconductor device, including: providing a substrate, wherein the substrate is provided with a dielectric layer, and the dielectric layer is provided with an opening penetrating through the dielectric layer; forming a stack layer on an inner wall of the opening, the method of forming the stack layer comprising: sequentially forming a first high-K dielectric layer to a W-th high-K dielectric layer on the inner wall of the opening, wherein W is an integer more than or equal to 2; before an i +1 th high-K dielectric layer is formed, an i-th oxide layer is formed on the surface of the i-th high-K dielectric layer, modified metal ions are contained in the material of the i-th oxide layer, and i is an integer which is greater than or equal to 1 and less than or equal to W-1; after the stacked layer is formed, a first process procedure or a second process procedure is carried out to form a target high-K dielectric layer; the first process comprises the following steps: performing first annealing treatment to enable the stacked layer to form a transition high-K dielectric layer; forming an oxygen absorption structure on the surface of the transition high-K dielectric layer; performing second annealing treatment, wherein the oxygen absorption structure absorbs partial oxygen in the transition high-K dielectric layer under the second annealing treatment, so that the transition high-K dielectric layer forms a target high-K dielectric layer; the second process comprises the following steps: forming an oxygen absorption structure on the surface of the stacked layer; and annealing to enable the stacked layer to form a target high-K dielectric layer, wherein the oxygen absorption structure absorbs part of oxygen in the target high-K dielectric layer in the process of forming the target high-K dielectric layer.
Optionally, the material of the jth high-K dielectric layer is HfO2、La2O3Or ZrO2J is an integer of 1 to WThe material of the ith oxide layer is Mx1OyAnd M is a modified metal atom.
Optionally, the material of the jth high-K dielectric layer is HfO2The material of the ith oxide layer is TiOy(ii) a The transition high-K dielectric layer is made of HfTiOx2X2 is 3.9-4.2; the target high-K dielectric layer is made of HfTiOx3X3 is smaller than x2, and x3 is 3.7-3.9.
Optionally, the thickness of the jth high-K dielectric layer is 2-15 angstroms, and j is an integer greater than or equal to 1 and less than or equal to W; the thickness of the ith oxide layer is 2-15 angstroms.
Optionally, the oxygen absorption structure comprises an intermediate layer and an oxygen absorption layer which are positioned on the inner wall of the opening, and the oxygen absorption layer is positioned on the intermediate layer; in the first process, performing second annealing treatment, wherein partial oxygen in the transition high-K dielectric layer is absorbed by the oxygen absorption layer through the middle layer; in the second process, annealing treatment is carried out, and part of oxygen in the target high-K dielectric layer is absorbed by the oxygen absorption layer through the middle layer.
Optionally, the material of the middle layer includes titanium nitride, and the material of the oxygen absorption layer is polysilicon or amorphous silicon.
Optionally, the thickness of the intermediate layer is 10 to 30 angstroms.
Optionally, the thickness of the oxygen absorption layer is 15 nm to 25 nm.
Optionally, the process parameters of the first annealing treatment include: the gas used comprises H2And N2The annealing temperature is 750-950 ℃, and the annealing time is 12-18 minutes.
Optionally, the process parameters of the second annealing treatment include: the gas used comprises H2And N2The annealing temperature is 500-650 ℃, and the annealing time is 5-16 minutes.
Optionally, the process parameters of the annealing treatment in the second process include: the gas used comprises H2And N2The annealing temperature is 750-850 ℃, and the annealing time is 12-16 minutes.
Optionally, the method further includes: and after the target high-K dielectric layer is formed, removing the oxygen absorption structure.
Optionally, the method further includes: forming an interface layer on an inner wall of the opening before forming the stacked layers; after forming the stacked layers, an interface layer is positioned between the stacked layers and the substrate; the method for forming the oxygen absorbing structure comprises the following steps: forming an intermediate layer on the inner wall of the opening, wherein the intermediate layer is made of a work function layer material; forming an oxygen absorption layer on the intermediate layer on the inner wall of the opening; in the first process: the oxygen absorption layer absorbs partial oxygen in the transition high-K dielectric layer under second annealing treatment, and the oxygen absorption layer also absorbs partial oxygen in the interface layer under second annealing treatment; the first process further comprises: after the second annealing treatment is carried out, removing the oxygen absorption layer and reserving the middle layer; in the second process, in the process of forming the target high-K dielectric layer, the oxygen absorption layer absorbs part of oxygen in the target high-K dielectric layer, and the oxygen absorption layer also absorbs part of oxygen in the interface layer; the second process further comprises: and after annealing treatment, removing the oxygen absorption layer and keeping the intermediate layer.
Optionally, the method further includes: after removing the oxygen absorption layer, forming an additional work function layer on the intermediate layer on the inner wall of the opening; a gate electrode layer is formed in the opening over the additional work function layer.
The invention also provides a semiconductor device formed by any one of the methods.
Compared with the prior art, the technical scheme of the invention has the following advantages:
in the forming method of the semiconductor device provided by the technical scheme of the invention, in the first process, the first annealing treatment is carried out, the ith oxide layer reacts with the ith high-K dielectric layer and the (i + 1) th high-K dielectric layer to form the transition high-K dielectric layer, and the material of the transition high-K dielectric layer is provided with modified metal ions which can improve the dielectric constant of the transition high-K dielectric layer. Because the oxygen content in the transition high-K dielectric layer is enriched and the oxygen absorption structure absorbs partial oxygen in the transition high-K dielectric layer under the second annealing treatment, the transition high-K dielectric layer forms a target high-K dielectric layer, and therefore the oxygen content in the target high-K dielectric layer is smaller than the oxygen content in the transition high-K dielectric layer, and the content ratio of modified metal ions and oxygen ions in the target high-K dielectric layer meets the requirements of the process. In the second process, annealing treatment is carried out to enable the stacked layer to form a target high-K dielectric layer, so that modified metal ions are contained in the material of the target high-K dielectric layer, the metal ions can improve the dielectric constant of the target high-K dielectric layer, the dielectric constant of the target high-K dielectric layer is larger, and in the process of forming the target high-K dielectric layer, the oxygen absorption structure absorbs partial oxygen in the target high-K dielectric layer, so that the content ratio of the modified metal ions to the oxygen ions in the target high-K dielectric layer meets the process requirement. The oxygen absorption process of the oxygen absorption structure enables, on one hand, the dielectric constant of the target high-K dielectric layer to be improved, and on the other hand, the impurity energy band in the target high-K dielectric layer to be reduced. And secondly, the band gap of the target high-K dielectric layer is higher in matching degree with the band gap of silicon. In conclusion, the performance of the semiconductor device is improved.
Secondly, in the first process, the oxygen absorption structure absorbs part of oxygen in the transition high-K dielectric layer under the second annealing treatment, so that the transition high-K dielectric layer forms a target high-K dielectric layer, and in the second process, the oxygen absorption structure absorbs part of oxygen in the target high-K dielectric layer, so that the content ratio of modified metal ions and oxygen ions in the target high-K dielectric layer meets the process requirements. No matter the first process procedure or the second process procedure, the step of oxygen absorption by the oxygen absorption structure can be compatible with the standard process of the semiconductor device, and the process steps are simplified.
Furthermore, in the first process, the oxygen absorption layer absorbs part of oxygen in the transition high-K dielectric layer under the second annealing treatment, and the oxygen absorption layer also absorbs part of oxygen in the interface layer under the second annealing treatment, so that the thickness of the interface layer is reduced, the thickness of the equivalent gate dielectric layer is reduced, and the improvement of the electrical property of the semiconductor device is facilitated. And part of oxygen in the absorption interface layer and part of oxygen in the absorption transition high-K dielectric layer are both carried out in the second annealing treatment by adopting the oxygen absorption layer, so that the process of absorbing part of oxygen in the interface layer and the process of absorbing part of oxygen in the transition high-K dielectric layer are compatible with each other, and the process steps are simplified.
In the second process, in the process of forming the target high-K dielectric layer, the oxygen absorption layer absorbs partial oxygen in the target high-K dielectric layer, and the oxygen absorption layer also absorbs partial oxygen in the interface layer, so that the thickness of the interface layer is reduced, the thickness of the equivalent gate dielectric layer is reduced, and the improvement of the electrical performance of the semiconductor device is facilitated. And part of oxygen in the absorption interface layer and part of oxygen in the absorption target high-K dielectric layer are both carried out in the same annealing treatment by adopting the oxygen absorption layer, so that the process for absorbing part of oxygen in the absorption interface layer and the process for absorbing part of oxygen in the absorption target high-K dielectric layer are compatible with each other, and the process steps are simplified.
Drawings
Fig. 1 to 6 are schematic structural views illustrating a process of forming a semiconductor device according to an embodiment of the present invention;
fig. 7 to 9 are schematic structural views illustrating a semiconductor device forming process according to an embodiment of the present invention.
Detailed Description
As described in the background, the performance of semiconductor devices formed by the prior art is poor.
A method of forming a semiconductor device, comprising: providing a substrate, wherein the substrate is provided with a dielectric layer, and the dielectric layer is provided with an opening penetrating through the dielectric layer; a first high-K dielectric layer, a modified metal layer and a second high-K dielectric layer are sequentially formed on the inner wall of the opening, and the first high-K dielectric layer and the second high-K dielectric layer are made of HfO2The modified metal layer is made of Ti; performing first annealing to enable the modified metal layer to react with the first high-K dielectric layer and the second high-K dielectric layer respectively to form a transition high-K dielectric layer; performing second annealing to enable the transition high-K dielectric layer to form a target high-K dielectric layer, wherein the atmosphere of the second annealing comprises oxygen, the second annealing is used for repairing oxygen vacancies in the transition high-K dielectric layer, and the target high-K dielectric layer is made of HfTiOzAnd z is 3.7 to 3.9.
The target high-K dielectric layer comprises Ti ions and Ti-O bonds, so that the target high-K dielectric layer has a very high K value. And HfTiOzAnd siliconThe band gaps are matched with each other, and the performance of the target high-K dielectric layer is improved.
However, the compatibility of the above steps with the formation process steps of the semiconductor device is poor, which results in cumbersome steps of the formation method of the semiconductor device.
On the basis, the invention provides a method for forming a semiconductor device, which comprises the following steps: forming a stack layer on the inner wall of the opening, and performing a first process or a second process to form a target high-K dielectric layer after the stack layer is formed; the first process comprises the following steps: performing first annealing treatment to enable the stacked layer to form a transition high-K dielectric layer; forming an oxygen absorption structure on the surface of the transition high-K dielectric layer; performing second annealing treatment, wherein the oxygen absorption structure absorbs partial oxygen in the transition high-K dielectric layer under the second annealing treatment, so that the transition high-K dielectric layer forms a target high-K dielectric layer; the second process comprises the following steps: forming an oxygen absorption structure on the surface of the stacked layer; and annealing to enable the stacked layer to form a target high-K dielectric layer, wherein the oxygen absorption structure absorbs part of oxygen in the target high-K dielectric layer in the process of forming the target high-K dielectric layer. The method improves process compatibility.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 1 to 6 are schematic structural diagrams illustrating a semiconductor device forming process according to an embodiment of the present invention.
Referring to fig. 1, a substrate 100 is provided, the substrate 100 having a dielectric layer 120 thereon, the dielectric layer 120 having an opening 121 formed therein through the dielectric layer 120.
In this embodiment, a planar MOS transistor is used as an example of a semiconductor device, and accordingly, the substrate 100 is a planar semiconductor substrate. In other embodiments, the semiconductor device is a fin field effect transistor, and the base includes a semiconductor substrate and a fin on the semiconductor substrate.
The dielectric layer 120 is made of silicon oxide or a low-K dielectric material.
The bottom of the opening 121 exposes the surface of the substrate 100.
Specifically, a dummy gate structure is formed on the substrate 100; forming source and drain regions in the substrate at two sides of the dummy gate structure respectively; forming source and drain regions in the substrate at two sides of the dummy gate structure, and forming a dielectric layer 120 on the substrate 100 at the side of the dummy gate structure, wherein the dielectric layer 120 covers the side wall of the dummy gate structure and exposes the top surface of the dummy gate structure; after the dielectric layer 120 is formed, the dummy gate structure is removed to form an opening 121.
Referring to fig. 2, a stack layer is formed on an inner wall of the opening 121, and a method of forming the stack layer includes: sequentially forming a first high-K dielectric layer to a W-th high-K dielectric layer on the inner wall of the opening 121, wherein W is an integer greater than or equal to 2; before an i +1 th high-K dielectric layer is formed, an i-th oxide layer is formed on the surface of the i-th high-K dielectric layer, modified metal ions are contained in the material of the i-th oxide layer, and i is an integer which is greater than or equal to 1 and less than or equal to W-1.
The (i + 1) th high-K dielectric layer is positioned on the ith high-K dielectric layer.
In this embodiment, the method further includes: forming an interface layer 110 on an inner wall of the opening 121 before forming the stacked layers; after the stacked layers are formed, an interface layer 110 is positioned between the stacked layers and the substrate 100.
In this embodiment, the value of K ranges from 20 to 30 from the first high-K dielectric layer to the W-th high-K dielectric layer.
In this embodiment, taking W as 2 as an example, correspondingly, a first high-K dielectric layer 131 and a second high-K dielectric layer 132 are sequentially formed on the inner wall of the opening 121, and before the second high-K dielectric layer 132 is formed, a first oxide layer 140 is formed on the surface of the first high-K dielectric layer 131, and the material of the first oxide layer 140 has modified metal ions.
The j layer of high-K dielectric layer is made of HfO2、La2O3Or ZrO2J is an integer of 1 or more and W or less. In this embodiment, W is 2 as an example, and correspondingly, the material of the first high-K dielectric layer 131 is HfO2、La2O3Or ZrO2The second high-K dielectric layer 132 is made of HfO2、La2O3Or ZrO2. In this embodiment, the first high-K dielectric layer 131 and the second high-K dielectric layer 132 are made of HfO2As an example.
And the materials of all the layers from the first high-K dielectric layer to the W-th high-K dielectric layer are the same.
The material of the ith oxide layer is Mx1OyM is a modified metal atom, in this embodiment, M is a titanium atom, and the material of the i-th oxide layer is TiOy。
In this embodiment, the first oxide layer 140 is made of TiOyE.g. TiO2And y is greater than 0.
The thickness of the jth high-K dielectric layer is 2-15 angstroms, and j is an integer which is greater than or equal to 1 and less than or equal to W.
The significance of selecting the thickness of the jth high-K dielectric layer to be 2-15 angstroms is as follows: if the thickness of the jth high-K dielectric layer is larger than 15 angstroms, the subsequent reaction between the jth adjacent high-K dielectric layer and the ith oxide layer is insufficient, and the material components of the target high-K dielectric layer are not uniform; if the thickness of the jth high-K dielectric layer is less than 2 angstroms, the first high-K dielectric layer is consumed by the interface layer 110 during the subsequent first annealing process or annealing process, resulting in the first high-K dielectric layer being reacted with the first oxide layer by insufficient material.
The thickness of the ith oxide layer is 2-15 angstroms. The thickness of the ith oxide layer is selected to be 2-15 angstroms in the sense that: if the thickness of the ith oxide layer is more than 15 angstroms, the subsequent adjacent jth high-K dielectric layer and ith oxide layer have insufficient reaction, and the material components of the target high-K dielectric layer are not uniform; if the thickness of the ith oxide layer is less than 2 angstroms, it is difficult to satisfy the doping ratio of the modified metal ions in the target high-K dielectric layer.
In this embodiment, taking W as 2 as an example, accordingly, the thickness of the first high-K dielectric layer 131 is 2 to 15 angstroms, the thickness of the second high-K dielectric layer 132 is 2 to 15 angstroms, and the thickness of the first oxide layer 140 is 2 to 15 angstroms.
The process for forming the jth high-K dielectric layer comprises an atomic layer deposition process, and has the advantages that: the thickness of the jth high-K dielectric layer which can be deposited is smaller, and the requirement of the thickness selection range of the jth high-K dielectric layer is met; the thickness uniformity of the jth high-K dielectric layer is good, and the thickness uniformity of a subsequent target high-K dielectric layer is facilitated.
The process for forming the ith oxide layer comprises an atomic layer deposition process, and has the advantages that: the thickness of the ith oxide layer which can be deposited is smaller, and the requirement of the thickness selection range of the ith oxide layer is met; the thickness uniformity of the ith oxide layer is good, and the thickness uniformity of a subsequent target high-K dielectric layer is facilitated.
It should be noted that the inner wall of the opening 121 mentioned in this embodiment includes: the sidewalls and bottom of the opening 121.
And after the stacked layer is formed, performing a first process or a second process to form a target high-K dielectric layer.
In this embodiment, a first process is performed to form a target high-K dielectric layer after the stacked layer is formed.
The first process comprises the following steps: performing first annealing treatment to enable the stacked layer to form a transition high-K dielectric layer; forming an oxygen absorption structure on the surface of the transition high-K dielectric layer; and performing second annealing treatment, wherein the oxygen absorption structure absorbs partial oxygen in the transition high-K dielectric layer under the second annealing treatment, so that the transition high-K dielectric layer forms a target high-K dielectric layer.
Referring to fig. 3, a first annealing process is performed to form a transition high-K dielectric layer 150 on the stacked layer.
And performing first annealing treatment to enable the ith oxide layer to react with the ith high-K dielectric layer and the (i + 1) th high-K dielectric layer respectively, so that the layers of the stacked layers form a transition high-K dielectric layer 150 together.
The transition high-K dielectric layer 150 is made of HfTiOx2Wherein x2 is 3.9-4.2.
The process parameters of the first annealing treatment comprise: the gas used comprises H2And N2The annealing temperature is 750-950 ℃, and the annealing time is 12-18 minutes.
In the first annealing treatment, H2Diffuse to the interface layer and the substrate, and reduce the dangling bond between the interface layer and the substrate.
Referring to fig. 4, an oxygen gettering structure 160 is formed on the surface of the transition high K dielectric layer 150.
The oxygen absorbing structure 160 includes an intermediate layer 161 and an oxygen absorbing layer 162 on the inner wall of the opening 121, and the oxygen absorbing layer 162 is located on the intermediate layer 161.
The method of forming the oxygen-absorbing structure 160 includes: forming an intermediate layer 161 on the inner wall of the opening 121, wherein the intermediate layer 161 is made of a work function layer material; an oxygen-absorbing layer 162 is formed on the intermediate layer 161 on the inner wall of the opening 121.
In this embodiment, the intermediate layer 161 is located on the surface of the transition high-K dielectric layer 150, and the intermediate layer 161 is located between the transition high-K dielectric layer 150 and the oxygen absorption layer 162.
The material of the intermediate layer 161 includes titanium nitride, and the material of the oxygen absorption layer 162 is polysilicon or amorphous silicon.
The role of the intermediate layer 161 includes: as an etching stop layer for subsequently forming an additional work function layer; the oxygen absorption layer 162 is prevented from being in direct contact with the transition high-K dielectric layer 150, the oxygen absorption layer 162 is prevented from being in direct contact with a subsequent target high-K dielectric layer, Si in the oxygen absorption layer 162 is further prevented from being diffused into the target high-K dielectric layer, and the difficulty in removing the oxygen absorption layer 162 is reduced.
The thickness of the intermediate layer 161 is 10 to 30 angstroms. The thickness of the intermediate layer 161 is chosen in the sense that: if the thickness of the intermediate layer 161 is greater than 30 angstroms, the oxygen diffusion path is too long in the oxygen absorption process of the subsequent oxygen absorption layer, so that the oxygen absorption effect of the oxygen absorption layer is poor; if the thickness of the intermediate layer 161 is less than 10 angstroms, the etching stop function of the intermediate layer 161 is poor, and the ability of the intermediate layer 161 to block the Si diffusion in the oxygen-absorbing layer 162 is poor.
The thickness of the oxygen absorption layer 162 is 15 to 25 nm. The significance of selecting the thickness of the oxygen absorption layer 162 to be 15-25 nm is as follows: if the thickness of the oxygen absorbing layer 162 is less than 15 nm, the oxygen absorbing layer 162 has a poor oxygen absorbing capacity; if the thickness of the oxygen absorbing layer 162 is greater than 25 nm, it causes process waste.
Referring to fig. 5, a second annealing process is performed, and the oxygen gettering structure 160 absorbs a portion of oxygen in the transition high-K dielectric layer 150 under the second annealing process, so that the transition high-K dielectric layer 150 forms a target high-K dielectric layer 170.
In this embodiment, the target high-K dielectric layer 170 is made of HfTiOx3X3 is less than x2, and x3 is 3.7 to 3.9, such as 3.8.
Since the transition high-K dielectric layer 150 is formed by reacting the ith oxide layer with the ith high-K dielectric layer and the (i + 1) th high-K dielectric layer, too much oxygen is in the transition high-K dielectric layer 150, and too much oxygen in the transition high-K dielectric layer 150 causes more impurity energy bands, so that the oxygen in the transition high-K dielectric layer 150 needs to be properly reduced.
The oxygen gettering structure 160 absorbs a portion of oxygen in the transition high-K dielectric layer 150, so that the oxygen content in the target high-K dielectric layer 170 meets the process requirements, and the impurity energy band in the target high-K dielectric layer 170 is reduced.
The target high-K dielectric layer 170 is made of a high-K dielectric material, and the dielectric constant of the target high-K dielectric layer 170 is 30-40. The band gap of the target high-K dielectric layer 170 is highly matched with the band gap of silicon, specifically, the distance between the valence band of the target high-K dielectric layer 170 and the valence band of silicon is long, and the distance between the conduction band of the target high-K dielectric layer 170 and the conduction band of silicon is long.
The temperature of the second annealing treatment is lower than that of the first annealing treatment.
In this embodiment, the process parameters of the second annealing treatment include: the gas used comprises H2And N2The annealing temperature is 500-650 ℃, and the annealing time is 5-16 minutes.
The effects of the second annealing treatment include: under the second annealing treatment, the oxygen absorbing structure 160 absorbs part of oxygen in the transition high-K dielectric layer 150, so that the proportion of oxygen atoms and titanium atoms in the target high-K dielectric layer 170 meets the requirement; the temperature of the second annealing treatment is low, and the defects on the surface and in the transitional high-K dielectric layer 150 caused by high temperature in the first annealing treatment are repaired; in the second annealing treatment, H2Diffuse to the interface layer andand a dangling bond between the interface layer and the substrate is reduced between the bottoms.
If the annealing temperature of the second annealing treatment is higher than 650 degrees celsius, the degree of repairing defects on the surface and inside of the transition high-K dielectric layer 150 is poor, and if the annealing temperature of the second annealing treatment is lower than 500 degrees celsius, the driving capability of oxygen atoms is poor, and the oxygen absorption capability of the oxygen absorption structure 160 is poor.
The annealing time of the second annealing treatment is less than 5 minutes, so that the repair degree of defects on the surface and inside of the transition high-K dielectric layer 150 is poor, and the oxygen absorption structure 160 absorbs oxygen insufficiently; the annealing time of the second annealing treatment is longer than 16 minutes, which results in a waste of the process and excessive absorption of oxygen by the oxygen absorbing structure 160.
In this embodiment, a second annealing process is performed, and a part of oxygen in the transition high-K dielectric layer 150 is absorbed by the oxygen absorption layer 162 through the intermediate layer 161.
The oxygen-absorbing layer 162 absorbs a portion of the oxygen in the transitional high-K dielectric layer 150 during the second annealing process. The oxygen absorption layer 162 also absorbs part of oxygen in the interface layer 110 under the second annealing treatment, so that the thickness of the interface layer 110 is reduced, and thus the thickness of the equivalent gate dielectric layer is reduced, which is beneficial to improving the electrical performance of the semiconductor device.
In this embodiment, the oxygen-absorbing layer 162 is used for absorbing part of the oxygen in the interface layer 110 and the transition high-K dielectric layer 150, and both are performed in the second annealing process, so that the process for absorbing part of the oxygen in the interface layer 110 and the process for absorbing part of the oxygen in the transition high-K dielectric layer 150 are compatible with each other, and the process steps are simplified.
In this embodiment, the first process further includes: after the second annealing treatment is performed, the oxygen-absorbing layer 162 is removed and the intermediate layer 161 remains (refer to fig. 6).
In this embodiment, the intermediate layer 241 is made of a work function layer material.
In this embodiment, after removing the oxygen-absorbing layer 162, an additional work function layer (not shown) is formed on the inner wall of the opening 121 and located on the intermediate layer 161; a gate electrode layer (not shown) over the work function addition layer is formed in the opening 121; the gate electrode layer, additional work function layer, intermediate layer 161, target high-K dielectric layer 170, and interface layer 110 are planarized until the top surface of dielectric layer 120 is exposed.
The additional work function layer and the intermediate layer 161 together constitute a work function structural layer of the semiconductor device, which is used to adjust a threshold voltage of the semiconductor device.
Accordingly, the present embodiment also provides a semiconductor device formed by the above method.
The present invention also provides another method for forming a semiconductor device, and the method of the present embodiment is different from the method of the previous embodiment in that: and after the stacked layer is formed, performing a second process to form a target high-K dielectric layer.
The second process comprises the following steps: forming an oxygen absorption structure on the surface of the stacked layer; and annealing to enable the stacked layer to form a target high-K dielectric layer, wherein the oxygen absorption structure absorbs part of oxygen in the target high-K dielectric layer in the process of forming the target high-K dielectric layer.
The same contents of this embodiment as those of the previous embodiment will not be described in detail.
Fig. 7 to 9 are schematic structural views illustrating a semiconductor device forming process according to an embodiment of the present invention.
Referring to fig. 7, fig. 7 is a schematic view based on fig. 2, and an oxygen absorption structure 240 is formed on the surface of the stacked layers.
The oxygen absorbing structure 240 includes an intermediate layer 241 and an oxygen absorbing layer 242 located on the inner wall of the opening 121, and the oxygen absorbing layer 242 is located on the intermediate layer 241.
The method of forming the oxygen-absorbing structure 240 includes: forming an intermediate layer 241 on the inner wall of the opening 121, wherein the material of the intermediate layer 241 is a work function layer material; an oxygen absorbing layer 242 is formed on the intermediate layer 241 on the inner wall of the opening 121.
The material and thickness of the intermediate layer 241 refer to those of the intermediate layer 161 in the previous embodiment, and the material and thickness of the oxygen absorbing layer 242 refer to those of the oxygen absorbing layer 162 in the previous embodiment.
In this embodiment, the intermediate layer 241 is located on the surface of the stacked layers, and the intermediate layer 241 is located between the stacked layers and the oxygen absorbing layer 242.
Referring to fig. 8, annealing is performed to form the target high-K dielectric layer 250 from the stacked layers, and during the formation of the target high-K dielectric layer 250, the oxygen-gettering structure 240 absorbs a portion of oxygen in the target high-K dielectric layer 250.
In the annealing process, the ith oxide layer reacts with the ith high-K dielectric layer and the (i + 1) th high-K dielectric layer respectively to form a target high-K dielectric layer 250, and meanwhile, the oxygen absorption structure 240 absorbs part of oxygen in the target high-K dielectric layer 250, so that the oxygen content in the target high-K dielectric layer 250 meets the process requirement.
After annealing treatment, the target high-K dielectric layer 250 is made of HfTiOx3And x3 is 3.7 to 3.9.
The target high-K dielectric layer 250 is made of a high-K dielectric material, and the dielectric constant of the target high-K dielectric layer 250 is 30-40. The band gap of the target high-K dielectric layer 250 is matched with the band gap of silicon with a high degree of matching, specifically, the distance between the valence band of the target high-K dielectric layer 250 and the valence band of silicon is long, and the distance between the conduction band of the target high-K dielectric layer 250 and the conduction band of silicon is long.
The process parameters of the annealing treatment in the second process procedure comprise: the gas used comprises H2And N2The annealing temperature is 750-850 ℃, and the annealing time is 12-16 minutes.
Annealing is performed, and part of oxygen in the target high-K dielectric layer 250 is absorbed by the oxygen absorbing layer 242 through the intermediate layer 241.
In the second process, in the process of forming the target high-K dielectric layer 250, the oxygen absorption layer 242 absorbs part of oxygen in the target high-K dielectric layer 250, and the oxygen absorption layer 242 also absorbs part of oxygen in the interface layer 110, so that the thickness of the interface layer 110 is reduced, the thickness of the equivalent gate dielectric layer is reduced, and the improvement of the electrical performance of the semiconductor device is facilitated. Part of oxygen in the absorption interface layer 110 and part of oxygen in the absorption target high-K dielectric layer 250 are both carried out in the same annealing treatment by adopting the oxygen absorption layer 242, so that the process for absorbing part of oxygen in the absorption interface layer 110 and the process for absorbing part of oxygen in the absorption target high-K dielectric layer 250 are compatible with each other, and the process steps are simplified.
In the annealing treatment of the second process, H2Diffuse to the interface layer and the substrate, and reduce the dangling bond between the interface layer and the substrate.
For the annealing treatment of the second process, if the annealing temperature of the annealing treatment is higher than 850 ℃, more defects are caused in the target high-K dielectric layer 250, and if the annealing temperature of the annealing treatment is lower than 750 ℃, the difficulty of the reaction of the i-th oxide layer with the i-th high-K dielectric layer and the i + 1-th high-K dielectric layer is larger; if the time of the annealing treatment is less than 12 minutes, the reaction of the ith oxide layer with the ith high-K dielectric layer and the (i + 1) th high-K dielectric layer is insufficient; if the time of the annealing treatment is more than 16 minutes, the process is wasted, and the oxygen absorption structure absorbs excessive oxygen.
In this embodiment, the second process further includes: after the annealing treatment is performed, the oxygen absorbing layer 242 is removed and the intermediate layer 241 remains (refer to fig. 9).
In this embodiment, the method further includes: after removing the oxygen absorbing layer 242, forming an additional work function layer on the intermediate layer 241 on the inner wall of the opening; forming a gate electrode layer over the additional work function layer in the opening; and flattening the gate electrode layer, the additional work function layer, the intermediate layer, the target high-K dielectric layer and the interface layer until the top surface of the dielectric layer is exposed.
Accordingly, the present embodiment also provides a semiconductor device formed by the above method.
The present invention also provides another method for forming a semiconductor device, and the method of this embodiment is different from the embodiment of fig. 7 to 9 in that: the second process comprises the following steps: and after annealing treatment, removing the oxygen absorption structure, namely removing the oxygen absorption layer and the intermediate layer. And after removing the oxygen absorption structure, forming a work function structural layer positioned on the surface of the target high-K dielectric layer and a gate electrode layer positioned on the work function structural layer on the inner wall of the opening.
Accordingly, the present embodiment also provides a semiconductor device formed by the above method.
The present invention also provides another method for forming a semiconductor device, and the method of this embodiment is different from the embodiment of fig. 1 to 6 in that: the first process comprises the following steps: after annealing treatment, removing the oxygen absorption structure, namely removing the oxygen absorption layer and the middle layer; and after removing the oxygen absorption structure, forming a work function structural layer positioned on the surface of the target high-K dielectric layer and a gate electrode layer positioned on the work function structural layer on the inner wall of the opening.
Accordingly, the present embodiment also provides a semiconductor device formed by the above method.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (15)

1. A method of forming a semiconductor device, comprising:
providing a substrate, wherein the substrate is provided with a dielectric layer, and the dielectric layer is provided with an opening penetrating through the dielectric layer;
forming a stack layer on an inner wall of the opening, the method of forming the stack layer comprising: sequentially forming a first high-K dielectric layer to a W-th high-K dielectric layer on the inner wall of the opening, wherein W is an integer more than or equal to 2; before an i +1 th high-K dielectric layer is formed, an i-th oxide layer is formed on the surface of the i-th high-K dielectric layer, modified metal ions are contained in the material of the i-th oxide layer, and i is an integer which is greater than or equal to 1 and less than or equal to W-1;
after the stacked layer is formed, a first process procedure or a second process procedure is carried out to form a target high-K dielectric layer;
the first process comprises the following steps: performing first annealing treatment to enable the stacked layer to form a transition high-K dielectric layer; forming an oxygen absorption structure on the surface of the transition high-K dielectric layer; performing second annealing treatment, wherein the oxygen absorption structure absorbs partial oxygen in the transition high-K dielectric layer under the second annealing treatment, so that the transition high-K dielectric layer forms a target high-K dielectric layer;
the second process comprises the following steps: forming an oxygen absorption structure on the surface of the stacked layer; and annealing to enable the stacked layer to form a target high-K dielectric layer, wherein the oxygen absorption structure absorbs part of oxygen in the target high-K dielectric layer in the process of forming the target high-K dielectric layer.
2. The method as claimed in claim 1, wherein the material of the jth high-K dielectric layer is HfO2、La2O3Or ZrO2J is an integer of 1 to W, and the material of the i-th oxide layer is Mx1OyAnd M is a modified metal atom.
3. The method as claimed in claim 2, wherein the material of the jth high-K dielectric layer is HfO2The material of the ith oxide layer is TiOy(ii) a The transition high-K dielectric layer is made of HfTiOx2X2 is 3.9-4.2; the target high-K dielectric layer is made of HfTiOx3X3 is smaller than x2, and x3 is 3.7-3.9.
4. The method for forming a semiconductor device according to claim 1, wherein the thickness of the jth high-K dielectric layer is 2 to 15 angstroms, j is an integer of 1 or more and W or less; the thickness of the ith oxide layer is 2-15 angstroms.
5. The method for forming a semiconductor device according to claim 1, wherein the oxygen-absorbing structure includes an intermediate layer and an oxygen-absorbing layer on an inner wall of the opening, the oxygen-absorbing layer being on the intermediate layer; in the first process, performing second annealing treatment, wherein partial oxygen in the transition high-K dielectric layer is absorbed by the oxygen absorption layer through the middle layer; in the second process, annealing treatment is carried out, and part of oxygen in the target high-K dielectric layer is absorbed by the oxygen absorption layer through the middle layer.
6. The method for forming a semiconductor device according to claim 5, wherein a material of the intermediate layer comprises titanium nitride, and a material of the oxygen absorption layer is polysilicon or amorphous silicon.
7. The method for forming a semiconductor device according to claim 5, wherein the thickness of the intermediate layer is 10 to 30 angstroms.
8. The method for forming a semiconductor device according to claim 5, wherein the oxygen-absorbing layer has a thickness of 15 to 25 nm.
9. The method for forming a semiconductor device according to claim 1, wherein the process parameters of the first annealing treatment include: the gas used comprises H2And N2The annealing temperature is 750-950 ℃, and the annealing time is 12-18 minutes.
10. The method for forming a semiconductor device according to claim 1, wherein the process parameters of the second annealing treatment include: the gas used comprises H2And N2The annealing temperature is 500-650 ℃, and the annealing time is 5-16 minutes.
11. The method as claimed in claim 1, wherein the annealing process in the second process comprises: the gas used comprises H2And N2The annealing temperature is 750-850 ℃, and the annealing time is 12-16 minutes.
12. The method for forming a semiconductor device according to claim 1, further comprising: and after the target high-K dielectric layer is formed, removing the oxygen absorption structure.
13. The method for forming a semiconductor device according to claim 1, further comprising: forming an interface layer on an inner wall of the opening before forming the stacked layers; after forming the stacked layers, an interface layer is positioned between the stacked layers and the substrate;
the method for forming the oxygen absorbing structure comprises the following steps: forming an intermediate layer on the inner wall of the opening, wherein the intermediate layer is made of a work function layer material; forming an oxygen absorption layer on the intermediate layer on the inner wall of the opening;
in the first process: the oxygen absorption layer absorbs partial oxygen in the transition high-K dielectric layer under second annealing treatment, and the oxygen absorption layer also absorbs partial oxygen in the interface layer under second annealing treatment; the first process further comprises: after the second annealing treatment is carried out, removing the oxygen absorption layer and reserving the middle layer; in the second process, in the process of forming the target high-K dielectric layer, the oxygen absorption layer absorbs part of oxygen in the target high-K dielectric layer, and the oxygen absorption layer also absorbs part of oxygen in the interface layer; the second process further comprises: and after annealing treatment, removing the oxygen absorption layer and keeping the intermediate layer.
14. The method for forming a semiconductor device according to claim 13, further comprising: after removing the oxygen absorption layer, forming an additional work function layer on the intermediate layer on the inner wall of the opening; a gate electrode layer is formed in the opening over the additional work function layer.
15. A semiconductor device formed according to the method of any one of claims 1 to 14.
CN201910324956.XA 2019-04-22 2019-04-22 Semiconductor device and method of forming the same Pending CN111834209A (en)

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