CN111831590A - Algorithm for reliably protecting NVRAM data content from loss - Google Patents

Abstract

The invention discloses an algorithm for reliably protecting NVRAM data content from being lost, which comprises the following steps of S1: NVRAM divides the original data block into PartA and PartB; step S2: SEQ _ a is used to determine whether PartA is the most recent data and SEQ _ B is used to determine whether PartB is the most recent data; step S3: NVRAM reads the data block; step S4: the NVRAM writes the data block. The invention discloses an algorithm for reliably protecting NVRAM data content from losing, which improves the reliability of the NVRAM data content and can prolong the write-in life of a memory by dividing into two parts.

Description

Algorithm for reliably protecting NVRAM data content from loss

Technical Field

The invention belongs to the technical field of NVRAM data reliability, and particularly relates to an algorithm for reliably protecting NVRAM data content from being lost.

Background

An NVRAM (Non-Volatile Random Access Memory) refers to a Random Access Memory in which stored data is not lost after power is turned off. The NVRAM in the car machine system is generally used to store spsn (sysomproduct Serial number), WIFI MAC, BT MAC, and other data. When data in the NVRAM needs to be updated, if abnormal power failure occurs, the stored data block may be incomplete, which may cause abnormal operation of the vehicle-mounted computer system.

With the development of the existing computing equipment, the computing speed is continuously improved, the memory capacity is continuously increased, and the requirement on the reliability of data is higher and higher. Non-volatile random access memory (NVRAM) is used to avoid data loss that may occur when a computer is powered down suddenly, and is characterized in that stored data is not lost in case of power down, but the data cannot be protected when the operating system crashes. The current NVRAM is mainly of several types: firstly, a special standby power supply is added through an RAM (random access memory); and secondly, the transistor without losing level information is manufactured by using a novel material.

The publication number is: CN110134545A, entitled patent for invention of method and system for providing virtual NVRAM based on trusted execution environment, its technical solution discloses "memory area establishment step: dividing a memory area with a preset size in the trusted execution environment as a memory area of the virtual NVRAM; reading and writing operation steps: the virtual NVRAM waits for a read-write request, and executes corresponding read-write operation when receiving the read-write request; shutdown backup step: when the equipment is shut down, before the trusted execution environment is closed, backing up data in a virtual NVRAM (non-volatile random access memory) divided in the trusted execution environment into a disk; a step of starting up and reading: when the device is started, the trusted execution environment is started first, the data backed up in the disk is read into the virtual NVRAM, and the virtual NVRAM is started.

Taking the above invention patent as an example, the technical problem solved is: the present invention provides a pseudo NVRAM in a mobile device, which can ensure that data is not lost when power is off, but the technical scheme and technical problem are different from those of the present invention. Therefore, the above problems are further improved.

Disclosure of Invention

The main object of the present invention is to provide an algorithm that reliably protects NVRAM data content from loss, which improves the reliability of NVRAM data content and can extend the write life of the memory by splitting into two parts.

It is another object of the present invention to provide an algorithm that reliably protects NVRAM data content from loss, which has the advantages of high efficiency, reliability, and accuracy.

In order to achieve the above object, the present invention provides an algorithm for reliably protecting NVRAM data content from being lost, which is used to improve the reliability of NVRAM data content, and comprises the following steps:

step S1: NVRAM divides the original data block into PartA and PartB;

step S2: SEQ _ a is used to determine whether PartA is the most recent data and SEQ _ B is used to determine whether PartB is the most recent data;

step S3: NVRAM reads the data block;

step S4: the NVRAM writes the data block.

As a further preferable embodiment of the above technical means, step S3 is specifically implemented as the following steps:

step S3.1: reading SEQ _ A and SEQ _ B;

step S3.2: judging whether SEQ _ A is larger than or equal to SEQ _ B;

step S3.3: the read data block (PartA or PartB) specifies an offset ITEM.

As a further preferred embodiment of the above technical solution, step S3.2 is specifically implemented as the following steps:

step S3.2.1: if SEQ _ A ≧ SEQ _ B, reading PartA and performing step S3.3;

step S3.2.2: if SEQ _ A < SEQ _ B, PartB is read and step S3.3 is performed.

As a further preferable embodiment of the above technical means, step S4 is specifically implemented as the following steps:

step S4.1: reading SEQ _ A and SEQ _ B;

step S4.2: judging whether SEQ _ A is larger than or equal to SEQ _ B;

step S4.3: the read data block (PartA or PartB) is modified in NVRAM to correspond to the shifted ITEM.

As a further preferred embodiment of the above technical solution, step S4.2 is specifically implemented as the following steps:

step S4.2.1: if SEQ _ A is greater than or equal to SEQ _ B, reading PartA and erasing PartB;

step S4.2.2: if SEQ _ A < SEQ _ B, PartB is read and PartA is erased.

As a further preferable technical means of the above technical means, after the step S4.3, the method further comprises:

step S4.4: the NVRAM writes the modified data block to the erased data block and the corresponding SEQ plus 1 of the erased data block.

As a further preferred embodiment of the above technical solution, step S4.4 is specifically implemented as the following steps:

step S4.4.1: if step S4.2.1 is performed, NVRAM writes the modified data block to PartB and SEQ _ B adds 1;

step S4.4.2: if step S4.2.2 is performed, the NVRAM writes the modified data block to PartA and SEQ _ A adds 1

Drawings

FIG. 1 is a read flow diagram of the algorithm of the present invention for reliably protecting NVRAM data content from loss.

FIG. 2 is a write flow diagram of the algorithm of the present invention for reliably protecting NVRAM data content from loss.

Detailed Description

The following description is presented to disclose the invention so as to enable any person skilled in the art to practice the invention. The preferred embodiments in the following description are given by way of example only, and other obvious variations will occur to those skilled in the art. The basic principles of the invention, as defined in the following description, may be applied to other embodiments, variations, modifications, equivalents, and other technical solutions without departing from the spirit and scope of the invention.

Referring to fig. 1 of the drawings, fig. 1 is a read flow diagram of an algorithm of the present invention for reliably protecting NVRAM data content from loss, and fig. 2 is a write flow diagram of an algorithm of the present invention for reliably protecting NVRAM data content from loss.

In the preferred embodiment of the present invention, it should be noted by those skilled in the art that NVRAM, ITEM, etc. involved in the present invention can be regarded as the prior art.

Preferred embodiments.

The invention discloses an algorithm for reliably protecting NVRAM data content from losing, which is used for improving the reliability of the NVRAM data content and comprises the following steps:

step S1: NVRAM divides the original data block into PartA and PartB;

step S2: SEQ _ a is used to determine whether PartA is the most recent data and SEQ _ B is used to determine whether PartB is the most recent data;

step S3: NVRAM reads the data block;

step S4: the NVRAM writes the data block.

Specifically, step S3 is implemented as the following steps:

step S3.1: reading SEQ _ A and SEQ _ B;

step S3.2: judging whether SEQ _ A is larger than or equal to SEQ _ B;

step S3.3: the read data block (PartA or PartB) specifies an offset ITEM.

More specifically, step S3.2 is embodied as the following steps:

step S3.2.1: if SEQ _ A ≧ SEQ _ B, read PartA and execute step S3.3 (read chunk PartA specifies the shifted ITEM);

step S3.2.2: if SEQ _ A < SEQ _ B, PartB is read and step S3.3 is performed (read data block PartB specifies an offset ITEM).

Further, step S4 is specifically implemented as the following steps:

step S4.1: reading SEQ _ A and SEQ _ B;

step S4.2: judging whether SEQ _ A is larger than or equal to SEQ _ B;

step S4.3: the read data block (PartA or PartB) is modified in NVRAM to correspond to the shifted ITEM.

Further, step S4.2 is embodied as the following steps:

step S4.2.1: if SEQ _ A is greater than or equal to SEQ _ B, reading PartA and erasing PartB;

step S4.2.2: if SEQ _ A < SEQ _ B, PartB is read and PartA is erased.

Preferably, step S4.3 is followed by:

step S4.4: the NVRAM writes the modified data block to the erased data block and the corresponding SEQ plus 1 of the erased data block.

Preferably, step S4.4 is embodied as the following steps:

step S4.4.1: if step S4.2.1 is performed, NVRAM writes the modified data block to PartB and SEQ _ B adds 1;

step S4.4.2: if step S4.2.2 is performed, the NVRAM writes the modified data block to PartA and SEQ _ A adds 1.

Preferably, SEQ _ A ≧ SEQ _ B referred to in the present invention means round-robin comparison. For example, SEQ _ a ═ FF and SEQ _ B ═ 0, although numerically SEQ _ a is large, the actual decision is that SEQ _ B is large, otherwise numerically SEQ _ a is larger than SEQ _ B, the actual decision is that SEQ _ a is also large; in another case, SEQ _ a is 0 and SEQ _ B is FF, but is actually determined to be large in SEQ _ a although it is large in value, and is larger in value than SEQ _ a in other cases.

Preferably, even if abnormal power failure occurs in the write process, the previous data block is complete although the next write fails, so that the next vehicle start-up operation will not cause abnormal operation due to incomplete data blocks.

For example, if the read SEQ _ A is 1 and the read SEQ _ B is 2 after power-on, the PartB data is read to a memory (NVRAM) for use, and the SEQ in the memory is 2 at this time. If a certain ITEM data needs to be modified, modifying the data in the memory, writing the data into PartA, adding 1 (namely 3) to the SEQ in the memory, and writing the SEQ in the memory into SEQ _ A; if an exception occurs in the writing process, the newly changed SEQ value 3 cannot be successfully written into the SEQ _ A, and after the power-on process is carried out next time, PartB data can be read to a memory for use.

It should be noted that the technical features such as NVRAM and ITEM related to the present patent application should be regarded as the prior art, and the specific structure, the operation principle, the control mode and the spatial arrangement mode of the technical features may be selected conventionally in the field, and should not be regarded as the invention point of the present patent, and the present patent is not further specifically described in detail.

It will be apparent to those skilled in the art that modifications and equivalents may be made in the embodiments and/or portions thereof without departing from the spirit and scope of the present invention.

Claims (7)

1. An algorithm for reliably protecting NVRAM data content from loss, for improving reliability of NVRAM data content, comprising the steps of:

step S1: NVRAM divides the original data block into PartA and PartB;

step S2: SEQ _ a is used to determine whether PartA is the most recent data and SEQ _ B is used to determine whether PartB is the most recent data;

step S3: NVRAM reads the data block;

step S4: the NVRAM writes the data block.

2. The algorithm of claim 1, wherein the step S3 is implemented as the following steps:

step S3.1: reading SEQ _ A and SEQ _ B;

step S3.2: judging whether SEQ _ A is larger than or equal to SEQ _ B;

step S3.3: read data block specifies an offset ITEM.

3. The algorithm of claim 2, wherein step S3.2 is implemented as the following steps:

step S3.2.1: if SEQ _ A ≧ SEQ _ B, reading PartA and performing step S3.3;

step S3.2.2: if SEQ _ A < SEQ _ B, PartB is read and step S3.3 is performed.

4. The algorithm for reliably protecting NVRAM data content from loss according to any of claims 1 or 3, wherein step S4 is embodied as the following steps:

step S4.1: reading SEQ _ A and SEQ _ B;

step S4.2: judging whether SEQ _ A is larger than or equal to SEQ _ B;

step S4.3: the read data block is modified in the NVRAM to correspond to the shifted ITEM.

5. The algorithm of claim 4, wherein step S4.2 is implemented as the following steps:

step S4.2.1: if SEQ _ A is greater than or equal to SEQ _ B, reading PartA and erasing PartB;

step S4.2.2: if SEQ _ A < SEQ _ B, PartB is read and PartA is erased.

6. The algorithm of claim 5, wherein step S4.3 is followed by the following step:

step S4.4: the NVRAM writes the modified data block to the erased data block and the corresponding SEQ plus 1 of the erased data block.

7. The algorithm of claim 6, wherein step S4.4 is implemented as the following steps:

step S4.4.1: if step S4.2.1 is performed, NVRAM writes the modified data block to PartB and SEQ _ B adds 1;

step S4.4.2: if step S4.2.2 is performed, the NVRAM writes the modified data block to PartA and SEQ _ A adds 1.

Images