CN111831305A - Flash memory updating system and method - Google Patents

Flash memory updating system and method Download PDF

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Publication number
CN111831305A
CN111831305A CN201910329067.2A CN201910329067A CN111831305A CN 111831305 A CN111831305 A CN 111831305A CN 201910329067 A CN201910329067 A CN 201910329067A CN 111831305 A CN111831305 A CN 111831305A
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Prior art keywords
block
protection
protection block
flash memory
main
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陈钦洲
赖自玮
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Hongfujin Precision Industry Wuhan Co Ltd
Hon Hai Precision Industry Co Ltd
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Hongfujin Precision Industry Wuhan Co Ltd
Hon Hai Precision Industry Co Ltd
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Priority to CN201910329067.2A priority Critical patent/CN111831305A/en
Publication of CN111831305A publication Critical patent/CN111831305A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/60—Software deployment
    • G06F8/65—Updates
    • G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping

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  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The system is installed and operated in a computer, the computer comprises an embedded controller and a flash memory, the flash memory is divided into a first protection block, a main block and a second protection block, and the main block is used for storing firmware codes. The flash memory update system includes: the write protection module is used for locking and unlocking write protection of the first protection block and the second protection block; the updating module is used for updating the first protection block and the main block; the judging module is used for judging whether the first protection block and the main block are updated correctly; the backup module is used for copying codes in the first protection block into the second protection block when the first protection block and the main block are judged to be updated correctly; the updating module is also used for updating the first protection block and the main block again when the first protection block and the main block are judged to be updated incorrectly. The system and the method can avoid the damage of the flash memory which can not be recovered when updating.

Description

Flash memory updating system and method
Technical Field
The invention relates to a flash memory updating system and method.
Background
In a computer, the conventional method is to use the same Power supply to supply Power to a flash memory (flash memory) where a PCH chip and a BIOS are located, so that a Management Engine (ME) in the PCH chip can read codes from the flash memory to initialize a CPU and the PCH chip, then the CPU is started, and the BIOS codes are read from the flash memory through the PCH chip to perform a Power On Self Test (POST) start operation. However, such an approach often fails to boot due to damage to the flash memory for unknown reasons.
Various remedies have been proposed in the market. One approach is to divide a protection block in the flash memory, reserve it for the most basic boot-up actions and not change the code during the whole operation after boot-up, and only open the write protection when the flash memory is updated. Therefore, in the whole operation process after starting up, if the system cannot be started up next time and enters the operating system due to improper overwriting, the system still has a mechanism to restart up, and the wrong block is written back to the correct code from the pre-stored place.
Disclosure of Invention
In view of the foregoing, there is a need for a flash memory refresh system and method that can avoid unrecoverable flash memory damage during refresh.
The invention provides a flash memory updating system, which is installed and operated in a computer, wherein the computer comprises an embedded controller and a flash memory connected with the embedded controller, the flash memory is divided into a first protection block, a main block and a second protection block, the main block is used for storing firmware codes, and the flash memory updating system comprises: a write protection module for locking and unlocking write protection of the first protection block and the second protection block; an update module for updating the first protection block and the main block; the judging module is used for judging whether the first protection block and the main block are updated correctly; the backup module is used for copying codes in the first protection block to the second protection block when the first protection block and the main block are judged to be updated correctly, so that the second protection block stores backup codes for repairing the first protection block; the updating module is further configured to update the first protection block and the main block again when it is determined that the first protection block and the main block are not updated correctly.
The invention also provides a flash memory updating method applied to a computer, wherein the computer comprises an embedded controller and a flash memory connected with the embedded controller, the flash memory is divided into a first protection block, a main block and a second protection block, the main block is used for storing firmware codes, and the method comprises the following steps: when the flash memory is updated, unlocking the write protection of the first protection block, and locking the write protection of the second protection block;
updating the first protection block and the main block; judging whether the first protection block and the main block are updated correctly; when the first protection block and the main block are judged to be updated correctly, copying codes in the first protection block into the second protection block, so that the second protection block stores backup codes for repairing the first protection block; and when the first protection block and the main block are judged to be incorrectly updated, updating the first protection block and the main block again.
The flash memory updating system and the method thereof copy the codes in the first protection block to the second protection block after ensuring that the first protection block and the main block are updated correctly, thereby enabling the second protection block to store the backup codes for repairing the first protection block, avoiding the damage of the flash memory which cannot be recovered during updating, and further solving the problem of incapability of starting the flash memory due to the damage of the flash memory.
Drawings
FIG. 1 is a diagram illustrating an operating environment of a flash update system according to an embodiment of the present invention.
FIG. 2 is a functional block diagram of a flash update system according to an embodiment of the present invention.
FIG. 3 is a flow chart of a method for updating a flash memory according to an embodiment of the present invention.
Description of the main elements
Figure BDA0002037133210000031
Figure BDA0002037133210000041
Detailed Description
Fig. 1 is a schematic diagram illustrating an operating environment of a flash memory update system according to an embodiment of the present invention. In this embodiment, the Flash memory updating system is installed and operated in a computer 100, and the computer 100 includes, but is not limited to, a Central Processing Unit (CPU)1, a control center chip 2, an Embedded Controller (EC) 3, a Flash memory (Flash memory)4, and a power supply 5. The control center chip 2 may be a pch (platform Controller hub) chip, but is not limited thereto, and the control center chip 2 may also be other similar chips, such as an FCH chip. The power supply 5 may be a dc power supply.
The embedded controller 3 is connected with the flash memory 4 through an SPI bus 31 or a similar bus, and is connected with the control center chip 2 through an eSPI bus 32 or a similar bus, and the central processing unit 1 is connected with the control center chip 2. The flash memory 4 is connected to the control center chip 2 through the embedded controller 3. The power supply 5 directly supplies power to the embedded controller 3 and the flash memory 4, and supplies power to the control center chip 2 under the control of the embedded controller 3.
In this embodiment, the computer 100 may be a Personal Computer (PC), a Workstation computer (Workstation computer), a Notebook computer (Notebook), a Server (Server), or other electronic computing devices.
The control center chip 2 is used for storing a BIOS Boot Block (BIOS Boot Block)21 and a BIOS program 22. The BIOS start block 21 is used for starting the BIOS program 22 to start the system on the computer 100 when the user presses the power-on button of the computer 100 to power on. The BIOS program 22 is used to perform a power-on self-test operation on the computer 100 when the computer 100 is powered on and started, and to guide the computer 100 to normally boot an Operating System (OS) to complete the whole power-on process. The embedded controller 3 has functions of monitoring and managing (Hardware Monitor) and communication management of various Hardware of the computer 100, such as detecting and managing a hard disk drive, a printer, a power supply, a display, and a related Serial port (COM & Serial port).
The flash memory updating system 20 is stored in the memory of the embedded controller 3, can update the flash memory 4, and prevents the flash memory 4 from being damaged by unrecoverable damage during updating, thereby avoiding the problem of incapability of starting the computer due to damage of the flash memory 4.
The flash memory 4 is divided into a first protection block 41, a main block 42 and a second protection block 43.
The first protection block 41 needs to be write-protected, the first protection block 41 is used for storing codes which are reserved for the most basic boot and cannot be changed in the whole operation process after the boot, the first protection block 41 is write-protected, cannot be overwritten in the whole operation process after the boot, and is unlocked only when flash update (update) is performed.
The main block 42 does not need to be write protected, and the main block 42 is used for storing firmware codes for instructing the embedded controller 3 to execute and complete a plurality of operations. The firmware code includes a BIOS main program, and a POST, OS or other rewritable data block.
The second protection block 43 needs to be write protected, and the second protection block 43 is used for storing the same code as that in the first protection block 41 as backup code for repairing the first protection block 41. The second protection block 43 does not unlock the write protection in the process of updating the first protection block 41 and the main block 42 in the flash memory, the write protection is unlocked only after the first protection block 41 and the main block 42 are updated correctly, the code is copied from the first protection block 41 to the second protection block 43, and the write protection is recovered immediately after the correct execution of the copy is completed.
Referring to FIG. 2, a functional block diagram of a flash memory update system 20 according to the present invention is shown. In this embodiment, the flash update system 20 includes a write protection module 201, an update module 202, a determination module 203, a backup module 204, and a start module 205. The functional module referred to in the present invention is a series of program instruction segments that can be executed by the central processing unit 1 of the computer 100 and can perform a fixed function, and is stored in the embedded controller 3.
The write protection module 201 is configured to lock and unlock write protection of the first protection block 41 and the second protection block 43.
The update module 202 is configured to update the first protection block 41 and the main block 42.
The determining module 203 is configured to determine whether the first protection block 41 and the main block 42 are updated correctly.
The backup module 204 is configured to copy the code in the first protection block to the second protection block when the first protection block 41 and the main block 42 are judged to be updated correctly, so that the second protection block 43 stores the backup code for repairing the first protection block 41. The backup module 204 is further configured to copy the codes in the main block to a preset memory.
The starting module 205 is configured to control a computer to restart a starting operation and start a backup program of the main block 42 after determining that the codes in the first protection block 41 and the second protection block 43 are consistent and locking the write protection of the second protection block 43.
The determining module 203 is further configured to determine whether the codes in the first protection block 41 and the second protection block 43 are consistent, and determine whether the backup program of the main block 42 is executed correctly.
FIG. 3 is a flow chart showing a preferred embodiment of the flash memory updating method according to the present invention. In this embodiment, the method is applied to the computer 100 to ensure that the write protection of the first protection block 41 is unlocked only when the flash memory 4 is updated, and the write protection of the second protection block 43 is unlocked only when the first protection block 41 and the main block 42 are updated correctly, and the second protection block 43 is used for storing the backup code of the first protection block 41, so as to prevent the problem that the computer cannot be booted due to firmware damage.
In step S301, when the flash memory 4 starts to be updated, the write protect module 201 unlocks the write protection of the first protected block 41 and locks the write protection of the second protected block 43.
In step S302, the update module 202 updates the first protection block 41 and the main block 42.
In step S302, it is determined whether the first protection block 41 and the main block 42 are updated correctly.
If yes, go to step S303; if not, the process returns to step S302 to perform the updating again.
In step S304, the write protect module 201 locks the write protection of the first protected block 41 and unlocks the write protection of the second protected block 43.
In step S305, the backup module 204 copies the code in the first protection block 41 to the second protection block 43.
After copying the code in the first protection block 41 to the second protection block 43, the second protection block 43 may store backup code for repairing the first protection block 41. If the first protection block 41 is damaged, the codes in the second protection block 43 can be copied into the first protection block 41 to repair the first protection block 41, so as to prevent the flash memory 4 from being damaged beyond recovery.
In step S306, the determining module 203 determines whether the codes in the first protected block 41 and the second protected block 43 are consistent.
If yes, go to step S307; otherwise, returning to step S305, the code in the first protection block 41 is copied to the second protection block 43 again.
In step S307, the write protection module 201 locks write protection of the second protection block 43.
After the code in the second protection block 43 is updated, the second protection block 43 is write-protected again to prevent the second protection block 43 from being damaged in the subsequent boot process. Similarly, the first protection block 41 is also write-protected during subsequent boot, and the write-protection is only unlocked during updating.
Step S308, controlling the computer to restart the starting operation.
Specifically, after step S307, the flash memory has been updated, and the booting module 205 can control the computer to reboot the booting operation.
In step S309, the starting module 205 starts the backup program of the main block 42.
In step S310, the backup module 204 copies the codes in the main block 42 to a predetermined memory.
The predetermined memory may be any one of a Hard Disk Drive (HDD), a Solid State Drive (SSD), and a USB memory, but is not limited thereto, and the predetermined memory may also be a floppy Disk memory, etc. After copying the code in the main block 42 to the predetermined memory, if the subsequent main block 42 is damaged, the code in the memory can be copied to the main block 42 to repair the main block 42.
In step S311, the determining module 203 determines whether the backup program of the main block 42 is executed correctly.
If yes, ending; if not, go back to step S310 to copy the codes in the main block 42 to the predetermined memory again.
It is understood that in other embodiments, steps S308 to S311 may be omitted, and steps S301 to S307 are executed to complete the update of the flash memory 4.
After the first protection block 41 and the main block 42 are ensured to be updated correctly, the codes in the first protection block 41 are copied to the second protection block 43, so that the second protection block 43 stores backup codes for repairing the first protection block 41, the flash memory 4 is prevented from being damaged by incapability of recovery during updating, the problem that the flash memory 4 cannot be started due to damage is solved, and the cost is reduced.
Although the present invention has been described in detail with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the invention.

Claims (10)

1. The utility model provides a flash memory ware updating system, its installation and operation in the computer, the computer include embedded controller and with the flash memory ware that embedded controller is connected, its characterized in that, flash memory ware is divided into first protection block, master block and second protection block, the master block is used for depositing firmware code, flash memory ware updating system includes:
a write protection module for locking and unlocking write protection of the first protection block and the second protection block;
an update module for updating the first protection block and the main block;
the judging module is used for judging whether the first protection block and the main block are updated correctly;
the backup module is used for copying codes in the first protection block to the second protection block when the first protection block and the main block are judged to be updated correctly, so that the second protection block stores backup codes for repairing the first protection block;
the updating module is further configured to update the first protection block and the main block again when it is determined that the first protection block and the main block are not updated correctly.
2. The flash memory update system of claim 1, wherein the write protect module unlocks the write protect of the first protected block and locks the write protect of the second protected block at a start of a flash memory update; and after the first protection block is judged to be updated correctly, locking the write protection of the first protection block, and unlocking the write protection of the second protection block.
3. The flash memory updating system of claim 2, wherein after copying the code in the first protection block to the second protection block, the determining module is further configured to determine whether the code in the first protection block and the code in the second protection block are consistent;
when the codes in the first protection block and the second protection block are judged to be consistent, the write protection module locks the write protection of the second protection block;
and when the codes in the first protection block and the second protection block are judged to be inconsistent, the codes in the first protection block are copied to the second protection block again.
4. The flash update system of claim 3, wherein the flash update system further comprises:
the starting module is used for controlling the computer to restart starting operation and starting a backup program of the main block after judging that the codes in the first protection block and the second protection block are consistent and locking the write protection of the second protection block;
the backup module is further used for copying the codes in the main block to a preset memory.
5. The flash memory updating system according to claim 4, wherein the predetermined memory is any one of a hard disk drive, a solid state drive, and a USB memory.
6. A flash memory updating method is applied to a computer, the computer comprises an embedded controller and a flash memory connected with the embedded controller, the flash memory is characterized in that the flash memory is divided into a first protection block, a main block and a second protection block, the main block is used for storing firmware codes, and the method comprises the following steps:
when the flash memory is updated, unlocking the write protection of the first protection block, and locking the write protection of the second protection block;
updating the first protection block and the main block;
judging whether the first protection block and the main block are updated correctly;
when the first protection block and the main block are judged to be updated correctly, locking the write protection of the first protection block, and unlocking the write protection of the second protection block;
copying code in the first protection block into the second protection block, whereby the second protection block stores backup code for repairing the first protection block;
and when the first protection block and the main block are judged to be incorrectly updated, updating the first protection block and the main block again.
7. The flash update method of claim 6, wherein after copying code in the first protection block into the second protection block, the method further comprises:
judging whether codes in the first protection block and the second protection block are consistent or not;
when the codes in the first protection block and the second protection block are judged to be consistent, locking the write protection of the second protection block;
and when the codes in the first protection block and the second protection block are judged to be inconsistent, the codes in the first protection block are copied to the second protection block again.
8. The flash memory updating method of claim 7, wherein after determining that the codes in the first protection block and the second protection block are consistent and locking the write protection of the second protection block, the method further comprises:
controlling the computer to restart and start operation;
starting a backup program of the main block;
copying the codes in the main block to a preset memory.
9. The flash memory updating method of claim 8, wherein after copying the code in the main block to a preset memory, the method further comprises:
judging whether the backup program of the main block is executed correctly;
if not, the codes in the main block are copied to a preset memory again.
10. The flash memory updating method of claim 8, wherein the predetermined memory is any one of a hard disk drive, a solid state drive, and a USB memory.
CN201910329067.2A 2019-04-23 2019-04-23 Flash memory updating system and method Pending CN111831305A (en)

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CN201910329067.2A CN111831305A (en) 2019-04-23 2019-04-23 Flash memory updating system and method

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Application Number Priority Date Filing Date Title
CN201910329067.2A CN111831305A (en) 2019-04-23 2019-04-23 Flash memory updating system and method

Publications (1)

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CN111831305A true CN111831305A (en) 2020-10-27

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