CN111830540A - Ultralow-power-consumption Beidou RDSS navigation chip based on artificial intelligence technology - Google Patents
Ultralow-power-consumption Beidou RDSS navigation chip based on artificial intelligence technology Download PDFInfo
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- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
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- G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
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Abstract
The invention relates to the technical field of circuit design, in particular to an ultra-low power consumption Beidou RDSS navigation chip based on an artificial intelligence technology. In this ultra-low power consumption big dipper RDSS navigation chip based on artificial intelligence technique, adopt leading SIP packaging technology in the industry, encapsulate the power amplifier chip inside big dipper RDSS navigation chip, and the innovative design is applicable to big dipper navigation system's artificial intelligence chip and adopts SIP packaging technology with artificial intelligence chip and radio frequency chip simultaneously, the digital baseband chip, the power amplifier chip is integrated in same big dipper RDSS navigation chip, optimize the design of modified digital baseband chip simultaneously, make it can provide two auxiliary interfaces of locating information and signal strength for the artificial intelligence chip, the artificial intelligence chip feeds back supplementary quick location and auxiliary power select signal simultaneously and gives the digital baseband chip, the artificial intelligence chip outputs auxiliary power adjusting signal control power amplifier chip.
Description
Technical Field
The invention relates to the technical field of circuit design, in particular to an ultra-low power consumption Beidou RDSS navigation chip based on an artificial intelligence technology.
Background
The navigation chip is a core component in the field of modern communication positioning, and is widely applied to terminal equipment such as a modern communication positioning system and an automatic navigation unmanned navigation system, the navigation chip converts received satellite signals into data signals through the processing of a radio frequency circuit and a baseband circuit in system application and provides the data signals to a software system, and the data streams are decoded to obtain communication positioning information.
With the improvement of the Beidou navigation system in China, the Beidou navigation system gradually replaces a foreign navigation system to become a domestic mainstream navigation system, the Beidou RDSS navigation system is taken as a multifunctional navigation system integrating positioning navigation and communication, and is widely applied in the fields of lifesaving, outdoor sports, marine fishery, urban traffic management and the like, the core of the Beidou RDSS navigation system is an RDSS navigation chip, the performance of the RDSS navigation chip directly determines the performance and market competitiveness of terminal equipment, as a receiving and transmitting integrated RDSS system, ultra-low power consumption becomes the most important index, large current and high power consumption transmitted by the chip become the bottleneck of development of the RDSS navigation system, and research on the ultra-low power consumption RDSS navigation chip becomes an urgent need in the industry.
For a traditional Beidou RDSS navigation chip, the Beidou RDSS navigation chip generally only comprises a radio frequency circuit and a baseband circuit, and a power amplifier is realized outside the chip. When the chip is designed, a transmitting signal of the radio frequency chip is led out, and an external power amplifier chip is connected to a PCB outside the chip, so that power amplification is realized, and communication with a satellite can be realized smoothly. The design is mainly because the difficulty of integrating the power amplifier in the navigation chip is very high, the electromagnetic compatibility of signals is always a difficult point of technical research and development, the integration cost of the chip is high, and chip designers can select the external power amplifier for use due to design risk and cost.
Although the power amplifier chip is placed on an external PCB in the traditional Beidou RDSS navigation system, the problems of cost and signal electromagnetic compatibility are solved, but the problems of overhigh system power consumption and insufficient chip integration level are brought. Because traditional big dipper RDSS navigation puts the power amplifier chip externally, extra reservation transmitting signal's pin when needing the chip design, parasitic capacitance and inductance on the chip pin, the parasitic capacitance and the inductance of PCB walking line all can superpose the performance parameter that influences transmitting signal. Put the power amplifier chip in traditional big dipper RDSS navigation and also can increase the whole consumption of system externally, outside power amplifier is low with inside radio frequency and baseband circuit's matching degree, can't accomplish the optimization of consumption and selects, and wide power transmission selects greatly increased the consumption, has increased the whole energy consumption of system, and the low-power consumption overlength standby that requires to the in-service use brings very big design difficulty. In view of this, an ultra-low power consumption big dipper RDSS navigation chip based on artificial intelligence technique is provided.
Disclosure of Invention
The invention aims to provide an ultra-low power consumption Beidou RDSS navigation chip based on an artificial intelligence technology, so as to solve the problems of overhigh system power consumption and insufficient chip integration level in the background technology.
In order to achieve the purpose, the invention provides an ultra-low power consumption Beidou RDSS navigation chip based on an artificial intelligence technology, which comprises a radio frequency chip, a digital baseband chip, an artificial intelligence chip and a power amplifier chip, wherein the input end of the radio frequency chip is connected with an external antenna, the radio frequency chip outputs two paths of signals, one path of signal provides logic level data and a clock signal to a digital baseband circuit, and the other path of signal provides a radio frequency output signal to be connected to the input end of the power amplifier chip;
the digital baseband chip is provided with two input ends, one input end is respectively connected with logic level data and a clock signal provided by the radio frequency chip, the other input end is respectively connected with an auxiliary quick positioning signal and an auxiliary power selection signal provided by the artificial intelligent chip, the digital baseband chip is provided with two output ends, one output end is connected with a power selection end of the power amplifier chip, and the other output end is connected with the artificial intelligent chip to provide positioning information and signal intensity information;
the artificial intelligence chip is a three-port chip and comprises an input port and two output ports, the port of the digital baseband chip for generating positioning information and signal strength information is connected with the input port of the artificial intelligence chip, the output port of the artificial intelligence chip for generating auxiliary quick positioning and auxiliary power selection signals is connected with the input port of the digital baseband chip, and the other output port for generating auxiliary power regulation signals is connected with the input port of the power amplifier chip;
one input end of the power amplifier chip is connected with the output end of the radio frequency chip, the radio frequency output signal of the radio frequency chip is amplified and transmitted to an external transmitting antenna, the other input end of the power amplifier chip is connected with the auxiliary power adjusting output port of the artificial intelligent chip to finely adjust transmitting power, and the output end of the power amplifier chip provides the power amplifier output signal to be connected with the external antenna.
Preferably, the radio frequency chip includes a communication signal receiving module, a communication signal conversion module, a signal transmission module, and a radio frequency signal output module, the communication signal receiving module is configured to receive a satellite communication signal of an external antenna, the communication signal conversion module is configured to convert the received weak satellite communication signal into a digital logic signal, the signal transmission module is configured to transmit the converted digital logic signal to the digital baseband chip, and the radio frequency signal output module is configured to transmit the radio frequency signal to the power amplifier chip.
Preferably, the signal transmission module includes a logic level module and a clock signal module, the logic level module is configured to output logic level data, and the clock signal module is configured to output clock signal data.
Preferably, the digital baseband chip includes a signal receiving module, a signal output module, a feedback signal receiving module and a power output module, the signal receiving module is configured to receive logic level data and a clock signal provided by the radio frequency chip, the signal output module is configured to output a signal to the artificial intelligence chip, the feedback signal receiving module is configured to receive a feedback signal of the artificial intelligence chip, and the power output module is configured to output a power output signal to the power amplifier chip.
Preferably, the signal output module comprises a positioning information module and a signal strength module, the positioning information module is used for outputting positioning information to the artificial intelligence chip, and the signal strength module is used for outputting signal strength to the artificial intelligence chip.
Preferably, the artificial intelligence chip includes a data receiving module, an information processing module, a signal feedback module and an auxiliary power adjusting module, the data receiving module is configured to receive positioning information and signal strength information generated by the digital baseband chip, the information processing module is configured to analyze the received positioning information and signal strength information, the signal feedback module is configured to feed back information to the digital baseband chip, and the auxiliary power adjusting module is configured to transmit power adjusting data to the power amplifier chip.
Preferably, the signal feedback module includes an auxiliary fast positioning module and an auxiliary power selection module, the auxiliary fast positioning module is configured to feed back auxiliary fast positioning data, and the auxiliary power selection module is configured to feed back auxiliary power data.
Preferably, the information processing module comprises an open source framework, an intelligent algorithm module and a joint learning module, the open source framework is used for developing the artificial intelligence chip, the intelligent algorithm module is used for establishing a real-time data processing and maintaining method, and the joint learning module is used for collecting communication data and local user input data, training an algorithm by using a local data set and improving performance.
Preferably, the power amplifier chip comprises a radio frequency signal receiving module, a power regulation receiving module and a power amplifier output module, the radio frequency signal receiving module is used for receiving the radio frequency signal output by the radio frequency chip, the power regulation receiving module is used for receiving the power regulation data output by the artificial intelligence chip, and the power amplifier output module is used for outputting a power amplifier output signal and connecting the power amplifier output signal with an external antenna.
Compared with the prior art, the invention has the beneficial effects that: in this ultra-low power consumption big dipper RDSS navigation chip based on artificial intelligence technique, adopt leading SIP packaging technology in the industry, encapsulate the power amplifier chip inside big dipper RDSS navigation chip, and the innovative design is applicable to big dipper navigation system's artificial intelligence chip and adopts SIP packaging technology with artificial intelligence chip and radio frequency chip simultaneously, the digital baseband chip, the power amplifier chip is integrated in same big dipper RDSS navigation chip, optimize the design of modified digital baseband chip simultaneously, make it can provide two auxiliary interfaces of locating information and signal intensity for artificial intelligence chip, artificial intelligence chip feeds back supplementary quick location of assistance and auxiliary power select signal simultaneously and gives digital baseband chip, in order to reach the consumption optimization, artificial intelligence chip outputs auxiliary power adjusting signal control power amplifier chip.
Drawings
FIG. 1 is a block diagram of the overall structure of the present invention;
FIG. 2 is a block diagram of an RF chip according to the present invention;
FIG. 3 is a block diagram of a signal transmission module according to the present invention;
FIG. 4 is a block diagram of a digital baseband chip according to the present invention;
FIG. 5 is a block diagram of the signal output module of the present invention;
FIG. 6 is a block diagram of an artificial intelligence chip of the present invention;
FIG. 7 is a signal feedback block diagram of the present invention;
FIG. 8 is a block diagram of an information processing module of the present invention;
FIG. 9 is a diagram of the power amplifier chip of the present invention;
FIG. 10 is a schematic diagram of an RF chip transmitter circuit according to the present invention;
FIG. 11 is a schematic diagram of a RF chip receiving circuit according to the present invention;
FIG. 12 is a circuit diagram of a digital baseband chip according to the present invention;
FIG. 13 is a schematic circuit diagram of an artificial intelligence chip of the present invention;
FIG. 14 is a schematic circuit diagram of a power amplifier chip according to the present invention;
FIG. 15 is a diagram illustrating data transmission of a conventional artificial intelligence terminal;
FIG. 16 is a packaging diagram of an SIP chip integration scheme of a digital baseband chip and an artificial intelligence chip according to the present invention;
FIG. 17 is a schematic diagram of a data intelligence system for an artificial intelligence chip.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used merely for convenience of description and for simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
Example 1
The invention provides an ultra-low power consumption Beidou RDSS navigation chip based on an artificial intelligence technology, which comprises a radio frequency chip, a digital baseband chip, an artificial intelligence chip and a power amplifier chip, wherein the input end of the radio frequency chip is connected with an external antenna, the radio frequency chip outputs two paths of signals, one path of signal provides logic level data and a clock signal to a digital baseband circuit, the other path of signal provides a radio frequency output signal to be connected with the input end of the power amplifier chip, the digital baseband chip is provided with two paths of input ends, one path of input end is respectively connected with the logic level data and the clock signal provided by the radio frequency chip, the other path of input end is respectively connected with an auxiliary quick positioning signal and an auxiliary power selection signal provided by the artificial intelligence chip, the digital baseband chip is provided with two paths of output ends, one path of input end is connected with the power selection end, the artificial intelligence chip is a three-port chip, including an input port and two output ports, the port that the digital baseband chip produced location information and signal strength information connects the input port of artificial intelligence chip, the output port that the artificial intelligence chip produced supplementary quick location and auxiliary power select signal connects the input port of digital baseband chip, another output port produces the input port that auxiliary power adjusted signal connects the power amplifier chip, the output of radio frequency chip is connected to an input of power amplifier chip, transmit the radio frequency output signal amplification of radio frequency chip for outside transmitting antenna, the auxiliary power adjusted output port that another input of power amplifier chip connected artificial intelligence chip finely tunes the transmitting power, the output of power amplifier chip provides power amplifier output signal and connects external antenna.
In this embodiment, the rf chip may adopt an OOK/ASK universal wireless rf transceiver chip TR1000 of RFM corporation, and is mainly characterized in that: two modulation and demodulation modes of OOK and ASK are provided; the modulation, transmission, reception and demodulation functions are realized; the center operating frequency is about 916.5 MHz; has a baseband rate up to 115.2 kb/s; the operating voltage is 3V.
Further, as shown in fig. 10, since the ISO/IEC18000-6type b protocol specifies that the rf modulation mode from the reader to the rf tag end is 99% ASK (amplitude shift keying) modulation, in this embodiment, the rf chip is used as OOK (on-off keying) modulation, and is in an operating state when the pin SECTRL1 is "1" and the pin SECTRL0 is "0".
Specifically, the receiving circuit of the RF chip is shown in FIG. 11, and the SO/IEC18000-6type B protocol specifies that the signal from the card to the reader is modulated by backscattering. Yet still resemble the ASK modulation waveform from the modulation waveform point of view. Therefore, the ctrl1 and ctrl0 pins of TR1000 are set to high level here, and RXDATA serves as a baseband data output pin.
Furthermore, the circuitry of the digital baseband chip is as shown in fig. 12, where single ended I and QDACs are configured for 0 to +1.024V outputs, noting that the DAC digital drive should be adjusted to use all available DAC bits, with the option of optional resistors R5 and R6 to achieve a low average DC current sink from the DAC, in this example the input common mode voltage is pulled down to 0.512V to match the center of the DAC output voltage range.
In addition, the artificial intelligence chip is designed based on the ADuC845 single chip microcomputer, the ADuC845 is a highly integrated single chip microcomputer, the chip mainly comprises two multi-channel a/D converters, a double D/a converter and an 8-bit programmable microcontroller, the main channel is used for converting the input of the first-level sensor in the dual-channel ADC circuit of the ADuC845, the channel has a buffer capacity and is programmable to 8 input ranges, the working voltage is ± 20 ± 2.56mV and can be driven by one of 5 differential input ends, the ADuC845 adopts a delta-sigma conversion technology to realize the excellent performance of 24-bit no-missing codes, and the circuit thereof is shown in fig. 13.
Therefore, the power amplifier chip is designed based on the power amplifier chip SBB-2089 with 50-850 MHz, the power gain can reach 20dB, the current receiving and transmitting distance can reach about 150m, the power amplifying circuit is shown in the figure, in the front stage circuit of the transmitter, the radio frequency signal generated by the modulation oscillation circuit has small power, and can be fed to an antenna to be radiated after sufficient radio frequency power is obtained through a series of amplifying-buffer stage, intermediate amplifying stage and final power amplifying stage, in order to obtain a sufficiently large rf output power, an rf power amplifier must be used, the power amplifier chip is an important component of the transmitting device, the main technical indicators of the power amplifier chip are output power and efficiency, and in addition, the harmonic component in the output should be as small as possible to avoid interference with other channels, and the circuit thereof is shown in fig. 14.
Example 2
As a second embodiment of the present invention, in order to facilitate receiving a satellite communication signal and converting a received weak satellite communication signal into a digital logic signal, the inventor of the present invention improves a radio frequency chip, as shown in fig. 2 and 3, the radio frequency chip includes a communication signal receiving module, a communication signal converting module, a signal transmitting module and a radio frequency signal outputting module, the communication signal receiving module is configured to receive a satellite communication signal of an external antenna, the communication signal converting module is configured to convert the received weak satellite communication signal into a digital logic signal, the signal transmitting module is configured to transmit the digital logic signal to a digital baseband chip, the radio frequency signal outputting module is configured to transmit the radio frequency signal to a power amplifier chip, the signal transmitting module includes a logic level module and a clock signal module, the logic level module is used for outputting logic level data, and the clock signal module is used for outputting clock signal data.
In the embodiment, the communication signal conversion module is designed based on an S conversion formula, the S conversion adopts a Gaussian window function with variable width, the window width of the Gaussian window function is inversely changed along with the frequency, and the time window at a low frequency band is wider, so that higher frequency resolution is obtained; and the time window of the high frequency band is narrower, so that very high time resolution can be obtained.
Specifically, the one-dimensional continuous S variation S (τ, f) of the signal x (t) is:
wherein t and f are time and frequency respectively, τ is a time shift factor, and w (t and f) is a Gaussian window:
the width of the window is determined by k and f, which in turn determines the time-frequency resolution, so that the S-spectrum of the signal x (t) over time [ - ∞, + ∞ ] is:
when the radio frequency chip in the ultra-low power consumption big dipper RDSS navigation chip based on artificial intelligence technique of this embodiment uses, receive the satellite communication signal of external antenna through receiving communication signal module, trun into digital logic signal with the little weak satellite communication signal that receives through communication signal conversion module to trun into digital logic signal through signal transmission module and transmit for digital baseband chip, transmit the radio frequency signal for power amplifier chip through radio frequency signal output module simultaneously.
Example 3
As a third embodiment of the present invention, in order to facilitate the processing of the rf signal emitted from the rf chip, the present inventors have made improvements to the digital baseband chip, which, as a preferred embodiment, as shown in fig. 4 and 5, the digital baseband chip includes a signal receiving module, a signal output module, a feedback signal receiving module and a power output module, the signal receiving module is configured to receive logic level data and a clock signal provided by the radio frequency chip, the signal output module is configured to output a signal to the artificial intelligence chip, the feedback signal receiving module is configured to receive a feedback signal of the artificial intelligence chip, the power output module is configured to output a power output signal to the power amplifier chip, the signal output module includes a positioning information module and a signal strength module, the positioning information module is configured to output positioning information to the artificial intelligence chip, and the signal strength module is configured to output signal strength to the artificial intelligence chip.
In this embodiment, the digital baseband chip can not only process the logic signal transmitted from the radio frequency chip, decode the logic signal to generate navigation and communication information, but also analyze signal strength information through the error rate and the decoding time.
The formula of the bit error rate is as follows:
the MER changes slowly and rapidly as the interference increases and when the error rate occurs, the MER can be considered a form of signal-to-noise ratio measurement that will accurately indicate the receiver's ability to demodulate the signal because it includes not only gaussian noise but also all other uncorrectable impairments on the received constellation. If the effective impairments present in the signal are only Gaussian noise, then the MER is equal to S/N.
Furthermore, the digital baseband chip realizes the fast demodulation of the positioning information of the digital baseband chip and the optimized selection of the power control signal by an interpolation method, wherein the interpolation method can be a lagrange interpolation method, and the formula is as follows:
two points are performed once:
three points are carried out twice:
when the digital baseband chip in the ultra-low power consumption Beidou RDSS navigation chip based on the artificial intelligence technology is used, the signal receiving module is used for receiving logic level data and clock signals provided by the radio frequency chip, the signal output module is used for outputting the signals to the artificial intelligence chip, the feedback signal receiving module is used for receiving feedback signals of the artificial intelligence chip, and the power output module is used for outputting power output signals to the power amplifier chip. The auxiliary quick positioning and auxiliary power selection signals with the memory function can be superposed to an internal algorithm of the digital baseband chip, the quick demodulation of the positioning information of the digital baseband chip and the optimized selection of the power control signal are realized by an interpolation method, and the information interaction of the digital baseband chip and the artificial intelligent chip completes the optimized selection of navigation positioning and power, so that the quick positioning and the optimal transmitting power are realized, and the aim of ultra-low power consumption is fulfilled.
Example 4
As a fourth embodiment of the present invention, in order to facilitate the implementation of the intelligent processing, the present invention further provides an artificial intelligence chip, as shown in fig. 6-8, as a preferred embodiment, the artificial intelligence chip includes a data receiving module, an information processing module, a signal feedback module and an auxiliary power adjusting module, the data receiving module is configured to receive the positioning information and the signal strength information generated by the digital baseband chip, the information processing module is configured to analyze and process the received positioning information and the signal strength information, the signal feedback module is configured to feed back the information to the digital baseband chip, the auxiliary power adjusting module is configured to transmit the power adjusting data to the power amplifier chip, the signal feedback module includes an auxiliary fast positioning module and an auxiliary power selecting module, the auxiliary fast positioning module is configured to feed back the auxiliary fast positioning data, the auxiliary power selection module is used for feeding back auxiliary power data, the information processing module comprises an open source framework, an intelligent algorithm module and a joint learning module, the open source framework is used for developing an artificial intelligent chip, the intelligent algorithm module is used for establishing a real-time data processing and maintaining method, and the joint learning module is used for collecting communication data and local user input data, training an algorithm by using a local data set and improving performance.
In this embodiment, the open source framework is designed based on an ARM instruction set architecture, ARM is a short for advanced reduced instruction set, and is a 32-bit reduced instruction set architecture, and is also equipped with a 16-bit instruction set, and the ARM processor is mainly characterized in that:
(1) the most important reason that ARM is widely applied to an embedded system supports a Thumb (16 bits)/ARM (32 bits) dual instruction set, and is compatible with 8-bit/16-bit devices;
(2) the instruction execution speed is higher due to the fact that a large number of registers are used;
(3) most data operations are done in registers;
(4) the addressing mode is flexible and simple, and the execution efficiency is high;
(5) the instruction length is fixed.
(6) Load _ store structure: in RISC, all computations are required to be done in registers. While the communication of registers and memory is accomplished by separate instructions. In the CSIC, the CPU can directly operate on the memory.
Furthermore, the intelligent algorithm module is designed based on a convolutional neural network algorithm, the convolutional neural network is a multilayer sensor, each layer is composed of two-dimensional planes, each plane is composed of a plurality of independent neurons, the network comprises a plurality of simple elements and complex elements which are respectively marked as C elements and S elements, the C elements are gathered together to form a convolutional layer, the S elements are gathered together to form a downsampling layer, an input image is convolved through a filter and an additive bias, N characteristic maps (the N value can be set manually) are generated on the C layer, then the characteristic maps are subjected to summation, weighted value and bias, the characteristic map of the S layer is obtained through an activation function (usually, a Sigmoid function is selected), and the work is carried out in sequence and circularly according to the number of the manually set C layer and S layer.
Specifically, the convolution process: deconvolving an input image with a trainable filter fx, passing through an activation function, and then adding an offset bx to obtain the convolution layer Cx, as follows, where Mj is the value of the input feature map:
the sub-sampling process comprises the following steps: m pixels (m is set manually) of each neighborhood are summed to form a pixel, then weighted by scalar Wx +1, bias bx +1 is added, then a feature map is generated by activating function Sigmoid, mapping from one plane to the next plane can be regarded as convolution operation, S layer can be regarded as a fuzzy filter and plays a role of secondary feature extraction, the spatial resolution between a hidden layer and a hidden layer is reduced, and the number of planes contained in each layer is increased, so that more feature information can be detected, for a sub-sampling layer, N input feature maps are provided, N output feature maps are provided, and only the size of each feature map is changed correspondingly, and the specific operation is as follows:
in addition, as shown in fig. 15, the conventional artificial intelligence solution generally consists of three parts, namely, an application terminal, a local data storage, and a cloud artificial intelligence processor; the application terminal is connected with a user platform in a butt joint mode, the use of a user is completed at the terminal, the terminal transmits data generated by the use of the user to a local data storage through a local medium, part of the data is sent to a cloud artificial intelligence processor for processing through a remote network mode after the data reaches the local data storage, the processed data is sent back to the local data storage through a remote network firstly, and then the processed data is transmitted to the application terminal through the medium of the local data storage; in the traditional artificial intelligence scheme, because the artificial intelligence processing capability is not available locally, a cloud artificial intelligence processor needs to be called remotely, a local memory is required to be used as a transfer station, more resources and transmission time are consumed, and the large-scale application scene is not facilitated.
Besides, the digital baseband chip and the artificial intelligence chip SIP chip integration scheme packaging diagram is shown in fig. 16, need to use the high in the clouds artificial processor remote processing data for traditional artificial intelligence scheme, the artificial intelligence chip of this embodiment, and use the leading SIP chip integration scheme in the industry, integrate digital baseband chip and artificial intelligence chip on same chip substrate, artificial intelligence localization has been realized, digital baseband chip and artificial intelligence chip are connected with the gold thread on the substrate, the short impedance of distance is little, high-speed data transmission in the chip has been realized, a feasible scheme is provided for the large-scale use of artificial intelligence scheme in the big dipper RDSS navigation chip.
It is worth to be noted that, as shown in fig. 17, compared with the conventional data input and behavior control of the beidou RDSS navigation chip operated by a local user side, the data intelligence system of the artificial intelligence chip can realize data intelligence by the artificial intelligence chip designed by the invention, and the local user side of the beidou RDSS navigation chip can realize the optimized operation of the system without operation. The data intelligent system is composed of three parts in parallel, namely predictive control, process automation and data iterative training; the predictive control of the data intelligence of the artificial intelligent chip is embodied in the capability of prejudging the transmitting power in advance, the predictive control of the artificial intelligent chip can learn the change form of the terminal through the positioning information and the signal strength by considering the real-time change of the position and the direction elevation angle of the terminal in the Beidou RDSS navigation chip, and an algorithm can predict the possibly required transmitting power before the change occurs along with the time, and the power consumption is saved by adopting an efficient transmitting scheme; the process automation of the artificial intelligence chip data intellectualization in the invention is to upgrade the user operation management work of the traditional Beidou RDSS navigation chip into chip automation, and can judge the possible pure user operation according to the use habit and the position information of the terminal user to realize the background processing of the operation; the data iterative training of the artificial intelligence chip data intelligence is to upgrade and maintain predictive control and process automation, the data iterative training is to synthesize a data set by reading a large amount of access marked data, and to use a data set training algorithm and to iteratively retrain algorithm results and new data so as to obtain a larger and more diversified data set, thereby providing a data theoretical basis for the predictive control and the process automation.
When the artificial intelligence chip in the ultralow-power-consumption Beidou RDSS navigation chip based on the artificial intelligence technology is used, the data receiving module receives the digital baseband chip to generate positioning information and signal intensity information, the information processing module analyzes and processes the received positioning information and signal intensity information, the signal feedback module feeds back information to the digital baseband chip, and the auxiliary power adjusting module transmits power adjusting data to the power amplifier chip. Different powers are selected in different positioning communication environments, changes of the positioning communication environments are judged in advance according to the learning capacity of the artificial intelligence chip, a power selection scheme is planned in advance, and ultra-low power consumption of the Beidou RDSS navigation chip is achieved.
Example 5
As a fifth embodiment of the present invention, in order to facilitate power amplification of the output signal, the present inventors further set an active amplifier chip, as shown in fig. 9, as a preferred embodiment, the power amplifier chip includes a radio frequency signal receiving module, a power adjustment receiving module, and a power amplifier output module, where the radio frequency signal receiving module is configured to receive a radio frequency signal output by the radio frequency chip, the power adjustment receiving module is configured to receive power adjustment data output by the artificial intelligence chip, and the power amplifier output module is configured to output an output signal of the active amplifier and connect to an external antenna.
In this embodiment, the formula of the radio frequency signal receiving module is as follows:
Sin(t)＝V(t)cos[ωct+φ(t)]
where V (t) represents the amplitude modulation of the signal, ω c is the carrier frequency, φ (t) is the phase modulation component of the signal, which is split into two constant-envelope phase modulated signals, S1(t) and S2(t), where
S1(t)＝Vmaxcos[ωct+φ(t)]
S2(t)＝Vmaxcos[ωct+θ(t)]
Where phi (t) is phi (t) + alpha (t), theta (t) is phi (t) -alpha (t), and alpha (t) is cos-1[ v (t)/Vmax ]
Further, the basic calculation formula of the load impedance of the switching tube of the single power amplifier of the power amplifier chip is as follows:
Rp＝(vdd-vds(on))2/2Po
when the power amplifier chip in the ultra-low power consumption big dipper RDSS navigation chip based on artificial intelligence technique of this embodiment uses, through receiving the radio frequency signal that the radio frequency signal module received the radio frequency chip output, receive the power regulation data of artificial intelligence chip output through power regulation receiving module, through power amplifier output module output power amplifier output signal connection external antenna.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and the above embodiments and descriptions are only preferred examples of the present invention and are not intended to limit the present invention, and that various changes and modifications may be made without departing from the spirit and scope of the present invention, which fall within the scope of the claimed invention. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (9)
1. The utility model provides an ultra-low power consumption big dipper RDSS navigation chip based on artificial intelligence technique, includes radio frequency chip, digital baseband chip, artificial intelligence chip and power amplifier chip, its characterized in that: the input end of the radio frequency chip is connected with an external antenna, the radio frequency chip outputs two paths of signals, one path of signal provides logic level data and a clock signal to the digital baseband circuit, and the other path of signal provides a radio frequency output signal to be connected to the input end of the power amplifier chip;
the digital baseband chip is provided with two input ends, one input end is respectively connected with logic level data and a clock signal provided by the radio frequency chip, the other input end is respectively connected with an auxiliary quick positioning signal and an auxiliary power selection signal provided by the artificial intelligent chip, the digital baseband chip is provided with two output ends, one output end is connected with a power selection end of the power amplifier chip, and the other output end is connected with the artificial intelligent chip to provide positioning information and signal intensity information;
the artificial intelligence chip is a three-port chip and comprises an input port and two output ports, the port of the digital baseband chip for generating positioning information and signal strength information is connected with the input port of the artificial intelligence chip, the output port of the artificial intelligence chip for generating auxiliary quick positioning and auxiliary power selection signals is connected with the input port of the digital baseband chip, and the other output port of the artificial intelligence chip for generating auxiliary power regulation signals is connected with the input port of the power amplifier chip;
one input end of the power amplifier chip is connected with the output end of the radio frequency chip, the radio frequency output signal of the radio frequency chip is amplified and transmitted to an external transmitting antenna, the other input end of the power amplifier chip is connected with the auxiliary power adjusting output port of the artificial intelligent chip to finely adjust transmitting power, and the output end of the power amplifier chip provides the power amplifier output signal to be connected with the external antenna.
2. The artificial intelligence technology-based ultra-low power consumption Beidou RDSS navigation chip according to claim 1, characterized in that: the radio frequency chip comprises a communication signal receiving module, a communication signal conversion module, a signal transmission module and a radio frequency signal output module, wherein the communication signal receiving module is used for receiving satellite communication signals of an external antenna, the communication signal conversion module is used for converting the received weak satellite communication signals into digital logic signals, the signal transmission module is used for transmitting the converted digital logic signals to the digital baseband chip, and the radio frequency signal output module is used for transmitting the radio frequency signals to the power amplifier chip.
3. The artificial intelligence technology-based ultra-low power consumption Beidou RDSS navigation chip according to claim 2, characterized in that: the signal transmission module comprises a logic level module and a clock signal module, wherein the logic level module is used for outputting logic level data, and the clock signal module is used for outputting clock signal data.
4. The artificial intelligence technology-based ultra-low power consumption Beidou RDSS navigation chip according to claim 1, characterized in that: the digital baseband chip comprises a signal receiving module, a signal output module, a feedback signal receiving module and a power output module, wherein the signal receiving module is used for receiving logic level data and clock signals provided by the radio frequency chip, the signal output module is used for outputting signals to the artificial intelligence chip, the feedback signal receiving module is used for receiving feedback signals of the artificial intelligence chip, and the power output module is used for outputting power output signals to the power amplifier chip.
5. The artificial intelligence technology-based ultra-low power consumption Beidou RDSS navigation chip according to claim 4, characterized in that: the signal output module comprises a positioning information module and a signal intensity module, the positioning information module is used for outputting positioning information to the artificial intelligence chip, and the signal intensity module is used for outputting signal intensity to the artificial intelligence chip.
6. The artificial intelligence technology-based ultra-low power consumption Beidou RDSS navigation chip according to claim 1, characterized in that: the artificial intelligence chip comprises a data receiving module, an information processing module, a signal feedback module and an auxiliary power adjusting module, wherein the data receiving module is used for receiving the positioning information and the signal intensity information generated by the digital baseband chip, the information processing module is used for analyzing and processing the received positioning information and the received signal intensity information, the signal feedback module is used for feeding back the information to the digital baseband chip, and the auxiliary power adjusting module is used for transmitting power adjusting data to the power amplifier chip.
7. The artificial intelligence technology-based ultra-low power consumption Beidou RDSS navigation chip according to claim 6, characterized in that: the signal feedback module comprises an auxiliary quick positioning module and an auxiliary power selection module, the auxiliary quick positioning module is used for feeding back auxiliary quick positioning data, and the auxiliary power selection module is used for feeding back auxiliary power data.
8. The artificial intelligence technology-based ultra-low power consumption Beidou RDSS navigation chip according to claim 6, characterized in that: the information processing module comprises an open source framework, an intelligent algorithm module and a joint learning module, the open source framework is used for developing the artificial intelligent chip, the intelligent algorithm module is used for establishing a real-time data processing and maintaining method, and the joint learning module is used for collecting communication data and local user input data, training an algorithm by using a local data set and improving performance.
9. The artificial intelligence technology-based ultra-low power consumption Beidou RDSS navigation chip according to claim 1, characterized in that: the power amplifier chip comprises a radio frequency signal receiving module, a power adjusting receiving module and a power amplifier output module, wherein the radio frequency signal receiving module is used for receiving radio frequency signals output by the radio frequency chip, the power adjusting receiving module is used for receiving power adjusting data output by the artificial intelligent chip, and the power amplifier output module is used for outputting power amplifier output signals to be connected with an external antenna.
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