CN111816733B - Pretreatment method for selective germanium epitaxy in waveguide germanium detector manufacturing process - Google Patents
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- CN111816733B CN111816733B CN202010734863.7A CN202010734863A CN111816733B CN 111816733 B CN111816733 B CN 111816733B CN 202010734863 A CN202010734863 A CN 202010734863A CN 111816733 B CN111816733 B CN 111816733B
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- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 title claims abstract description 62
- 229910052732 germanium Inorganic materials 0.000 title claims abstract description 60
- 238000000407 epitaxy Methods 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 238000002203 pretreatment Methods 0.000 title claims abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 85
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 85
- 239000010703 silicon Substances 0.000 claims abstract description 85
- 238000005530 etching Methods 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 15
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 11
- 229910052681 coesite Inorganic materials 0.000 claims abstract description 10
- 229910052906 cristobalite Inorganic materials 0.000 claims abstract description 10
- 229910052682 stishovite Inorganic materials 0.000 claims abstract description 10
- 229910052905 tridymite Inorganic materials 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 25
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 5
- 238000001039 wet etching Methods 0.000 claims description 5
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 4
- 238000001312 dry etching Methods 0.000 claims description 3
- 230000000873 masking effect Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims 1
- 230000007704 transition Effects 0.000 abstract description 4
- 238000001259 photo etching Methods 0.000 abstract description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 13
- 230000010354 integration Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000010420 art technique Methods 0.000 description 1
- 238000013473 artificial intelligence Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/115—Devices sensitive to very short wavelength, e.g. X-rays, gamma-rays or corpuscular radiation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a pretreatment method of selective germanium epitaxy in a waveguide germanium detector manufacturing process, which grows a layer of SiO on a silicon substrate2Masking; in SiO2Photoetching a silicon groove area on the mask and etching a silicon groove downwards; removal of SiO2Masking and growing a layer of SiO again on the silicon substrate2Masking; in SiO2Etching silicon groove area and silicon groove outer edge area on the mask, and etching to remove SiO on the etching area2A mask, forming a silicon step at the edge of the silicon groove; and epitaxially growing a pure germanium layer in the silicon groove. In the invention, part of SiO at the outer edge of the silicon groove is etched before selectively extending germanium2The mask exposes the silicon surface, reduces the pits at the edge of the epitaxial germanium and locates them in SiO2Masking the silicon step to make the germanium surface in the silicon groove range relatively flat; in addition, the germanium growing in the silicon groove range is all crystalline state, and there is no transition region between amorphous state and crystalline state, so that the performance of the manufactured waveguide germanium detector is improved.
Description
Technical Field
The invention relates to the field of waveguide germanium detectors, in particular to a pretreatment method of selective germanium epitaxy in a waveguide germanium detector manufacturing process.
Background
Photon integration is a key technology in many fields such as next-generation chip-level interconnection, photon calculation and the like, is easy to integrate with a general CMOS (complementary metal oxide semiconductor) process, and has wide application prospect and huge market potential. The optical transceiver chip is one of the most concerned products in the photonic integrated chip, and the integrated high-speed optical transceiver function on the chip of more than or equal to 100G can be realized by integrating components such as a silicon waveguide, a high-speed germanium detector, wavelength division multiplexing, an electric modulator and the like on the chip. Through the silicon-based monolithic integration technology, the weight and the volume of the optical transceiver system are greatly reduced, the integration level is improved, and the silicon-based monolithic integration technology plays an important role in realizing a 5G low-cost communication system, a laser radar and artificial intelligence.
The high-speed germanium detector of the optical transceiver chip has a certain difference from the traditional silicon process due to the particularity of the germanium material process. According to the requirements of different devices, the method can be divided into global epitaxy and selective epitaxy, and the germanium material grown by the selective epitaxy has low defect density and low dark current of the device, so that the method is widely applied. The conventional approach to selective epitaxy is to grow silicon dioxide on a silicon substrate, leave areas where germanium grows by photolithography and etching, and then epitaxially grow germanium material within the defined areas. As shown in fig. 1, prior art epitaxial ge has raised ge at the edges of the silicon oxide mask, and pits in ge near the edges, and the pit height at the edges of ge is often lower than that of silicon oxide, and may even be lower than the silicon surface. Such unevenness can make it difficult to obtain a planar germanium surface by a subsequent CMP planarization process, and thus, when germanium is selectively epitaxially grown by a conventional method, the unevenness of the germanium material can increase the difficulty of the CMP planarization process, even the planar germanium surface cannot be obtained, and the device performance is reduced. In addition, germanium grown on the surface of the silicon oxide is amorphous, and a transition region between amorphous and crystalline states is generated at the edge, so that the quality of the germanium at the edge is reduced, and the dark current of the manufactured detection device is increased.
Disclosure of Invention
The invention aims to provide a pretreatment method for selective germanium epitaxy in a waveguide germanium detector manufacturing process.
The technical scheme of the invention is as follows:
a pretreatment method for selective germanium epitaxy in a waveguide germanium detector manufacturing process comprises the following steps:
step S1, growing a layer of SiO on the silicon substrate2Masking;
step S2, in SiO2Lithography of silicon on maskEtching a silicon groove downwards in the silicon groove area;
step S3, removing SiO on the silicon substrate2Masking and growing a layer of SiO again on the silicon substrate2Masking;
step S4, growing SiO again2Etching silicon groove area and silicon groove outer edge area on the mask, and etching to remove SiO in the etching area2A mask, forming a silicon step at the edge of the silicon groove;
step S5, epitaxially growing a pure germanium layer in the silicon trench.
Further, the silicon substrate is a common silicon wafer or an SOI substrate.
Further, in the step S2, the etching method is dry etching, wet etching or dry-wet hybrid etching.
Further, in the step S1 and the step S3, SiO is grown2The masking method is thermal oxidation, PECVD or LPCVD.
Further, in the step S1 and the step S3, SiO is grown2The thickness of the mask is 100-1000 nm.
Furthermore, the width of the silicon step is 0.5-5 μm.
Further, in the step S4, the etching method is wet etching.
Has the advantages that: in the invention, SiO on the outer edge of the silicon groove is etched before selectively extending germanium2The mask exposes the silicon surface, reduces the pits at the edge of the epitaxial germanium and locates them in SiO2At the position of the mask and the silicon step, pits do not exist at the edge of the silicon groove, so that the germanium surface in the range of the silicon groove is relatively flat, the edge quality is relatively good, and the flat germanium surface can be obtained by adopting a CMP (chemical mechanical planarization) process subsequently; in addition, the germanium growing in the silicon groove range is all crystalline, and a transition region between an amorphous state and the crystalline state is not formed, so that the performance of the manufactured waveguide germanium detector can be improved.
Drawings
FIG. 1 is a schematic diagram of a structure after selective epitaxy of germanium in a silicon bath using prior art techniques;
FIG. 2 is a flow chart of a preferred embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a silicon trench after a silicon step is etched at the edge of the silicon trench;
fig. 4 is a schematic view of the structure after germanium is selectively epitaxially grown in the silicon trench by the method of the present invention.
Detailed Description
In order to make the technical solutions in the embodiments of the present invention better understood and make the above objects, features and advantages of the embodiments of the present invention more comprehensible, the technical solutions in the embodiments of the present invention are described in further detail below with reference to the accompanying drawings.
In the description of the present invention, unless otherwise specified and limited, it is to be noted that the term "connected" is to be interpreted broadly, and may be, for example, a mechanical connection or an electrical connection, or a communication between two elements, or may be a direct connection or an indirect connection through an intermediate medium, and a specific meaning of the term may be understood by those skilled in the art according to specific situations.
As shown in fig. 2, a preferred embodiment of the germanium epitaxy pretreatment method for manufacturing the waveguide germanium detector of the present invention includes the following steps:
step S1, growing a layer of SiO on the silicon substrate by thermal oxidation2The mask may be formed by PECVD (Plasma Enhanced Chemical Vapor Deposition) or LPCVD (Low Pressure Chemical Vapor Deposition) method2Masking; the silicon substrate is preferably an SOI substrate, SiO2The thickness of the mask is preferably 500 nm.
Step S2, in SiO2Etching a silicon groove area on the mask, and etching a silicon groove downwards in the silicon groove area; the etching method is preferably dry etching, and the depth of the silicon groove is preferably 3 μm.
Step S3, removing original SiO on the silicon substrate2Masking, and growing a layer of SiO again with a thickness of 500nm on the silicon substrate by PECVD2And (5) masking.
Step S4, as shown in FIG. 3, on the regrown SiO2Mask filmPhotoetching silicon groove area and silicon groove outer edge area on the upper surface, and removing SiO in the photoetching area by wet etching2A mask, wherein a silicon step with the width of 0.5-5 mu m is formed at the edge of the silicon groove; the width of the silicon step is preferably 1 μm.
Step S5, as shown in fig. 4, a pure germanium layer is epitaxially grown in the silicon trench, and since the silicon step is formed at the outer edge of the silicon trench, the pits formed at the edge of the epitaxial germanium layer can be reduced and located on the SiO layer2At the position of the mask and the silicon step, pits are not arranged at the edge of the silicon groove, so that the epitaxial germanium surface in the silicon groove range is ensured to be relatively flat, the edge quality is relatively good, the quality is obviously improved compared with the prior art, and the flat germanium surface can be obtained by adopting a CMP (chemical mechanical planarization) process subsequently; in addition, because the silicon step exposes the silicon surface, germanium at the edge of the silicon groove still grows on the silicon surface in the process of epitaxial germanium, and the germanium growing on the silicon step is also in a crystalline state, so that no transition region between an amorphous state and the crystalline state exists in the range of the silicon groove, the manufacturing process of the waveguide germanium detector is optimized, and the manufactured waveguide germanium detector has higher performance.
After a pure germanium layer is selectively epitaxially grown in a silicon trench, a subsequent process for manufacturing a waveguide germanium detector is the prior art and is not described herein again. The undescribed parts of the present invention are consistent with the prior art and are not described in detail herein.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures made by using the contents of the present specification and the drawings can be directly or indirectly applied to other related technical fields, and are within the scope of the present invention.
Claims (6)
1. A pretreatment method for selective germanium epitaxy in a waveguide germanium detector manufacturing process is characterized by comprising the following steps:
step S1, growing a layer of SiO on the silicon substrate2Masking;
step S2, in SiO2Etching a silicon groove area on the mask, and etching a silicon groove downwards in the silicon groove area;
step S3, removing SiO on the silicon substrate2Masking and depositing on the silicon substrateGrowing a layer of SiO again2Masking;
step S4, growing SiO again2Etching silicon groove area and silicon groove outer edge area on the mask, and etching to remove SiO in the etching area2A mask, forming a silicon step at the edge of the silicon groove; the width of the silicon step is 0.5-5 mu m;
step S5, epitaxially growing a pure germanium layer in the silicon trench.
2. The pretreatment method for selective germanium epitaxy in a waveguide germanium detector fabrication process according to claim 1, wherein the silicon substrate is a common silicon wafer or an SOI substrate.
3. The pretreatment method for selective germanium epitaxy in a waveguide germanium detector fabrication process according to claim 1, wherein in the step S2, the etching method is dry etching, wet etching or dry-wet hybrid etching.
4. The method of claim 1 wherein SiO is grown in steps S1 and S3 during steps S1 and S32The masking method is thermal oxidation, PECVD or LPCVD.
5. The method of claim 1 wherein the grown SiO is processed in steps S1 and S32The thickness of the mask is 100-1000 nm.
6. The pretreatment method for selective germanium epitaxy in a waveguide germanium detector fabrication process according to claim 1, wherein in said step S4, the etching method is wet etching.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201017913A (en) * | 2008-07-09 | 2010-05-01 | Analog Devices Inc | Recessed germanium (Ge) diode |
| CN103996619A (en) * | 2014-06-09 | 2014-08-20 | 上海华力微电子有限公司 | Method for solving side wall deposition problem of germanium-silicon selective epitaxy through nitrogen implanting |
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| US7358107B2 (en) * | 2005-10-27 | 2008-04-15 | Sharp Laboratories Of America, Inc. | Method of fabricating a germanium photo detector on a high quality germanium epitaxial overgrowth layer |
| US9368579B2 (en) * | 2012-02-07 | 2016-06-14 | The Board Of Trustees Of The Leland Stanford Junior University | Selective area growth of germanium and silicon-germanium in silicon waveguides for on-chip optical interconnect applications |
| FR2999800B1 (en) * | 2012-12-13 | 2017-10-13 | St Microelectronics Sa | PROCESS FOR PRODUCING SOIL / SOLID HYBRID SEMICONDUCTOR WAFER |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201017913A (en) * | 2008-07-09 | 2010-05-01 | Analog Devices Inc | Recessed germanium (Ge) diode |
| CN103996619A (en) * | 2014-06-09 | 2014-08-20 | 上海华力微电子有限公司 | Method for solving side wall deposition problem of germanium-silicon selective epitaxy through nitrogen implanting |
Non-Patent Citations (1)
| Title |
|---|
| "硅基锗薄膜选区外延生长研究";汪建元等;《物理学报Acta Phys.Sin.》;20150504;第64卷(第12期);正文第128102-1页-128102-4页及图1 * |
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