CN111816667B - Thin film transistor structure, shift register, gate driving circuit and display substrate - Google Patents

Thin film transistor structure, shift register, gate driving circuit and display substrate Download PDF

Info

Publication number
CN111816667B
CN111816667B CN202010720516.9A CN202010720516A CN111816667B CN 111816667 B CN111816667 B CN 111816667B CN 202010720516 A CN202010720516 A CN 202010720516A CN 111816667 B CN111816667 B CN 111816667B
Authority
CN
China
Prior art keywords
electrode
thin film
film transistor
light emitting
emitting unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010720516.9A
Other languages
Chinese (zh)
Other versions
CN111816667A (en
Inventor
陈亮
高锦成
钱海蛟
赵立星
汪涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Hefei BOE Display Lighting Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Hefei BOE Display Lighting Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Hefei BOE Display Lighting Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202010720516.9A priority Critical patent/CN111816667B/en
Publication of CN111816667A publication Critical patent/CN111816667A/en
Application granted granted Critical
Publication of CN111816667B publication Critical patent/CN111816667B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Electromagnetism (AREA)
  • Ceramic Engineering (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A thin film transistor structure, a shift register, a gate driving circuit, and a display substrate, the thin film transistor structure comprising: a thin film transistor and a light emitting unit, the thin film transistor including a gate electrode, an active layer, a source electrode, and a drain electrode; the light emitting unit is configured to emit light when the thin film transistor is turned on, and at least a portion of the light is irradiated to the active layer. According to the thin film transistor structure provided by the embodiment of the application, when the thin film transistor is started, the light emitting unit irradiates the active layer, so that the shift of threshold voltage is restrained, and the service life of the thin film transistor is prolonged.

Description

Thin film transistor structure, shift register, gate driving circuit and display substrate
Technical Field
Embodiments of the present application relate to, but are not limited to, display technologies, and in particular, to a thin film transistor structure, a shift register, a gate driving circuit, and a display substrate.
Background
In recent years, display panels mostly integrate circuits directly on an array substrate to form gate driving circuits (Gate Driver On Array, GOA) to drive gate lines, thereby realizing a narrow frame and reducing production cost.
Disclosure of Invention
The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.
The embodiment of the application provides a thin film transistor structure, a shift register, a gate driving circuit and a display substrate.
In one aspect, an embodiment of the present application provides a thin film transistor structure, including: a thin film transistor and a light emitting unit, the thin film transistor including a gate electrode, an active layer, a source electrode, and a drain electrode; the light emitting unit is configured to emit light when the thin film transistor is turned on, and at least a portion of the light is irradiated to the active layer.
In an exemplary embodiment, the light emitting unit is further configured to stop light emission when the thin film transistor is turned off.
In an exemplary embodiment, the light emitting unit includes a first electrode, a light emitting layer, and a second electrode.
In an exemplary embodiment, the first electrode is connected to the gate electrode.
In an exemplary embodiment, the thin film transistor and the light emitting unit are disposed on a substrate, and the orthographic projection of the active layer includes the orthographic projection of the light emitting layer on a plane parallel to the substrate.
In an exemplary embodiment, when the second electrode is located at a side of the first electrode remote from the active layer, a material of the second electrode includes an opaque material; when the first electrode is positioned on the side of the second electrode away from the active layer, the material of the first electrode comprises an opaque material.
In an exemplary embodiment, the gate electrode is disposed on the substrate, the active layer is disposed on a side of the gate electrode away from the substrate, the source electrode and the drain electrode are disposed on a side of the active layer away from the substrate, the first electrode is disposed on a side of the source electrode and the drain electrode away from the substrate, and the light emitting layer and the second electrode are sequentially disposed on a side of the first electrode away from the substrate.
In an exemplary embodiment, the thin film transistor structure further includes a resistor unit having one end connected to the gate electrode and the other end connected to the source electrode.
In yet another aspect, an embodiment of the present application provides a shift register, where the shift register includes the above-mentioned tft structure.
In an exemplary embodiment, the thin film transistor structure in the shift register is configured such that a ratio of a time that the shift register is on to the duty cycle is greater than a preset threshold.
In yet another aspect, an embodiment of the present application provides a gate driving circuit, including a plurality of shift registers in cascade connection.
In yet another aspect, an embodiment of the present application provides a display substrate, including a display area and a peripheral area, where the peripheral area is provided with the gate driving circuit described above.
In an exemplary embodiment, the display region includes a pixel light emitting unit, and the light emitting unit in the thin film transistor structure of the gate driving circuit is disposed in the same layer as the pixel light emitting unit of the display region.
The embodiment of the application comprises a thin film transistor structure, which comprises the following components: a thin film transistor and a light emitting unit, the thin film transistor including a gate electrode, an active layer, a source electrode, and a drain electrode; the light emitting unit is configured to emit light when the thin film transistor is turned on, and at least a portion of the light is irradiated to the active layer. When the thin film transistor is turned on, the light emitting unit irradiates the active layer, suppresses the shift of the threshold voltage, and improves the life of the thin film transistor.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and drawings.
Other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description.
Drawings
The accompanying drawings are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate and do not limit the application.
FIG. 1 is a schematic diagram of a shift register according to an embodiment;
FIG. 2 is a schematic diagram of a TFT structure according to an embodiment;
FIG. 3 is a schematic illustration of the substrate after patterning;
FIG. 4 is a schematic diagram after forming a gate electrode pattern;
FIG. 5 is a schematic illustration of the active layer after patterning;
FIG. 6 is a schematic diagram after forming source and drain electrode patterns;
FIG. 7 is a schematic illustration of the planar layer after patterning;
FIG. 8 is a schematic view after anode patterning;
FIG. 9 is a schematic diagram after forming a light emitting layer and a cathode pattern;
FIG. 10 is a schematic diagram of a shift register according to an embodiment;
fig. 11 is a flowchart of a method for manufacturing a thin film transistor structure according to an embodiment.
Detailed Description
Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings. Embodiments of the application and features of the embodiments may be combined with one another arbitrarily without conflict.
The steps illustrated in the flowchart of the figures may be performed in a computer system, such as a set of computer-executable instructions. Also, while a logical order is depicted in the flowchart, in some cases, the steps depicted or described may be performed in a different order than presented herein.
Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this application belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
In the present disclosure, the first electrode may be a drain electrode, and the second electrode may be a source electrode, or the first electrode may be a source electrode, and the second electrode may be a drain electrode. In the case of using a transistor having opposite polarity, or in the case of a change in the direction of current during circuit operation, the functions of the "source electrode" and the "drain electrode" may be interchanged. Thus, in this disclosure, the "source electrode" and the "drain electrode" may be interchanged. The control is a gate electrode.
Typically, the gate driving circuit includes a plurality of cascaded shift registers. Fig. 1 is a schematic diagram of a shift register. As shown in fig. 1, the shift register may include an INPUT sub-circuit 1, an output sub-circuit 2, a reset sub-circuit 3, and a pull-down sub-circuit 4, wherein the INPUT sub-circuit 1 connects an INPUT terminal INPUT and a pull-up node PU; the OUTPUT sub-circuit 2 is connected with a clock signal end CLK, a pull-up node PU and an OUTPUT end OUTPUT, and the RESET sub-circuit 3 is connected with the pull-up node PU, a RESET end RESET and a second power supply end VSS; the pull-down subcircuit 4 is connected with a first power supply end VDD, a pull-up node PU, a second power supply end VSS and an OUTPUT end OUTPUT; wherein:
the INPUT subcircuit 1 is arranged to provide a signal at an INPUT terminal to the pull-up node PU under control of the INPUT terminal INPUT;
the OUTPUT sub-circuit 2 is configured to provide the signal of the clock signal terminal to the OUTPUT terminal OUTPUT under the control of the voltage signal of the pull-up node PU.
The RESET sub-circuit 3 is arranged to supply a signal of the second power supply terminal VSS to the pull-up node PU under control of the RESET terminal RESET.
The pull-down sub-circuit 4 is configured to provide signals of the second power supply terminal VSS to the pull-up node PU and the OUTPUT terminal OUTPUT under the control of the first power supply terminal VDD, so as to reduce noise of the OUTPUT terminal.
In this embodiment, the INPUT sub-circuit 1 may include a first transistor M1, where a control electrode of the first transistor M1 is connected to the INPUT terminal INPUT, a first electrode is connected to the INPUT terminal INPUT, and a second electrode is connected to the pull-up node PU;
the output sub-circuit 2 may include a third transistor M3 and a first capacitor C1; the control electrode of the third transistor M3 is connected with the pull-up node PU, the first electrode is connected with the clock signal end CLK, and the second electrode is connected with the OUTPUT end OUTPUT; the first end of the electric capacitor C1 is connected with the pull-up node PU, and the second end is connected with the OUTPUT end OUTPUT;
the RESET sub-circuit 3 may include a second transistor M2, where a control electrode of the second transistor M2 is connected to the RESET terminal RESET, a first electrode is connected to the pull-up node PU, and a second electrode is connected to the second power supply terminal VSS;
the pull-down sub-circuit 4 may include a fifth transistor M5, a sixth transistor M6, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, and an eleventh transistor M11, wherein a control electrode of the fifth transistor M5 is connected to the node pd_cn_1, a first electrode is connected to the first power supply terminal VDD, a second electrode is connected to the pull-down node PD, a control electrode of the sixth transistor M6 is connected to the pull-up node PU, a first electrode is connected to the pull-down node PD, a second electrode is connected to the second power supply terminal VSS, a control electrode of the eighth transistor M8 is connected to the pull-up node PU, a first electrode is connected to the node pd_cn_1, a second electrode is connected to the second power supply terminal VSS, a control electrode of the ninth transistor M9 is connected to the first power supply terminal VDD, a second electrode is connected to the node PD, a first electrode is connected to the pull-down node PU, a second electrode is connected to the second power supply terminal VSS, a control electrode of the tenth transistor M10 is connected to the second power supply terminal VSS, and a control electrode of the eleventh transistor M11 is connected to the pull-down node PD.
M10, M11 in the pull-down sub-circuit 4 are connected to the pull-down node PD and are in an on state for a long time under the control of the level of the pull-down node PD. Therefore, the thin film transistor is subjected to forward stress for a long period of time, and thus, the thin film transistor is prone to deterioration and has a high deterioration rate.
In an embodiment of the application, a thin film transistor structure is provided, the thin film transistor structure comprises a thin film transistor and a light emitting unit, and the thin film transistor comprises a gate electrode, an active layer, a source electrode and a drain electrode; the light emitting unit is configured to emit light when the thin film transistor is turned on, and at least a portion of the light is irradiated to the active layer. That is, the active layer is at least partially disposed within an irradiation range of the light emitting unit such that light emitted from the light emitting unit is irradiated to the active layer. According to the scheme provided by the embodiment, when the thin film transistor is started, the light emitting unit emits light and irradiates the active layer, so that forward drift of threshold voltage caused by long-time positive grid voltage when the transistor is started is restrained, and reliability of products is improved.
In an exemplary embodiment, the light emitting unit configured to emit light when the thin film transistor is turned on includes: the light emitting unit is configured to emit light for a partial period when the thin film transistor is turned on.
In an exemplary embodiment, the light emitting unit is further configured to stop light emission when the thin film transistor is turned off. In this embodiment, when the thin film transistor is turned off, light emission is stopped, and deterioration of the TFT due to light emission due to drift of the threshold voltage of the TFT in a negative bias can be avoided.
In an exemplary embodiment, the light emitting unit is configured to emit light when the thin film transistor is turned on may be: the light emitting unit emits light in all the time periods when the thin film transistor is turned on, or part of the time period light emitting unit emits light in the time periods when the thin film transistor is turned on. The light emitting unit may emit light simultaneously when the thin film transistor is turned on, or may emit light after the thin film transistor is turned on, and so on.
In an exemplary embodiment, the light emitting unit may be an electroluminescent unit, and the light emitting unit may include a first electrode, a light emitting layer, and a second electrode. The first electrode is for example an anode and the second electrode is for example a cathode. The embodiment of the present application is not limited thereto, and other structures of the light emitting unit may be used.
In an exemplary embodiment, when the second electrode is located at a side of the first electrode remote from the active layer, a material of the first electrode may include a transparent conductive film, and a material of the second electrode may include an opaque conductive material; when the first electrode is positioned at the side of the second electrode away from the active layer, the material of the second electrode may include a transparent conductive film, and the material of the first electrode may include an opaque conductive material; that is, the electrode close to the active layer uses a transparent conductive film (facilitating light transmission), and the electrode far away from the active layer uses an opaque material (so that light irradiates the active layer as much as possible and does not transmit out through the electrode). However, embodiments of the present application are not limited thereto, and a transparent material may be used for the electrode remote from the active layer.
In an exemplary embodiment, the transparent conductive film may be Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO), and the opaque material may be any one or more of magnesium (Mg), silver (Ag), aluminum (Al), copper (Cu), and lithium (Li), or an alloy made of any one or more of the above metals.
In an exemplary embodiment, the light emitting unit and the pixel light emitting unit that may be disposed in the same layer as the display area in the display substrate. Namely, a light emitting unit and a pixel light emitting unit are formed through a one-time patterning process, and the light emitting unit is prepared when the pixel light emitting unit of the pixel region is prepared. For example, a first electrode of the light emitting unit and a first electrode of the pixel light emitting unit are formed through a one-time patterning process, a light emitting layer of the light emitting unit and a light emitting layer of the pixel light emitting unit are formed through a one-time patterning process, and a second electrode of the light emitting unit and a second electrode of the pixel light emitting unit are formed through a one-time patterning process. The light emitting unit and the pixel light emitting unit may be structurally identical.
In an exemplary embodiment, the light emitting unit may be controlled using a different control circuit from the thin film transistor, or may be controlled using the same control circuit as the thin film transistor, for example, the first electrode of the light emitting unit is directly connected to the gate electrode of the thin film transistor. For another example, the first electrode of the light emitting unit is connected to the source electrode or the drain electrode of the thin film transistor, and is connected to the gate electrode through the source electrode or the drain electrode. When different control circuits are used, the on signal of the thin film transistor and the light-emitting control signal of the light-emitting unit can be synchronous, so that the on and off of the thin film transistor and the light-emitting and off of the light-emitting unit are synchronous. When the same control circuit is used, the on signal of the thin film transistor and the light-emitting control signal of the light-emitting unit are the same signal, so that the on and off of the thin film transistor are synchronous with the light emission and off of the light-emitting unit. When the same control circuit is used, the cost of the circuit is not required to be increased additionally, and the method has economic benefit.
In an exemplary embodiment, the thin film transistor structure further includes a resistor unit having one end connected to the gate electrode and the other end connected to the source electrode. The resistive element may comprise one or more resistors. The resistance unit can reduce electric leakage and avoid voltage reduction of the gate electrode.
Fig. 2 is a schematic structural diagram of a thin film transistor according to an embodiment. In the present embodiment, the thin film transistor is described as an example of a bottom gate thin film transistor, but the embodiment of the present application is not limited thereto, and the thin film transistor may be a top gate thin film transistor. As shown in fig. 2, the thin film transistor structure provided in this embodiment includes a gate electrode 10 disposed on a substrate 9, a first insulating layer 11 disposed on the gate electrode 10; an active layer 12 disposed on a side of the first insulating layer 11 remote from the substrate, a source electrode 13 and a drain electrode 14 disposed on the active layer 12, a flat layer 15 covering the active layer 12, the source electrode 13 and the drain electrode 14, and an anode 16, a light emitting layer 17 and a cathode 18 disposed on the flat layer 15 in this order. The gate electrode 10, the active layer 12, the source electrode 13, and the drain electrode 14 constitute a thin film transistor (Thin Film Transistor, TFT), and the anode 16, the light emitting layer 17, and the cathode 18 constitute a light emitting unit.
According to the scheme provided by the embodiment, the light-emitting layer is added above the active layer of the thin film transistor, so that when the thin film transistor is started, the light-emitting layer emits light, light irradiates the active layer, threshold voltage drift caused by long-time positive grid voltage of the thin film transistor is effectively restrained, and the reliability of products is improved.
In an exemplary embodiment, the planarization layer 15 is provided with a via hole, and the anode 16 is electrically connected to the gate electrode 10 through the via hole. In this embodiment, the gate electrode of the TFT is connected to the anode of the light emitting unit, and the light emitting unit is controlled to emit light by using the switch control signal of the TFT, so that the light emitting unit is not required to be additionally controlled by adding a control circuit, and light emission is realized only when the TFT is turned on, thereby achieving the effect of inhibiting threshold voltage drift. And when the TFT is in an off state, the light emitting unit also stops emitting light, so that the deterioration of the TFT in threshold voltage drift of negative bias caused by illumination is avoided.
In an exemplary embodiment, the thin film transistor structure may be used as a thin film transistor in a gate driving circuit of a display substrate, and may be prepared simultaneously with a pixel light emitting unit of a display area of the display substrate, without adding additional manufacturing processes.
The technical scheme of the embodiment of the application is further described through the preparation process of the thin film transistor structure of the embodiment. The "patterning process" in this embodiment includes processes such as film deposition, photoresist coating, mask exposure, development, etching, photoresist stripping, etc., and the "photolithography process" in this embodiment includes processes such as film coating, mask exposure, development, etc., which are all well-known preparation processes in the related art.
Fig. 3 to fig. 9 are schematic views illustrating a manufacturing process of a thin film transistor structure according to an embodiment of the present application. The preparation process of the thin film transistor structure comprises the following steps:
(1) Forming a base pattern. Forming the base pattern may include: a layer of flexible material is coated on a glass carrier plate 5, and is solidified into a film to form a first substrate. And depositing a buffer film on the first substrate to form a buffer layer pattern covering the whole first substrate. And finally, coating a layer of flexible material on the buffer layer, and curing to form a film to form a second substrate. The first substrate, the buffer layer, and the second substrate constitute a substrate 9. The flexible material may be polyimide PI, polyethylene terephthalate PET, or a surface-treated polymer soft film, etc., to form a flexible substrate, as shown in fig. 3. The buffer film may be made of silicon nitride SiNx, silicon oxide SiOx, or the like, and may have a single layer or a multilayer structure of silicon nitride/silicon oxide.
(2) Forming a gate electrode pattern
Forming the gate electrode pattern includes: depositing a first metal film on the substrate with the patterns, coating a layer of photoresist on the first metal film, exposing and developing the photoresist by using a mask, forming an unexposed area at the position of the gate electrode pattern, reserving the photoresist, forming a completely exposed area at other positions, removing the photoresist, etching the first metal film in the completely exposed area, and stripping the residual photoresist to form the pattern of the gate electrode 10. As shown in fig. 4.
(3) An active layer pattern is formed. Forming the active layer pattern includes: a first insulating film and an active layer film are deposited on the substrate on which the foregoing patterns are formed at one time, and patterning process treatment is performed on the active layer film to form a pattern of a first insulating layer 11 and an active layer 12 covering the substrate, the active layer 12 being located above the gate electrode 10, as shown in fig. 5.
(4) Source and drain electrode patterns are formed.
Forming the source electrode and the drain electrode pattern includes: a second metal thin film is deposited on the substrate on which the foregoing pattern is formed, and a patterning process is performed on the second metal thin film to form a pattern of the source electrode 13 and the drain electrode 14, as shown in fig. 6. The gate electrode 10, the active layer 12, the source electrode 13, and the drain electrode 14 constitute a thin film transistor.
(5) A planar layer pattern with vias is formed. Forming a planar layer pattern with vias includes: depositing a passivation layer film on the substrate with the patterns, coating a layer of photoresist on the passivation layer film, exposing and developing the photoresist by using a mask, forming a full exposure area at the via hole, removing the photoresist, forming an unexposed area at other positions, retaining the photoresist, etching the passivation layer film at the full exposure area and stripping the residual photoresist to form a pattern of a flat layer 15 with a via hole, and etching the flat layer film and the first insulating layer 11 in the via hole to expose the surface of the gate electrode 10, as shown in fig. 7.
(6) An anode pattern is formed. Forming the anode pattern includes: on the basis of the formation of the above structure, a transparent conductive film is deposited, patterned by a patterning process to form an anode 16 pattern, and the anode 16 is connected to the gate electrode 10 through a via hole, as shown in fig. 8. The transparent conductive film may employ indium tin oxide ITO or indium zinc oxide IZO. In this embodiment, the anode 16 is connected to the gate electrode 10, when the signal connected to the gate electrode 10 is a high level signal, the TFT is turned on, the light emitting layer 17 emits light, and when the signal connected to the gate electrode 10 is a low level signal, the TFT is turned off, the light emitting layer 17 stops emitting light, so that the light emitting unit and the TFT switch timing are consistent. In this embodiment, a TFT is described as an example of an N-type transistor. When the TFT is a P-type transistor, the TFT is turned on by a low-level signal, and turned off by a high-level signal, at the moment, the electrode connected with the gate electrode in the light-emitting unit is correspondingly changed, so that the light-emitting unit emits light when the TFT is turned on, and the light-emitting unit stops emitting light when the TFT is turned off.
(7) A light emitting layer and a cathode pattern are formed. Forming the light emitting layer and the cathode pattern includes: an organic light emitting material and a cathode metal are sequentially vapor-deposited on the substrate on which the above pattern is formed, to form a pattern of a light emitting layer 17 and a cathode 18, as shown in fig. 9. The cathode can be made of one of magnesium Mg, silver Ag, aluminum Al, copper Cu, lithium Li and other metal materials or an alloy of the metals. The cathode material may be an opaque material, so that the light emitted from the light emitting layer 17 irradiates the active layer 12 as much as possible.
(8) And continuing to prepare the subsequent film, removing the glass substrate 1 after the preparation is finished, and ending the preparation process.
In the above steps, only the process of preparing the peripheral region of the display substrate is described, and the process of preparing the display region of the display substrate is not shown. In the step (6), when the anode pattern is formed, an anode of a display region of the display substrate is also formed; in the step (7), when the light-emitting layer and the cathode pattern are formed, the light-emitting layer and the cathode of the display region of the display substrate are also formed. The light emitting unit and the pixel light emitting unit of the display area may be the same structure. The scheme provided by the embodiment does not need to increase preparation steps, simplifies the manufacturing process and reduces the cost.
In another embodiment, the thin film transistor in the thin film transistor structure may be a top gate thin film transistor in which a gate electrode is located between an active layer and source and drain electrodes, and thus, a light emitting unit may be disposed on a side of the active layer away from the gate electrode. The light emitting unit includes a first electrode, a light emitting layer, and a second electrode, similar to the bottom gate type thin film transistor, and the first electrode of the light emitting unit may be connected to the gate electrode of the top gate type thin film transistor.
The embodiment of the application provides a shift register, which comprises at least one thin film transistor structure.
The thin film transistor structure in the shift register is configured such that a ratio of a time that the shift register is on in one duty cycle to the duty cycle is greater than a preset threshold. That is, the thin film transistor having a ratio of on time to duty cycle in the shift register greater than a preset threshold value is replaced with the above-described thin film transistor structure. When the shift register provided by the embodiment of the application is used, light is generated to irradiate the active layer when the thin film transistor is started, the forward bias of the threshold voltage is restrained, and the service life of the thin film transistor can be effectively prolonged. The preset threshold may be set as desired, such as setting the on time to be half of the duty cycle as the preset threshold, and so on.
Fig. 10 is a schematic diagram of a shift register according to an embodiment. As shown in fig. 10, the shift register provided in this embodiment includes: an INPUT sub-circuit 1, an output sub-circuit 2, a reset sub-circuit 3 and a pull-down sub-circuit 4, wherein the INPUT sub-circuit 1 is connected with an INPUT end INPUT and a pull-up node PU; the OUTPUT sub-circuit 2 is connected with a clock signal end CLK, a pull-up node PU and an OUTPUT end OUTPUT, and the RESET sub-circuit 3 is connected with the pull-up node PU, a RESET end RESET and a second power supply end VSS; the pull-down subcircuit 4 is connected with a first power supply end VDD, a pull-up node PU, a second power supply end VSS and an OUTPUT end OUTPUT; wherein:
the INPUT subcircuit 1 is arranged to provide a signal at an INPUT terminal to the pull-up node PU under control of the INPUT terminal INPUT;
the OUTPUT sub-circuit 2 is configured to provide the signal of the clock signal terminal to the OUTPUT terminal OUTPUT under the control of the voltage signal of the pull-up node PU.
The RESET sub-circuit 3 is arranged to supply a signal of the second power supply terminal VSS to the pull-up node PU under control of the RESET terminal RESET.
The pull-down sub-circuit 4 is configured to provide signals of the second power supply terminal VSS to the pull-up node PU and the OUTPUT terminal OUTPUT under the control of the first power supply terminal VDD, so as to reduce noise of the OUTPUT terminal.
In this embodiment, the INPUT sub-circuit 1 may include a first transistor M1, where a control electrode of the first transistor M1 is connected to the INPUT terminal INPUT, a first electrode is connected to the INPUT terminal INPUT, and a second electrode is connected to the pull-up node PU;
the output sub-circuit 2 may include a third transistor M3 and a first capacitor C1; the control electrode of the third transistor M3 is connected with the pull-up node PU, the first electrode is connected with the clock signal end CLK, and the second electrode is connected with the OUTPUT end OUTPUT; the first end of the electric capacitor C1 is connected with the pull-up node PU, and the second end is connected with the OUTPUT end OUTPUT;
the RESET sub-circuit 3 may include a second transistor M2, where a control electrode of the second transistor M2 is connected to the RESET terminal RESET, a first electrode is connected to the pull-up node PU, and a second electrode is connected to the second power supply terminal VSS;
the pull-down sub-circuit 4 may include a fifth transistor M5, a sixth transistor M6, an eighth transistor M8, a ninth transistor M9, a twelfth transistor M12, and a thirteenth transistor M13, wherein a control electrode of the fifth transistor M5 is connected to the node pd_cn_1, a first electrode is connected to the first power supply terminal VDD, a second electrode is connected to the pull-down node PD, a control electrode of the sixth transistor M6 is connected to the pull-up node PU, a first electrode is connected to the pull-down node PD, a second electrode is connected to the second power supply terminal VSS, a control electrode of the eighth transistor M8 is connected to the pull-up node PU, a first electrode is connected to the node pd_cn_1, a second electrode is connected to the second power supply terminal VSS, a control electrode of the ninth transistor M9 is connected to the first power supply terminal VDD, a second electrode is connected to the node pd_cn_1, a control electrode of the twelfth transistor M12 is connected to the pull-down node PD, a first electrode is connected to the pull-up node PU, a second electrode is connected to the second power supply terminal VSS, a control electrode of the thirteenth transistor M13 is connected to the pull-down node VSS.
In this embodiment, the first to third transistors M1 to M3, the fifth transistor M5, the sixth transistor M6, the eighth transistor M8, the ninth transistor M9 may be a conventional transistor (no light emitting unit), and the twelfth and thirteenth transistors M12 and M13 may be the thin film transistor structures described in the previous embodiments.
In the shift register shown in fig. 1, the tenth transistor M10 mainly serves to reduce noise at the pull-down node PU, and thus is turned on for a long time, i.e., the gate electrode of the tenth transistor M10 is continuously biased positively. In this state, the threshold voltage Vth of the tenth transistor M10 continuously shifts forward, and after a long time operation, the switching characteristics of the tenth transistor M10 gradually fail when Vth exceeds or approaches the operation voltage. The eleventh transistor M11 is similar. In the shift register according to the present embodiment, the tenth transistor M10 and the eleventh transistor M11 are replaced by the twelfth transistor M12 and the thirteenth transistor M13, the twelfth transistor M12 and the thirteenth transistor M13 are thin film transistor structures provided in the foregoing embodiments, and compared with the twelfth transistor M10 and the thirteenth transistor M11, the twelfth transistor M12 and the thirteenth transistor M13 have light emitting units, and when the pull-down node PD is at a high level, the twelfth transistor M12 and the thirteenth transistor M13 are turned on, the noise reduction sub-circuit operates, and at the same time, the light emitting units emit light, and light irradiates the active layers of the twelfth transistor M12 and the thirteenth transistor M13, so that Vth forward bias is suppressed, and the life of the twelfth transistor M12 and the thirteenth transistor M13 can be effectively prolonged. When the noise reduction subcircuit is not in operation, the twelfth transistor M12 and the thirteenth transistor M13 are in an off state, the gate electrode is in a negative gate voltage, and the light emitting unit is also in an off state at this time, so that the light emitting unit does not cause negative bias deterioration of Vth under the negative gate voltage.
In another embodiment, one of the twelfth transistor M12 and the thirteenth transistor M13 may be a conventional transistor (no light emitting unit), and the other may be a thin film transistor structure provided in the foregoing embodiment. The first to third transistors M1 to M3, the fifth transistor M5, the sixth transistor M6 and the eighth transistor M8, and the ninth transistor M9 may be partially conventional transistors and partially have the thin film transistor structure provided in the foregoing embodiments.
The shift register shown in fig. 10 is merely an example, and in other embodiments, shift registers with other structures may be used, which is not limited in the embodiments of the present application, and for shift registers with other structures, some or all of the thin film transistors may be replaced with the thin film transistor structures provided in the embodiments of the present application.
The embodiment of the application provides a gate driving circuit which comprises a plurality of cascaded shift registers.
The embodiment of the application provides a display substrate which comprises a display area and a peripheral area, wherein the peripheral area is provided with the grid driving circuit.
In an exemplary embodiment, the display region includes a pixel light emitting unit, and the light emitting unit in the thin film transistor structure of the gate driving circuit is disposed in the same layer as the pixel light emitting unit of the display region.
Fig. 11 is a flowchart of a method for manufacturing a thin film transistor structure according to an embodiment of the present application. As shown in fig. 11, the method for manufacturing a thin film transistor structure according to the embodiment of the present application includes:
step 101, forming a thin film transistor; the thin film transistor comprises a gate electrode, an active layer, a source electrode and a drain electrode;
in step 102, a light emitting unit is formed, the light emitting unit is configured to emit light when the thin film transistor is turned on, and at least part of the light irradiates the active layer.
In an exemplary embodiment, the forming a thin film transistor includes:
forming a gate electrode on a substrate;
forming a first insulating layer on one side of the gate electrode away from the substrate;
sequentially forming the active layer, the source electrode and the drain electrode on one side of the first insulating layer, which is far away from the substrate;
in an exemplary embodiment, the forming the light emitting unit includes:
forming a planarization layer on a side of the source electrode and the drain electrode away from the substrate;
a first electrode, a light emitting layer, and a second electrode are sequentially formed on the flat surface.
The embodiment of the application also provides a display device, which comprises the display substrate of the embodiment. The display device may be: any product or component with display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
The following points need to be described:
(1) The drawings of the embodiments of the present application relate only to the structures related to the embodiments of the present application, and other structures may refer to the general designs.
(2) In the drawings for describing embodiments of the present application, the thickness of layers or regions is exaggerated or reduced for clarity, i.e., the drawings are not drawn to actual scale. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, it can be "directly on" or "under" the other element or intervening elements may be present.
(3) The embodiments of the application and the features of the embodiments can be combined with each other to give new embodiments without conflict.
Although the embodiments of the present application are described above, the embodiments are only used for facilitating understanding of the present application, and are not intended to limit the present application. Any person skilled in the art can make any modification and variation in form and detail without departing from the spirit and scope of the present disclosure, but the scope of the present disclosure is to be determined by the appended claims.

Claims (9)

1. A thin film transistor structure comprising: a thin film transistor and a light emitting unit, the thin film transistor including a gate electrode, an active layer, a source electrode, and a drain electrode; the light emitting unit is configured to emit light when the thin film transistor is turned on, and at least part of the light irradiates the active layer; the light emitting unit is further configured to stop light emission when the thin film transistor is turned off;
the thin film transistor and the light emitting unit are arranged on a substrate, and the light emitting unit is positioned at one side of the thin film transistor away from the substrate;
the light emitting unit comprises a first electrode, a light emitting layer and a second electrode; the first electrode is connected to the gate electrode; the thin film transistor structure further comprises a resistor unit, one end of the resistor unit is connected with the gate electrode, and the other end of the resistor unit is connected with the source electrode.
2. The thin film transistor structure of claim 1, wherein the orthographic projection of the active layer comprises an orthographic projection of the light emitting layer in a plane parallel to the substrate.
3. The thin film transistor structure of claim 1, wherein the material of the second electrode comprises an opaque material when the second electrode is located on a side of the first electrode remote from the active layer; when the first electrode is positioned on the side of the second electrode away from the active layer, the material of the first electrode comprises an opaque material.
4. The structure of claim 1, wherein the thin film transistor is formed by a process including,
the light-emitting device comprises a substrate, a gate electrode, an active layer, a source electrode, a drain electrode, a first electrode, a light-emitting layer, a second electrode, a first electrode, a light-emitting layer, a first electrode, a second electrode, a source electrode, a drain electrode, a source electrode, a first electrode, a second electrode, a source electrode, a drain electrode, a source electrode, a drain electrode and a first electrode.
5. A shift register, characterized in that the shift register comprises at least one thin film transistor structure as claimed in any of claims 1 to 4.
6. The shift register of claim 5, wherein the thin film transistor structure in the shift register is configured such that a ratio of a time that the shift register is on to the duty cycle is greater than a preset threshold value.
7. A gate driving circuit comprising a plurality of shift registers as claimed in claim 5 or 6 in cascade.
8. A display substrate comprising a display region and a peripheral region, the peripheral region being provided with the gate drive circuit according to claim 7.
9. The display substrate according to claim 8, wherein the display region includes a pixel light emitting unit, and the light emitting unit in the thin film transistor structure of the gate driving circuit is arranged in the same layer as the pixel light emitting unit of the display region.
CN202010720516.9A 2020-07-24 2020-07-24 Thin film transistor structure, shift register, gate driving circuit and display substrate Active CN111816667B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010720516.9A CN111816667B (en) 2020-07-24 2020-07-24 Thin film transistor structure, shift register, gate driving circuit and display substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010720516.9A CN111816667B (en) 2020-07-24 2020-07-24 Thin film transistor structure, shift register, gate driving circuit and display substrate

Publications (2)

Publication Number Publication Date
CN111816667A CN111816667A (en) 2020-10-23
CN111816667B true CN111816667B (en) 2023-10-31

Family

ID=72860956

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010720516.9A Active CN111816667B (en) 2020-07-24 2020-07-24 Thin film transistor structure, shift register, gate driving circuit and display substrate

Country Status (1)

Country Link
CN (1) CN111816667B (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101906151B1 (en) * 2010-02-19 2018-10-11 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Transistor and display device using the same
CN109037242B (en) * 2018-08-01 2021-04-06 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof and display panel

Also Published As

Publication number Publication date
CN111816667A (en) 2020-10-23

Similar Documents

Publication Publication Date Title
US10002847B2 (en) OLED pixel unit, transparent display device, method for fabricating the same, display apparatus
EP3139410B1 (en) Amoled array substrate, manufacturing method thereof, and display device
US20220013612A1 (en) Display Substrate, Manufacturing Method Thereof, and Display Apparatus
CN110073495B (en) Array substrate, manufacturing method thereof and electronic device
CN114072724B (en) Display substrate and display device
US20220102460A1 (en) Display Substrate and Manufacturing Method Therefor, and Display Device
US20200328266A1 (en) Array substrate, manufacturing method thereof, and display apparatus
CN111785760A (en) Display substrate, preparation method thereof and display device
CN112740434B (en) Display panel, manufacturing method thereof and display device
CN113963667A (en) Display device and driving method thereof
US11482592B2 (en) Substrate and manufacturing method thereof and electronic device
CN111816667B (en) Thin film transistor structure, shift register, gate driving circuit and display substrate
CN115172428A (en) Display substrate and display device
CN114868240B (en) Display substrate, preparation method thereof and display device
CN111477671B (en) Array substrate, driving method, manufacturing method and display device thereof
CN110890481B (en) Display substrate, preparation method thereof and display device
US11069758B2 (en) Organic light-emitting diode display substrate, method for manufacturing organic light-emitting diode display substrate and display device
CN112909019A (en) Array substrate, preparation method of array substrate and display device
CN113963668A (en) Display device and driving method thereof
EP4336987A1 (en) Display substrate and manufacturing method therefor, and display device
KR100759411B1 (en) Exposure method and method of manufacturing organic light emitting display using the same
US11594681B2 (en) Mask and method of manufacturing mask
US20230255092A1 (en) Display Substrate, Manufacturing Method of Same, and Display Apparatus
EP4297550A1 (en) Display substrate and display apparatus
CN111312780B (en) Display panel with high aperture opening ratio, manufacturing method thereof and display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant