CN111786390B - Vector repetition control method and system based on harmonic sequence extraction - Google Patents

Vector repetition control method and system based on harmonic sequence extraction Download PDF

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CN111786390B
CN111786390B CN202010513515.7A CN202010513515A CN111786390B CN 111786390 B CN111786390 B CN 111786390B CN 202010513515 A CN202010513515 A CN 202010513515A CN 111786390 B CN111786390 B CN 111786390B
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CN111786390A (en
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彭力
胡科
陈慢林
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Huazhong University of Science and Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01—Arrangements for reducing harmonics or ripples
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/18—Arrangements for adjusting, eliminating or compensating reactive power in networks
    • H02J3/1821—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators
    • H02J3/1835—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators with stepless control
    • H02J3/1842—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators with stepless control wherein at least one reactive element is actively controlled by a bridge converter, e.g. active filters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2203/00—Indexing scheme relating to details of circuit arrangements for AC mains or AC distribution networks
    • H02J2203/20—Simulating, e g planning, reliability check, modelling or computer assisted design [CAD]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30—Reactive power compensation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40—Arrangements for reducing harmonics

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Abstract

The invention discloses a vector repetitive control method and a vector repetitive control system based on harmonic sequence extraction, wherein the method comprises the steps of carrying out harmonic sequence extraction on load current to obtain each harmonic sequence signal; respectively carrying out vector repetition control on each harmonic sequence signal; and superposing the output obtained by each vector repetitive control, obtaining six PWM signals through pulse width modulation, inputting the PWM signals to the gate of the IGBT switching tube of the three-phase bridge arm to control the on-off of the IBGT switching tube, and enabling the converter to output expected current. The invention separates the traditional repetitive control system into a plurality of relatively independent control loops according to the harmonic sequence, thereby remarkably accelerating the dynamic response speed of the system.

Description

Vector repetition control method and system based on harmonic sequence extraction
Technical Field
The invention belongs to the field of power electronics, and particularly relates to a vector repetition control method and system based on harmonic sequence extraction.
Background
As a mature control method of the power electronic converter, the repetitive control can track or suppress the periodic signal without a static error, but one of the main defects is that the dynamic response is too slow. To solve this problem, a number of control methods have been studied and proposed. One method in the prior art is to use Proportional-integral multiple quasi-resonant Repetitive control (PIMR-RC), and achieve the purpose of modifying an original control object by connecting a Proportional gain in parallel on the basis of the traditional Repetitive control, thereby accelerating the dynamic response and the overall stability of the control system. However, the method does not make any changes to the interior of the repetitive controller, so that the method still has difficulty in achieving satisfactory dynamic effects in the context that the dynamic response of the overall control system mainly depends on the repetitive controller. Another method in the prior art is to use a general Parallel configuration of n internal model Repetitive control (PSRC), in which each internal model is used to track or eliminate all internal models in the (nk + i) (i ═ 0,1, …, n-1) sequenceThere are harmonics. The method adjusts the control gain k of each internal model according to the distribution of harmonic waves in specific application occasionsiThe effect of accelerating the dynamic response of the control system is achieved. But if each sequence of harmonics is considered equally, i.e. all kiWhen equal, the dynamic response of the PSRC is substantially consistent with conventional repetitive control.
In addition, when the harmonic problem of the power system needs to be handled, harmonic extraction also plays an important role. To date, many harmonic extraction methods have been studied and proposed, among which the mainstream methods include: a second-order generalized integral method, a cascade delay signal elimination method, an instantaneous reactive power theory-based method, a sliding window discrete Fourier transform method, a generalized discrete Fourier transform method and the like. However, these methods all have their own limitations: the second-order generalized integral method requires a trade-off between steady-state and dynamic response; the cascaded delayed signal elimination method increases the complexity and the calculation burden of the system; harmonic extraction based on the instantaneous reactive theory lacks selectivity; both the sliding window discrete fourier transform method and the generalized discrete fourier transform method require different operators to be established for each harmonic, thereby increasing the complexity of the system.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide a vector repetitive control method and a vector repetitive control system based on harmonic sequence extraction, and aims to solve the problem that the repetitive control dynamic response is too slow in the prior art.
In order to achieve the above object, the present invention provides a vector repetition control method based on harmonic sequence extraction, which mainly comprises:
carrying out harmonic sequence extraction on the load current to obtain each harmonic sequence signal;
respectively carrying out vector repetition control on each harmonic sequence signal;
the outputs obtained by repeated control of each vector are superposed, six PWM signals are obtained through pulse width modulation, and the PWM signals control the on-off of the IBGT switching tube, so that the converter outputs expected current to compensate harmonic components in load current, and the originally distorted power grid current tends to be sinusoidal.
Preferably, the harmonic sequence extraction of the load current specifically includes:
and extracting harmonic components in the load current according to the harmonic sequence, and based on a trigonometric function delay signal elimination principle, extracting all harmonic components in a plurality of expected harmonic sequences together by using a subset harmonic sequence extraction operator. The s-domain transfer function of the subset harmonic sequence extraction operator is expressed by a formula as follows:
Figure GDA0003182652070000021
wherein T is the fundamental period, omega 02 pi/T is the fundamental angular frequency; m, p, mi、piAre all integers that can be chosen manually, but must ensure that (m)ik+pi) The subharmonic sequence is a subset sequence of (mk + p) subharmonic sequences (k is an arbitrary integer). The subset harmonic sequence extraction operator may extract only (m) from the (mk + p) subharmonic sequenceik+pi) The sub-harmonic sequence while the other harmonics are completely filtered out.
Preferably, the vector repetition control of each harmonic sequence signal comprises vector repetition signal generation, phase angle rotation, time delay and phase lead compensation: receiving the difference value between the extracted value of the harmonic sequence signal and the actual output value of the converter, and finishing the accumulation of error signals; performing phase correction on the accumulated error signal; delaying the corrected accumulated error signal; and finally, performing digital lead compensation.
According to another aspect of the present invention, there is provided a vector repetition control system based on harmonic sequence extraction, comprising a harmonic sequence extraction module and a vector repetition control loop connected in sequence, the vector repetition control loop comprising a vector repetition signal generator GVRSG(z), phase angle rotation module ej2πp/mDelay module z-N/mAnd a phase lead compensator c (z); the harmonic sequence extraction module is used for carrying out harmonic sequence extraction on the load current to obtain each harmonic sequence signal; vector repeat signal generator GVRSG(z) for receiving harmonic sequencesThe difference between the extracted value of the column signal and the actual output value of the converter completes the accumulation of the error signal; phase angle rotation module ej2πp/mFor phase correcting the accumulated error signal, m being T/Ta，TaIs an error accumulation period, and p is an integer; time delay module z-N/mFor delaying the corrected accumulated error signal, N-T/TsT is the fundamental period, TsIs a sampling period; the phase lead compensator c (z) is used to realize digital lead compensation, make the converter output the desired current, and ensure the stability of the whole control system.
The z-domain transfer function of the vector repeat signal generator in the vector repeat control loop is formulated as:
Figure GDA0003182652070000031
wherein T is the fundamental period, TaFor the error accumulation period, p is an integer, and N is T/Ts，TsIs the sampling period. To get h ═ T/Ta) The k + p harmonic components produce an additive effect, TaThe value of p and p can be arbitrarily adjusted. Compared with the conventional repetitive control signal generator (i.e. when T isaT, p is 0) the error accumulation period of the vector repeat signal generator is shortened and a matching phase angle rotation module is added
Figure GDA0003182652070000032
Therefore, the error accumulation speed is higher, and the signal is T/T of the traditional repetitive control signal generatoraAnd (4) doubling.
Through the technical scheme, compared with the prior art, the invention has the following beneficial effects:
1. the invention separates the traditional repetitive control system into a plurality of relatively independent control loops according to the harmonic sequence, thereby remarkably accelerating the dynamic response speed of the system;
2. the invention improves the internal model of the traditional repetitive controller and shortens the error accumulation period, thereby improving the dynamic response of the system without any other composition of instantaneous feedback control;
3. the vector repetitive control method provided by the invention has high steady-state gain as the traditional repetitive control method, so that the steady-state precision is not lost. Compared with the traditional repetitive control method, the vector repetitive control method does not increase the number of digitally controlled storage units;
4. the harmonic sequence extraction method can extract all harmonic components of a plurality of harmonic sequences with few calculation modules and low cost, and embodies high extraction efficiency.
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FIG. 1 is a schematic diagram of a vector repeat control loop provided by the present invention;
fig. 2 is a schematic diagram of a three-phase parallel active power filter system in an embodiment of the invention;
FIG. 3 is a schematic diagram of harmonic sequence extraction in the present invention;
FIG. 4 is a schematic diagram of a vector repetition control system based on harmonic sequence extraction according to an embodiment of the present invention;
FIG. 5(a) is a dynamic simulation result of harmonic extraction when the harmonic sequence extraction method is adopted, under the condition that the load is suddenly increased from half load to full load;
FIG. 5(b) is a dynamic simulation result of harmonic extraction when the harmonic sequence extraction method is adopted, under the condition that the load is suddenly reduced from full load to half load;
FIG. 6(a) is a dynamic simulation result of harmonic tracking when the load is suddenly increased from half-load to full-load by using the conventional repetitive control method;
FIG. 6(b) is a dynamic simulation result of harmonic tracking when the load is suddenly reduced from full load to half load by using the conventional repetitive control method;
FIG. 7(a) is a harmonic tracking dynamic simulation result when the load is suddenly increased from half-load to full-load by using the vector repetitive control method based on harmonic sequence extraction of the present invention;
fig. 7(b) is a harmonic tracking dynamic simulation result when the load is suddenly reduced from full load to half load by using the vector repetitive control method based on harmonic sequence extraction provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The invention achieves the effect of accelerating the dynamic process by modifying the internal model of repeated control. In addition, the method also comprises a new Harmonic Extraction method, which is a Harmonic Sequence Extraction (HSE) based on Trigonometric Function Delay Signal Cancellation (TFDSC) principle. Both the harmonic sequence extraction and the Vector Repetitive Control (VRC) in the present invention can be applied in many applications. In the embodiment of the invention (three-phase parallel active power filter), the dynamic response of the whole system is accelerated by applying the vector repetition control method based on harmonic sequence extraction provided by the invention.
According to the present invention, the principles of vector repetition control and harmonic sequence extraction are first introduced in order. One of the main drawbacks of Repetitive Control is slow dynamic response, which is solved by the present invention by modifying the internal model (Repetitive signal Generator) of the conventional Repetitive Control to a Vector Repetitive Signal Generator (VRSG). The z-domain transfer function of the vector repetition signal generator can be written as:
Figure GDA0003182652070000051
wherein T is the fundamental period, TaIs defined as an error accumulation period, p is an integer, and N is T/Ts，TsIs the sampling period. As can be seen from (1), the vector repetition signal generator may be paired with (h ═ T/T)a) k + p) sub-harmonicWave advancing period is TaAnd (4) accumulating. Thus, by changing TaThe value of sum p may be accumulated for a particular sequence of harmonics. For example, when TaWhen T and p are 0, equation (1) is the internal model of the conventional repetitive controller. Therefore, the accumulation speed of the error of the vector repeated signal generator is known to be that of the traditional repeated controller (T/T)a) And (4) doubling.
Figure 1 shows a block diagram of a vector repeat control loop incorporating such a vector repeat controller. In FIG. 1, yref(z) is a reference instruction, e (z) is a tracking error, d (z) is an external disturbance, y (z) is an output, P (z) is a control object, G (z) is a control objectVRC(z) is a vector repeat controller. To track or suppress (h-mk + p,
Figure GDA0003182652070000061
) Sub-harmonic, one complete vector-repeat controller GVRC(z) comprises: vector repeat signal generator GVRSG(z), filter Q (z) for increasing system robustness, phase angle rotation module e matched with signal generatorj2πp/mAnd a delay module z-N/m(m＝T/Ta，N＝T/Ts，TsIs the sampling period), and a phase lead compensator c (z). Note that the phase angle rotation module ej2πp/mIn general, a complex number, so that only if the input quantity is a vector (u)iαβ＝uiα+juiβ) Time vector repetition controller GVRC(z) makes sense, so this type of repetitive controller is called a vector repetitive controller. According to FIG. 1, e (z) and y can be obtainedrefThe transfer function between (z) and d (z) is as follows:
Figure GDA0003182652070000062
wherein,
H(z)＝Q(z)-C(z)Pe(z) (3)
Figure GDA0003182652070000063
Pe(z) is the equivalent control object of the embedded repetitive controller.
Note that equation (2) can be rewritten as follows:
(1+P(z))e(z)(zN/m-ej2πp/mH(z))＝(zN/m-Q(z)ej2πp/m)(yref(z)-d(z)) (5)
for the (h ═ mk + p) subharmonic, consider an ideal case: q (z) 1, yref(z) and d (z) are both maintained fully periodic, i.e. with (A), (B), (C), (D), (C) and C)
Figure GDA0003182652070000064
ω0For fundamental angular frequency)
Figure GDA0003182652070000065
In this case, equation (4) can be simplified as follows:
Figure GDA0003182652070000071
such a conclusion can be drawn from equation (6): the magnitude of the tracking error e (z) at each sample point will decay to | h (z) | times the previous value every time N/m sample points are passed. The N/m sampling points are as follows in the time domain: (N/m). times.TsT/m, exactly the error accumulation period T of the model in the vector repeat controllera。
The harmonic sequence extraction method is based on the trigonometric function delayed signal cancellation principle (TFDSC), which can be shown by the following formula:
Figure GDA0003182652070000072
wherein, ω 0 ═ 2 pi/T is the fundamental angular frequency. As can be seen from (7), the TFSDC module can completely eliminate (h ═ mk + p) subharmonics. Suppose that (h ═ mk + p) harmonic sequence is composed of q sub-harmonic sequences (h)i＝mik+pi, i＝1,2,…,q；
Figure GDA0003182652070000073
) The composition is as follows:
Figure GDA0003182652070000074
according to equation (8), a Subset Harmonic Sequence Extraction operator (Sub-HSE) is defined as follows:
Figure GDA0003182652070000075
applying Taylor's formula to formula (9) when s → j ω0(mik+pi) Then, one can obtain:
Figure GDA0003182652070000076
as shown in the formula (10), any sub-harmonic sequence (h)i＝mik+pi) It can be extracted from the total harmonic sequence (h ═ mk + p) by such a Sub-HSE operator, and contains no other Sub-harmonic sequences at all. Still further, it is seen that in a specific embodiment, flexible harmonic extraction can be achieved by the cooperation of the TFDSC module and Sub-HSE module.
Fig. 2 shows a main circuit diagram of a three-phase parallel Active Power Filter (SPAF) using the control method of the present invention. As shown in FIG. 2, the main circuit includes a utility grid, a nonlinear load, and a parallel type active power filter system (harmonic extraction and current-voltage control module, phase locked loop, PWM generation module, three-phase full-bridge inverter circuit, LCL output filter, and passive damping resistor Rd). Wherein L isgRepresenting the grid inductance, L1、C、L2Respectively, inductance and capacitance in the LCL output filter, LrRepresenting an inductive load, R1、R2Representing a resistive load. The function of the SAPF system is to track the load current as accurately as possibleilabcOutput harmonic current ifabcThereby inducing a grid current igabcAnd a Common connection Point (PCC) voltage upccabcTending to be sinusoidal. In the SAPF system, the DC capacitor voltage is controlled by the voltage controller GdcFormed voltage control loop to regulate, CdcIs a DC side capacitor, VdcIs the actual DC capacitor voltage, VrefFor a DC voltage reference, a voltage controller GdcAs the active current amplitude reference value IdInputting the current into the current control system as part of the total current reference value; grid phase thetagProvided by a Phase Locked Loop (PLL). The s-domain transfer function of the SAPF system control object is given here as follows:
Figure GDA0003182652070000081
note that, when performing control in the digital domain, it is necessary to discretize the control object into a zero-order keeper, and to take into account the influence of the digital delay lag of one beat, that is:
Figure GDA0003182652070000082
FIG. 3 shows the detection of the three-phase load current i by the current HalllabcThen, the load current is input into the harmonic sequence extractor for harmonic extraction. As shown in fig. 3, consider the worst grid conditions, i.e. all harmonics are contained in the load current (h-k,
Figure GDA0003182652070000083
). The objective of harmonic sequence extraction (TFDSC-HSE) is to extract all the non-fundamental positive sequence components in the load current. Before extracting the harmonic sequence, the three-phase load current i is firstly ledlabcConverting into an alpha beta two-phase stationary coordinate system through a Clark conversion module, namely:
Figure GDA0003182652070000084
order to
Figure GDA0003182652070000085
Where j is an imaginary unit. Then, will
Figure GDA0003182652070000086
Inputting a trigonometric function delayed signal cancellation module (TFDSC) which uses T/2 time to cancel
Figure GDA0003182652070000091
Odd harmonics in (1)
Figure GDA0003182652070000092
All filtering to obtain even harmonic
Figure GDA0003182652070000093
Then pass through
Figure GDA0003182652070000094
Obtaining odd harmonics
Figure GDA0003182652070000095
Note that the odd harmonics also include a fundamental positive sequence component. Therefore, it is also necessary to divide the odd harmonics (h ═ 2k +1) into 6 subsequences: h 4k-1, h 8k-3, h 16k-7, h 32k-15, h 64k-31 and h 64k + 1. Wherein, the first 5 subsequences can be extracted simultaneously by the subset harmonic sequence extraction operator (Sub-HSE), taking T/2 time. And h-64 k +1 does not have to be extracted because the fundamental positive sequence component is contained and the remaining components belong to negligible higher harmonics. Therefore, harmonic sequence extraction (TFDSC-HSE) requires T/2 and T, respectively, to extract all even harmonics and most odd harmonics. It should be noted that the harmonic sequence extractor in fig. 3 is only a specific example in this embodiment, and in other applications, the parameters of the harmonic sequence extractor may be specifically designed according to requirements.
FIG. 4 shows the use of the present inventionProvided is a harmonic extraction and current control system block diagram in vector repetition control based on harmonic sequence extraction. As shown in fig. 4, the even harmonic obtained by extraction
Figure GDA0003182652070000096
And odd harmonics
Figure GDA0003182652070000097
(does not contain the positive sequence component of the fundamental wave) as a reference instruction, and the reference instruction is respectively input into an even vector repetition controller and an odd vector repetition controller for control. Wherein, the filter Q (z) is alpha1z+α0+α1z-1(2α1+α0＝1，α0≥0，α1Not less than 0); the phase lead compensator c (z) requires: equivalent control object P at low frequenciese(z) normalized compensation, i.e. C (z) Pe(z) ≈ 1 ≈ 0 °, and equivalent control object P at high frequencyeThe amplitude of (z) is effectively attenuated to maintain system stability.
In order not to lose generality, Pe(z) can be expressed in the form:
Figure GDA0003182652070000098
wherein d is Pe(z) known delayed beats, A (z) is a denominator polynomial, and B (z) is a numerator polynomial. B is+(z) and B-The roots of (z) each represent Pe(z) zero points that can be eliminated and cannot be eliminated. Thus, Pe(z) there is an "inverse function" of the form:
Figure GDA0003182652070000099
wherein
Figure GDA00031826520700000910
To obtain sufficient stability margin, c (z) is finally selected as follows:
Figure GDA0003182652070000101
where S (z) is a Tustin discrete form of a second order Butterworth low pass filter.
As can be seen from fig. 4, the control method provided by the present invention first splits all harmonic components in the load current according to a harmonic sequence, and then each harmonic sequence is input into a corresponding vector repetitive controller. The control loops for each harmonic sequence are relatively independent because they have their own instructions. That is, the control method in the present invention realizes synchronous tracking of a plurality of harmonic sequences. And as mentioned above, the error accumulation period of the mode in the control loop corresponding to each harmonic sequence is T/m. Therefore, the dynamic response speed of the whole control system is basically consistent with that of each harmonic sequence control loop. Therefore, compared with the traditional repeated control, the control method provided by the invention can achieve the effect of remarkably improving the dynamic response speed.
Referring to fig. 5(a) and 5(b), the harmonic sequence extraction method proposed by the present invention requires T/2 and T to extract all even harmonic components and most odd harmonic components, respectively. Wherein, texThe time taken for the detection of the harmonics is indicated,
Figure GDA0003182652070000102
a detection value representing an odd-order harmonic current,
Figure GDA0003182652070000103
representing the sensed value of the even harmonic current. Without changing other control parameters in the embodiment, referring to fig. 6(a) and 6(b), when the conventional repetitive control method is adopted, about 2.25T is required to make the whole control system reach a new steady state in the case of load sudden increase and load sudden decrease. Wherein, tCRCsIndicating the adjustment time of a conventional repetitive control, ifaeRepresenting the instantaneous value of the harmonic current error. Referring to fig. 7(a) and 7(b), the harmonic-based sequence extraction proposed by the present invention is employedWhen the control method is repeated by using the vector, only about 1.25T is needed to enable the whole control system to reach a new steady state under the conditions of sudden increase and sudden decrease of the load. Wherein, tVRCsIndicating the adjustment time for the vector repeat control. In summary, the vector repetitive control method based on harmonic sequence extraction provided by the invention can significantly improve the dynamic response speed of the conventional repetitive control.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (2)

1. A vector repetition control method based on harmonic sequence extraction is characterized by comprising the following steps:
carrying out harmonic sequence extraction on the load current to obtain each harmonic sequence signal; the method specifically comprises the following steps:
extracting harmonic components in the load current according to the harmonic sequence, and based on a trigonometric function delay signal elimination principle, extracting all harmonic components in a plurality of expected harmonic sequences together by using a subset harmonic sequence extraction operator, wherein an s-domain transfer function of the subset harmonic sequence extraction operator is expressed by a formula:
Figure FDA0003299461980000011
wherein T is the fundamental period, omega02 pi/T is the fundamental angular frequency; m, p, mi、piAre all integers, and (m)ik+pi) The subharmonic sequence is a subset sequence of (mk + p) subharmonic sequences, q is the number of the subset sequences, and k is any integer;
and respectively carrying out vector repetition control on each harmonic sequence signal, wherein the vector repetition control comprises vector repetition signal generation, phase angle rotation, time delay and phase lead compensation: receiving the difference value between the extracted value of the harmonic sequence signal and the actual output value of the converter, and finishing the accumulation of error signals; performing phase correction on the accumulated error signal; delaying the corrected accumulated error signal; finally, performing digital lead compensation; the z-domain transfer function of the vector repetition signal generator used for generating the vector repetition signal is formulated as:
Figure FDA0003299461980000012
wherein T is the fundamental period, TaFor error accumulation period, p is an integer, N ═ T/Ts，TsIs a sampling period;
the delay module adopted by the delay is expressed as z by a formula-N/m，m＝T/Ta，TaAn error accumulation period;
and superposing the output obtained by each vector repetitive control, and obtaining a PWM signal through pulse width modulation, wherein the PWM signal controls the on-off of an IBGT switching tube to enable the converter to output expected current.
2. A vector repetition control system based on harmonic sequence extraction is characterized by comprising a harmonic sequence extraction module and a vector repetition control loop which are sequentially connected;
the harmonic sequence extraction module is used for carrying out harmonic sequence extraction on the load current to obtain each harmonic sequence signal; the harmonic sequence extraction module extracts harmonic components in the load current according to the harmonic sequence, divides the load current into odd harmonic current and even harmonic current based on a trigonometric function delay signal elimination principle, extracts all harmonic components in a plurality of expected harmonic sequences from the odd harmonic current by utilizing a subset harmonic sequence extraction operator, and forms an extraction value of the harmonic current together with the even harmonic current, wherein an s-domain transfer function of the subset harmonic sequence extraction operator is expressed by a formula as follows:
Figure FDA0003299461980000021
wherein T is the fundamental period, omega02 pi/T is the fundamental angular frequency; m, p, mi、piAre all integers, and (m)ik+pi) The subharmonic sequence is a subset sequence of (mk + p) subharmonic sequences, q is the number of the subset sequences, and k is any integer;
the vector repetition control loop is used for respectively carrying out vector repetition control on the harmonic sequence signals and comprises a vector repetition signal generator GVRSG(z), phase angle rotation module ej2πp/mDelay module z-N/mAnd a phase lead compensator c (z); the vector repetition signal generator GVRSG(z) a difference value between the extracted value of the harmonic sequence signal and the actual output value of the converter is received, and accumulation of error signals is completed; the phase angle rotation module ej2πp/mFor phase correcting the accumulated error signal, m being T/Ta，TaIs an error accumulation period, and p is an integer; the delay module z-N/mFor delaying the corrected accumulated error signal, N-T/TsT is the fundamental period, TsIs a sampling period; the phase lead compensator C (z) is used for realizing digital lead compensation, so that the converter outputs expected current and the stability of the whole control system is ensured; the vector repetition signal generator GVRSG(z) the z-domain transfer function is formulated as:
Figure FDA0003299461980000031
wherein T is the fundamental period, TaFor error accumulation period, p is an integer, N ═ T/Ts，TsIs a sampling period; and superposing the output obtained by each vector repetitive control, and obtaining six PWM signals through pulse width modulation, wherein the PWM signals control the on-off of an IBGT switching tube to enable the converter to output expected current.
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