CN111785853A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN111785853A
CN111785853A CN202010789153.4A CN202010789153A CN111785853A CN 111785853 A CN111785853 A CN 111785853A CN 202010789153 A CN202010789153 A CN 202010789153A CN 111785853 A CN111785853 A CN 111785853A
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China
Prior art keywords
display panel
light emitting
layer
optical component
emitting device
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Granted
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CN202010789153.4A
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Chinese (zh)
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CN111785853B (en
Inventor
马扬昭
夏志强
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Wuhan Tianma Microelectronics Co Ltd
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Wuhan Tianma Microelectronics Co Ltd
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Priority to CN202010789153.4A priority Critical patent/CN111785853B/en
Priority to CN202211335825.XA priority patent/CN115843201A/en
Publication of CN111785853A publication Critical patent/CN111785853A/en
Priority to US17/103,959 priority patent/US11659741B2/en
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Publication of CN111785853B publication Critical patent/CN111785853B/en
Priority to US18/156,376 priority patent/US20230165088A1/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0238—Improving the black level
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors

Abstract

The invention provides a display panel and a display device, wherein a display area of the display panel comprises an optical component area and a conventional display area, and the optical component area and the conventional display area both comprise light-emitting devices, so that the area of the display area is larger, and the full-screen display trend is met. And in optical component district department, transparent conducting layer includes first slot and the second slot in pairs, be located connecting wire between first slot in pairs and the second slot in pairs and be located the auxiliary layer outside first slot in pairs and the second slot in pairs, when realizing the signal transmission purpose through connecting wire, through the design that keeps the auxiliary layer to transparent conducting layer slot, can also guarantee that transparent conducting layer is higher in optical component district's integrality, make transparent conducting layer higher in the printing opacity homogeneity of optical component district department, the printing opacity homogeneity in light-permeable district in the optical component district has been improved, and then improve the corresponding optical device in optical component district and gather the image effect.

Description

Display panel and display device
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
The development of display technology is changing day by day, and the emergence of various screen technologies provides infinite possibilities for electronic terminals. Particularly, a display technology represented by an Organic Light-Emitting Diode (OLED) is rapidly applied, and various mobile terminals using a full screen, a special-shaped screen, an under-screen sounding, an under-screen fingerprint, and the like as selling points begin to be rapidly popularized. Various manufacturers of large mobile phones and panels have provided a lot of products taking a 'full screen' as a selling point, but most of the products adopt the design of a 'Liuhai screen', a 'water drop screen' and the like similar to the full screen, because the mobile terminal has a front camera, a certain area needs to be reserved for the mobile terminal, so that the mobile terminal has an choice; that is, the display area of the conventional display panel is low in occupancy. In order to solve the problem of low display area, technicians develop a technology that a display interface is completely covered by a display screen, namely, a photosensitive element adopts an off-screen design. Although the display panel of the prior photosensitive element under the screen increases the screen occupation ratio, the imaging effect is poor.
Disclosure of Invention
In view of this, the present invention provides a display panel and a display device, which effectively solve the technical problems in the related art, and improve the uniformity of light transmission in the light-transmitting area in the optical component area, thereby improving the image acquisition effect of the corresponding optical device in the optical component area.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
a display panel, comprising:
a plurality of pixels including a first pixel including a first light emitting device and a first pixel circuit connected to each other and a second pixel including a second light emitting device and a second pixel circuit connected to each other;
a display area including an optical component area and a normal display area, the first light emitting device being located in the optical component area, the second light emitting device being located in the normal display area, the optical component area having a light emitting device density less than a light emitting device density of the normal display area;
at least one transparent conductive layer including a pair of first and second slits, a connection wire between the pair of first and second slits, and an auxiliary layer outside the pair of first and second slits, in the optical member region.
Correspondingly, based on the same inventive concept, the invention also provides a display device, which comprises the display panel.
Compared with the related art, the technical scheme provided by the invention at least has the following advantages:
the invention provides a display panel and a display device, wherein a display area of the display panel comprises an optical component area and a conventional display area, and the optical component area and the conventional display area both comprise light-emitting devices, so that the area of the display area is larger, and the full-screen display trend is met. And in optical component district department, transparent conducting layer includes first slot and the second slot in pairs, be located connecting wire between first slot in pairs and the second slot in pairs and be located the auxiliary layer outside first slot in pairs and the second slot in pairs, when realizing the signal transmission purpose through connecting wire, through the design that keeps the auxiliary layer to transparent conducting layer slot, can also guarantee that transparent conducting layer is higher in optical component district's integrality, make transparent conducting layer higher in the printing opacity homogeneity of optical component district department, the printing opacity homogeneity in light-permeable district in the optical component district has been improved, and then improve the corresponding optical device in optical component district and gather the image effect.
Drawings
In order to more clearly illustrate the embodiments of the present invention or technical solutions in related arts, the drawings used in the description of the embodiments or related arts will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a notch according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention;
FIG. 7 is a timing diagram according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 9 is another timing diagram provided by an embodiment of the present invention;
fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 13 is a schematic view of a cathode connection structure of an optical component area according to an embodiment of the present invention;
fig. 14 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 15 is a schematic view of a cathode connection structure of another optical component area provided in accordance with an embodiment of the present invention;
fig. 16 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 17 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 18 is a schematic diagram illustrating a connection between an auxiliary layer and a power supply voltage signal line according to an embodiment of the present invention;
FIG. 19 is a schematic diagram illustrating a connection between an auxiliary layer and a reference voltage signal line according to an embodiment of the present invention;
FIG. 20 is a schematic diagram illustrating a floating structure of an auxiliary layer according to an embodiment of the present invention;
fig. 21 is a schematic structural diagram of another display panel according to an embodiment of the invention;
fig. 22 is a schematic structural diagram of another display device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
As described in the background, the display area of the conventional display panel is low. In order to solve the problem of low display area, technicians develop a technology that a display interface is completely covered by a display screen, namely, a photosensitive element adopts an off-screen design. Although the display panel of the prior photosensitive element under the screen increases the screen occupation ratio, the imaging effect is poor.
In view of this, embodiments of the present invention provide a display panel and a display device, which effectively solve technical problems in the related art, and improve the uniformity of light transmission in a light transmission region in an optical component region, thereby improving the image acquisition effect of a corresponding optical device in the optical component region.
To achieve the above object, the technical solutions provided by the embodiments of the present invention are described in detail below, specifically with reference to fig. 1 to 22.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention. The display panel provided by the embodiment of the invention comprises:
a plurality of pixels including a first pixel including the first light emitting device 110 and the first pixel circuit 120 connected to each other and a second pixel including the second light emitting device 210 and the second pixel circuit 220 connected to each other.
A display area including an optical component area 101 and a regular display area 102, the first light emitting device 110 being located in the optical component area 101, the second light emitting device 210 being located in the regular display area 102, the optical component area 101 having a light emitting device density smaller than that of the regular display area 102.
At least one transparent conductive layer, in the optical component region 101, the transparent conductive layer 300 includes a pair of first slits 310 and second slits 320, a connecting wire 330 between the pair of first slits 310 and second slits 320, and an auxiliary layer 340 outside the pair of first slits 310 and second slits 320.
As can be seen from fig. 1, in the transparent conductive layer 300 provided in the embodiment of the present invention, where the optical component region 101 corresponds to, a pair of the first notch 310 and the second notch 320 is obtained by notching the transparent conductive layer 300, so as to obtain a connection wire 330 located between the pair of the first notch 310 and the second notch 320; and after the transparent conductive layer 300 is slit at the position corresponding to the optical component area 101, the outer side of the whole structure of the paired first slit 310 and second slit 320 and the connecting wire 330 is the transparent auxiliary layer 340.
In an embodiment of the invention, the transparent conductive layer 300 may be scribed multiple times at the optical component area 101 to obtain multiple connecting wires, so as to meet the requirement of more signal transmission. That is, the transparent conductive layer provided in the embodiment of the present invention includes a plurality of first slits 310 and second slits 320, a connecting wire 330 between the pair of first slits 310 and second slits 320, and an auxiliary layer 340 outside the pair of first slits 310 and second slits 320 (that is, the transparent conductive layer includes an auxiliary layer in addition to the first slits, the second slits, and the connecting wire, wherein the auxiliary layer and the connecting wire may be formed in the same layer, the same material, and the same process). When the transparent conductive layer provided in the embodiment of the present invention includes a plurality of connecting wires, the cuts between two adjacent connecting wires may be two independent cuts, and the cuts between two adjacent connecting wires may also be multiplexed with each other (i.e., the cuts are used as both the cut of one connecting wire of two adjacent connecting wires and the cut of another connecting wire of the two adjacent connecting wires), which does not specifically limit the present invention.
It can be understood that the display area of the display panel provided by the embodiment of the invention comprises the optical component area and the conventional display area, and the optical component area and the conventional display area both comprise the light-emitting device, so that the area of the display area is larger, and the full-screen display trend is met. And in optical component district department, transparent conducting layer includes first slot and the second slot in pairs, be located connecting wire between first slot in pairs and the second slot in pairs and be located the auxiliary layer outside first slot in pairs and the second slot in pairs, when realizing the signal transmission purpose through connecting wire, through the design that keeps the auxiliary layer to transparent conducting layer slot, can also guarantee that transparent conducting layer is higher in optical component district's integrality, make transparent conducting layer higher in the printing opacity homogeneity of optical component district department, the printing opacity homogeneity in light-permeable district in the optical component district has been improved, and then improve the corresponding optical device in optical component district and gather the image effect.
Optionally, when the display panel provided in the embodiment of the present invention includes a plurality of transparent conductive layers, in a direction perpendicular to a plane of the display panel, at least one first notch and/or at least one second notch of one of the transparent conductive layers overlaps with an auxiliary layer of at least one of the remaining transparent conductive layers; that is, when the display panel provided by the embodiment of the present invention includes a plurality of transparent conductive layers, an insulating isolation layer is disposed between two adjacent transparent conductive layers, wherein in a direction perpendicular to a plane of the display panel (i.e., an overlapping direction of the plurality of transparent conductive layers), a first notch of at least one transparent conductive layer overlaps with an auxiliary layer of at least one of the remaining transparent conductive layers, or a second notch of at least one transparent conductive layer overlaps with an auxiliary layer of at least one of the remaining transparent conductive layers, or the first notch and the second notch of at least one transparent conductive layer are uniform and overlap with an auxiliary layer of at least one of the remaining transparent conductive layers. Specifically, as shown in fig. 2, for a schematic structural diagram of another display panel provided in the embodiment of the present invention, in fig. 2, taking the example that the display panel includes a first transparent conductive layer 3010 and a second transparent conductive layer 3020, an insulating isolation layer 3030 is disposed between the first transparent conductive layer 3010 and the second transparent conductive layer 3020, where the first transparent conductive layer 3010 and the second transparent conductive layer 3020 each include a pair of first slits 310 and second slits 320, and a connection wire 330 is disposed between the pair of first slits 310 and second slits 320; the first slits 310 and the second slits 320 of the first transparent conductive layer 3010 overlap with the auxiliary layer 340 of the second transparent conductive layer 3020, and the first slits 310 and the second slits 320 of the second transparent conductive layer 3020 overlap with the auxiliary layer 340 of the first transparent conductive layer 3010.
It can be understood that, by overlapping or even covering the notches included in the different transparent conductive layers, the thickness of the transparent conductive layer corresponding to the notch included in each transparent conductive layer in the direction perpendicular to the plane of the display panel is substantially consistent, and the occurrence of the condition that the transmission uniformity is affected due to the overlarge difference between the thicknesses of the transparent conductive layers corresponding to the different notches is avoided.
It should be noted that the optical component area provided in the embodiment of the present invention may be provided with an optical component such as a camera, and the present invention is not particularly limited, and needs to be specifically designed according to practical applications. Fig. 3 is a schematic structural diagram of a display device, where the display device includes a display panel 1 and an optical device 2, where the display panel 1 includes an optical component area 101, the optical device 2 is disposed on a non-light-emitting side of the display panel 1, and the optical device 2 is correspondingly disposed at the optical component area 101. Alternatively, the optical device 2 may be a camera.
As shown in fig. 1, the first light emitting device 110 and the first pixel circuit 120 provided by the embodiment of the invention may be disposed at the optical component area 101; and the second light emitting device 210 and the second pixel circuit 220 provided by the embodiment of the invention are disposed at the regular display region 102. Or the first light emitting device provided by the embodiment of the invention may be disposed at the optical component area, and the first pixel circuit connected to the first light emitting device may be disposed outside the optical component area, for example, at the regular display area, and the same second light emitting device and second pixel circuit are disposed at the regular display area; specifically, referring to fig. 4, a schematic structural diagram of another display panel provided in an embodiment of the present invention is shown, where the display panel includes a display area, and the display area includes an optical component area 101 and a conventional display area 102, where the first light emitting device 110 is located in the optical component area 101, and the first pixel circuit 120 connected to the first light emitting device 110 is located outside the optical component area 101, so as to further increase a light transmission area of the optical component area, and ensure that an image collecting effect of the optical device, which is located at the optical component area, of the display panel is high. Alternatively, the first pixel circuit connected to the first light emitting device may be located between the conventional display area and the optical member area, or the first pixel circuit connected to the first light emitting device may be located in the conventional display area, to which the present invention is not particularly limited. Optionally, the optical component area 101 comprises a plurality of first light emitting devices 110.
Referring to fig. 5, which is a schematic structural diagram of a notch according to an embodiment of the present invention, in the transparent conductive layer according to the embodiment of the present invention, at least one side edge of at least one of the first notch 310 and the second notch 320 is a wavy line.
It can be understood that, in at least one of the first notch and the second notch provided in the embodiments of the present invention, at least one side of the first notch and the second notch is made into a wavy line shape, so that the diffraction condition at the notch can be improved; in the first notch provided by the embodiment of the invention, one side line or two side lines vertical to the extending direction of the first notch are made into a wavy line shape; or, in the second notch provided in the embodiment of the present invention, one side line or two side lines perpendicular to the extending direction of the second notch are made into a wavy line shape; alternatively, in the first notch provided in the embodiment of the present invention, one side edge or both side edges in a direction perpendicular to the extending direction thereof are made in a wavy line shape, and in the second notch, one side edge or both side edges in a direction perpendicular to the extending direction thereof are made in a wavy line shape. Optionally, the first notch and the second notch provided by the embodiment of the present invention are located at the connecting wire between the first notch and the second notch, and the first notch and the second notch are formed towards the side edge of the connecting wire between the first notch and the second notch as a wavy line, so that not only can the diffraction condition of the notch at the side edge of the independent connecting wire be improved, but also the diffraction condition of the notch at the adjacent connecting wire can be changed.
In an embodiment of the present invention, the wavy line provided by the present invention may be a cosine line or a sine line, and the present invention is not particularly limited. The embodiment of the invention can optimize the width of the notch and the width of the connecting lead, and further improve the diffraction condition at the notch, wherein the notch width range of the first notch and/or the second notch provided by the embodiment of the invention is 2-5 μm inclusive. And the width of the connecting wire provided by the embodiment of the invention is in a range of 2-5 μm inclusive.
The pixel driving circuit provided by the embodiment of the invention is electrically connected with the light emitting device (i.e., the first pixel driving circuit is electrically connected with the first light emitting device, and the second pixel driving circuit is electrically connected with the second light emitting device), wherein the pixel driving circuit can comprise a plurality of transistors and capacitors, and the transistors and the capacitors are matched with each other to provide driving current for the light emitting device, so that the light emitting device emits light responding to the driving current. The circuit composition of the first pixel driving circuit and the second pixel driving circuit provided in the embodiment of the present invention may be the same, and referring to fig. 6, the structure schematic diagram of the pixel driving circuit provided in the embodiment of the present invention is shown, where the pixel driving circuit includes: a driving transistor T0, a reset module 10 electrically connected to the driving transistor T0, a data writing module 20, a control light emitting module 30, and a memory module 40. The reset module 10 is configured to transmit a first reference voltage Vref1 to the gate of the driving transistor T0 to reset the gate potential of the driving transistor T0; the data writing module 20 is configured to write a data voltage Vdata into a first terminal of the driving transistor T0; controlling the light emitting module 30 to transmit the driving current generated by the driving transistor T0 to the light emitting device 50 so that the light emitting device 50 emits light in response to the driving current; and the memory module 40 is used to hold the voltage at the gate of the driving transistor T0. Optionally, the display panel provided in the embodiment of the present invention is an organic light emitting display panel. Optionally, all the transistors provided by the embodiment of the present invention are thin film transistors.
As shown in fig. 6, the reset module 10 according to the embodiment of the present invention includes a reset transistor T1, a first terminal of the reset transistor T1 is connected to the first reference voltage Vref1, a gate of the reset transistor T1 is electrically connected to the first reset signal S1, and a second terminal of the reset transistor T1 is electrically connected to the gate of the driving transistor T0. The data writing module 20 includes a first data writing transistor T2 and a second data writing transistor T3, gates of the first data writing transistor T2 and the second data writing transistor T3 are both electrically connected to the first scan signal S2, a first terminal of the first data writing transistor T2 is connected to a data voltage Vdata, and a second terminal of the first data writing transistor T2 is electrically connected to a first terminal of the driving transistor T0; a first terminal of the second data writing transistor T3 is electrically connected to the gate of the driving transistor T0, and a second terminal of the second data writing transistor T3 is electrically connected to the second terminal of the driving transistor T0; the control light emitting module 30 includes a first control light emitting transistor T4 and a second control light emitting transistor T5, gates of the first control light emitting transistor T4 and the second control light emitting transistor T5 are both electrically connected to the second scan signal S3, a first end of the first control light emitting transistor T4 is connected to a first voltage, a second end of the first control light emitting transistor T4 is electrically connected to a first end of the driving transistor T0, a first end of the second control light emitting transistor T5 is electrically connected to a second end of the driving transistor T0, a second end of the second control light emitting transistor T5 is electrically connected to a first end of the light emitting device 50, and a second end of the light emitting device 50 is connected to a second voltage V2; and the storage module 40 comprises a storage capacitor C, a first plate of the storage capacitor C is connected with a first voltage V1, and a second plate of the storage capacitor C is electrically connected with the grid electrode of the driving transistor T0.
Referring to fig. 6 and fig. 7, fig. 7 is a timing diagram according to an embodiment of the present invention, in which all transistors of a pixel circuit are P-type transistors (that is, when a control signal connected to a gate of a transistor is low, the transistor is turned on, and when the control signal is high, the transistor is turned off), and an operation process of the pixel driving circuit according to the embodiment of the present invention includes a reset phase M1, a data writing phase M2, and an emitting phase M3, which are sequentially performed:
in the reset phase M1, the reset transistor T1 is turned on to transmit the first reference voltage Vref1 to the gate of the driving transistor T0, and the transistors of the data writing module 20 and the control light emitting module 30 are turned off; wherein the first reference voltage Vref1 is a voltage capable of controlling the driving transistor T0 to be turned on.
In the data writing phase M2, both the transistor controlling the light emitting module 30 and the reset transistor T1 are turned off. And the first data writing transistor T2 and the second data writing transistor T3 are turned on, the first data writing transistor T2 outputs the data voltage Vdata to the first terminal of the driving transistor T0, and the second data writing transistor T3 connects the gate and the second terminal of the driving transistor T0 to each other.
In the light emitting period M3, both the transistor of the data writing block 20 and the reset transistor T1 are turned off. And the first and second controlling light emitting transistors T4 and T5 are turned on to form a path of the first voltage V1, the first controlling light emitting transistor T4, the driving transistor T0, the second controlling light emitting transistor T5, the light emitting device 50, and the second voltage V2, the driving current generated by the driving transistor T0 is transmitted to the light emitting device 50, and the light emitting device 50 emits light in response to the driving current.
Optionally, the pixel circuit provided in the embodiment of the present invention may further include a black state maintaining module, as shown in fig. 8, which is a schematic structural diagram of another pixel circuit provided in the embodiment of the present invention, wherein the pixel circuit further includes a black state maintaining module 60 electrically connected to the light emitting device, and the black state maintaining module 60 is configured to transmit the second reference voltage Vref2 to the light emitting device 50, so as to control the light emitting device 50 to maintain a black state off state outside the light emitting phase. Specifically, as shown in fig. 8, the black status holding module 60 according to the embodiment of the invention includes a black status holding transistor T6, the gate of the black status holding transistor T6 is electrically connected to the second reset signal S4, the first terminal of the black status holding transistor T6 is connected to the second reference signal Vref2, and the second terminal of the black status holding transistor T6 is electrically connected to the first terminal of the light emitting device 50. The pixel circuit shown in fig. 8 of the present invention includes a reset phase M1, a data writing phase M2, and a light emitting phase M3 which are the same as the pixel circuit shown in fig. 6, and as shown in another timing diagram of fig. 9 provided by the embodiment of the present invention, in the reset phase M1 and the data writing phase M2, the black state holding transistor T6 is controlled to be turned on by the second reset signal S4, and then the black state holding transistor T6 transmits the second reference voltage Vref2 to the first end of the light emitting device 50 to control the light emitting device 50 to be kept in a black state off state, so as to avoid the situation that the black state is not dark in the reset phase and the data writing phase. And in the light emitting period M3, the black state holding transistor T6 is controlled to be turned off by the second reset signal S4, ensuring normal light emission of the light emitting device 50.
It should be noted that, in the embodiments of the present invention, specific circuits of the pixel circuit are not specifically limited, and other circuit connection structures may also be adopted in other embodiments of the present invention. In the embodiment of the invention, the driving transistor, the reset transistor, the data writing transistor, the control light-emitting transistor and the black state holding transistor can be all P-type thin film transistors, or the driving transistor, the reset transistor, the data writing transistor, the control light-emitting transistor and the black state holding transistor can be all N-type thin film transistors; the first voltage provided by the embodiment of the invention is the voltage provided by the anode voltage end, and the second voltage is the voltage provided by the cathode voltage end; and the light emitting device may be a light emitting diode, etc., to which the present invention is not particularly limited.
It should be understood that the pixel circuits shown in fig. 6 and 8 provided by the present invention are only two of all pixel circuits to which the present invention is applicable, and in other embodiments of the present invention, the pixel circuit may also be a circuit structure in which other devices such as multiple transistors and capacitors are connected. And, in order to supply the pixel circuits with scan signals (the scan signals include the first scan signals and the second scan signals as shown in fig. 6 and 8), reset signals (the reset signals include the first reset signals as shown in fig. 6 and 8, and the second reset signals as shown in fig. 8), data signals (the data signals include the data voltages as shown in fig. 6 and 8), reference voltages (the data signals include the first reference voltages and the second reference voltages as shown in fig. 6 and 8), and power supply voltages (the power supply voltages include the first voltages as shown in fig. 6 and 8), and the like, the display panel correspondingly includes scan signal lines, reset signal lines, data lines, reference voltage lines, power supply voltage lines, and the like, which are located outside the optical block area.
In the optical component area provided in the embodiment of the present invention, when the first pixel circuit is located in the optical component area (TFT is built in), since the first pixel circuit needs to be provided with a corresponding signal through a scanning signal line, a reset signal line, a data line, a reference voltage line, a power supply voltage line, and the like, a patch cord may be manufactured in the optical component area in the embodiment of the present invention so as to be electrically connected to a line outside the optical component area; the patch cord can be made of a transparent conductive layer. That is, the first pixel circuit provided in the embodiment of the present invention is located in the optical component area, and the connection wire includes at least one of a scan signal patch cord, a data patch cord, a reset signal patch cord, a reference voltage patch cord, and a power voltage patch cord, which are connected to the first pixel circuit. The scanning signal patch cord is correspondingly electrically connected with the scanning signal cord, the data patch cord is correspondingly electrically connected with the data cord, the reset signal patch cord is correspondingly electrically connected with the reset signal cord, the reference voltage patch cord is correspondingly electrically connected with the reference voltage cord, and the power supply voltage patch cord is electrically connected with the power supply voltage cord. Specifically referring to fig. 10, a schematic structural diagram of another display panel provided in an embodiment of the present invention is shown, where the display panel provided in the embodiment of the present invention includes:
a carrier substrate 710.
A transistor array layer 720 on a surface of the carrier substrate 710, wherein the transistor array layer 720 includes a semiconductor layer 721 on a surface of the carrier substrate 710; a first insulating layer 722 on a side of the semiconductor layer 721 facing away from the carrier substrate 710; a gate metal layer 723 on a side of the first insulating layer 722 facing away from the carrier substrate 710; a second insulating layer 724 located on a side of the gate metal layer 723 facing away from the carrier substrate 710; a capacitor metal layer 725 on the second insulating layer 724 at a side facing away from the carrier substrate 710; a third insulating layer 726 located on a side of the capacitor metal layer 725 facing away from the carrier substrate 710; and the source-drain metal layer 727 is positioned at one side of the third insulating layer 726, which is far away from the bearing substrate 710. The transistor is composed of an active region included in the semiconductor layer 721 of the transistor array layer 720, a gate included in the gate metal layer 723, and a source and drain included in the source and drain metal layer 727. And the transistor array layer 720 includes a first pixel circuit and a second pixel circuit, the first pixel circuit being located in the optical member region 101 and including a plurality of transistors 7201.
A passivation layer 730 on a side of the transistor array layer 720 facing away from the carrier substrate 710.
The transparent structure layer on the side of the passivation layer 730 away from the carrier substrate 710 includes at least one transparent conductive layer 300, and when the transparent structure layer includes a stack of a plurality of transparent conductive layers, two adjacent transparent conductive layers are isolated from each other by an isolation layer.
And a planarization layer 750 on a side of the transparent structure layer facing away from the carrier substrate 710.
And a pixel defining layer 760 positioned on a side of the planarization layer 750 facing away from the carrier substrate 710, wherein the pixel defining layer 760 includes a plurality of openings, and a light emitting device is defined at the opening of the pixel defining layer 760, and the light emitting device provided by the embodiment of the invention may include an anode 771, a light emitting layer 772, and a cathode 773, which are sequentially stacked. Due to the existence of the transparent conductive layer 300, the electrical connection mode of the anode 771 and the transistor 7201 of the first pixel circuit through the via hole may be as follows: a terminal 3004 connected with the anode 771 through a via is disposed on the same layer as the transparent conductive layer 300, and the transistor 7201 of the first pixel circuit is electrically connected to the terminal 3004 through a via, so as to realize an electrical connection relationship between the anode 771 and the transistor 7201 of the first pixel circuit, where the terminal may be a part of the transparent conductive layer. Optionally, the transparent conductive layer may also be hollowed out in a connection via for connecting the anode and the transistor, so as to electrically connect the anode and the transistor. Optionally, under the same test conditions, the transmittance of the transparent conductive layer 300 to natural light is greater than that of the anode 771.
Optionally, the display panel provided in the embodiment of the present invention further includes a buffer layer 780 located between the semiconductor layer 720 and the carrier substrate 710, and the buffer layer 780 can prevent impurities and the like from entering the semiconductor layer 720 when the semiconductor layer is fabricated.
As shown in fig. 10, the transparent conductive layer 300 according to the embodiment of the present invention is formed with a connection wire, and the connection wire includes a patch cord 3001, where the patch cord 3001 includes at least one of a scan signal patch cord, a data patch cord, a reset signal patch cord, a reference voltage patch cord, and a power voltage patch cord connected to the first pixel circuit. When the display panel provided by the embodiment of the invention comprises a transparent conducting layer, the type lines of the patch cord, such as a scanning signal patch cord, a data patch cord, a reset signal patch cord, a reference voltage patch cord, a power supply voltage patch cord and the like, can be all arranged on the same transparent conducting layer, optionally, one of the type lines is selected at the position where two connecting wires are overlapped, for example, the type lines are connected in a light emitting area of the device through a bridge. When the display panel provided by the embodiment of the invention comprises a plurality of transparent conducting layers, the type circuits of the transfer line, such as a scanning signal transfer line, a data transfer line, a reset signal transfer line, a reference voltage transfer line, a power voltage transfer line and the like, can be selectively and respectively positioned on different transparent conducting layers according to practical application; or the patch cords of the above type are grouped so that a part of the patch cords is located on the same transparent conductive layer and the rest of the patch cords is located on other transparent conductive layers, which is not particularly limited to the present invention. And the gate metal layer 723, the capacitor metal layer 725, and the source-drain metal layer 727 provided in the embodiments of the present invention are formed with signal lines, which include at least one of a scan signal line, a reset signal line, a data line, a reference voltage line, and a power voltage line. When the patch cord 3001 of the optical component area 101 provided by the embodiment of the present invention is connected to a signal line outside the optical component area 101, for example, when the patch cord 3001 is connected to the signal line 7251 of the capacitance metal layer 725, the patch cord 3001 may be connected to the outside of the optical component area 101 through a via hole.
In the optical component area provided by the embodiment of the present invention, when the first pixel circuit is located outside the optical component area (the TFT is external), since the scanning signal line, the reset signal line, the data line, the reference voltage line, the power supply voltage line, and the like are located outside the optical component area, the first pixel circuit can be directly connected to these lines outside the optical component area; because the first light-emitting device is positioned in the optical component area and is electrically connected with the first pixel circuit, the embodiment of the invention can manufacture an electrode patch cord electrically connected with the first light-emitting device in the optical component area and realize the electrical connection by connecting the electrode patch cord with the first pixel circuit; and the electrode patch cord can be formed by carving the transparent conducting layer. That is, the first pixel circuit provided in the embodiment of the present invention is located outside the optical component area, the connection wire includes an electrode patch cord electrically connected to the first light emitting device, and the electrode patch cord is electrically connected to the first pixel circuit. Specifically referring to fig. 11, a schematic structural diagram of another display panel provided in an embodiment of the present invention is shown, where the display panel provided in the embodiment of the present invention includes:
a carrier substrate 710.
A buffer layer 780 on a surface of one side of the carrier substrate 710;
a transistor array layer 720 on a surface of the buffer layer 780 facing away from the carrier substrate 710, wherein the transistor array layer 720 includes a semiconductor layer 721 on a surface of the carrier substrate 710; a first insulating layer 722 on a side of the semiconductor layer 721 facing away from the carrier substrate 710; a gate metal layer 723 on a side of the first insulating layer 722 facing away from the carrier substrate 710; a second insulating layer 724 located on a side of the gate metal layer 723 facing away from the carrier substrate 710; a capacitor metal layer 725 on the second insulating layer 724 at a side facing away from the carrier substrate 710; a third insulating layer 726 located on a side of the capacitor metal layer 725 facing away from the carrier substrate 710; and the source-drain metal layer 727 is positioned at one side of the third insulating layer 726, which is far away from the bearing substrate 710. The transistor is composed of an active region included in the semiconductor layer 721 of the transistor array layer 720, a gate included in the gate metal layer 723, and a source and drain included in the source and drain metal layer 727. And the transistor array layer 720 includes a first pixel circuit and a second pixel circuit, the first pixel circuit being located outside the optical member region 101 and including a plurality of transistors 7202.
A passivation layer 730 on a side of the transistor array layer 720 facing away from the carrier substrate 710.
The transparent structure layer on the side of the passivation layer 730 away from the carrier substrate 710 includes at least one transparent conductive layer 300, and when the transparent structure layer includes a stack of a plurality of transparent conductive layers, two adjacent transparent conductive layers are isolated from each other by an isolation layer.
And a planarization layer 750 on a side of the transparent structure layer facing away from the carrier substrate 710.
And a pixel defining layer 760 positioned on a side of the planarization layer 750 facing away from the carrier substrate 710, wherein the pixel defining layer 760 includes a plurality of openings, and a light emitting device is defined at the opening of the pixel defining layer 760, and the light emitting device provided by the embodiment of the invention may include an anode 771, a light emitting layer 772, and a cathode 773, which are sequentially stacked. Optionally, under the same test conditions, the transmittance of the transparent conductive layer 300 to natural light is greater than that of the anode 771.
As shown in fig. 11, the transparent conductive layer 300 according to the embodiment of the present invention is formed with a connection wire, and the connection wire includes an electrode patch 3002, and the electrode patch 3002 is electrically connected to the anode 771 of the first light emitting device at the optical component area 101 through a via hole. At least one of the gate metal layer 723, the capacitor metal layer 725, and the source drain metal layer 727 provided in the embodiments of the present invention is formed with an external connection line electrically connected to a transistor 7202 of the first pixel circuit, such as an external connection line 7252 of the capacitor metal layer 725; thus, the electrode patch cord 3002 can be electrically connected to the external connection line 7252 outside the optical component area 101 through the via hole, thereby achieving the electrical connection of the first pixel circuit and the first light emitting device.
Optionally, when the first pixel circuit is located outside the optical component area, the embodiment of the present invention may further fully utilize the transparent conductive layer, that is, outside the optical component area, the transparent conductive layer is manufactured to form an auxiliary signal line directly electrically connected to the electrode patch cord, and then electrically connected to the first pixel circuit through the auxiliary signal line, so as to implement an electrical connection structure between the first pixel circuit and the first light emitting device. Fig. 12 is a schematic structural diagram of another display panel according to an embodiment of the present invention, wherein the display panel shown in fig. 12 is different from the display panel shown in fig. 11 in that an external wire may not be included; outside the optical component area 101, the transparent conductive layer 300 further includes a plurality of auxiliary signal lines 3003, and the first pixel circuit and the electrode patch line 3002 are electrically connected through the auxiliary signal lines 3003. Optionally, the auxiliary signal line 3003 and the electrode patch line 3002 are electrically connected to each other and disposed on the same layer. The auxiliary signal line 3003 may be formed by extending the electrode patch cord 3002 outside the optical component area 101 to be electrically connected to the first pixel circuit.
In the embodiments of fig. 10 to 12, the transistor is a top gate transistor for example; the transistor may also be a bottom gate transistor, i.e., the active region of the transistor is located above the gate, and the source and drain are located on the side of the active region away from the gate, which is not described in detail herein.
In an embodiment of the present invention, the light emitting device of the display panel provided in the embodiment of the present invention includes an anode, a light emitting layer, and a cathode, which are sequentially stacked, wherein all the display panels may include a cathode layer on the whole surface, and the cathodes of the light emitting devices are all corresponding portions of the cathode layer; alternatively, the cathodes of the different light emitting devices may be separate electrode structures, and each separate cathode is electrically connected to a cathode signal line, which is not particularly limited to the present invention. When the cathodes of different first light-emitting devices are independent from each other, the independent cathodes can be electrically connected with the cathode signal line through the cathode patch cord, or connected with the cathode signal line after being partially or completely connected. Referring to fig. 13, a schematic diagram of a cathode connection structure of an optical component area according to an embodiment of the present invention is provided, where the first light emitting device includes an anode (not shown), a light emitting layer (not shown), and a cathode 7731, which are sequentially stacked, where the cathodes 7731 of different first light emitting devices have a gap therebetween; wherein the cathode 7731 of at least one of the first light emitting devices is electrically connected to a cathode signal line PVEE through a respective cathode patch line 7732. All the light-emitting devices except the optical component area 101 provided by the embodiment of the invention multiplex the same cathode layer 7733, and the cathode layer 7733 is electrically connected with a cathode signal line PVEE; the cathode 7731 of the first light-emitting device provided by the embodiment of the present invention can be electrically connected to the cathode layer 7733 outside the optical component area 101 through the cathode patch cord 7732, so as to achieve the purpose of electrically connecting the cathode 7731 of the first light-emitting device to the cathode signal line PVEE. Specifically, as shown in fig. 14, the cathode patch cord 7732 provided in the embodiment of the present invention may be located on the transparent conductive layer 300 (that is, the connection lead includes a cathode patch cord), where the cathode patch cord 7732 is electrically connected to the cathode 7731 of the first light emitting device through a via, and the cathode patch cord 7732 is electrically connected to the cathode layer 7733 through a via, so as to communicate the cathode of the first light emitting device with the cathode signal line. It should be noted that fig. 14 is only illustrated by taking the TFT built-in scheme as an example, and the cathode patch cord scheme provided by the embodiment of the present invention is also applicable to the TFT external scheme.
Alternatively, referring to fig. 15, a schematic diagram of a cathode connection structure of another optical component area provided in an embodiment of the present invention is shown, where the first light emitting device includes an anode (not shown), a light emitting layer (not shown), and a cathode 7731, which are sequentially stacked, where a gap is provided between the cathodes 7731 of different first light emitting devices; at least a plurality of cathodes 7731 of the first light emitting devices are electrically connected in the optical component area 101 by a connecting line 7735, and then the plurality of cathodes 7731 are electrically connected to a cathode signal line PVEE by a leading-out line 7736. All the light-emitting devices except the optical component area 101 provided by the embodiment of the invention multiplex the same cathode layer 7733, and the cathode layer 7733 is electrically connected with a cathode signal line PVEE; the cathode 7731 of the first light emitting device provided in the embodiment of the present invention can be electrically connected to the cathode layer 7733 outside the optical component area 101 through the outgoing line 7736, so as to achieve the purpose of electrically connecting the cathode 7731 of the first light emitting device to the cathode signal line PVEE. As shown in fig. 16, the connecting wires 7735 and the outgoing wires 7736 provided in the embodiment of the present invention may be located on the transparent conductive layer 300 (that is, the connecting wires include connecting wires and outgoing wires), where the connecting wires 7735 achieve electrical connection between the cathodes 7731 of different first light emitting devices through via holes, the outgoing wires 7736 achieve electrical connection with the cathode 7731 of a first light emitting device through via holes, and the outgoing wires 7736 achieve electrical connection with the cathode layer 7733 through via holes, so as to connect the cathodes of the first light emitting devices with cathode signal lines. It should be noted that fig. 16 is only illustrated by taking the TFT built-in scheme as an example, and the cathode patch cord scheme provided by the embodiment of the present invention is also applicable to the TFT external scheme.
Referring to fig. 17, a schematic structural diagram of another display panel according to an embodiment of the present invention is shown, where the display panel according to the embodiment of the present invention includes a fixed voltage signal line 790, and the auxiliary layer 340 is electrically connected to the fixed voltage signal line 790. The fixed voltage signal line 790 provided by the embodiment of the present invention is located outside the optical component area 101, and the auxiliary layer 340 may be electrically connected to the fixed voltage signal line 790 through a via hole outside the optical component area 101.
It can be understood that, in the embodiments of the present invention, the auxiliary layer is electrically connected to the fixed voltage signal line, so that the impedance of the fixed voltage signal line can be reduced, and the problem of large voltage drop on the fixed voltage signal line can be solved. Optionally, the fixed voltage signal line provided by the embodiment of the present invention includes one of a reference voltage signal line and a power voltage signal line. As shown in fig. 18, the fixed voltage signal line provided by the embodiment of the present invention may be a power supply voltage signal line PVDD, wherein the auxiliary layer 340 may be electrically connected to the power supply voltage signal line PVDD through a via hole outside the optical component region 101. As shown in fig. 19, the fixed voltage signal line provided by the embodiment of the invention may be a reference voltage signal line VREF, wherein the auxiliary layer 340 may be electrically connected to the reference voltage signal line VREF through a via hole outside the optical component region 101. In the first pixel circuit provided by the embodiment of the present invention, when the first pixel circuit is located in the optical component area, the connection wire included in the transparent conductive layer includes a reference voltage patch cord and a power voltage patch cord, and the auxiliary layer may be connected to the reference voltage patch cord or the power voltage patch cord, so as to electrically connect the auxiliary layer to the fixed voltage signal line.
Optionally, in an embodiment of the present invention, the auxiliary layer provided in the present invention is floating, that is, the auxiliary layer does not need to be connected to any circuit. As shown in fig. 20, compared with fig. 18 and 19, the auxiliary layer 340 shown in fig. 20 is provided in a floating state, which does not require any signal wiring to be connected. And then can avoid the auxiliary layer to cause the interference to other circuits rather than overlapping when inserting the signal, guarantee that the signal line is influenced by the interference on the display panel for a short time.
Referring to fig. 21, a schematic structural diagram of another display panel according to an embodiment of the present invention is shown, wherein the plurality of pixels further includes a third pixel, and the third pixel includes a third light emitting device 310 and a third pixel circuit 320 that are connected to each other; the display area further comprises a transition display area 103 located between the regular display area 102 and the optical member area 110, and the third light emitting device 310 is located in the transition display area 103; the light emitting device density of the transition display region 103 is greater than or equal to the light emitting device density of the optical member region 101, and the light emitting device density of the transition display region 103 is less than the light emitting device density of the regular display region 102.
It can be understood that the display area provided by the embodiment of the invention can optimize the display effect between the conventional display area and the optical component area by arranging the transition display area, and improve the visual perception of a user. Optionally, when the first pixel circuit is located outside the optical component area, the first pixel circuit is located in the transitional display area.
In any of the above embodiments, the transparent conductive layer includes at least one of an ITO layer, an IZO layer, and a nano-silver layer. Namely, the transparent conducting layer provided by the embodiment of the invention can be an ITO layer; or the transparent conductive layer can be an IZO layer; or the transparent conducting layer can be a nano silver wire layer; or the transparent conductive layer may be a stacked structure, and each stacked layer may be an ITO layer, an IZO layer, or a nano silver layer, which is not particularly limited to the present invention.
In any of the above embodiments of the present invention, when the first pixel circuit provided by the present invention is located in the optical component area, all the pixel units connected to the first light emitting device and the first pixel circuit may be arranged regularly in an array, or arranged irregularly.
Correspondingly, based on the same inventive concept, the invention further provides a display device, and the display device comprises the flexible display panel provided by any one of the embodiments.
Fig. 22 is a schematic structural diagram of another display device according to an embodiment of the present invention, where the display device 1000 according to the embodiment of the present invention may be a mobile terminal device.
Optionally, the display device provided by the present invention may also be an electronic display device such as a computer and a wearable display device, and the present invention is not particularly limited.
The embodiment of the invention provides a display panel and a display device, wherein a display area of the display panel comprises an optical component area and a conventional display area, and the optical component area and the conventional display area both comprise a light-emitting device, so that the area of the display area is larger, and the full-screen display trend is met. And in optical component district department, transparent conducting layer includes first slot and the second slot in pairs, be located connecting wire between first slot in pairs and the second slot in pairs and be located the auxiliary layer outside first slot in pairs and the second slot in pairs, when realizing the signal transmission purpose through connecting wire, through the design that keeps the auxiliary layer to transparent conducting layer slot, can also guarantee that transparent conducting layer is higher in optical component district's integrality, make transparent conducting layer higher in the printing opacity homogeneity of optical component district department, the printing opacity homogeneity in light-permeable district in the optical component district has been improved, and then improve the corresponding optical device in optical component district and gather the image effect.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (19)

1. A display panel, comprising:
a plurality of pixels including a first pixel including a first light emitting device and a first pixel circuit connected to each other and a second pixel including a second light emitting device and a second pixel circuit connected to each other;
a display area including an optical component area and a normal display area, the first light emitting device being located in the optical component area, the second light emitting device being located in the normal display area, the optical component area having a light emitting device density less than a light emitting device density of the normal display area;
at least one transparent conductive layer including a pair of first and second slits, a connection wire between the pair of first and second slits, and an auxiliary layer outside the pair of first and second slits, in the optical member region.
2. The display panel according to claim 1, wherein the transparent conductive layer comprises a plurality of pairs of first and second slits, a connecting wire between the pairs of first and second slits, and an auxiliary layer outside the pairs of first and second slits.
3. The display panel according to claim 1, wherein the display panel comprises a plurality of the transparent conductive layers, and in a direction perpendicular to a plane of the display panel, the first slit and/or the second slit of at least one of the transparent conductive layers overlaps with an auxiliary layer of at least one of the remaining transparent conductive layers.
4. The display panel according to claim 1, wherein at least one side line of at least one of the first slit and the second slit is a wavy line.
5. The display panel according to claim 3, wherein the wavy line is a cosine line or a sine line.
6. The display panel according to claim 1, wherein the first slits and/or the second slits have a slit width in a range of 2 μ ι η to 5 μ ι η, inclusive.
7. The display panel according to claim 1, wherein the connecting wires have a width in the range of 2 μ ι η to 5 μ ι η, inclusive.
8. The display panel according to claim 1, wherein the first pixel circuit is located in the optical component area, and the connection wire includes at least one of a scan signal patch cord, a data patch cord, a reset signal patch cord, a reference voltage patch cord, and a power supply voltage patch cord connected to the first pixel circuit.
9. The display panel according to claim 1, wherein the first pixel circuit is located outside the optical component area, and the connection wire includes an electrode patch cord electrically connected to the first light emitting device, the electrode patch cord electrically connecting the first pixel circuit.
10. The display panel according to claim 9, wherein the transparent conductive layer further includes a plurality of auxiliary signal lines outside the optical member region, and wherein the first pixel circuits and the electrode patch lines are electrically connected through the auxiliary signal lines.
11. The display panel according to claim 10, wherein the auxiliary signal line and the electrode patch line are electrically connected in the same layer.
12. The display panel according to claim 1, wherein the first light emitting device comprises an anode, a light emitting layer and a cathode which are sequentially stacked, wherein a gap is formed between the cathodes of different first light emitting devices;
wherein the cathode of at least one of the first light emitting devices is electrically connected to a cathode signal line through a respective cathode patch cord, or at least a plurality of the cathodes of the first light emitting devices are electrically connected to a cathode signal line through a lead-out wire connected to the optical component area.
13. The display panel according to claim 1, wherein the display panel comprises a fixed voltage signal line, and wherein the auxiliary layer is electrically connected to the fixed voltage signal line.
14. The display panel according to claim 13, wherein the fixed voltage signal line comprises one of a reference voltage signal line and a power supply voltage signal line.
15. The display panel according to claim 1, wherein the auxiliary layer is floating.
16. The display panel according to any one of claims 1 to 15, wherein the plurality of pixels further includes a third pixel including a third light-emitting device and a third pixel circuit connected to each other;
the display area further comprises a transition display area between the normal display area and the optical member area, and the third light emitting device is located in the transition display area;
the transition display region has a light emitting device density greater than or equal to the optical member region, and the transition display region has a light emitting device density less than the regular display region.
17. The display panel of claim 16, wherein the first pixel circuit is located in the transitional display region when the first pixel circuit is located outside the optical component region.
18. The display panel according to claim 1, wherein the transparent conductive layer comprises at least one of an ITO layer, an IZO layer, and a nano-silver line layer.
19. A display device characterized in that it comprises a display panel according to any one of claims 1 to 18.
CN202010789153.4A 2020-08-07 2020-08-07 Display panel and display device Active CN111785853B (en)

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