CN111769806B - Power stabilizing method of power amplifier - Google Patents
Power stabilizing method of power amplifier Download PDFInfo
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- CN111769806B CN111769806B CN202010504256.1A CN202010504256A CN111769806B CN 111769806 B CN111769806 B CN 111769806B CN 202010504256 A CN202010504256 A CN 202010504256A CN 111769806 B CN111769806 B CN 111769806B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The application relates to the technical field of power amplifiers, in particular to a power stabilizing method of a power amplifier, which comprises the steps of firstly adjusting the input power of the power amplifier at each sampling frequency point according to power stepping, establishing a second corresponding table of the input power, the output voltage and the output power at each frequency point, setting a reference temperature and the reference voltage, establishing a third corresponding table of a voltage difference and a temperature difference, then obtaining working frequency according to the second corresponding table, obtaining target power at the working power, setting the input power of the power amplifier as the target power, obtaining the working frequency, and obtaining working voltage and real-time voltage difference at the working power; finally, taking the sum of the working voltage and the real-time voltage difference as a final feedback voltage, and outputting the feedback voltage to the OPA in real time through the FPGA so as to control the power of the power amplifier; the application can effectively meet the requirements of both test precision and test speed in the test of the radio frequency chip.
Description
Technical Field
The application relates to the technical field of power amplifiers, in particular to a power stabilizing method of a power amplifier.
Background
In rf chip testing, many chip tests (such as testing on rf switches) require a large amount of power, and power boosting is typically performed by adding a power amplifier to the rf output of ATE (Automatic Test Equipment, automatic integrated circuit tester). The test precision and the test speed of ATE have very important influence on the production efficiency, the test precision directly influences the accuracy and the reliability of the chip test result, the test speed is critical to the yield of chip test, and in radio frequency test equipment, the test precision and the test speed are both key indexes, so that very high requirements are put forward on the power stabilizing speed and the output power stabilizing degree of a power amplifier.
In the existing communication equipment detection technology, the power stabilizing speed of the power amplifier is not required, the time for the power amplifier to reach the power stabilizing is not limited, after the power amplifier is excited, the power of the power amplifier has a climbing process of 0.2dB in the first 20m time of excitation, and the power stabilizing and the power controlling are not carried out;
this can cause significant problems in radio frequency chip testing:
firstly, the output power deviation is generally required to be not more than 0.1dB in the radio frequency chip test, and the excessive output power deviation can cause the measurement deviation of the performance of the chip to be tested;
secondly, in order to achieve stable gain of the power amplifier, waiting for a period of time after excitation is applied to the power amplifier is required, and delay of hundreds of milliseconds is caused by about date, so that the testing speed of the radio frequency chip is reduced, and the testing productivity of the radio frequency chip is seriously affected by long-term low testing speed;
thirdly, the power stability of the power amplifier is insufficient, when the power amplifier works in the power range at the working temperature, the power stability at any frequency in the working frequency range cannot meet the requirement, and the power stability is very important for the test precision of the radio frequency chip test;
therefore, the power stabilization mode of the traditional power amplifier is difficult to meet the requirements of both the test precision and the test speed in the radio frequency chip test.
Disclosure of Invention
The present application is directed to a power stabilizing method for a power amplifier, which solves one or more of the technical problems of the prior art, and at least provides a beneficial choice or creation condition.
In order to achieve the above object, the present application provides the following technical solutions:
the power stabilizing method of the power amplifier comprises the steps that the input end of the power amplifier is connected with a VGA, the output end of the power amplifier is connected with a detector, the detector is connected with the VGA sequentially through the FPGA and a control switch, the input end of the control switch is also connected with an OPA, and the input end of the OPA is respectively connected with the output end of the detector and the output end of the FPGA;
the method comprises the following steps:
100, equally dividing the working frequency band of the power amplifier into n sampling frequency points, equally dividing the power range of the power amplifier to obtain m power sampling points;
step 200, adjusting the input power of the power amplifier according to power steps at each sampling frequency point, and establishing a second corresponding table of the input power, the output voltage and the output power at each frequency point; the input power is the power of a radio frequency signal of an input VGA, the output voltage is obtained by sampling an analog voltage signal demodulated by a detector, and the output power is the power of the input power amplified and output by a power amplifier;
step 300, setting a reference temperature and a reference voltage, and establishing a third corresponding table of voltage difference and temperature difference; wherein the voltage difference DeltaV=V-V0, the temperature difference DeltaT=T-T0, V is real-time voltage, T is real-time temperature, V0 is reference voltage, T0 is reference temperature;
400, switching and connecting a control switch to an OPA output end, obtaining the working frequency and the working power of a power amplifier, obtaining the working frequency and the target power at the working power according to a second corresponding table, and setting the input power of the power amplifier as the target power; the working frequency is the frequency set by the power amplifier according to the test requirement, and the working power is the output power set by the power amplifier according to the test requirement;
step 500, working frequency and working voltage at working power are obtained according to a second corresponding table;
step 600, acquiring the real-time temperature of the detector through the FPGA to obtain a real-time temperature difference, and acquiring the working frequency and the real-time voltage difference at the working power according to a third corresponding table;
and 700, taking the sum of the working voltage and the real-time voltage difference as a final feedback voltage, and outputting the feedback voltage to the OPA in real time through the FPGA so as to control the power of the power amplifier.
Further, the step 200 includes:
step 210, scanning by a network analyzer to obtain a frequency response curve of the attenuator, and obtaining the corresponding relation between k frequency points and power attenuation values according to the frequency response curve of the attenuator, wherein the frequency response of the attenuator is the power attenuation value of the attenuator at each frequency point in the working frequency band;
220, connecting the output end of the power amplifier with an attenuator, and connecting the other end of the attenuator with a power meter;
step 230, selecting one sampling frequency point from n sampling frequency points, selecting three frequency points f11, f12 and f13 adjacent to the sampling frequency point from a first corresponding table, and acquiring corresponding relations (f 11, att (f 11)), (f 12, att (f 12)), (f 13, att (f 13)) of 3 groups of frequency points and power attenuation values according to the first corresponding table, wherein f11 < f12 < f13;
step 240, fitting (f 11, att (f 11)), (f 12, att (f 12)), (f 13, att (f 13)) by using a piecewise least squares parabolic curve to obtain a first fitting formula att (f 0) =k 2 *f0 2 +k 1 *f0+k 0 Wherein f0 ε [ f11, f13 ]]Att (f 0) is a power attenuation function, and the sampling frequency points are substituted into a first fitting formula, namely, the power attenuation value at the sampling frequency points is obtained;
step 250, reading the measured power obtained by measuring the power meter at the sampling frequency point, and performing power compensation on the measured power to obtain output power, wherein pout=pt+att (f 0), pt is the measured power, and Pout is the output power;
step 260, increasing the input power from small to large according to power steps at sampling frequency points, decreasing the input power from large to small according to power steps when the output power reaches the maximum power value until the output power reaches the minimum power value, and performing signal sampling on analog voltage signals demodulated by a detector at each power sampling point to obtain output voltages, so that corresponding relations among m input powers, output voltages and output powers are obtained at each sampling frequency point;
step 270, determining whether n sampling frequency points all obtain corresponding relations of m input powers, output voltages and output powers, if yes, establishing corresponding relations of m input powers, output voltages and output powers at the n sampling frequency points, and obtaining a second corresponding table, where the second corresponding table has m×n corresponding relations.
Further, the step 300 includes:
step 310, setting a reference temperature and a reference power, at the reference temperature, reading detection voltages of the power amplifier when the reference power is output at n frequency points to obtain n detection voltages, setting the n detection voltages as the reference voltages, setting a voltage difference DeltaV=V-V0 and a temperature difference DeltaT=T-T0, wherein V is a real-time voltage, T is a real-time temperature, V0 is the reference voltage, and T0 is the reference temperature;
step 320, setting w temperature values in the working temperature, reading the measured power of w temperature values at each frequency point by a power meter, performing power compensation again on the measured power at each frequency point by n×w sampling points, so that the measured power at the same frequency point is compensated to the reference power at the w temperature values, reading the voltage difference DeltaV corresponding to w temperature differences DeltaT at each frequency point, and obtaining a third corresponding table of the voltage difference DeltaV and the temperature difference DeltaT, wherein n×w corresponding relations are total.
Further, in step 400, the working frequency and the target power at the working power are obtained according to the second mapping table, including:
step 410, selecting three frequency points f1, f2 and f3 adjacent to the working frequency according to the second corresponding table, and respectively selecting 3 output powers adjacent to the working power at the frequency points f1, f2 and f3, wherein 3 output powers are obtained at each frequency point, and f1 is less than f2 and less than f3;
step 420, respectively obtaining input powers of 9 output powers at the frequency points f1, f2 and f3 according to a second corresponding table, obtaining corresponding relations between 3 groups of input powers and output powers at each frequency point, and performing curve fitting on the corresponding relations between 3 groups of input powers and output powers at each frequency point by adopting a piecewise least square parabolic curve fitting algorithm to obtain a second fitting formula group:
Pin(f1)＝a1 2 *Pout 2 +a1 1 *Pout+a1 0 ，
Pin(f2)＝a2 2 *Pout 2 +a2 1 *Pout+a2 0 ，
Pin(f3)＝a3 2 *Pout 2 +a3 1 *Pout+a3 0 ；
wherein Pin (f 1) is an input power function at a frequency point f1, pin (f 2) is an input power function at a frequency point f2, and Pin (f 3) is an input power function at a frequency point f3;
step 430, substituting the working power into the second fitting formula set to obtain an input power Pin1 of the working power at the frequency point f1, an input power Pin2 of the working power at the frequency point f2, and an input power Pin3 of the working power at the frequency point f3, so as to obtain corresponding relations (f 1, pi 1), (f 2, pi 2), (f 3, pi 3) of three sets of frequency points and the input power;
step 440, performing curve fitting on (f 1, pi 1), (f 2, pi 2), (f 3, pi 3) by using a piecewise least squares parabolic curve fitting algorithm to obtain a third fitting formula Pin (f) =a 2 *f 2 +a 1 *f+a 0 Wherein f.epsilon.f 1, f3]Pin (f) is a target power function, and the working frequency is substituted into a third fitting formula, namely, the working frequency and the target power of the working power are obtained.
Further, the step 500 includes:
step 510, respectively obtaining output voltages of 9 output powers at the frequency points f1, f2 and f3 according to the second corresponding table, obtaining corresponding relations between 3 groups of output voltages and output powers at each frequency point, and performing curve fitting on the corresponding relations between 3 groups of output voltages and output powers at each frequency point by adopting a piecewise least square parabolic curve fitting algorithm to obtain a fourth fitting formula group:
V(f1)＝b1 2 *Pout 2 +b1 1 *Pout+b1 0 ，
V(f2)＝b2 2 *Pout 2 +b2 1 *Pout+b2 0 ，
V(f3)＝b3 2 *Pout 2 +b3 1 *Pout+b3 0 ；
wherein V (f 1) is an output voltage function at a frequency point f1, V (f 2) is an output voltage function at a frequency point f2, and V (f 3) is an output voltage function at a frequency point f3;
step 520, substituting the working power into a fourth fitting formula set to obtain an output voltage Vo1 of the working power at a frequency point f1, an output voltage Vo2 of the working power at a frequency point f2, and an output voltage Vo3 of the working power at a frequency point f3, and obtaining corresponding relations (f 1, vo 1), (f 2, vo 2), (f 3, vo 3) of three sets of frequency points and the output voltages;
step 530, performing curve fitting on (f 1, vo 1), (f 2, vo 2), (f 3, vo 3) by adopting a piecewise least squares parabolic curve fitting algorithm to obtain a fifth fitting formula V (f) =b 2 *f 2 +b 1 *f+b 0 Wherein V (f) is a function of the working voltage, and the working frequency is substituted into a fifth fitting formula, namely working voltage at the working frequency and the working power is obtained.
Further, the step 600 includes:
step 610, acquiring real-time temperature T of a detector through an FPGA to obtain real-time temperature difference DeltaT=T-T0, respectively selecting 3 temperature differences adjacent to the real-time temperature difference DeltaT at frequency points f1, f2 and f3, and obtaining 3 temperature differences at each frequency point;
step 620, respectively obtaining the voltage differences of 9 temperature differences at the frequency points f1, f2 and f3 according to a third corresponding table to obtain the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point, and performing curve fitting on the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point by adopting a piecewise least square parabolic curve fitting algorithm to obtain a sixth fitting formula group:
△V(f1)＝c1 2 *△T 2 +c1 1 *△T+c1 0 ，
△V(f2)＝c2 2 *△T 2 +c2 1 *△T+c2 0 ，
△V(f3)＝c3 2 *△T 2 +c3 1 *△T+c3 0 ；
wherein, deltaV (f 1) is the voltage difference function at the frequency point f1, deltaV (f 2) is the voltage difference function at the frequency point f2, deltaV (f 3) is the voltage difference function at the frequency point f3;
step 630, substituting the real-time temperature difference Δt into a sixth fitting formula set to obtain a voltage difference Δv1 of the real-time temperature difference Δt at the frequency point f1, a voltage difference Δv2 of the real-time temperature difference Δt at the frequency point f2, and a voltage difference Δv3 of the real-time temperature difference Δt at the frequency point f3, thereby obtaining three sets of corresponding relations (f 1, Δv1), (f 2, Δv2), (f 3, Δv3) of the frequency points and the voltage differences;
step 640, performing curve fitting on (f 1, [ delta ] V1), (f 2, [ delta ] V2), (f 3, [ delta ] V3) by using a piecewise least squares parabolic curve fitting algorithm to obtain a seventh fitting formula [ delta ] V (f) =c 2 *f 2 +c 1 *f+c 0 Wherein DeltaV (f) is a voltage difference function, and the working frequency is substituted into a seventh fitting formula, namely, the working frequency and the real-time voltage difference DeltaV at the working power are obtained.
Further, the working frequency band of the power amplifier is 700MHz to 6000MHz, and the power range is 0dBm to 40dBm.
As a further improvement of the above technical solution, the control switch is controlled by the FPGA, and when calibrating the power amplifier, the control switch is connected to a preset voltage, and the preset voltage is a reference voltage of the VGA; when the power amplifier works, the control switch is connected to the OPA terminal, and the DA voltage signal and the detection voltage signal given by the FPGA jointly regulate the input voltage of the VGA through the OPA. The preset voltage is a fixed voltage and is set according to rated voltages of different VGAs.
Further, the control resolution of the FPGA is less than 0.005dB.
The beneficial effects of the application are as follows: the application provides a power stabilizing method of a power amplifier, which comprises the steps of firstly adjusting the input power of the power amplifier at each sampling frequency point according to power stepping, establishing a second corresponding table of the input power, the output voltage and the output power at each frequency point, setting a reference temperature and the reference voltage, establishing a third corresponding table of voltage difference and temperature difference, switching a control switch to be connected to an OPA output end to obtain the working frequency and the working power of the power amplifier, obtaining the working frequency according to the second corresponding table, obtaining the target power at the working power, and setting the input power of the power amplifier as the target power; working frequency and working voltage at working power are obtained according to the second corresponding table; acquiring the real-time temperature of the detector through the FPGA, obtaining a real-time temperature difference, and acquiring the working frequency and the real-time voltage difference at the working power according to a third corresponding table; taking the sum of the working voltage and the real-time voltage difference as a final feedback voltage, and outputting the feedback voltage to the OPA in real time through the FPGA so as to control the power of the power amplifier; the application can set the working frequency and the working power of the input power amplifier according to the test requirement, and can accurately compensate the power amplifier in real time at any frequency in the working frequency range within the power range under the working temperature, thereby effectively meeting the requirements of both the test precision and the test speed in the test of the radio frequency chip.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions of the prior art, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flow chart of a power stabilizing method of a power amplifier according to an embodiment of the application;
fig. 2 is a block diagram of a circuit structure for power stabilization according to an embodiment of the present application.
Detailed Description
The conception, specific structure, and technical effects produced by the present application will be clearly and completely described below with reference to the embodiments and the drawings to fully understand the objects, aspects, and effects of the present application. It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other.
Referring to fig. 1 and fig. 2, an embodiment of the present application provides a power stabilizing method of a power amplifier, where an input end of the power amplifier is connected with a VGA, an output end of the power amplifier is connected with a detector, the detector is connected with the VGA (variable gain amplifier ) sequentially through an FPGA and a control switch, an input end of the control switch is also connected with an OPA (operational amplifier ), and an input end of the OPA is respectively connected with an output end of the detector and an output end of the FPGA (Field Programmable Gate Array, field programmable logic gate array);
the method comprises the following steps:
100, equally dividing the working frequency band of the power amplifier into n sampling frequency points, equally dividing the power range of the power amplifier to obtain m power sampling points;
step 200, adjusting the input power of the power amplifier according to power steps at each sampling frequency point, and establishing a second corresponding table of the input power, the output voltage and the output power at each frequency point;
the input power is the power of a radio frequency signal of an input VGA, the output voltage is obtained by sampling an analog voltage signal demodulated by a detector, and the output power is the power of the input power amplified and output by a power amplifier;
step 300, setting a reference temperature and a reference voltage, and establishing a third corresponding table of voltage difference and temperature difference;
the voltage difference DeltaV=V-V0, the temperature difference DeltaT=T-T0, V is real-time voltage, T is real-time temperature, V0 is reference voltage, T0 is reference temperature, the real-time voltage is obtained by sampling signals of analog voltage signals demodulated by the detector, the real-time temperature is obtained by detecting the temperature of the detector in real time through a temperature sensor, the temperature sensor is connected with an FPGA, and the FPGA can obtain the real-time temperature of the detector;
400, switching and connecting a control switch to an OPA output end, obtaining the working frequency and the working power of a power amplifier, obtaining the working frequency and the target power at the working power according to a second corresponding table, and setting the input power of the power amplifier as the target power;
the working frequency is the frequency set by the power amplifier according to the test requirement, and the working power is the output power set by the power amplifier according to the test requirement;
it can be understood that the working frequency and the working power of the power amplifier are preset data, the working frequency should be within the working frequency range, and the working power should be within the power range.
The output end of the power amplifier is connected with the processing module, the processing module is connected with the FPGA, and the processing module is used for recording the obtained target power and feeding back the target power to the FPGA;
step 500, working frequency and working voltage at working power are obtained according to a second corresponding table;
step 600, acquiring the real-time temperature of the detector through the FPGA to obtain a real-time temperature difference, and acquiring the working frequency and the real-time voltage difference at the working power according to a third corresponding table;
and 700, taking the sum of the working voltage and the real-time voltage difference as a final feedback voltage, and outputting the feedback voltage to the OPA in real time through the FPGA so as to perform power compensation on the power amplifier.
The application can set the working frequency and the working power of the input power amplifier according to the test requirement, and can carry out real-time and accurate power compensation on the power amplifier at any frequency in the working frequency range within the power range under the working temperature, thereby effectively meeting the requirements of both test precision and test speed in the radio frequency chip test.
As a further improvement of the foregoing solution, the step 200 includes:
step 210, scanning by a network analyzer to obtain a frequency response curve of the attenuator, and obtaining the corresponding relation between k frequency points and power attenuation values according to the frequency response curve of the attenuator, wherein the frequency response of the attenuator is the power attenuation value of the attenuator at each frequency point in the working frequency band;
220, connecting the output end of the power amplifier with an attenuator, and connecting the other end of the attenuator with a power meter;
the control end of the power meter is connected with the processing module, the processing module is connected with the FPGA, and the processing module is used for acquiring the measurement power acquired by the power meter in real time and feeding back the measurement power to the FPGA;
step 230, selecting one sampling frequency point from n sampling frequency points, selecting three frequency points f11, f12 and f13 adjacent to the sampling frequency point from a first corresponding table, and acquiring corresponding relations (f 11, att (f 11)), (f 12, att (f 12)), (f 13, att (f 13)) of 3 groups of frequency points and power attenuation values according to the first corresponding table, wherein f11 < f12 < f13;
step 240, fitting (f 11, att (f 11)), (f 12, att (f 12)), (f 13, att (f 13)) by using a piecewise least squares parabolic curve to obtain a first fitting formula att (f 0) =k 2 *f0 2 +k 1 *f0+k 0 Wherein f0 ε [ f11, f13 ]]Att (f 0) is a power attenuation function, and the sampling frequency points are substituted into a first fitting formula, namely, the power attenuation value at the sampling frequency points is obtained;
step 250, reading the measured power obtained by measuring the power meter at the sampling frequency point, and performing power compensation on the measured power to obtain output power, wherein pout=pt+att (f 0), pt is the measured power, and Pout is the output power;
step 260, increasing the input power from small to large according to power steps at sampling frequency points, decreasing the input power from large to small according to power steps when the output power reaches the maximum power value until the output power reaches the minimum power value, and performing signal sampling on analog voltage signals demodulated by a detector at each power sampling point to obtain output voltages, so that corresponding relations among m input powers, output voltages and output powers are obtained at each sampling frequency point;
step 270, determining whether n sampling frequency points all obtain corresponding relations of m input powers, output voltages and output powers, if yes, establishing corresponding relations of m input powers, output voltages and output powers at the n sampling frequency points, and obtaining a second corresponding table, where the second corresponding table has m×n corresponding relations.
It should be noted that, when one sampling frequency point is selected from the n sampling frequency points, and after the corresponding relation of the sampling frequency points is obtained, it needs to be determined whether the remaining sampling frequency points also obtain the corresponding relation, that is, whether the n sampling frequency points all obtain the corresponding relation of m input powers, output voltages and output powers, and if not, the next sampling frequency point is continuously selected until the n sampling frequency points all obtain the corresponding relation of m input powers, output voltages and output powers, thereby obtaining the second corresponding table.
The output power is the power value actually output by the power amplifier, the measured power is the power value of the output power attenuated by the attenuator, and the measured power is obtained by measuring by a power meter; the measured power obtained by measuring the power meter is read at the sampling frequency point, the measured power is subjected to power compensation to obtain output power, the output power is compared with the maximum power value, so that whether the output power reaches the maximum power value can be judged, and the output power is compared with the minimum power value, so that whether the output power reaches the minimum power value can be judged.
In this embodiment, the working frequency band is 700MHz to 6000MHz, the working frequency band is divided into n-1 segments to obtain n sampling frequency points, and then power compensation is performed on the measured power of each sampling frequency point. When the power amplifier works normally, the minimum power value output by the power amplifier in the working frequency band is 0, the maximum power value output by the power amplifier in the working frequency band is 40dBm, namely the power range of the power amplifier is 0 to 40dBm, m output powers are obtained by equally dividing the power range, and each output power is generated after the power amplifier amplifies the corresponding input power, and the total of m input powers are obtained.
In this embodiment, since the gain of the power amplifier is not known, the rf signal input to the VGA should use a sufficiently low input power, and by gradually increasing the input power of the rf signal, the output power is increased until the maximum power value (i.e., 40 dBm) is reached, so as to avoid damage to the power amplifier due to the fact that the output power of the power amplifier exceeds the power range because the input power is too high.
Referring to fig. 2, after an output signal at an output end of the power amplifier passes through the wave detector, the wave detector converts the radio frequency signal into an analog voltage signal, the analog voltage signal is an output voltage after signal sampling, and the output voltage is recorded by the processing module and fed back to the FPGA.
In the technical field, since the frequency response curve of the attenuator at each frequency is uneven, that is, the power attenuation value of the attenuator in the working frequency band is not fixed, the attenuation value can be accurately compensated at different frequencies by establishing a functional relation between the frequency and the attenuation value, so that the measured power can be accurately compensated, and the output power can be obtained. In this embodiment, the value of n is set manually, in the existing power compensation technology, when the value of n is larger, the distance between two adjacent frequency points will become larger, so that the time of power compensation will be reduced, but the measured power between two adjacent frequency points may be leaked due to power mutation; when the value of n is smaller, the distance between two adjacent frequency points is smaller, so that the measured power is more accurate, but the corresponding power compensation time is longer; according to the application, the power compensation is performed through the first fitting formula, so that the output power obtained by the power compensation is ensured to have no oscillation in the full frequency band, and stable accuracy of the output power can be ensured even when n takes a larger value.
As a further improvement of the foregoing solution, the step 300 includes:
step 310, setting a reference temperature and a reference power, at the reference temperature, reading detection voltages of the power amplifier when the reference power is output at n frequency points to obtain n detection voltages, setting the n detection voltages as the reference voltages, setting a voltage difference DeltaV=V-V0 and a temperature difference DeltaT=T-T0, wherein V is a real-time voltage, T is a real-time temperature, V0 is the reference voltage, and T0 is the reference temperature;
step 320, setting w temperature values in the working temperature, reading the measured power of w temperature values at each frequency point by a power meter, performing power compensation again on the measured power at each frequency point by n×w sampling points, so that the measured power at the same frequency point is compensated to the reference power at the w temperature values, reading the voltage difference DeltaV corresponding to w temperature differences DeltaT at each frequency point, and obtaining a third corresponding table of the voltage difference DeltaV and the temperature difference DeltaT, wherein n×w corresponding relations are total.
The reference power is any power value in the power range, and the correspondence relationship between the voltage difference DeltaV and the temperature difference DeltaT obtained by any power value in the power range is the same at the same frequency point.
As a further improvement of the foregoing technical solution, in step 400, the calculating the target power at the working power according to the second correspondence table includes:
step 410, selecting three frequency points f1, f2 and f3 adjacent to the working frequency according to the second corresponding table, and respectively selecting 3 output powers adjacent to the working power at the frequency points f1, f2 and f3, wherein 3 output powers are obtained at each frequency point, and f1 is less than f2 and less than f3;
step 420, respectively obtaining input powers of 9 output powers at the frequency points f1, f2 and f3 according to a second corresponding table, obtaining corresponding relations between 3 groups of input powers and output powers at each frequency point, and performing curve fitting on the corresponding relations between 3 groups of input powers and output powers at each frequency point by adopting a piecewise least square parabolic curve fitting algorithm to obtain a second fitting formula group:
Pin(f1)＝a1 2 *Pout 2 +a1 1 *Pout+a1 0 ，
Pin(f2)＝a2 2 *Pout 2 +a2 1 *Pout+a2 0 ，
Pin(f3)＝a3 2 *Pout 2 +a3 1 *Pout+a3 0 ；
wherein Pin (f 1) is an input power function at a frequency point f1, pin (f 2) is an input power function at a frequency point f2, and Pin (f 3) is an input power function at a frequency point f3;
step 430, substituting the working power into the second fitting formula set to obtain an input power Pin1 of the working power at the frequency point f1, an input power Pin2 of the working power at the frequency point f2, and an input power Pin3 of the working power at the frequency point f3, so as to obtain corresponding relations (f 1, pi 1), (f 2, pi 2), (f 3, pi 3) of three sets of frequency points and the input power;
step 440, performing curve fitting on (f 1, pi 1), (f 2, pi 2), (f 3, pi 3) by using a piecewise least squares parabolic curve fitting algorithm to obtain a third fitting formula Pin (f) =a 2 *f 2 +a 1 *f+a 0 Wherein f.epsilon.f 1, f3]Pin (f) is a target power function, and the working frequency is substituted into a third fitting formula, namely, the working frequency and the target power of the working power are obtained.
As a further improvement of the foregoing solution, the step 500 includes:
step 510, respectively obtaining output voltages of 9 output powers at the frequency points f1, f2 and f3 according to the second corresponding table, obtaining corresponding relations between 3 groups of output voltages and output powers at each frequency point, and performing curve fitting on the corresponding relations between 3 groups of output voltages and output powers at each frequency point by adopting a piecewise least square parabolic curve fitting algorithm to obtain a fourth fitting formula group:
V(f1)＝b1 2 *Pout 2 +b1 1 *Pout+b1 0 ，
V(f2)＝b2 2 *Pout 2 +b2 1 *Pout+b2 0 ，
V(f3)＝b3 2 *Pout 2 +b3 1 *Pout+b3 0 ；
wherein V (f 1) is an output voltage function at a frequency point f1, V (f 2) is an output voltage function at a frequency point f2, and V (f 3) is an output voltage function at a frequency point f3;
step 520, substituting the working power into a fourth fitting formula set to obtain an output voltage Vo1 of the working power at a frequency point f1, an output voltage Vo2 of the working power at a frequency point f2, and an output voltage Vo3 of the working power at a frequency point f3, and obtaining corresponding relations (f 1, vo 1), (f 2, vo 2), (f 3, vo 3) of three sets of frequency points and the output voltages;
step 530, performing curve fitting on (f 1, vo 1), (f 2, vo 2), (f 3, vo 3) by adopting a piecewise least squares parabolic curve fitting algorithm to obtain a fifth fitting formula V (f) =b 2 *f 2 +b 1 *f+b 0 Wherein V (f) is a function of the working voltage, and the working frequency is substituted into a fifth fitting formula, namely working voltage at the working frequency and the working power is obtained.
As a further improvement of the foregoing solution, the step 600 includes:
step 610, acquiring real-time temperature T of a detector through an FPGA to obtain real-time temperature difference DeltaT=T-T0, respectively selecting 3 temperature differences adjacent to the real-time temperature difference DeltaT at frequency points f1, f2 and f3, and obtaining 3 temperature differences at each frequency point;
step 620, respectively obtaining the voltage differences of 9 temperature differences at the frequency points f1, f2 and f3 according to a third corresponding table to obtain the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point, and performing curve fitting on the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point by adopting a piecewise least square parabolic curve fitting algorithm to obtain a sixth fitting formula group:
△V(f1)＝c1 2 *△T 2 +c1 1 *△T+c1 0 ，
△V(f2)＝c2 2 *△T 2 +c2 1 *△T+c2 0 ，
△V(f3)＝c3 2 *△T 2 +c3 1 *△T+c3 0 ；
wherein, deltaV (f 1) is the voltage difference function at the frequency point f1, deltaV (f 2) is the voltage difference function at the frequency point f2, deltaV (f 3) is the voltage difference function at the frequency point f3;
step 630, substituting the real-time temperature difference Δt into a sixth fitting formula set to obtain a voltage difference Δv1 of the real-time temperature difference Δt at the frequency point f1, a voltage difference Δv2 of the real-time temperature difference Δt at the frequency point f2, and a voltage difference Δv3 of the real-time temperature difference Δt at the frequency point f3, thereby obtaining three sets of corresponding relations (f 1, Δv1), (f 2, Δv2), (f 3, Δv3) of the frequency points and the voltage differences;
step 640, performing curve fitting on (f 1, [ delta ] V1), (f 2, [ delta ] V2), (f 3, [ delta ] V3) by using a piecewise least squares parabolic curve fitting algorithm to obtain a seventh fitting formula [ delta ] V (f) =c 2 *f 2 +c 1 *f+c 0 Wherein DeltaV (f) is a voltage difference function, and the working frequency is substituted into a seventh fitting formula, namely, the working frequency and the real-time voltage difference DeltaV at the working power are obtained.
As a further improvement of the above technical solution, the control switch is controlled by the FPGA, and when calibrating the power amplifier, the control switch is connected to a preset voltage, and the preset voltage is a reference voltage of the VGA; when the power amplifier works, the control switch is connected to the OPA terminal, and the DA voltage signal and the detection voltage signal given by the FPGA jointly regulate the input voltage of the VGA through the OPA. The preset voltage is a fixed voltage, and the magnitude of the preset voltage is set according to the rated voltage of different VGAs.
In the prior art, the VGA only generates weak power compensation effect, but not the power setting in the full-frequency band full-temperature range, and in order to improve the power stabilization accuracy of the power amplifier, the VGA is required to have smaller voltage resolution.
As a further improvement of the technical scheme, the embodiment provided by the application has the advantages that through the feedback control of the FPGA, the VGA has smaller gain variation in a larger control voltage range, and when the control voltage is 2.5V, the output gain variation is 5dB, namely, the control range of the FPGA is 5dB/2.5 V=0.002 dB/mV; in this embodiment, the number of bits of the analog-to-digital converter used by the FPGA is 16 bits, and the reference voltage is 5V, so that the resolution of the analog-to-digital converter is 0.15mv×16=2.44 mV, and the resolution of the FPGA is 2.44mv×0.002db/mv=0.005 dB, so that the power amplifier can be accurately feedback controlled.
While the present application has been described in considerable detail and with particularity with respect to several described embodiments, it is not intended to be limited to any such detail or embodiments or any particular embodiment, but is to be considered as providing a broad interpretation of such claims by reference to the appended claims in light of the prior art and thus effectively covering the intended scope of the application. Furthermore, the foregoing description of the application has been presented in its embodiments contemplated by the inventors for the purpose of providing a useful description, and for the purposes of providing a non-essential modification of the application that may not be presently contemplated, may represent an equivalent modification of the application.
Claims (9)
1. The power stabilizing method of the power amplifier is characterized in that the input end of the power amplifier is connected with VGA, the output end of the power amplifier is connected with a detector, the detector is connected with the VGA sequentially through the FPGA and a control switch, the input end of the control switch is also connected with OPA, and the input end of the OPA is respectively connected with the output end of the detector and the output end of the FPGA;
the method comprises the following steps:
100, equally dividing the working frequency band of the power amplifier into n sampling frequency points, equally dividing the power range of the power amplifier to obtain m power sampling points;
step 200, adjusting the input power of the power amplifier according to power steps at each sampling frequency point, and establishing a second corresponding table of the input power, the output voltage and the output power at each frequency point; the input power is the power of a radio frequency signal of an input VGA, the output voltage is obtained by sampling an analog voltage signal demodulated by a detector, and the output power is the power of the input power amplified and output by a power amplifier;
step 300, setting a reference temperature and a reference voltage, and establishing a third corresponding table of voltage difference and temperature difference; wherein the voltage difference DeltaV=V-V0, the temperature difference DeltaT=T-T0, V is real-time voltage, T is real-time temperature, V0 is reference voltage, T0 is reference temperature;
400, switching and connecting a control switch to an OPA output end, obtaining the working frequency and the working power of a power amplifier, obtaining the working frequency and the target power at the working power according to a second corresponding table, and setting the input power of the power amplifier as the target power; the working frequency is the frequency set by the power amplifier according to the test requirement, and the working power is the output power set by the power amplifier according to the test requirement;
step 500, working frequency and working voltage at working power are obtained according to a second corresponding table;
step 600, acquiring the real-time temperature of the detector through the FPGA to obtain a real-time temperature difference, and acquiring the working frequency and the real-time voltage difference at the working power according to a third corresponding table;
and 700, taking the sum of the working voltage and the real-time voltage difference as a final feedback voltage, and outputting the feedback voltage to the OPA in real time through the FPGA so as to control the power of the power amplifier.
2. The method of power stabilization of a power amplifier according to claim 1, wherein said step 200 comprises:
step 210, scanning by a network analyzer to obtain a frequency response curve of the attenuator, and obtaining the corresponding relation between k frequency points and power attenuation values according to the frequency response curve of the attenuator, wherein the frequency response of the attenuator is the power attenuation value of the attenuator at each frequency point in the working frequency band;
220, connecting the output end of the power amplifier with an attenuator, and connecting the other end of the attenuator with a power meter;
step 230, selecting one sampling frequency point from n sampling frequency points, selecting three frequency points f11, f12 and f13 adjacent to the sampling frequency point from a first corresponding table, and acquiring corresponding relations (f 11, att (f 11)), (f 12, att (f 12)), (f 13, att (f 13)) of 3 groups of frequency points and power attenuation values according to the first corresponding table, wherein f11 < f12 < f13;
step 240, fitting (f 11, att (f 11)), (f 12, att (f 12)), (f 13, att (f 13)) by using a piecewise least squares parabolic curve to obtain a first fitting formula att (f 0) =k 2 *f0 2 +k 1 *f0+k 0 Wherein f0 ε [ f11, f13 ]]Att (f 0) is a power attenuation function, and the sampling frequency points are substituted into a first fitting formula, namely, the power attenuation value at the sampling frequency points is obtained;
step 250, reading the measured power obtained by measuring the power meter at the sampling frequency point, and performing power compensation on the measured power to obtain output power, wherein pout=pt+att (f 0), pt is the measured power, and Pout is the output power;
step 260, increasing the input power from small to large according to power steps at sampling frequency points, decreasing the input power from large to small according to power steps when the output power reaches the maximum power value until the output power reaches the minimum power value, and performing signal sampling on analog voltage signals demodulated by a detector at each power sampling point to obtain output voltages, so that corresponding relations among m input powers, output voltages and output powers are obtained at each sampling frequency point;
step 270, determining whether n sampling frequency points all obtain corresponding relations of m input powers, output voltages and output powers, if yes, establishing corresponding relations of m input powers, output voltages and output powers at the n sampling frequency points, and obtaining a second corresponding table, where the second corresponding table has m×n corresponding relations.
3. The method of power stabilization of a power amplifier according to claim 2, wherein said step 300 comprises:
step 310, setting a reference temperature and a reference power, at the reference temperature, reading detection voltages of the power amplifier when the reference power is output at n frequency points to obtain n detection voltages, setting the n detection voltages as the reference voltages, setting a voltage difference DeltaV=V-V0 and a temperature difference DeltaT=T-T0, wherein V is a real-time voltage, T is a real-time temperature, V0 is the reference voltage, and T0 is the reference temperature;
step 320, setting w temperature values in the working temperature, reading the measured power of w temperature values at each frequency point by a power meter, performing power compensation again on the measured power at each frequency point by n×w sampling points, so that the measured power at the same frequency point is compensated to the reference power at the w temperature values, reading the voltage difference DeltaV corresponding to w temperature differences DeltaT at each frequency point, and obtaining a third corresponding table of the voltage difference DeltaV and the temperature difference DeltaT, wherein n×w corresponding relations are total.
4. A method for stabilizing power of a power amplifier according to claim 3, wherein in step 400, the working frequency and the target power at the working power are obtained according to the second mapping table, and the method comprises:
step 410, selecting three frequency points f1, f2 and f3 adjacent to the working frequency according to the second corresponding table, and respectively selecting 3 output powers adjacent to the working power at the frequency points f1, f2 and f3, wherein 3 output powers are obtained at each frequency point, and f1 is less than f2 and less than f3;
step 420, respectively obtaining input powers of 9 output powers at the frequency points f1, f2 and f3 according to a second corresponding table, obtaining corresponding relations between 3 groups of input powers and output powers at each frequency point, and performing curve fitting on the corresponding relations between 3 groups of input powers and output powers at each frequency point by adopting a piecewise least square parabolic curve fitting algorithm to obtain a second fitting formula group:
Pin(f1)＝a1 2 *Pout 2 +a1 1 *Pout+a1 0 ，
Pin(f2)＝a2 2 *Pout 2 +a2 1 *Pout+a2 0 ，
Pin(f3)＝a3 2 *Pout 2 +a3 1 *Pout+a3 0 ；
wherein Pin (f 1) is an input power function at a frequency point f1, pin (f 2) is an input power function at a frequency point f2, and Pin (f 3) is an input power function at a frequency point f3;
step 430, substituting the working power into the second fitting formula set to obtain an input power Pin1 of the working power at the frequency point f1, an input power Pin2 of the working power at the frequency point f2, and an input power Pin3 of the working power at the frequency point f3, so as to obtain corresponding relations (f 1, pi 1), (f 2, pi 2), (f 3, pi 3) of three sets of frequency points and the input power;
step 440, performing curve fitting on (f 1, pi 1), (f 2, pi 2), (f 3, pi 3) by using a piecewise least squares parabolic curve fitting algorithm to obtain a third fitting formula Pin (f) =a 2 *f 2 +a 1 *f+a 0 Wherein f.epsilon.f 1, f3]Pin (f) is a target power function, and the working frequency is substituted into a third fitting formula, namely, the working frequency and the target power of the working power are obtained.
5. The method of power stabilization of a power amplifier according to claim 4, wherein said step 500 comprises:
step 510, respectively obtaining output voltages of 9 output powers at the frequency points f1, f2 and f3 according to the second corresponding table, obtaining corresponding relations between 3 groups of output voltages and output powers at each frequency point, and performing curve fitting on the corresponding relations between 3 groups of output voltages and output powers at each frequency point by adopting a piecewise least square parabolic curve fitting algorithm to obtain a fourth fitting formula group:
V(f1)＝b1 2 *Pout 2 +b1 1 *Pout+b1 0 ，
V(f2)＝b2 2 *Pout 2 +b2 1 *Pout+b2 0 ，
V(f3)＝b3 2 *Pout 2 +b3 1 *Pout+b3 0 ；
wherein V (f 1) is an output voltage function at a frequency point f1, V (f 2) is an output voltage function at a frequency point f2, and V (f 3) is an output voltage function at a frequency point f3;
step 520, substituting the working power into a fourth fitting formula set to obtain an output voltage Vo1 of the working power at a frequency point f1, an output voltage Vo2 of the working power at a frequency point f2, and an output voltage Vo3 of the working power at a frequency point f3, and obtaining corresponding relations (f 1, vo 1), (f 2, vo 2), (f 3, vo 3) of three sets of frequency points and the output voltages;
step 530, performing curve fitting on (f 1, vo 1), (f 2, vo 2), (f 3, vo 3) by adopting a piecewise least squares parabolic curve fitting algorithm to obtain a fifth fitting formula V (f) =b 2 *f 2 +b 1 *f+b 0 Wherein V (f) is a function of the working voltage, and the working frequency is substituted into a fifth fitting formula, namely working voltage at the working frequency and the working power is obtained.
6. The method of power stabilization of a power amplifier according to claim 5, wherein said step 600 comprises:
step 610, acquiring real-time temperature T of a detector through an FPGA to obtain real-time temperature difference DeltaT=T-T0, respectively selecting 3 temperature differences adjacent to the real-time temperature difference DeltaT at frequency points f1, f2 and f3, and obtaining 3 temperature differences at each frequency point;
step 620, respectively obtaining the voltage differences of 9 temperature differences at the frequency points f1, f2 and f3 according to a third corresponding table to obtain the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point, and performing curve fitting on the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point by adopting a piecewise least square parabolic curve fitting algorithm to obtain a sixth fitting formula group:
△V(f1)＝c1 2 *△T 2 +c1 1 *△T+c1 0 ，
△V(f2)＝c2 2 *△T 2 +c2 1 *△T+c2 0 ，
△V(f3)＝c3 2 *△T 2 +c3 1 *△T+c3 0 ；
wherein, deltaV (f 1) is the voltage difference function at the frequency point f1, deltaV (f 2) is the voltage difference function at the frequency point f2, deltaV (f 3) is the voltage difference function at the frequency point f3;
step 630, substituting the real-time temperature difference Δt into a sixth fitting formula set to obtain a voltage difference Δv1 of the real-time temperature difference Δt at the frequency point f1, a voltage difference Δv2 of the real-time temperature difference Δt at the frequency point f2, and a voltage difference Δv3 of the real-time temperature difference Δt at the frequency point f3, thereby obtaining three sets of corresponding relations (f 1, Δv1), (f 2, Δv2), (f 3, Δv3) of the frequency points and the voltage differences;
step 640, performing curve fitting on (f 1, [ delta ] V1), (f 2, [ delta ] V2), (f 3, [ delta ] V3) by using a piecewise least squares parabolic curve fitting algorithm to obtain a seventh fitting formula [ delta ] V (f) =c 2 *f 2 +c 1 *f+c 0 Wherein DeltaV (f) is a voltage difference function, and the working frequency is substituted into a seventh fitting formula, namely, the working frequency and the real-time voltage difference DeltaV at the working power are obtained.
7. A method of power stabilization of a power amplifier according to claim 1, characterized in that: the working frequency band of the power amplifier is 700MHz to 6000MHz, and the power range is 0dBm to 40dBm.
8. A method of power stabilization of a power amplifier according to claim 1, characterized in that the control switch is controlled by an FPGA, the control switch being connected to a preset voltage, the preset voltage being the reference voltage of the VGA, when the power amplifier is calibrated; when the power amplifier works, the control switch is connected to the OPA terminal, the DA voltage signal and the detection voltage signal given by the FPGA jointly regulate the input voltage of the VGA through the OPA, the preset voltage is a fixed voltage, and the preset voltage is set according to rated voltages of different VGAs.
9. A method of power stabilization for a power amplifier according to claim 1, characterized in that the control resolution of the FPGA is less than 0.005dB.
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