CN111769126B - Photosensitive pixel module, image sensor and electronic equipment - Google Patents

Photosensitive pixel module, image sensor and electronic equipment Download PDF

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CN111769126B
CN111769126B CN202010548644.XA CN202010548644A CN111769126B CN 111769126 B CN111769126 B CN 111769126B CN 202010548644 A CN202010548644 A CN 202010548644A CN 111769126 B CN111769126 B CN 111769126B
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photosensitive pixel
layer
image sensor
avalanche
cathode
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CN111769126A (en
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张学勇
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Priority to PCT/CN2021/088659 priority patent/WO2021253971A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14618Containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14625Optical elements or arrangements associated with the device
    • H01L27/14627Microlenses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1463Pixel isolation structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14634Assemblies, i.e. Hybrid structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14636Interconnect structures

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

The present disclosure relates to a photosensitive pixel module, an image sensor, and an electronic device, the photosensitive pixel module comprising: the protection ring, the plurality of photosensitive pixel units and the shallow groove are isolated, and the plurality of photosensitive pixel units are arranged in the protection ring; the shallow slot isolation is arranged between any two adjacent photosensitive pixel units in the plurality of photosensitive pixel units. The plurality of photosensitive pixel units are arranged in the protection ring, shallow slot isolation is arranged between any two adjacent photosensitive pixel units in the plurality of photosensitive pixel units for isolation, photoelectric conversion can be realized, and as the plurality of photosensitive pixel units share the protection ring, the occupied area of the protection ring is reduced, the occupied ratio and the filling factor of the photosensitive pixel units in the unit area are increased, and the photon sensitivity and the imaging quality of the image sensor are improved.

Description

Photosensitive pixel module, image sensor and electronic equipment
Technical Field
The disclosure relates to the technical field of electronic equipment, in particular to a photosensitive pixel module, an image sensor and electronic equipment.
Background
In an image sensor, a plurality of photosensitive pixel units are distributed in an array, and an optical signal is generally converted into an electrical signal by the photosensitive pixel units. Generally, the higher the area ratio of the photosensitive pixel unit in the unit area of the image sensor, the higher the quality of imaging by the image sensor. At present, due to the problems of the structure of a pixel sensing unit and the like, the area occupation of a photosensitive pixel unit in a unit area in an image sensor is relatively low, which is not beneficial to the improvement of imaging quality.
It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
An object of the present disclosure is to provide a photosensitive pixel module, an image sensor, and an electronic device, so as to increase an area ratio of a photosensitive pixel unit per unit area in the image sensor at least to some extent.
According to a first aspect of the present disclosure, there is provided a photosensitive pixel module, the photosensitive pixel module comprising:
A protective ring;
the plurality of photosensitive pixel units are arranged in the protection ring;
Shallow slot isolation is arranged between any two adjacent photosensitive pixel units in the plurality of photosensitive pixel units.
According to a second aspect of the present disclosure, there is provided an image sensor comprising the above-described photosensitive pixel module.
According to a third aspect of the present disclosure, there is provided an electronic device comprising the image sensor described above.
According to the photosensitive pixel module provided by the embodiment of the disclosure, the plurality of photosensitive pixel units are arranged in the protection ring, and the shallow slot isolation is arranged between any two adjacent photosensitive pixel units in the plurality of photosensitive pixel units for isolation, so that photoelectric conversion can be realized.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure. It will be apparent to those of ordinary skill in the art that the drawings in the following description are merely examples of the disclosure and that other drawings may be derived from them without undue effort.
Fig. 1 is a schematic structural view of a first photosensitive pixel module according to an exemplary embodiment of the present disclosure;
fig. 2 is a schematic structural view of a second photosensitive pixel module according to an exemplary embodiment of the present disclosure;
fig. 3 is a schematic structural view of a third photosensitive pixel module according to an exemplary embodiment of the present disclosure;
Fig. 4 is a schematic structural view of a fourth photosensitive pixel module according to an exemplary embodiment of the present disclosure;
fig. 5 is a schematic structural view of a fifth photosensitive pixel module according to an exemplary embodiment of the present disclosure;
fig. 6 is a schematic structural view of a sixth photosensitive pixel module according to an exemplary embodiment of the present disclosure;
FIG. 7 is a schematic diagram of a pixel cell spacing in a pixel module according to an exemplary embodiment of the disclosure;
fig. 8 is a schematic structural view of an image sensor according to an exemplary embodiment of the present disclosure;
fig. 9 is a schematic structural diagram of an electronic device according to an exemplary embodiment of the present disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus detailed descriptions thereof will be omitted.
Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of an icon to another component, these terms are used in this specification for convenience only, such as in terms of the orientation of the examples described in the figures. It will be appreciated that if the device of the icon is flipped upside down, the recited "up" component will become the "down" component. When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.
The terms "a," "an," "the," and "said" are used to indicate the presence of one or more elements/components/etc.; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. in addition to the listed elements/components/etc.
In this exemplary embodiment, there is provided a photosensitive pixel module 100 first, as shown in fig. 1, the photosensitive pixel module 100 includes: the light-sensitive pixel unit(s) 120 and the shallow trench isolation 130 (STI, shallow trench isolation) are arranged in the guard ring 110, and the plurality of light-sensitive pixel units 120 are arranged in the guard ring 110; a shallow trench isolation 130 is provided between any two adjacent photosensitive pixel units 120 of the plurality of photosensitive pixel units 120 within the same guard ring 110.
According to the photosensitive pixel module 100 provided by the embodiment of the disclosure, the plurality of photosensitive pixel units 120 are arranged in the protection ring 110, and the shallow slot isolation 130 is arranged between any two adjacent photosensitive pixel units 120 in the plurality of photosensitive pixel units 120 for isolation, so that photoelectric conversion can be realized, and the area occupied by the protection ring 110 is reduced, the duty ratio and the filling factor of the photosensitive pixel units 120 in the unit area are increased, and the imaging quality of the image sensor is improved.
The following will describe each portion of the photosensitive pixel module 100 provided in the embodiment of the present disclosure in detail:
The photosensitive pixel cell 120 may include SPAD (Single-photon avalanche diode, single photon avalanche diode), which is a photodiode operating at large reverse bias voltages, essentially a PN junction. During normal operation, reverse bias voltage (-15V to-30V) larger than avalanche breakdown is applied to two ends of the PN junction. Since the PN junction is reverse biased, no current flows. But when only a single photon enters the PN junction depletion region, photo-generated carriers are triggered. The photo-generated carriers continuously impact and excite other carriers in the PN junction under the action of an electric field formed by the large bias voltage, so that large current is generated. The whole process resembles an avalanche. And is therefore called a single photon avalanche diode. The single photon avalanche diode is mainly applied in dToF, is a key device for measuring single photons in dToF (Direct-time of flight), and is also the most basic device of one pixel.
On this basis, as shown in fig. 2, the photosensitive pixel unit 120 includes: the substrate 122, the avalanche layer 121, the cathode diffusion layer 124 and the cathode layer 123, the substrate 122 is provided with an anode region 1221, the substrate 122 is provided with a first accommodating part 1222, the first accommodating part 1222 is positioned at one side of the anode region 1221, and one side of the first accommodating part 1222 away from the anode region 1221 is provided with a first opening 1223 (the opening is positioned at one surface of the substrate); the avalanche layer 121 is disposed on the first accommodating portion 1222 of the substrate 122; the cathode layer 123 is disposed on the avalanche layer 121, and the cathode layer 123 is disposed on a side of the avalanche layer 121 away from the anode region 1221, and the cathode layer 123 is exposed to a first opening 1223 of the first accommodating portion 1222; the cathode diffusion layer 124 is provided between the avalanche layer 121 and the cathode layer 123. The shallow trench isolation 130 is disposed between the cathode diffusion layers 124 of two adjacent photosensitive pixel units 120. The first receiving portion 1222 may be a cavity having a first opening 1223.
Here, the embodiments of the present disclosure provide an n+/p-well avalanche photodiode, which is merely illustrative, and the photosensitive pixel module provided in the embodiments of the present disclosure may also be used for other n+/p-well avalanche photodiodes, which is not limited thereto.
By further forming a cathode diffusion layer 124 between the cathode layer 123 and the avalanche layer 121, the avalanche layer 121 is moved from the surface of the cathode layer 123 into a region away from the surface, which enables the avalanche region to be kept away from the shallow trench isolation 130. Since si—sio 2 at the interface of shallow trench isolation 130 has a large number of trap levels, it can capture carriers, resulting in a strong electric field in avalanche layer 121, and if the captured carriers are close to avalanche layer 121, they will easily enter avalanche layer 121 to cause avalanche ionization, resulting in device breakdown errors, and as a result, the DCR (Dark count rate) of the device is too large, which can be solved by cathode diffusion layer 124.
Illustratively, a stepped hole is provided on the substrate 122, which may be a stepped square hole or a stepped round hole. The avalanche layer 121 may be disposed at the bottom of the stepped hole, where the stepped hole is a blind hole, and the bottom of the stepped hole refers to an end of the stepped hole away from the first opening 1223. The cathode diffusion layer 124 is disposed on a side of the avalanche layer 121 away from the bottom of the stepped hole, and a side of the cathode diffusion layer 124 away from the avalanche layer 121 may be exposed to the first opening 1223 of the stepped hole. The cathode layer 123 is embedded in the cathode diffusion layer 124, and the cathode layer 123 is exposed to a surface of the cathode diffusion layer 124 remote from the avalanche layer 121. In the surface where the avalanche layer 121 and the cathode diffusion layer 124 contact each other, the area of the contact surface of the cathode diffusion layer 124 is larger than the area of the contact surface of the avalanche layer 121. As shown in fig. 3, the side of the substrate 122 where the first opening 1223 of the stepped hole is located may extend to be flush with the surface of the cathode layer 123 remote from the avalanche layer 121. Alternatively, as shown in fig. 2, the side of the substrate 122 where the first opening 1223 of the stepped hole is located may extend to the bottom end of the shallow trench isolation 130. The bottom end of the shallow trench isolation 130 refers to the end of the shallow trench isolation 130 embedded in the substrate 122. The top end surface of the shallow trench isolation 130 is flush with the top end surface of the cathode diffusion layer 124.
The depth of the shallow trench isolation 130 is greater than the depth of the cathode layer 123, and the depth of the shallow trench isolation 130 is less than the depth of the cathode diffusion layer 124. Here, the depth refers to the distance of each device in the direction from the cathode layer 123 to the avalanche layer 121. The shallow trench isolation 130 may be 1 to 3 microns deep.
Shallow trench isolation 130 may be deposited through a silicon nitride mask, patterned, etched to form trenches, and the trenches filled with deposited oxide. In forming the shallow trench isolation 130, a silicon nitride layer may first be deposited on the semiconductor substrate 122, and then patterned to form a hard mask; then subsequently etching the substrate 122 to form trenches between adjacent cathode diffusion layers 124; finally, the trench is filled with oxide to form the device shallow trench isolation 130. By way of example, the cross-sectional shape of the shallow trench isolation 130 may be trapezoidal and the filled oxide may be silicon dioxide.
Cathode layer 123 and cathode diffusion layer 124 are doped with a first type dopant and avalanche layer 121 and substrate 122 are doped with a second type dopant. By way of example, the cathode layer 123 may be an n-type heavily doped semiconductor layer (such as an n-type heavily doped silicon layer). The cathode diffusion layer 124 may be an n-type doped semiconductor layer (such as n-type silicon) having a doping concentration less than that of the cathode layer 123. Avalanche layer 121 may be a p-type heavily doped semiconductor layer (such as a p-type heavily doped silicon layer). The substrate 122 may be a semiconductor layer that may be p-doped (e.g., p-type silicon) with a doping concentration less than the avalanche layer 121.
In the embodiment of the disclosure, the n+/p-well type pn junction design is adopted, and electron ionization is mainly carried out when n+/p-well type avalanche breakdown is carried out, and the electron mobility is about 3 times higher than the hole mobility, so that the electron ionization is easier than the hole ionization. The sensitivity of the image sensor is improved, namely the photon detection efficiency is higher. And the p-type substrate 122 is adopted, the p-type substrate 122 is usually adopted in the CMOS process, and firstly, usually, an integrated circuit tends to adopt an NMOS transistor as a main part, because the NMOS transistor is electronically conductive, and the electronic mobility is about 3 times that of a PMOS transistor with the same condition; second, the NMOS transistor may be directly formed on the p-substrate 122, and the p-type silicon substrate 122 may be directly grounded, so that the bias voltage during operation of the image sensor can be reduced, and the noise signal can be stably reduced.
The photosensitive pixel module 100 provided by the embodiments of the present disclosure may be used in BSI (Backside-illuminated) image sensors. BSI techniques may employ n+/p-well techniques, with avalanche regions created primarily in p-wells (p-wells) by electron ionization. The electron ionization probability is about 3 times higher than the hole ionization probability. The n+/p-well in the BSI image sensor adopts electron avalanche ionization, so that the ionization rate is high, and the photon detection efficiency PDE is high.
On this basis, as shown in fig. 4, the photosensitive pixel module 100 provided in the embodiment of the disclosure may further include a signal collecting layer 140, a color film layer 160 and a light converging layer 150, where the pixel collecting layer is stacked on a side of the photosensitive pixel unit 120 far away from the light inlet side, and the signal collecting layer 140 includes a signal collecting circuit, where the signal collecting circuit is connected with the photosensitive pixel unit 120. The color film layer 160 is disposed on the light-incident side of the photosensitive pixel unit 120. The light converging layer 150 is disposed on the light-entering side of the photosensitive pixel unit 120, and the light converging layer 150 is configured to converge light on the photosensitive pixel unit 120.
The light-entering side of the photosensitive pixel unit 120 may be a side of the substrate 122 away from the cathode layer 123, and the signal collecting layer 140 is disposed on a side of the photosensitive pixel unit 120 away from the light-entering side, that is, light can directly enter the photosensitive pixel unit 120. The single photon avalanche diode in the photosensitive pixel cell 120 generates an avalanche current under illumination. The signal acquisition circuitry in the signal acquisition layer 140 receives the avalanche current and transmits the avalanche current to the processor.
The signal acquisition circuit may acquire the avalanche signal by means of progressive scanning. A plurality of rows of circuit units are disposed in the signal acquisition circuit layer, each circuit unit being connected to a photosensitive pixel unit 120. The circuit units are scanned row by row while the signals are collected, and the photoelectric signals of the photosensitive pixel units 120 are acquired row by row.
The color film layer 160 may include a plurality of color light transmitting units, such as RGB light transmitting units. The RGB light transmitting units are distributed in a staggered mode. Each photosensitive pixel unit 120 corresponds to a light transmitting unit one by one, and illustratively, any R light transmitting unit is located above a pixel sensing unit, any G light transmitting unit is located above a pixel sensing unit, and any B light transmitting unit is located above a pixel sensing unit.
The light convergence layer 150 may be disposed on a side of the color film layer 160 remote from the photosensitive pixel unit 120, and the light convergence layer 150 may include an anti-reflection film layer and a microlens array. The anti-reflection film layer is disposed on a side of the color film layer 160 away from the photosensitive pixel unit 120, and the microlens array is disposed on a side of the anti-reflection film layer away from the color film layer 160. The external light passes through the microlens array, the anti-reflection film layer and the color film layer 160 and then enters the photosensitive pixel unit 120. The incident light is converged in the ionization region of the corresponding avalanche layer 121 by using the microlens, and the reflected light is reduced by the anti-reflection film layer, so that the photon detection efficiency PDE of the device can be improved. Of course, in practical applications, the photosensitive pixel module 100 provided in the embodiments of the present disclosure may further improve the photon detection efficiency PDE of the device in other manners, which is not limited in particular in the embodiments of the present disclosure.
Or as shown in fig. 5, the photosensitive pixel unit 120 provided in the embodiment of the present disclosure may include: the cathode layer 123 is arranged on the substrate 122, the cathode layer 123 is provided with a second accommodating part 1231, and the second accommodating part 1231 is provided with a second opening 1232 at one side far away from the substrate 122; the avalanche layer 121 is embedded on a side of the cathode layer 123 away from the substrate 122, and the avalanche layer 121 is exposed to a second opening 1232 of the cathode layer 123; the anode layer 125 is provided on the side of the avalanche layer 121 remote from the substrate 122. Wherein the anode layer 125 may be embedded on the side of the avalanche layer 121 remote from the cathode layer 123. The second receiving part 1231 may be a cavity having a second opening 1232.
Here, the embodiments of the present disclosure provide an avalanche photodiode with a p+/n-well structure, which is merely illustrative, and the photosensitive pixel module provided in the embodiments of the present disclosure may also be used for avalanche photodiodes with other p+/n-well structures, which is not limited thereto.
On the basis that the cathode layer 123 comprises a first type dopant, the avalanche layer 121, the anode layer 125 and the substrate 122 comprise a second type dopant, and the doping concentration of the avalanche layer 121 is smaller than that of the anode layer. Illustratively, the cathode layer 123 may be an n-type heavily doped semiconductor layer, the cathode layer 123 forming an n-well. Anode layer 125 may be a p-type heavily doped semiconductor layer and avalanche layer 121 may be a p-type doped semiconductor with avalanche layer 121 having a lower doping concentration than the anode layer.
The avalanche layer 121 in any two adjacent photosensitive pixel cells 120 of the plurality of photosensitive pixel cells 120 within the same guard ring 110 is isolated by a shallow trench isolation 130, the depth of the shallow trench isolation 130 being greater than the depth of the anode layer and less than the depth of the avalanche layer 121.
The photosensitive pixel cell 120 may be used in an FSI (Front-illuminated) image sensor. As shown in fig. 6, the photosensitive pixel module 100 further includes: the signal acquisition layer 140, the color film layer 160 and the light convergence layer 150, the pixel acquisition layer stacks and locates the light inlet side of sensitization pixel unit 120, includes signal acquisition circuit in the signal acquisition layer 140, and signal acquisition circuit and sensitization pixel unit 120 are connected. The color film layer 160 is disposed on a side of the signal acquisition layer 140 away from the photosensitive pixel unit 120. The light converging layer 150 is disposed on the light-entering side of the photosensitive pixel unit 120, and the light converging layer 150 is configured to converge light on the photosensitive pixel unit 120. In the FSI image sensor, the light enters the photosensitive pixel unit 120 after passing through the signal acquisition layer 140, so the color film layer 160 and the light converging layer 150 are located at a side of the signal acquisition layer 140 away from the photosensitive pixel unit 120.
The signal acquisition circuit may acquire the avalanche signal by means of progressive scanning. A plurality of rows of circuit units are disposed in the signal acquisition circuit layer, each circuit unit being connected to a photosensitive pixel unit 120. The circuit units are scanned row by row while the signals are collected, and the photoelectric signals of the photosensitive pixel units 120 are acquired row by row.
The color film layer 160 may include a plurality of color light transmitting units, such as RGB light transmitting units. The RGB light transmitting units are distributed in a staggered mode. Each photosensitive pixel unit 120 corresponds to a light transmitting unit one by one, and illustratively, any R light transmitting unit is located above a pixel sensing unit, any G light transmitting unit is located above a pixel sensing unit, and any B light transmitting unit is located above a pixel sensing unit.
The light convergence layer 150 may be disposed on a side of the color film layer 160 remote from the photosensitive pixel unit 120, and the light convergence layer 150 may include an anti-reflection film layer and a microlens array. The anti-reflection film layer is disposed on a side of the color film layer 160 away from the photosensitive pixel unit 120, and the microlens array is disposed on a side of the anti-reflection film layer away from the color film layer 160. The external light passes through the microlens array, the anti-reflection film layer and the color film layer 160 and then enters the photosensitive pixel unit 120. The incident light is converged in the ionization region of the corresponding avalanche layer 121 by using the microlens, and the reflected light is reduced by the anti-reflection film layer, so that the photon detection efficiency PDE of the device can be improved. Of course, in practical applications, the photosensitive pixel module 100 provided in the embodiments of the present disclosure may further improve the photon detection efficiency PDE of the device in other manners, which is not limited in particular in the embodiments of the present disclosure.
As shown in fig. 2, the guard ring 110 may include a deep trench isolation 111 (DTI, deep trenchisolation), the deep trench isolation 111 having a closed loop shape, and the deep trench isolation 111 surrounding the plurality of photosensitive pixel cells 120. The deep trench isolation 111 may be formed by etching a U-shaped trench on the substrate 122 using reactive ions and then filling the U-shaped trench with a conductive material.
Note that in the manufacturing process of the plurality of photosensitive pixel units 120 in the embodiment of the present disclosure, the substrate 122 may be a monolithic substrate 122, and the avalanche layer 121, the cathode layer 123, and the like are formed in the holes by forming holes on the substrate 122.
Alternatively, as shown in fig. 5, the guard ring 110 may include a semiconductor guard ring 112, where the semiconductor guard ring 112 is disposed on the cathode layer 123, and the semiconductor guard ring 112 has a closed ring shape. The material of the semiconductor guard ring 112 may be a semiconductor ring having a different doping concentration than the other layers. For example, a heavily doped semiconductor ring (p-type heavily doped) may be disposed on the substrate 122. Alternatively, an n-type semiconductor guard ring 112 may be disposed on the substrate 122, where the n-type semiconductor guard ring 112 has a doping concentration less than that of the cathode layer 123. Of course, in practical applications, the guard ring 110 provided in the embodiments of the present disclosure may also be made of other materials, which is not specifically limited in the embodiments of the present disclosure.
When the guard ring 110 includes the semiconductor guard ring 112, a deep trench isolation 170 having a trapezoid cross section may be provided in addition to the annular semiconductor guard ring 112. The deep trench isolation 170 can prevent optical crosstalk of adjacent pixel regions, prevent electrical crosstalk of carriers, and can improve light collection efficiency of the photosensitive pixel cells 120 within the guard ring 110.
In the embodiment of the present disclosure, a plurality of photosensitive pixel units 120 may be disposed in one protection ring 110, and any adjacent two photosensitive pixel units 120 of the plurality of photosensitive pixel units 120 are separated by a shallow trench isolation 130. For example, the photosensitive pixel unit 120 may be a rectangular parallelepiped photosensitive pixel unit 120, and the guard ring 110 may be rectangular frame-shaped. The plurality of photosensitive pixel units 120 may be distributed in an array within the protection ring 110, for example, the number of pixel sensing units within one protection ring 110 may be 2, 3, 4, 5 …, 16, etc., and the distribution manner of the photosensitive pixel units 120 within the protection ring 110 may be 1×2, 1×3, 2×2, 1×5× 5 … 4, etc. Of course, in practical applications, the number of the photosensitive pixel units 120 in one protection ring 110 may be other numbers, and the arrangement manner thereof may be other manners, which is not limited to this embodiment of the disclosure.
Typically, to reduce premature breakdown of the pixel sensor cell, the guard ring 110 has a width of at least 1 micron, and the process requires a minimum isolation well of at least 0.5 microns. The distance between the active photosensitive pixel cells 120 is therefore at least 2.5 microns. In the related art, each pixel needs to be surrounded by a guard ring 110 structure. The minimum distance between the pixel avalanche layer 121 and the guard ring 110 is limited by the technical process, the minimum distance between the avalanche layer 121 and the guard ring 110 is1 micron, and the width of the guard ring 110 is not less than 0.5 micron. This directly results in a fill factor FF of the image sensor of less than 20% when the pixel pitch (pixel pitch) in the image sensor is less than 5 microns. As shown in fig. 7, in the embodiment of the disclosure, shallow trench isolation 130 is used to reduce the minimum distance between the photosensitive pixel units 120 and the photosensitive pixel units 120 from 2la+l DTI +.2.5 micrometers to L STI =1 micrometers, and the distance between adjacent pixels can be reduced to 1 micrometer by the shallow trench isolation 130 and the common guard ring 110.
The photosensitive pixel module 100 provided in the embodiment of the disclosure is applicable to any wavelength from visible light to near infrared light, but considering that a 940nm laser light source is adopted by a similar time-of-flight sensor at present to avoid interference of solar background light, the thickness of the silicon wafer of the photosensitive pixel module 100 can be controlled to be about 10 micrometers to 3 micrometers, because the penetration depth of the 940nm light source in the silicon wafer is about 10 micrometers. The thickness of the photosensitive pixel module 100 refers to a dimension from the lower surface of the cathode layer 123 to the upper surface of the anode layer.
According to the photosensitive pixel module 100 provided by the embodiment of the disclosure, the plurality of photosensitive pixel units 120 are arranged in the protection ring 110, and the shallow slot isolation 130 is arranged between any two adjacent photosensitive pixel units 120 in the plurality of photosensitive pixel units 120 for isolation, so that photoelectric conversion can be realized, and the area occupied by the protection ring 110 is reduced, the duty ratio of the photosensitive pixel units 120 in a unit area is increased, and the imaging quality of the image sensor is improved.
The exemplary embodiments of the present disclosure also provide an image sensor 010, as shown in fig. 8, which includes the above-described photosensitive pixel module 100.
A plurality of photosensitive pixel modules 100 may be included in the image sensor, and the plurality of photosensitive pixel modules 100 are distributed in an array. In fabricating the image sensor, the photosensitive pixel unit 120 layer and the signal acquisition layer 140 may be fabricated separately, and then the photosensitive unit layer and the signal acquisition layer 140 may be stacked by a 3D stacking technique.
On the one hand, in the process technology, the 3D stacking can process the photosensitive pixel unit 120 layer and the signal acquisition layer 140 respectively, and different process nodes can be adopted, so that the flexible design and power consumption control of the signal acquisition layer 140 (reading circuit) are facilitated. In terms of technology, currently, the mainstream CIS chips all adopt BSI+3D stacking. On the other hand, in terms of power consumption, the 3D stacking process can be used for manufacturing the pixel unit layer and the signal acquisition layer 140 by different process, especially the signal acquisition layer 140 is manufactured by an advanced small process, so that the power consumption can be greatly saved. The estimation can save one half of the power consumption.
The image sensor provided by the embodiment of the disclosure includes the photosensitive pixel module 100, and the plurality of photosensitive pixel units 120 are arranged in the protection ring 110, and the shallow trench isolation 130 is arranged between any two adjacent photosensitive pixel units 120 in the plurality of photosensitive pixel units 120 to perform isolation, so that photoelectric conversion can be realized, and as the plurality of photosensitive pixel units 120 share the protection ring 110, the occupied area of the protection ring 110 is reduced, the occupied ratio and the filling factor of the photosensitive pixel units 120 in a unit area are increased, and the imaging quality of the image sensor is improved.
The exemplary embodiments of the present disclosure also provide an electronic device including the above-described image sensor 010.
The image sensor 010 provided by the embodiment of the disclosure can be used for a camera module of electronic equipment, and can realize functions of photographing, video recording and the like of the electronic equipment. The camera module of the electronic device may further include a lens for transmitting external light to the image sensor. Or the image sensor may be used for 3D ranging of an electronic device, such as distance measurement in an augmented reality device or a mixed reality device.
As shown in fig. 9, the electronic device 100 provided in the embodiment of the present disclosure further includes a display screen 10, a frame 20, a main board 30, a battery 40, and a rear cover 50. The display screen 10 is mounted on the frame 20 to form a display surface of the electronic device, and the display screen 10 serves as a front case of the electronic device 100. The rear cover 50 is adhered to the frame by double sided tape, and the display 10, the frame 20 and the rear cover 50 form an accommodating space for accommodating other electronic components or functional modules of the electronic device 100. Meanwhile, the display screen 10 forms a display surface of the electronic device 100 for displaying information such as images, text, and the like. The display 10 may be a Liquid crystal display (Liquid CRYSTAL DISPLAY, LCD) or an organic light-Emitting Diode (OLED) display.
A glass cover plate may be provided on the display screen 10. The glass cover plate can cover the display screen 10 to protect the display screen 10 from being scratched or damaged by water.
The display screen 10 may include a display area 11 and a non-display area 12. The display area 11 performs a display function of the display screen 10 for displaying information such as images and texts. The non-display area 12 does not display information. The non-display area 12 may be used to provide a camera, a receiver, a proximity sensor, etc. functional modules. In some embodiments, the non-display area 12 may include at least one area located at an upper portion and a lower portion of the display area 11.
The display screen 10 may be a full screen. At this time, the display screen 10 may display information full-screen so that the electronic device 100 has a large screen duty ratio. The display screen 10 includes only the display area 11 and does not include the non-display area. At this time, functional modules such as a camera and a proximity sensor in the electronic device 100 may be hidden under the display screen 10, and a fingerprint recognition module of the electronic device 100 may be disposed on the back of the electronic device 100.
The frame 20 may be a hollow frame structure. The material of the frame 20 may include metal or plastic. The main board 30 is installed in the accommodation space. For example, the main board 30 may be mounted on the frame 20 and stored in the storage space together with the frame 20. A grounding point is provided on the main board 30 to realize grounding of the main board 30. One or more of the functional modules of a motor, microphone, speaker, receiver, headphone interface, universal serial bus interface (USB interface), camera, proximity sensor, ambient light sensor, gyroscope, and processor may be integrated on the motherboard 30. Meanwhile, the display screen 10 may be electrically connected to the main board 30.
The main board 30 is provided with a display control circuit. The display control circuit outputs an electrical signal to the display screen 10 to control the display screen 10 to display information.
The battery 40 is mounted in the housing space. For example, the battery 40 may be mounted on the frame 20 and stored in the storage space together with the frame 20. The battery 40 may be electrically connected to the motherboard 30 to enable the battery 40 to power the electronic device 100. Wherein the motherboard 30 may have a power management circuit disposed thereon. The power management circuit is used to distribute the voltage provided by the battery 40 to the various electronic components in the electronic device 100.
The rear cover 50 is used to form the outer contour of the electronic device 100. The rear cover 50 may be integrally formed. In the process of forming the rear cover 50, a rear camera hole, a fingerprint recognition module mounting hole and other structures can be formed on the rear cover 50.
The lens may be located in a rear camera hole on the rear cover 50, and the image sensor 010 may be provided in a region such as a center frame, a rear cover, or a main board. The image sensor 010 may be connected to an image processor on the main board for transmitting the photoelectric signal to the main board.
The electronic device provided by the embodiment of the disclosure includes an image sensor 010, a plurality of photosensitive pixel units 120 are arranged in a protection ring 110, and a shallow trench isolation 130 is arranged between any two adjacent photosensitive pixel units 120 in the plurality of photosensitive pixel units 120 to isolate, so that photoelectric conversion can be realized, and as the plurality of photosensitive pixel units 120 share the protection ring 110, the occupied area of the protection ring 110 is reduced, the occupied ratio of the photosensitive pixel units 120 in a unit area is increased, and the imaging quality of the image sensor is improved.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims (18)

1. An image sensor comprising a plurality of photosensitive pixel modules, a plurality of the photosensitive pixel modules being distributed in an array, the photosensitive pixel modules comprising:
a guard ring surrounding the photosensitive pixel module;
The plurality of photosensitive pixel units are arranged in the protection ring and comprise single photon avalanche diodes;
The shallow slot isolation is arranged between any two adjacent photosensitive pixel units in the plurality of photosensitive pixel units, and is used for isolating the adjacent photosensitive pixel units in the photosensitive pixel module.
2. The image sensor of claim 1, wherein the photosensitive pixel unit comprises:
The substrate is provided with an anode region, a first accommodating part is arranged on the substrate, the first accommodating part is positioned at one side of the anode region, and a first opening is formed at one side of the first accommodating part away from the anode region;
The avalanche layer is arranged at the first accommodating part of the substrate;
And a cathode layer provided on the avalanche layer, and the cathode layer is positioned on a side of the avalanche layer away from the anode region, and the cathode layer is exposed to the first opening.
3. The image sensor of claim 2, wherein the photosensitive pixel cell further comprises:
and a cathode diffusion layer disposed between the avalanche layer and the cathode layer.
4. The image sensor of claim 3, wherein the shallow trench isolation has a depth greater than a depth of the cathode layer and the shallow trench isolation has a depth less than a depth of the cathode diffusion layer.
5. The image sensor of claim 3, wherein the cathode layer is embedded in the cathode diffusion layer and a side of the cathode layer remote from the avalanche layer is exposed to the cathode diffusion layer.
6. The image sensor of claim 5 wherein the shallow trench isolation is disposed between cathode diffusion layers of two adjacent ones of the photosensitive pixel cells.
7. The image sensor of claim 3, wherein the cathode layer and the cathode diffusion layer are doped with a first type dopant and the avalanche layer and the substrate are doped with a second type dopant.
8. The image sensor of claim 7, wherein a doping concentration of the cathode layer is greater than a doping concentration of the cathode diffusion layer, and a doping concentration of the avalanche layer is greater than a doping concentration of the substrate.
9. The image sensor of claim 2, wherein the photosensitive pixel module further comprises:
The signal acquisition layer is stacked on one side, far away from the light inlet side, of the photosensitive pixel unit, and the signal acquisition layer comprises a signal acquisition circuit which is connected with the photosensitive pixel unit.
10. The image sensor of claim 1, wherein the photosensitive pixel unit comprises:
A substrate;
The cathode layer is arranged on the substrate, a second accommodating part is arranged on the cathode layer, and a second opening is formed in one side, far away from the substrate, of the second accommodating part;
An avalanche layer embedded on a side of the cathode layer remote from the substrate, and exposed to the second opening;
and the anode layer is arranged on one side of the avalanche layer away from the substrate.
11. The image sensor of claim 10, wherein the cathode layer comprises a first type dopant, the avalanche layer and the anode layer comprise a second type dopant, and a doping concentration of the avalanche layer is less than a doping concentration of the anode layer.
12. The image sensor of claim 10, wherein the photosensitive pixel module further comprises:
the signal acquisition layer is stacked on the light inlet side of the photosensitive pixel unit and comprises a signal acquisition circuit which is connected with the photosensitive pixel unit.
13. The image sensor of any of claims 2-12, wherein the guard ring comprises:
the deep groove isolation is in a closed ring shape, and surrounds a plurality of photosensitive pixel units.
14. The image sensor of any of claims 2-12, wherein the guard ring comprises:
a semiconductor protection ring, wherein the semiconductor protection ring is in a closed ring shape, and the semiconductor protection ring surrounds a plurality of the photosensitive pixel units.
15. The image sensor of any of claims 1-12 wherein the shallow trench isolation is filled with an oxide.
16. The image sensor of any of claims 1-12, wherein the photosensitive pixel module further comprises:
The light converging layer is arranged on the light inlet side of the photosensitive pixel unit and is used for converging light rays to the photosensitive pixel unit.
17. The image sensor of any of claims 1-12, wherein the photosensitive pixel module has a thickness of 3 microns to 10 microns.
18. An electronic device comprising an image sensor as claimed in any one of claims 1-17.
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