CN111767037A - Scripted intelligent electric meter event judgment method - Google Patents

Scripted intelligent electric meter event judgment method Download PDF

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CN111767037A
CN111767037A CN202010597575.1A CN202010597575A CN111767037A CN 111767037 A CN111767037 A CN 111767037A CN 202010597575 A CN202010597575 A CN 202010597575A CN 111767037 A CN111767037 A CN 111767037A
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刘笑菲
伍韬
张玉猛
柳志超
孙旭
魏鹏
胡梦杰
陈玉伟
熊思怀
张志祥
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Yantai Dongfang Wisdom Electric Co Ltd
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Abstract

The invention discloses a scripted intelligent ammeter event judgment method, which comprises the following steps: constructing a logic script, wherein the logic script comprises a logic expression for judging an event; the logic expression comprises a plurality of logic units; each of the logic cells includes: a left variable address, a right variable address, an operator, a left variable address type, and a right variable address type; during judgment, variable values of the left variable and the right variable are obtained based on an address mapping mode, operation between the left variable and the right variable is completed according to an operator, and an operation result of a Boolean value type is used as an output value of the logic unit; and further obtaining the calculation result of the whole logic expression. According to the method, access to data of different variable types in the logic expression is realized in an address mapping mode, scripted event judgment is realized, code modification amount when the event judgment logic changes is reduced, and maintenance cost and test cost are reduced.

Description

Scripted intelligent electric meter event judgment method
Technical Field
The invention relates to a method for judging an event of an intelligent electric meter, in particular to a method for judging the event of the intelligent electric meter based on a script.
Background
The event recording function is an important function module of the intelligent electric meter and can monitor the real-time working condition of the power grid according to the judgment condition preset by a user. When a predetermined determination condition is met (e.g., the voltage exceeds a predetermined threshold T1), a series of actions are performed, such as recording events, issuing an alarm signal, and so on.
In the above example, the voltage value is usually a variable stored in the RAM of the single chip microcomputer and can be directly accessed, and the threshold T1 is usually stored in an external memory and read from the external memory when comparison is needed.
With the increasing complexity of the electric equipment, the user also puts more complex requirements on the event recording function, and more combination conditions also appear. For example, for the same event a, the logic for determining the occurrence of the event is: the voltage value is less than the threshold T1 and the current value is greater than the threshold T2; the logic for judging the end of the event is as follows: the voltage value is greater than the threshold T3, or the current value is less than the threshold T4.
More generally, the condition for the judgment may not be limited to the comparison of the instantaneous value in the RAM with the threshold value stored in the external memory, but may also be the comparison of two values stored in the external memory; it may also be the comparison of the instantaneous value in the RAM with a constant, which is generally stored in the flash inside the single-chip microcomputer and is not changeable. Or the state change of an external pin of the singlechip, for example, the change of the state of an external key is detected through an IO pin, and if the change occurs, an event is recorded; it may also be a direct return of a function. That is to say, in a more general case, except that the logic combination condition is complicated and changeable, the variable types appearing in the judgment condition may be RAM variables, variables stored in an external memory, constants in an internal flash of the single chip microcomputer, external GPIO pin states or functions, and the like.
For a common conditional expression, the processing methods published at present are: logic judgment is carried out by constructing a logic expression form (refer to Chinese invention patent 'identification method of substation 10kV outgoing switch opening type' with publication number CN 108388653A), and action is carried out according to the truth of the final logic expression output. However, this processing method cannot be directly applied to event judgment of the smart meter, because the specific service logic of the smart meter is tightly combined with the single chip, from the viewpoint of the single chip, the involved variable types (RAM variable, variable stored in the external memory, constant in flash inside the single chip, external GPIO pin state, function, etc.) belong to different device types, and cannot be described by using a common conditional expression.
Due to the above constraints, in the smart meter system, the event judgment is generally not directly performed using the logical expression. The method is more general: writing a judgment logic function for each event, and modifying the code logic of the corresponding function when the requirement is changed. However, different users have different requirements for the functions of the event part, and each time the requirements of the users are changed, the codes need to be changed and the judgment logic needs to be modified, which brings high maintenance cost and test cost.
Disclosure of Invention
The invention provides a scripted intelligent ammeter event judgment method, which aims to: the method has the advantages that data of different variable types are quickly accessed, scripting of event judgment is achieved, code modification amount when event judgment logic changes is reduced, and maintenance cost and testing cost are reduced.
The technical scheme of the invention is as follows:
a scripted intelligent electric meter event judgment method comprises the following steps: constructing logic scripts, wherein each logic script corresponds to one intelligent electric meter event; the logic script comprises a logic expression for judging an event;
the logical expression comprises logical units connected together by logical operators;
each of the logic cells includes: a left variable address, a right variable address, an operator, a left variable address type, and a right variable address type;
constructing branch trees which correspond to the logic expressions one by one, wherein the judgment result of the branch trees is consistent with the logic expressions; generating a judgment code according to the jump structure of the branch tree, and writing the judgment code into a single chip microcomputer of the intelligent electric meter for realizing dynamic real-time judgment of the logic expression;
when judging, firstly acquiring the output value of each logic unit: for each logic unit, based on an address mapping mode, obtaining a variable value of a left variable according to a left variable address and a left variable address type, obtaining a variable value of a right variable according to a right variable address and a right variable address type, completing the operation between the left variable and the right variable according to an operator, and taking an operation result of a Boolean value type as an output value of the logic unit; and further obtaining the calculation result of the whole logic expression.
Further, an address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for the function type, a general function template is established in advance; when the value of the variable is taken, if the variable address type is the function type, the corresponding variable address is converted into the function according to the function template, and the execution result of the function is used as the mapping value.
Further, an address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for single-byte, double-byte and four-byte data types of the memory, when a variable value is taken, the corresponding variable address is taken as a physical address of the memory, data is read according to the byte length from the physical address, and the read data is taken as a mapping value.
Further, an address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for the single-byte, double-byte and four-byte data types of the RAM, when a variable value is taken, the corresponding variable address is taken as the RAM address, data is read according to the byte length from the RAM address, and the read data is taken as a mapping value.
Further, an address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for an immediate data type, data of the type is a constant stored in the flash of the single chip microcomputer, and data in a variable address is directly used as a mapping value.
Further, an address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for the GPIO type, if the single chip microcomputer platform is a single chip microcomputer platform with non-overlapping addressing of a data area and a code area, a value on a single chip microcomputer address bus pointed by a variable address is used as a register address, and a corresponding register value is used as a mapping value; if the data area and the code area address the single chip microcomputer with overlapping, the value on the single chip microcomputer register address bus pointed by the variable address is used as the register address, and the corresponding register value is used as the mapping value.
Furthermore, each logic script comprises a first logic expression for judging whether the event occurs or not, a second logic expression for judging whether the event is ended or not, and a callback function corresponding to the event.
Further, when event judgment is needed, inquiring a logic expression of a script corresponding to the event according to the current event state, if the current event state is 'occurrence', inquiring and judging a second logic expression, and if not, inquiring and judging a first logic expression; and after the judgment is finished, calling a callback function according to the judgment result.
Further, the method for constructing the branch tree comprises the following steps: and counting the logic units appearing in the logic expression, solving the information entropy corresponding to each logic unit, sequencing the logic units according to the information entropy, and constructing the branch tree according to the sequencing.
Further, the specific method for constructing the branch tree is as follows:
step 1, counting logic units appearing in a corresponding logic expression, wherein the logic units appearing repeatedly are counted only once; the number of the logic units is n;
step 2, the result value of each logic unit is 0 and 1, wherein 0 represents logic false, and 1 represents logic true; all the logic unit values which possibly exist are arranged and combined, and the total number is 2n(ii) a condition; make up of permutation and combination 2n× n-dimensional matrix X, wherein the elements of each row respectively correspond to a value combination condition, and the elements of the ith column all correspond to the ith logic unit;
step 3, substituting each row of the matrix X into a logic expression respectively to carry out logic operation, and forming 2 the operation results of all the rows according to the row sequence of the matrix XnVector Y of dimension × 1;
step 4, combining X and Y according to the column direction to enable X, Y to be combined into 2nA matrix Z of × (n +1) dimensions;
and 5, respectively calculating the information entropy of the first n columns of the matrix Z:
step 5-1, dividing the matrix Z into the ith row according to different values of the row elements
Figure BDA0002557896920000051
And
Figure BDA0002557896920000052
two matrices:
Figure BDA0002557896920000053
representing a matrix formed by rows with the ith column value of 1 of the matrix Z, and setting the row number of the matrix as m;
Figure BDA0002557896920000054
representing a matrix formed by rows with the ith column value of 0 of the matrix Z, and setting the row number of the matrix as n;
step 5-2,According to a matrix
Figure BDA0002557896920000055
And
Figure BDA0002557896920000056
the different values of the last column continue to be
Figure BDA0002557896920000057
Is divided into
Figure BDA0002557896920000058
And
Figure BDA0002557896920000059
will be provided with
Figure BDA00025578969200000510
Is divided into
Figure BDA00025578969200000511
And
Figure BDA00025578969200000512
a total of four matrices:
Figure BDA00025578969200000513
representation matrix
Figure BDA00025578969200000514
The last column in the matrix is a matrix formed by rows with the value of 1, and the row number of the matrix is m1；
Figure BDA00025578969200000515
Representation matrix
Figure BDA0002557896920000061
The last column is a matrix formed by rows with the value of 0, and the row number of the matrix is set as m2；
Figure BDA0002557896920000062
Representation matrix
Figure BDA0002557896920000063
The last column is a matrix formed by rows with the value of 1, and the row number of the matrix is set as n1；
Figure BDA0002557896920000064
Representation matrix
Figure BDA0002557896920000065
The last column is a matrix formed by rows with the value of 0, and the row number of the matrix is set as n2；
Step 5-3, calculating respective information Entropy of the first n columns of the matrix Z according to an information Entropy formula, and using EncopyiThe entropy of the information representing the ith column of the matrix Z is:
Figure BDA0002557896920000066
and 5-6, sequencing the information entropies obtained by calculation from small to large according to absolute values.
Further, step 6 of constructing the branch tree according to the sequence includes the following specific steps:
step 6-1, constructing n hierarchies corresponding to the logic units one by one from top to bottom according to the priority order, wherein each hierarchy is used for placing Node nodes corresponding to the logic units of the hierarchy, and each Node corresponds to a Node matrix H;
establishing a Node in the uppermost first layer, and taking the matrix Z as a Node matrix H corresponding to the Node;
traversing each layer from top to bottom, and respectively executing the step 6-2 to the step 6-4 for each layer to complete the construction of the branch tree;
6-2, traversing each Node in the hierarchy for the currently traversed hierarchy;
for each Node, taking a Node matrix H, setting a logic unit corresponding to the layer to correspond to the ith column in the matrix H, and dividing H into matrices according to values of elements in each row in the ith column of the matrix H
Figure BDA0002557896920000067
And
Figure BDA0002557896920000068
Figure BDA0002557896920000069
representing a matrix formed by rows with the ith column value of 1 of the matrix H, and setting the row number of the matrix as a;
Figure BDA0002557896920000071
representing a matrix formed by rows with the ith row value of 0 in the matrix H, and setting the row number of the matrix as b;
then according to the matrix
Figure BDA0002557896920000072
And
Figure BDA0002557896920000073
the different values of the last column continue to be
Figure BDA0002557896920000074
Is divided into
Figure BDA0002557896920000075
And
Figure BDA0002557896920000076
will be provided with
Figure BDA0002557896920000077
Is divided into
Figure BDA0002557896920000078
And
Figure BDA0002557896920000079
a total of four matrices:
Figure BDA00025578969200000710
representation matrix
Figure BDA00025578969200000711
The last column in the matrix is a matrix formed by rows with the value of 1, and the row number of the matrix is set as a1；
Figure BDA00025578969200000712
Representation matrix
Figure BDA00025578969200000713
The last column is a matrix formed by rows with the value of 0, and the row number of the matrix is set as a2；
Figure BDA00025578969200000714
Representation matrix
Figure BDA00025578969200000715
The last column is a matrix formed by rows with the value of 1, and the row number of the matrix is set as b1；
Figure BDA00025578969200000716
Representation matrix
Figure BDA00025578969200000717
The last column is a matrix formed by rows with the value of 0, and the row number of the matrix is set as b2；
Step 6-3, if a1When the Node is equal to 0, a leaf Node with the result value of 0 is newly established, and a path relation between the current Node and the leaf Node is established: when the logic unit value corresponding to the current Node is 1, the Node points to the leaf Node;
if a2When the Node is equal to 0, a leaf Node with the result value of 1 is newly established, and a path relation between the current Node and the leaf Node is established: when the logic unit value corresponding to the current Node is 1, the Node points to the leaf Node;
if a1And a2If not, a Node is newly built on the next layer, and a path relation between the current Node and the Node of the lower layer is established: when the logic unit value corresponding to the current Node is 1, the Node points to the lower Node and sends the logic unit value to the lower NodeOf current Node
Figure BDA00025578969200000718
The Node matrix H used as the Node of the lower Node is reserved as the traversed time of the lower Node;
step 6-4, if b1When the Node is equal to 0, a leaf Node with the result value of 0 is newly established, and a path relation between the current Node and the leaf Node is established: when the logic unit value corresponding to the current Node is 0, the Node points to the leaf Node;
if b is2When the Node is equal to 0, a leaf Node with the result value of 1 is newly established, and a path relation between the current Node and the leaf Node is established: when the logic unit value corresponding to the current Node is 0, the Node points to the leaf Node;
if b is1And b2If not, a Node is newly built on the next layer, and a path relation between the current Node and the Node of the lower layer is established: when the logic unit value corresponding to the current Node is 0, the Node points to the lower Node and sends the current Node
Figure BDA0002557896920000081
And the Node matrix H as the Node of the lower Node is reserved for the use when the lower Node is traversed.
Furthermore, after the skip branch tree is generated, traversing all Node nodes from top to bottom according to the branch tree, generating a judgment code according to the path relation and the result value corresponding to the leaf Node, and writing the judgment code into a single chip microcomputer of the intelligent electric meter for finishing dynamic real-time judgment.
Furthermore, when all Node nodes of the branch tree are traversed to generate the judgment code, for the current Node, the path from the current Node to a nearest leaf Node is preferentially used as the next judgment branch.
Further, the steps 1 to 6 are carried out on a computer platform with performance superior to that of a single chip microcomputer of the intelligent electric meter.
Compared with the prior art, the invention has the following beneficial effects: (1) according to the method, through an address mapping mode, access to data of different variable types (RAM variables, variables stored in an external memory, constants in a flash inside a single chip microcomputer, external GPIO pin states, functions and the like) in a logic expression is realized, and a foundation is laid for intelligent electric meter event judgment scripting; (2) furthermore, the method realizes the scription of event judgment, provides a clear-level event judgment method, and only needs to modify a plurality of line scripts when the judgment logic changes every time, thereby reducing the code modification amount when the judgment logic changes, and reducing the maintenance cost and the test cost.
Drawings
FIG. 1 is a flow diagram for generating an event script.
FIG. 2 is a diagram of a jump branching tree.
FIG. 3 is a flow chart of time script determination.
FIG. 4 is a flow chart of generating a jump branch tree.
FIG. 5 is a diagram illustrating the decision sequence of the jump branch tree.
Detailed Description
The technical scheme of the invention is explained in detail in the following with the accompanying drawings:
in this embodiment, a fluid loss event is first determined as an example, and the specific control requirements of the event are as follows:
the logic for judging the occurrence of the event is as follows: the voltage value is less than the threshold T1 and the current value is greater than the threshold T2; the logic for judging the end of the event is as follows: the voltage value is greater than the threshold T3, or the current value is less than the threshold T2.
The first part, as shown in FIG. 1, generates an event script.
(A) A logical unit is defined. The constituent elements of the logic unit include:
(left variable address, right variable address, operator, left variable address type, right variable address type)
For simplicity of representation, LVar represents the left variable address, RVar represents the right variable address, Op represents the operators (relational and logical operators), LType represents the left variable address type, and RType represents the right variable address type.
Wherein, Op takes the following values: (≧ gtoreq, <, >, ≠ and, |), > gtoreq denotes a judgment of greater than or equal to, < gtoreq denotes a judgment of less than or equal to, < denotes a judgment of less than or equal to, > denotes a judgment of greater than, > denotes a judgment of equal to, ≠ denotes a logical and operation, | denotes a logical or operation.
The value ranges of LType and RType are the same, and the values are as follows: (function type, memory single byte data type, memory double byte data type, memory four byte data type, RAM single byte data type, RAM double byte data type, RAM four byte data type, immediate data type, GPIO type).
(B) Address mapping is established for different data types:
(1) for function types, a generic function template is created, and the pseudo code for one exemplary template is as follows:
U32 function(void)；
where U32 indicates that the return data type is an unsigned 32-bit integer, the function is the name of the function, and the void indicates that the function does not accept incoming parameters.
The address mapping for a function type is represented as:
Figure BDA0002557896920000101
the meaning of this expression is: converting LVar or RVar into function defined by the universal function template, enabling the input parameter to be null, and enabling the converted function execution result to be data of a U32 type to serve as a mapping value.
(2) For a memory single byte data type, the address mapping for this type is represented as:
Figure BDA0002557896920000102
the meaning of this expression is: let LVar or RVar value be one physical address of memory, MemCip-1 Byte (-) means that one Byte of data is read from a specified physical address, and the read data is expanded into U32 type data as a mapping value.
(3) For the two-byte data type of the memory and the four-byte data type of the memory, the mapping mode is similar to the single-byte data type of the memory, and is not described again, and the address mapping is as follows:
Figure BDA0002557896920000111
(4) for a RAM single byte data type, the address mapping for this type is represented as:
Figure BDA0002557896920000112
where (Byte address) (-) represents a value as a single Byte of RAM address, and (·) represents fetching data pointed to by the address in parentheses, and the final address mapping expands the fetched value to U32 type as a mapping value.
(5) For the RAM double-byte data type and the RAM four-byte data type, the mapping mode is similar to the memory single-byte data type, and is not described again, and the address mapping is as follows:
Figure BDA0002557896920000113
(6) for the immediate type, the type is a constant stored in the flash of the single chip microcomputer, and the address mapping is as follows:
Figure BDA0002557896920000114
the meaning of this expression is: the LVar or RVar is directly extended to data of the U32 type and used as a mapping value.
(7) For the GPIO type, the address mapping is as follows:
Figure BDA0002557896920000115
for theDifferent SCM types and GPIO address mapping are different, and STM32 SCM is used as a representative for the SCM with non-overlapping addressing of data area and code area
Figure BDA0002557896920000121
bus _ address (·) indicates that LVar or RVar on the address bus of the single chip microcomputer is directly used as a register address, a register value is taken, and the register value is expanded into data of a U32 type to be used as a mapping value; for the single chip microcomputer with data area and code area addressing overlapped, using 51 single chip microcomputer as representative, using the designated address type to be displayed
Figure BDA0002557896920000122
reg _ bus _ address (·) indicates that LVar or RVar on the register address bus of the single chip microcomputer is directly used as a register address, and a register value is taken and expanded into data of a U32 type as a mapping value.
(C) Converting each judgment condition into a logic unit according to the address mapping relation, wherein in an example, the judgment condition comprises: the voltage value is less than the threshold T1; the current value is greater than a threshold T2; the voltage value is greater than a threshold T3; the current value is less than the threshold T2 for a total of four.
The corresponding logic units are respectively:
a ═ (voltage value RAM address, threshold T1 memory address, <, RAM four byte type, memory four byte type);
b ═ (current value RAM address, threshold T2 memory address, >, RAM four byte type, memory four byte type);
c ═ voltage value RAM address, threshold T3 memory address, >, RAM four byte type, memory four byte type;
d ═ (current value RAM address, threshold T2 memory address, <, RAM four byte type, memory four byte type).
(D) For simplification, the letters a-Z are used to represent the serial numbers of the logic units, the logic units are combined according to the judgment logic, the combination logic of the event occurrence is a & B (first logic expression), the combination logic of the event end is C | D (second logic expression), and the logic expression of the event occurrence and the logic expression of the event end are combined into a logic script, which is separated by "$", i.e., a & B $ C | D.
(E) And adding a CallBack function for each event, wherein the CallBack function is represented by CallBack and is used for performing corresponding associated actions when the event occurs or ends.
(F) Combining the logic unit, the logic script and the callback function corresponding to each event into a complete event script:
a logic unit: a, B, C and D;
logic script: a & B $ C | D
And (4) callback function: CallBack.
And the second part is used for realizing the analysis operation of the logic expression of the script.
(G) Taking logic unit a as an example: when a is (voltage value RAM address, threshold T1 memory address, <, RAM four-byte type, memory four-byte type), the logic unit is parsed as follows:
(G-1) searching for a left variable address type, in this example, the left variable address type is a four-byte type of RAM, and converting the left variable address into actual data according to an address mapping rule. In this example, the mapping rule of the left variable address is:
Figure BDA0002557896920000131
taking the left variable address as a 4-byte RAM address, taking out data corresponding to the address, and converting the data into U32 type data;
(G-2) converting the right variable address into U32 type data in the same manner as (G-1);
(G-3) comparing the left and right variables according to the operator type, in this example, actually comparing the voltage value with a threshold T1, if the voltage value > T1, the logic unit outputs 1, otherwise 0;
(H) as shown in fig. 3, when an event needs to be determined, a logic expression of a script corresponding to the event is queried according to a current event state, and if the current event state is "occurrence", a logic expression for determining whether the event is ended is queried, which in this example is: c | D; otherwise, a logic expression for judging whether the event occurs is queried, which in this example is: a & B.
(I) Analyzing the logic expression inquired in the step (H), and in order to ensure the fastest judgment speed, namely to ensure that the logic expression outputs a final result by the least judgment times, the logic expression analysis rule is carried out according to the following steps:
the logic expression in the foregoing example is relatively simple, and is mainly used for describing the structure of the script, and it is not easy to clearly show the difference in the operation speed. Therefore, in the following step, the logical expression M | N & (O | P) & (Q | R) | (Q & N) | S is taken as an example. Wherein the logic result of the single logic unit is still obtained through step (G).
(I-1) As shown in FIG. 4, the number of all logic units in the logic expression is counted, the logic units repeatedly appearing in the logic expression are not included, and the number of the logic units in the logic expression is 7: m, N, O, P, Q, R, S;
and (I-2) the result of each logic unit takes values of 0 and 1, wherein 0 represents logic false and 1 represents logic true. The values of all logic units are combined, and the total number is 2nIn one case, n is the number of logic cells. All value combinations are arranged to form 2n× n-dimensional matrix X, wherein the elements in each row represent the values of each logic unit;
(I-3) substituting each row of the matrix X into a logic expression to carry out logic operation, and combining operation results of all rows into 2nVector Y of dimension × 1;
(I-4) combining X and Y in the column direction to form X, Y combination 2nA matrix Z of × (n +1) dimensions;
(I-5) separately calculating the information entropies of the first n columns of the matrix Z:
(I-5-1) is divided into the following groups according to the different values in column Z, I ═ 1,2,3, …, n
Figure BDA0002557896920000151
And
Figure BDA0002557896920000152
two matrices:
Figure BDA0002557896920000153
representing a matrix formed by rows with the ith column value of 1 of the matrix Z, and setting the row number of the matrix as m;
Figure BDA0002557896920000154
representing a matrix formed by rows with the ith column value of 0 of the matrix Z, and setting the row number of the matrix as n; obviously m + n is 2n；
(I-5-2) according to the matrix
Figure BDA0002557896920000155
And
Figure BDA0002557896920000156
the different values of the last column (which is part of the vector Y) will continue to be
Figure BDA0002557896920000157
Is divided into
Figure BDA0002557896920000158
And
Figure BDA0002557896920000159
will be provided with
Figure BDA00025578969200001510
Is divided into
Figure BDA00025578969200001511
And
Figure BDA00025578969200001512
a total of four matrices:
Figure BDA00025578969200001513
representation matrix
Figure BDA00025578969200001514
The last column in the matrix is a matrix formed by rows with the value of 1, and the row number of the matrix is m1；
Figure BDA00025578969200001515
Representation matrix
Figure BDA00025578969200001516
The last column is a matrix formed by rows with the value of 0, and the row number of the matrix is set as m2；
Figure BDA00025578969200001517
Representation matrix
Figure BDA00025578969200001518
The last column is a matrix formed by rows with the value of 1, and the row number of the matrix is set as n1；
Figure BDA00025578969200001519
Representation matrix
Figure BDA00025578969200001520
The last column is a matrix formed by rows with the value of 0, and the row number of the matrix is set as n2(ii) a Obviously: m is1+m2＝m,n1+n2＝n；
(I-5-3) calculating the respective information entropies of the first n columns of the matrix Z according to an information entropy formula:
Figure BDA00025578969200001521
in EntrophyiThe entropy of the information representing the ith column of the matrix Z is:
Figure BDA00025578969200001522
(I-6) arranging the information entropies obtained by calculation from small to large according to the absolute values, wherein if the absolute value of the information entropy is small, the ordering of the data is improved most if the logic unit corresponding to the row is judged first. According to the calculation method of the information entropy, the absolute value of the information entropy of each logic unit in the example is as follows:
EntropyM＝0.456,EntropyN＝0.603,EntropyO＝0.643,
EntropyP＝0.643,EntropyQ＝0.635,EntropyR＝0.641,
EntropyS＝0.456
arranged by values from small to large:
EntropyM＝EntropyS＞EntropyN＞EntropyQ＞EntropyR＞EntropyO＝EntropyP；
and (I-7) determining the pre-judgment sequence of each logic unit according to the information entropy sequence obtained by calculation in the step (I-6), namely, preferentially judging the logic unit with small information entropy absolute value. In this example, the priority order of the determination is: m, S, N, Q, R, O, P, respectively;
(I-8) constructing a jump branch tree according to the judged priority, and realizing the following steps:
(I-8-1) constructing n layers corresponding to the logic units one by one from top to bottom according to the priority order, wherein each layer is used for placing Node nodes corresponding to the logic units of the layer, and each Node corresponds to a Node matrix H;
establishing a Node in the uppermost first layer, and taking the matrix Z as a Node matrix H corresponding to the Node;
traversing each hierarchy from top to bottom, and respectively executing the step (I-8-2) to the step (I-8-4) for each hierarchy;
(I-8-2) for the currently traversed hierarchy, traversing each Node in the hierarchy;
for each Node, taking a Node matrix H, setting a logic unit corresponding to the layer to correspond to the ith column in the matrix H, and dividing H into matrices according to values of elements in each row in the ith column of the matrix H
Figure BDA0002557896920000171
And
Figure BDA0002557896920000172
Figure BDA0002557896920000173
representing a matrix formed by rows with the ith column value of 1 of the matrix H, and setting the row number of the matrix as a;
Figure BDA0002557896920000174
representing a matrix formed by rows with the ith row value of 0 in the matrix H, and setting the row number of the matrix as b;
then according to the matrix
Figure BDA0002557896920000175
And
Figure BDA0002557896920000176
the different values of the last column (which is part of the vector Y) will continue to be
Figure BDA0002557896920000177
Is divided into
Figure BDA0002557896920000178
And
Figure BDA0002557896920000179
will be provided with
Figure BDA00025578969200001710
Is divided into
Figure BDA00025578969200001711
And
Figure BDA00025578969200001712
a total of four matrices:
Figure BDA00025578969200001713
representation matrix
Figure BDA00025578969200001714
The last column in the matrix is a matrix formed by rows with the value of 1, and the row number of the matrix is set as a1；
Figure BDA00025578969200001715
Representation matrix
Figure BDA00025578969200001716
The last column is a matrix formed by rows with the value of 0, and the row number of the matrix is set as a2；
Figure BDA00025578969200001717
Representation matrix
Figure BDA00025578969200001718
The last column is a matrix formed by rows with the value of 1, and the row number of the matrix is set as b1；
Figure BDA00025578969200001719
Representation matrix
Figure BDA00025578969200001720
The last column is a matrix formed by rows with the value of 0, and the row number of the matrix is set as b2；
(I-8-3) if a1When the result of the logic unit is 1, the result of the whole logic expression must be 0, so that a new leaf Node with a result value of 0 is created, and a path relationship between the current Node and the leaf Node is established: when the logic unit value corresponding to the current Node is 1, the Node points to the leaf Node;
if a2When the Node is equal to 0, a leaf Node with the result value of 1 is newly established, and a path relation between the current Node and the leaf Node is established: when the logic unit value corresponding to the current Node is 1, the Node points to the leaf Node;
if a1And a2If not, a Node is newly built on the next layer, and a path relation between the current Node and the Node of the lower layer is established: when the logic unit value corresponding to the current Node is 1, the Node points to the lower Node and the current Node is switched on
Figure BDA0002557896920000181
The Node matrix H used as the Node of the lower Node is reserved as the traversed time of the lower Node;
(I-8-4) if b1When the result of the logic unit is 0, the result of the whole logic expression must be 0, so that a new leaf Node with a result value of 0 is created, and a path relationship between the current Node and the leaf Node is established: when the logic unit value corresponding to the current Node is 0, the Node points to the leaf Node;
if b is2When the Node is equal to 0, a leaf Node with the result value of 1 is newly established, and a path relation between the current Node and the leaf Node is established: when the logic unit value corresponding to the current Node is 0, the Node points to the leaf Node;
if b is1And b2If not, a Node is newly built on the next layer, and a path relation between the current Node and the Node of the lower layer is established: when the logic unit value corresponding to the current Node is 0, the Node points to the lower Node and sends the current Node
Figure BDA0002557896920000182
The Node matrix H used as the Node of the lower Node is reserved as the traversed time of the lower Node;
all Node nodes in the last layer point to leaf nodes.
And (4) obtaining the jump branch tree according to the step (I-8), wherein the worst case is a balanced binary tree, all the logic unit information entropies are the same, and the number of leaf nodes is 2n-1And each leaf node is reached through n times of judgment, and the optimization effect cannot be obtained by using the method under the condition. In practical application, however, the situation that all the information entropies of the logic units are the same is very few, so that the method can obviously improve the judgment speed of the actual logic expression.
The branch tree of the jump finally obtained by the example script of this step is shown in FIG. 2, Node represents a Node, M0Representation logicThe edit unit M takes the value of 0, M1The value of the logic unit M is 1, and the rest logic units are analogized in the same way; the leaf node 0 represents that the output value of the final logic expression is 0, and the leaf node 1 represents that the output value of the final logic expression is 1;
and (I-9) traversing all Node nodes from top to bottom according to the branch tree after the branch tree is generated, generating a judgment code according to the path relation and the result value corresponding to the leaf Node, and writing the judgment code into a single chip microcomputer of the intelligent electric meter for finishing dynamic real-time judgment.
Referring to fig. 5, the logic expression determination process is as follows:
(I-9-1) starting from the Node of the first Node, corresponding to the Node of the top, traversing the whole branch tree downwards, judging according to the path relation, and preferentially taking the path from the Node of the current Node to a nearest leaf Node as the judgment branch of the next step. In this example, the branch from the Node at the top to the nearest leaf Node is
Figure BDA0002557896920000191
The pseudo code for the first step of determination is therefore:
If(M is 1)return 1
(I-9-2) if the actual value of the logic unit does not meet the judgment condition in (I-9-1), continuing to traverse the whole tree downwards to find the next Node, and still preferentially taking the path from the current Node to a nearest leaf Node as the judgment branch of the next step. In this example, the pseudo code determined in the second step is:
Else If(S is 1)return 1
and (I-9-3) repeating the steps until all Node nodes are traversed.
As a preferred example of the method, the process of jumping the branch tree is not changed after the logic expression is determined. Therefore, the process of generating the skip branch tree in the steps (I-1) to (I-8) can be carried out on equipment with stronger computing capability such as a computer, and the dynamic judgment process of the skip branch tree is carried out on a single chip microcomputer platform of the intelligent electric meter.
And after the final logic result of the logic expression is calculated, calling a CallBack function CallBack according to the result to perform corresponding service actions, such as alarming, recording and the like.

Claims (8)

1. A scripted intelligent electric meter event judgment method is characterized by comprising the following steps: constructing logic scripts, wherein each logic script corresponds to one intelligent electric meter event; the logic script comprises a logic expression for judging an event;
the logical expression comprises logical units connected together by logical operators;
each of the logic cells includes: a left variable address, a right variable address, an operator, a left variable address type, and a right variable address type;
when the judgment is carried out through the logic expression, the output value of each logic unit is firstly obtained: for each logic unit, based on an address mapping mode, obtaining a variable value of a left variable according to a left variable address and a left variable address type, obtaining a variable value of a right variable according to a right variable address and a right variable address type, completing the operation between the left variable and the right variable according to an operator, and taking an operation result of a Boolean value type as an output value of the logic unit; and further obtaining the calculation result of the whole logic expression.
2. The scripted smart meter event decision method of claim 1, wherein the address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for the function type, a general function template is established in advance; when the value of the variable is taken, if the variable address type is the function type, the corresponding variable address is converted into the function according to the function template, and the execution result of the function is used as the mapping value.
3. The scripted smart meter event decision method of claim 1, wherein the address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for single-byte, double-byte and four-byte data types of the memory, when a variable value is taken, the corresponding variable address is taken as a physical address of the memory, data is read according to the byte length from the physical address, and the read data is taken as a mapping value.
4. The scripted smart meter event decision method of claim 1, wherein the address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for the single-byte, double-byte and four-byte data types of the RAM, when a variable value is taken, the corresponding variable address is taken as the RAM address, data is read according to the byte length from the RAM address, and the read data is taken as a mapping value.
5. The scripted smart meter event decision method of claim 1, wherein the address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for an immediate data type, data of the type is a constant stored in the flash of the single chip microcomputer, and data in a variable address is directly used as a mapping value.
6. The scripted smart meter event decision method of claim 1, wherein the address mapping is constructed according to the type of the variable, i.e. the corresponding variable address type: for the GPIO type, if the single chip microcomputer platform is a single chip microcomputer platform with non-overlapping addressing of a data area and a code area, a value on a single chip microcomputer address bus pointed by a variable address is used as a register address, and a corresponding register value is used as a mapping value; if the data area and the code area address the single chip microcomputer with overlapping, the value on the single chip microcomputer register address bus pointed by the variable address is used as the register address, and the corresponding register value is used as the mapping value.
7. The scripted smart meter event determination method according to any one of claims 1 to 6, wherein: each logic script comprises a first logic expression for judging whether an event occurs or not, a second logic expression for judging whether the event is ended or not and a callback function corresponding to the event.
8. The scripted smart meter event decisioning method of claim 7, wherein: when event judgment is needed, inquiring a logic expression of a script corresponding to an event according to the current event state, if the current event state is 'occurrence', inquiring and judging a second logic expression, and if not, inquiring and judging a first logic expression; and after the judgment is finished, calling a callback function according to the judgment result.
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