CN111750748A - Anti-electromagnetic interference method for electronic detonator - Google Patents
Anti-electromagnetic interference method for electronic detonator Download PDFInfo
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- CN111750748A CN111750748A CN202010738824.4A CN202010738824A CN111750748A CN 111750748 A CN111750748 A CN 111750748A CN 202010738824 A CN202010738824 A CN 202010738824A CN 111750748 A CN111750748 A CN 111750748A
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- 238000000034 method Methods 0.000 title claims abstract description 26
- 238000005474 detonation Methods 0.000 claims abstract description 26
- 230000000151 anti-reflux effect Effects 0.000 claims abstract description 11
- 238000004880 explosion Methods 0.000 claims abstract description 11
- 239000003990 capacitor Substances 0.000 claims description 27
- 230000003071 parasitic effect Effects 0.000 claims description 16
- 230000000977 initiatory effect Effects 0.000 claims description 13
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 8
- 239000002360 explosive Substances 0.000 claims description 7
- 230000015556 catabolic process Effects 0.000 claims description 6
- 230000003111 delayed effect Effects 0.000 claims description 6
- 239000003999 initiator Substances 0.000 claims description 6
- 238000005422 blasting Methods 0.000 abstract description 10
- 230000000694 effects Effects 0.000 abstract description 3
- 238000010276 construction Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000087 stabilizing effect Effects 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 1
- 238000005065 mining Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42C—AMMUNITION FUZES; ARMING OR SAFETY MEANS THEREFOR
- F42C19/00—Details of fuzes
- F42C19/08—Primers; Detonators
- F42C19/12—Primers; Detonators electric
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42D—BLASTING
- F42D1/00—Blasting methods or apparatus, e.g. loading or tamping
- F42D1/04—Arrangements for ignition
- F42D1/045—Arrangements for electric ignition
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42D—BLASTING
- F42D1/00—Blasting methods or apparatus, e.g. loading or tamping
- F42D1/04—Arrangements for ignition
- F42D1/045—Arrangements for electric ignition
- F42D1/05—Electric circuits for blasting
- F42D1/055—Electric circuits for blasting specially adapted for firing multiple charges with a time delay
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42D—BLASTING
- F42D3/00—Particular applications of blasting techniques
- F42D3/04—Particular applications of blasting techniques for rock blasting
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42D—BLASTING
- F42D5/00—Safety arrangements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Air Bags (AREA)
Abstract
The invention discloses an anti-electromagnetic interference method for an electronic detonator. When the small-section blasting is carried out, the electromagnetic interference is easy to cause the false triggering and the misfire of the electronic detonator. The method is characterized in that a level output pin g is additionally arranged in a control chip, the pin g outputs a low level after the control chip is powered on and reset, and outputs a high level after the control chip receives a detonation command; additionally arranging an Nmos tube and an anti-reflux diode; and a pin g is connected with the grid electrode of the Nmos tube, the drain electrode of the Nmos tube is connected with the anode of the anti-reflux diode, the cathode of the anti-reflux diode is connected with the power supply end of the control chip, and the source electrode of the Nmos tube is connected with the grounding end of the rectifier bridge. When an electronic detonator is detonated, current pulses generated by electromagnetic interference caused by explosion are induced on a pin wire of the post-detonating electronic detonator, the current pulses are directly transmitted to the ground, and the control chip cannot be interfered by the electromagnetic pulses caused by the explosion. The method is easy to realize and has good electromagnetic pulse interference resistance effect.
Description
Technical Field
The invention belongs to the technical field of electronic detonators, and relates to an anti-electromagnetic interference method for an electronic detonator.
Background
Compared with a non-electric detonator, the electronic detonator has the functions of more accurate control of detonation delay time, control of detonation energy, safety control and the like, and is widely applied. Because the electronic detonator relates to blasting operation, the safety requirement of the electronic detonator is high. The electronic detonator is required to be free from being detonated by mistake under electromagnetic interference and misoperation in a complex environment. Particularly, when the small-section blasting is carried out, the induced voltage and the induced current of the electronic detonator easily cause the false triggering and the misfire of the electronic detonator.
A small cross-section generally means that the width or span of the outer contour of the cross-section is less than 4m and the area is less than 20m2The tunnel of (2). Various guide pits, various municipal tunnels, water supply and drainage pipelines, pedestrian tunnels and the like during construction by a mining method belong to the types. The vibration generated by the blast hole is inversely proportional to the strong electromagnetic interference intensity and the square of the distance. Because the hole distance in the small-section tunneling blasting is relatively close, the small-section tunneling blasting is strongly influenced by vibration and strong electromagnetic interference generated by a blast hole which is blasted first, so that a chip of an electronic detonator which is being subjected to delay blasting is damaged and loses efficacy, and normal blasting cannot be performed. The current method for relieving the situation is to reduce the delay among the electronic detonators and reduce the influence of the blasting produced by the first-blast blastholes on the chips of the electronic detonators in the unexploded blastholes. Therefore, the blasting scheme is limited, the blasting efficiency and effect are influenced, and the construction period and the construction cost are increased.
Disclosure of Invention
The invention aims to provide an anti-electromagnetic interference method for an electronic detonator, aiming at solving the problems of the existing electronic detonator.
The power end of a control chip U and one end of a voltage-stabilizing capacitor C of the electronic detonator are connected with the power output end of the rectifier bridge, the other end of the voltage-stabilizing capacitor C and the ground of the control chip U are connected with the ground end of the rectifier bridge, and parasitic electricity is formed between the other end of the voltage-stabilizing capacitor C and the ground of the control chip U and the groundA capacitance Cp; the rectifier bridge comprises four diodes, a first diode D1Cathode of and a second diode D2The anode of the voltage reducing resistor is connected with one end of a voltage reducing resistor R, and the other end of the voltage reducing resistor R is connected with a pin wire P of the electronic detonator; third diode D3Anode of and a fourth diode D4The cathode of the electronic detonator is connected with the other pin wire N of the electronic detonator; first diode D1Anode of and a fourth diode D4The anode of the rectifier is connected with a grounding end serving as a rectifier bridge; second diode D2Cathode of and a third diode D3The cathode of which is connected as the power output of the rectifier bridge. The method comprises the steps that a level output pin g is additionally arranged in a control chip U, the level output pin g outputs a low level after the control chip U is powered on and reset, and a high level is output after the control chip U receives a detonation command; additionally arranging an Nmos tube and an anti-reflux diode D; the level output pin g is connected with the grid electrode of the Nmos tube N, the drain electrode of the Nmos tube N is connected with the anode of the anti-backflow diode D, the cathode of the anti-backflow diode D is connected with the power supply end of the control chip U, and the source electrode of the Nmos tube N is connected with the grounding end of the rectifier bridge.
After the control chips U of the electronic detonators connected in parallel are powered on and reset, the pin g outputs low level, the Nmos tube N is disconnected, and the initiator actively cuts off power after sending out a detonation command; after the control chip U receives the detonation command, the pin g outputs high level, the Nmos tube N is conducted, and the power supply output end of the rectifier bridge is communicated with the grounding end; and the control chips U of all the electronic detonators carry out delayed detonation by depending on the electric quantity of the voltage-stabilizing capacitor C.
When an electronic detonator is detonated, the explosive is detonated to cause electromagnetic interference to generate current pulse, the current pulse is induced on a pin wire of the electronic detonator, the current pulse does not flow through the control chip U and is directly transmitted to the ground, and the control chip U is not interfered by the electromagnetic pulse caused by explosion.
Because the impedance of the control chip U is far greater than the conduction impedance of the Nmos tube N, if a current pulse is induced on a pin wire P of the post-ignition electronic detonator, the current pulse passes through the voltage reduction resistor R and the second diode D2The Nmos tube N and the parasitic capacitor Cp are transmitted to the ground; if another of the electronic detonators is post-detonatedA current pulse is induced on each pin wire N and passes through the third diode D3The Nmos tube N and the parasitic capacitance Cp are transmitted to the ground.
And further, a fuse F is also arranged, and the power supply end of the control chip U is connected with the cathode of the anti-reflux diode D and then is connected with the power supply output end of the rectifier bridge through the fuse F.
After the control chips U of the electronic detonators connected in parallel are powered on and reset, the pin g outputs low level, the Nmos tube N is disconnected, and the initiator actively cuts off power after sending out a detonation command; after the control chip U receives the detonation command, the pin g outputs a high level, the Nmos tube N is conducted, the power supply output end of the rectifier bridge is communicated with the grounding end to cause short circuit, and the fuse F is fused; and the control chips U of all the electronic detonators carry out delayed detonation by depending on the electric quantity of the voltage-stabilizing capacitor C.
When an electronic detonator is detonated, the explosive is detonated to cause electromagnetic interference to generate current pulse, the current pulse is induced on a pin wire of the electronic detonator, the current pulse does not flow through the control chip U and is directly transmitted to the ground, and the control chip U is not interfered by the electromagnetic pulse caused by explosion.
If a current pulse is induced on a pin wire P of the post-ignition electronic detonator, the current pulse causes a first diode D of the post-ignition electronic detonator1A voltage exceeding a reverse breakdown voltage, a first diode D1Breakdown is conducted, and the current pulse induced on the pin wire P passes through the voltage reduction resistor R and the first diode D1And the parasitic capacitance Cp to ground;
if a current pulse is induced on the other pin wire N of the post-ignition electronic detonator, the current pulse causes the fourth diode D of the post-ignition electronic detonator4Voltage exceeding reverse breakdown voltage, fourth diode D4Breakdown is conducted, and current pulse induced on the pin wire N passes through the fourth diode D4And the parasitic capacitance Cp to ground.
When the first time-delay initiation electronic detonator is ready for initiation, no induced current pulse exists on the lead wire P and the lead wire N, the electric quantity of the voltage-stabilizing capacitor C is used for the time-delay initiation of the electronic detonator, and the electronic detonator is normally initiated.
According to the method, after the detonation command is received, the Nmos tube is in a conducting state, when an electronic detonator detonates, the electromagnetic interference caused by explosive explosion generates current pulse, the current pulse is induced on a pin wire of the electronic detonator, the current pulse does not flow through the control chip and is directly transmitted to the ground, and the control chip is not interfered by the electromagnetic pulse caused by explosion. The method is easy to realize and has good electromagnetic pulse interference resistance effect.
Drawings
FIG. 1 is a schematic control diagram of a conventional electronic detonator;
FIG. 2 is a schematic diagram of an implementation of one embodiment of the method of the present invention;
fig. 3 is a schematic diagram of another embodiment of the method of the present invention.
Detailed Description
The invention is further described below with reference to the figures and examples. The following examples are only specific examples of the present invention, but the design concept of the present invention is not limited thereto, and any insubstantial modifications of the present invention using the design concept shall fall within the scope of the present invention.
As shown in fig. 1, a signal input end of a control chip U ' and one end of a voltage-stabilizing capacitor C of a conventional electronic detonator are connected to an output end of a rectifier bridge, and the other end of the voltage-stabilizing capacitor C and a ground end of the control chip U ' are connected to a ground end of the rectifier bridge, so that a parasitic capacitor Cp is formed between the other end of the voltage-stabilizing capacitor C and the ground end of the control chip U ' and the; one input end of the rectifier bridge is connected with the step-down resistor R and then used as a pin wire of the electronic detonator, and the other input end of the rectifier bridge is used as the other pin wire of the electronic detonator. The two pin wires are connected with an exploder, and the exploder sends an explosion signal and supplies power to the control device. And a control chip U' in the control device detonates according to the detonation signal sent by the pin wire.
Example 1.
As shown in fig. 2, in the method for resisting electromagnetic interference of an electronic detonator, a level output pin g is additionally arranged in a control chip U of an original electronic detonator, the level output pin g outputs a low level after the control chip U is powered on and reset, and outputs a high level after the control chip U receives a detonation command. An Nmos tube and an anti-reflux diode D are additionally arranged.
The power output end of the rectifier bridge is connected with the drain electrode of the Nmos tube N and the anode of the anti-reflux diode D, the power end of the control chip U and one end of the voltage stabilizing capacitor C are connected with the cathode of the anti-reflux diode D, a level output pin g of the control chip U is connected with the grid electrode of the Nmos tube N, the source electrode of the Nmos tube N, the other end of the voltage stabilizing capacitor C and the ground of the control chip U are connected with the ground end of the rectifier bridge, and a parasitic capacitor Cp is formed between the source electrode of the Nmos tube N, the other end.
Wherein the rectifier bridge comprises four diodes, a first diode D1Cathode of and a second diode D2The anode of the voltage reducing resistor is connected with one end of a voltage reducing resistor R, and the other end of the voltage reducing resistor R is connected with a pin wire P of the electronic detonator; third diode D3Anode of and a fourth diode D4The cathode of the electronic detonator is connected with the other pin wire N of the electronic detonator; first diode D1Anode of and a fourth diode D4The anode of the rectifier is connected with a grounding end serving as a rectifier bridge; second diode D2Cathode of and a third diode D3The cathode of which is connected as the power output of the rectifier bridge.
After the control chips U of the electronic detonators connected in parallel are powered on and reset, the pin g outputs low level, the Nmos tube N is disconnected, and the initiator actively cuts off power after sending out a detonation command; after the control chip U receives a detonation command sent by the detonator, the pin g outputs a high level, the Nmos tube N is conducted, and the power supply output end of the rectifier bridge is communicated with the grounding end; and the control chips U of all the electronic detonators carry out delayed detonation by depending on the electric quantity of the voltage-stabilizing capacitor C.
When an electronic detonator is detonated, the explosive is detonated to cause electromagnetic interference to generate current pulse, the current pulse is induced on a pin wire of the electronic detonator, the current pulse does not flow through the control chip U and is directly transmitted to the ground, and the control chip U is not interfered by the electromagnetic pulse caused by explosion. The method comprises the following steps:
because the impedance of the control chip U is far greater than the conduction impedance of the Nmos tube N, if a current pulse is induced on a pin wire P of the post-ignition electronic detonator, the current pulse passes through the voltage reduction resistor R and the second diode D2The Nmos tube N and the parasitic capacitor Cp are transmitted to the ground;if a current pulse is induced on the other pin wire N of the post-ignition electronic detonator, the current pulse passes through a third diode D3The Nmos tube N and the parasitic capacitance Cp are transmitted to the ground.
When the first time-delay initiation electronic detonator is ready for initiation, no induced current pulse exists on the lead wire P and the lead wire N, and the electric quantity of the voltage-stabilizing capacitor C is used for the time-delay initiation of the electronic detonator, so that the electronic detonator is normally initiated.
Example 2.
As shown in fig. 3, a fuse F is added in addition to embodiment 1. The power end of the control chip U is connected with the cathode of the anti-reflux diode D and then connected with one end of the fuse F, and the other end of the fuse F is connected with the power output end of the rectifier bridge.
After the control chips U of the electronic detonators connected in parallel are powered on and reset, the pin g outputs low level, the Nmos tube N is disconnected, and the initiator actively cuts off power after sending out a detonation command; after the control chip U receives the detonation command, the pin g outputs a high level, the Nmos tube N is conducted, the power supply output end of the rectifier bridge is communicated with the grounding end to cause short circuit, and the fuse F is fused; and the control chips U of all the electronic detonators carry out delayed detonation by depending on the electric quantity of the voltage-stabilizing capacitor C.
When an electronic detonator is detonated, the explosive is detonated to cause electromagnetic interference to generate current pulse, the current pulse is induced on a pin wire of the electronic detonator, the current pulse does not flow through the control chip U and is directly transmitted to the ground, and the control chip U is not interfered by the electromagnetic pulse caused by explosion. The method comprises the following steps:
if a current pulse is induced on a pin wire P of the post-ignition electronic detonator, the current pulse causes a first diode D of the post-ignition electronic detonator1A voltage exceeding a reverse breakdown voltage, a first diode D1Breakdown is conducted, and the current pulse induced on the pin wire P passes through the voltage reduction resistor R and the first diode D1And the parasitic capacitance Cp to ground; if a current pulse is induced on the other pin wire N of the post-ignition electronic detonator, the current pulse causes the fourth diode D of the post-ignition electronic detonator4Voltage exceeding reverse breakdown voltage, fourth diode D4Breakdown conduction, and inductance on pin line NThe corresponding current pulse passes through the fourth diode D4And the parasitic capacitance Cp to ground.
When the first time-delay initiation electronic detonator is ready for initiation, no induced current pulse exists on the lead wire P and the lead wire N, and the electric quantity of the voltage-stabilizing capacitor C is used for the time-delay initiation of the electronic detonator, so that the normal initiation of the electronic detonator is not influenced.
The scheme of embodiment 2 is suitable for the situation that the current pulse is strong, and in this situation, by adopting the scheme of embodiment 1, the current pulse may enter the control chip U to cause interference. By practice, the solution of example 1 can achieve electromagnetic interference resistance in general.
Claims (7)
1. The method for preventing the electronic detonator from electromagnetic interference comprises the steps that a power supply end of a control chip U and one end of a voltage-stabilizing capacitor C of the electronic detonator are connected with a power supply output end of a rectifier bridge, the other end of the voltage-stabilizing capacitor C and the ground of the control chip U are connected with a ground end of the rectifier bridge, and a parasitic capacitor Cp is formed between the other end of the voltage-stabilizing capacitor C and the ground of the control chip; the rectifier bridge comprises four diodes, a first diode D1Cathode of and a second diode D2The anode of the voltage reducing resistor is connected with one end of a voltage reducing resistor R, and the other end of the voltage reducing resistor R is connected with a pin wire P of the electronic detonator; third diode D3Anode of and a fourth diode D4The cathode of the electronic detonator is connected with the other pin wire N of the electronic detonator; first diode D1Anode of and a fourth diode D4The anode of the rectifier is connected with a grounding end serving as a rectifier bridge; second diode D2Cathode of and a third diode D3The cathode of the rectifier is connected with the power output end of the rectifier bridge; the method is characterized in that:
the method comprises the steps that a level output pin g is additionally arranged in a control chip U, the level output pin g outputs a low level after the control chip U is powered on and reset, and a high level is output after the control chip U receives a detonation command;
additionally arranging an Nmos tube N and an anti-reflux diode D; the level output pin g is connected with the grid electrode of the Nmos tube N, the drain electrode of the Nmos tube N is connected with the anode of the anti-backflow diode D, the cathode of the anti-backflow diode D is connected with the power supply end of the control chip U, and the source electrode of the Nmos tube N is connected with the grounding end of the rectifier bridge.
2. The method for resisting electromagnetic interference of the electronic detonator according to claim 1, wherein: after the control chips U of the electronic detonators connected in parallel are powered on and reset, the pin g outputs low level, the Nmos tube N is disconnected, and the initiator actively cuts off power after sending out a detonation command; after the control chip U receives the detonation command, the pin g outputs high level, the Nmos tube N is conducted, and the power supply output end of the rectifier bridge is communicated with the grounding end; the control chips U of all the electronic detonators carry out delayed detonation by depending on the electric quantity of the voltage-stabilizing capacitor C;
when an electronic detonator is detonated, the explosive is detonated to cause electromagnetic interference to generate current pulse, the current pulse is induced on a pin wire of the electronic detonator, the current pulse does not flow through the control chip U and is directly transmitted to the ground, and the control chip U is not interfered by the electromagnetic pulse caused by explosion.
3. The electronic detonator electromagnetic interference resistance method of claim 2, wherein:
if a current pulse is induced on a pin wire P of the post-ignition electronic detonator, the current pulse passes through the voltage reduction resistor R and the second diode D2The Nmos tube N and the parasitic capacitor Cp are transmitted to the ground; if a current pulse is induced on the other pin wire N of the post-ignition electronic detonator, the current pulse passes through a third diode D3The Nmos tube N and the parasitic capacitance Cp are transmitted to the ground.
4. The method for resisting electromagnetic interference of the electronic detonator according to claim 1, wherein: a fuse F is also arranged; and a power supply end of the control chip U is connected with a cathode of the anti-reflux diode D and then connected with a power supply output end of the rectifier bridge through the fuse F.
5. The method of claim 4 for resisting electromagnetic interference of the electronic detonator, wherein: after the control chips U of the electronic detonators connected in parallel are powered on and reset, the pin g outputs low level, the Nmos tube N is disconnected, and the initiator actively cuts off power after sending out a detonation command; after the control chip U receives the detonation command, the pin g outputs a high level, the Nmos tube N is conducted, the power supply output end of the rectifier bridge is communicated with the grounding end to cause short circuit, and the fuse F is fused; the control chips U of all the electronic detonators carry out delayed detonation by depending on the electric quantity of the voltage-stabilizing capacitor C;
when an electronic detonator is detonated, the explosive is detonated to cause electromagnetic interference to generate current pulse, the current pulse is induced on a pin wire of the electronic detonator, the current pulse does not flow through the control chip U and is directly transmitted to the ground, and the control chip U is not interfered by the electromagnetic pulse caused by explosion.
6. The electronic detonator electromagnetic interference resistance method of claim 5, wherein:
if a current pulse is induced on a pin wire P of the post-ignition electronic detonator, the current pulse causes a first diode D of the post-ignition electronic detonator1A voltage exceeding a reverse breakdown voltage, a first diode D1Breakdown is conducted, and the current pulse induced on the pin wire P passes through the voltage reduction resistor R and the first diode D1And the parasitic capacitance Cp to ground;
if a current pulse is induced on the other pin wire N of the post-ignition electronic detonator, the current pulse causes the fourth diode D of the post-ignition electronic detonator4Voltage exceeding reverse breakdown voltage, fourth diode D4Breakdown is conducted, and current pulse induced on the pin wire N passes through the fourth diode D4And the parasitic capacitance Cp to ground.
7. The method for resisting electromagnetic interference of an electronic detonator as claimed in claim 1, 2, 3, 4, 5 or 6, wherein: when the first time-delay initiation electronic detonator is ready for initiation, no induced current pulse exists on the lead wire P and the lead wire N, the electric quantity of the voltage-stabilizing capacitor C is used for the time-delay initiation of the electronic detonator, and the electronic detonator is normally initiated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010738824.4A CN111750748A (en) | 2020-07-28 | 2020-07-28 | Anti-electromagnetic interference method for electronic detonator |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010738824.4A CN111750748A (en) | 2020-07-28 | 2020-07-28 | Anti-electromagnetic interference method for electronic detonator |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112556521A (en) * | 2020-10-15 | 2021-03-26 | 上海芯跳科技有限公司 | Electronic detonator for improving communication anti-interference performance |
| CN112556520A (en) * | 2020-10-15 | 2021-03-26 | 上海芯跳科技有限公司 | Electronic detonator for improving communication reliability and anti-interference performance |
| CN115235303A (en) * | 2022-07-26 | 2022-10-25 | 上海芯跳科技有限公司 | Anti-interference method and system for electronic detonator |
-
2020
- 2020-07-28 CN CN202010738824.4A patent/CN111750748A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112556521A (en) * | 2020-10-15 | 2021-03-26 | 上海芯跳科技有限公司 | Electronic detonator for improving communication anti-interference performance |
| CN112556520A (en) * | 2020-10-15 | 2021-03-26 | 上海芯跳科技有限公司 | Electronic detonator for improving communication reliability and anti-interference performance |
| CN112556520B (en) * | 2020-10-15 | 2021-09-28 | 上海芯跳科技有限公司 | Electronic detonator for improving communication reliability and anti-interference performance |
| CN115235303A (en) * | 2022-07-26 | 2022-10-25 | 上海芯跳科技有限公司 | Anti-interference method and system for electronic detonator |
| CN115235303B (en) * | 2022-07-26 | 2023-11-28 | 上海芯跳科技有限公司 | Anti-interference method and system for electronic detonator |
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