CN111737176B - PCIE data-based synchronization device and driving method - Google Patents
PCIE data-based synchronization device and driving method Download PDFInfo
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- CN111737176B CN111737176B CN202010392108.5A CN202010392108A CN111737176B CN 111737176 B CN111737176 B CN 111737176B CN 202010392108 A CN202010392108 A CN 202010392108A CN 111737176 B CN111737176 B CN 111737176B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
Abstract
The invention provides a PCIE data-based synchronization device and a driving method, wherein the driving method comprises the following steps: the method comprises the following steps: the MMU unit acquires an operation request for the IOVA; the MMU unit converts the operation request of the IOVA into a virtual channel in the VF unit; the PF unit judges whether a responding virtual channel with higher priority than the virtual channel exists, if so, the PF unit stops responding to the virtual channel and enables the virtual channel to enter a waiting queue, and after the response of the virtual channel with the higher priority is finished, the PF unit responds to the operation request of the virtual channel, and if not, the PF unit responds to the operation request of the virtual channel. The technical scheme can ensure the data ordering, avoid the consumption of excessive bandwidth of the flow and realize the flow control of each thread.
Description
Technical Field
The present invention relates to the field of computer communications, and in particular, to a PCIE data-based synchronization apparatus and a driving method.
Background
PCIe (peripheral component interconnect express) may map a PCIe domain address to a chip storage domain address through ats (address translation service), and a Memory Management Unit (MMU) of the chip may map a segment of the storage domain address in a kernel space and a user state space of the operating system to form a corresponding IOVA segment. Because of data management in the address mapping manner, if different software and threads need to access the region at the same time, a signal synchronization mechanism, such as a software lock, is inevitably added. Such a mechanism, while ensuring the ordering of data, consumes CPU bandwidth unnecessarily, and lock contention actually reduces the bandwidth of the entire flow. And flow control cannot be performed on each thread, and hard real-time indexes of partial access and the like cannot be guaranteed.
Disclosure of Invention
Therefore, a PCIE data-based synchronization apparatus and a driving method are needed to solve the problem of the utilization rate of the CPU bandwidth.
In order to achieve the above object, the inventor provides a method for driving a synchronization apparatus based on PCIE data, including the following steps:
the MMU unit acquires an operation request for the IOVA;
the MMU unit converts the operation request of the IOVA into a virtual channel in the VF unit;
the PF unit judges whether a responding virtual channel with higher priority than the virtual channel exists, if so, the PF unit stops responding to the virtual channel and enables the virtual channel to enter a waiting queue, and after the response of the virtual channel with the higher priority is finished, the PF unit responds to the operation request of the virtual channel, and if not, the PF unit responds to the operation request of the virtual channel.
Further, when the virtual channel is entered into the waiting queue, the method further comprises the following steps:
and the PF unit judges whether the virtual channels in the waiting queue exceed a preset time, and if so, the PF unit raises the priority level of the virtual channels to the highest priority level.
Further, if yes, the PF unit raises the priority of the virtual channel to the highest priority, further including the steps of:
and the VF unit controls the virtual channel which is raised to the highest priority level to carry out single transmission.
Further, the method also comprises the following steps:
after the virtual channel with the highest priority is promoted to perform single transmission, the VF unit restores the original priority of the virtual channel.
Further, the method also comprises the following steps:
the PF unit judges whether a responding virtual channel with lower priority than the virtual channel exists, if so, the PF unit responds to the operation request of the virtual channel, the virtual channel with lower priority enters a waiting queue, after the operation request response of the virtual channel is finished, the PF unit responds to the suspended operation request with lower priority, and if not, the PF unit responds to the operation request of the virtual channel.
Further, when the virtual channel is entered into the waiting queue, the method further comprises the following steps:
the PF unit controls the virtual channel to enter the buffer of the VF unit.
Further, when the virtual channel is entered into the waiting queue, the method further comprises the following steps:
and the real-time control module of the MMU unit closes the translation action of the access request of the IOVA corresponding to the virtual channel.
Further, the method also comprises the following steps:
a page fault message is generated, and the real-time control module shelves the page fault message.
Further, the method also comprises the following steps:
and the real-time control module responds to the translation action of the access request of the corresponding IOVA of the virtual channel and eliminates page fault messages.
The inventor provides a synchronization device based on PCIE data, including an MMU unit, a VF unit, and a PF unit, where the MMU unit, the VF unit, and the PF unit are configured to execute a synchronization management method based on PCIE data according to any one of the embodiments.
Different from the prior art, the technical scheme enables the high-priority virtual channel to operate first, and the low-priority virtual channel enters the waiting queue when the high-priority virtual channel responds. The virtual channel with low priority in the waiting queue also determines the order of response according to the order of priority from high to low. The method and the device can ensure the ordering of data, avoid the consumption of excessive bandwidth of the flow and realize the flow control of each thread.
Drawings
Fig. 1 is an architecture diagram of a synchronization management apparatus based on PCIE data according to this embodiment.
Detailed Description
In order to explain technical contents, structural features, objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1, the present embodiment is a method for synchronous management based on PCIE data, including the following steps: a Memory Management Unit (MMU) Unit obtains an operation request for an IOVA (input/output virtual address), and the MMU Unit converts the operation request for the IOVA into a virtual channel in a virtual-Function (VF) Unit. A Physical channel (PF) unit determines whether or not there is a responding virtual channel having a higher priority than the virtual channel. If yes, the PF unit suspends responding to the virtual channel, enables the virtual channel to enter a waiting queue, and responds to the operation request of the virtual channel after the response of the high-priority virtual channel is finished. And if not, the PF unit responds to the operation request of the virtual channel. It should be noted that the configuration priority may be performed by a Quality Of Service (QOS) module in the PF unit.
According to the technical scheme, the PF unit configures the priority for each virtual channel, and the operation requests (such as writing or reading) of the application or the thread are run according to the sequence of the priority from high to low. And enabling the high-priority virtual channel to run first, and enabling the low-priority virtual channel to enter a waiting queue when the high-priority virtual channel responds. The virtual channel with low priority in the waiting queue also determines the order of response according to the order of priority from high to low. The method can ensure the orderliness of data, avoid consuming excessive bandwidth of the flow and realize the flow control of each thread.
An MMU unit of a chip maps a Physical Address (PA) of a storage domain to a plurality of virtual addresses (IOVA) of the storage domain, and then allocates a virtual-Function (VF) to each application or thread that needs to access the Physical Address. Referring to fig. 1, two physical addresses, PA1 and PA2, two IOVA1 and IOVA2, and two virtual channels, VF1 and VF2 are shown. And one virtual channel corresponds to one IOVA through the ATS unit.
The virtual channels are the same in address configuration for the PCIe domain, so that the addresses correspond to the physical address PA after ATS, but the IOVA is different after MMU, so that the addresses seen from different applications or threads are different, the virtual channels are considered as different devices, and software does not need to additionally increase a locking mechanism. The software efficiency can be improved, and the bandwidth utilization rate can be fully improved.
In this embodiment, a high priority virtual channel may interrupt the operation of a low priority virtual channel. If a virtual channel is configured with the highest priority (also referred to as real-time transmission mode), other ongoing transmissions with lower priority are stopped. Specifically, the PF unit determines whether there is a responding virtual channel having a priority lower than that of the virtual channel, if so, the PF unit responds to the operation request of the virtual channel, and allows the virtual channel having a lower priority to enter a waiting queue, and after the operation request response of the virtual channel is completed, responds to the suspended operation request having a lower priority, and if not, the PF unit responds to the operation request of the virtual channel.
In this embodiment, in order to prohibit the low-priority virtual channel from further receiving transmission data sent by the software, when the low-priority virtual channel is buffered in the buffer of the VF unit to form a wait queue, the real-time control unit (triple unit) of the memory management unit closes the translation operation of the access request of the virtual channel corresponding to the IOVA. It should be noted that the translation action refers to a process of associating a virtual channel with a physical address in the IOVA, and by limiting the process, it is possible to prohibit a low-priority virtual channel from receiving transmission data sent by software.
In a further embodiment, if a page fault message (page fault) is generated after shutdown, the page fault message is not sent to upper layer software. And the real-time control module responds to the translation action of the access request of the corresponding IOVA of the virtual channel and eliminates page fault messages.
In this embodiment, after the low-priority virtual channel is preempted for a long time by another high-priority virtual channel or a virtual channel requiring real-time performance, in order to prevent the user status from being abnormal, a maximum timeout transmission time (preset time) is configured for the virtual channel in the wait queue. The method can be carried out by relying on a quality management unit of a memory management unit, and a timer can be used for exhausting the maximum overtime transmission time, and a corresponding request is sent out after the maximum overtime transmission time is exhausted. And the PF unit judges whether the virtual channels in the waiting queue exceed a preset time, and if so, the PF unit raises the priority level of the virtual channels to the highest priority level. Then, the priority level is automatically reduced to the original priority level again, and the transmission is allowed after waiting for queuing or the next maximum timeout time is exhausted again and is temporarily allowed to be inserted into a transmission. If not, the waiting queue is kept. The method is an emergency measure for the virtual channel with the low priority level, so that the abnormal user state caused by long-time non-running of the process or thread with the low priority level is avoided.
In this embodiment, in order to maintain the ordering of the same priority level, the quality management unit of the memory management unit uses a rotation method to allocate the time slices to a plurality of virtual channels at the same priority level. High priority applications may interrupt low priority in the quality management unit and also occupy a larger transmission time slice. The priority of the same level depends on the quality management unit to distribute time slices for a round robin strategy. Let a virtual channel run on the CPU for a time slice, such as 100ms (milliseconds) of time, this 100ms interval is referred to as a time slice. When a process runs out of time slices allocated to it, the scheduler stops the process and puts it at the end of the ready queue, letting the next virtual channel also execute a time slice. Of course, the time slice for each virtual channel may be different and set according to the actual requirements of the program or process. Therefore, a plurality of processes or programs can be responded by the system in time, and the operation efficiency is improved.
It should be noted that, only two connections between the physical addresses, the IOVA, and the virtual channels are illustrated herein, for example, three, four, or even more connections between the physical addresses, the IOVA, and the virtual channels are still a connection relationship where one physical address corresponds to one IOVA, and one IOVA corresponds to one virtual channel.
The present embodiment provides a synchronization management apparatus based on PCIE data, including an MMU unit, a VF unit, and a PF unit, where the MMU unit, the VF unit, and the PF unit are configured to execute any one of the synchronization management methods based on PCIE data according to the present embodiments.
It should be noted that, although the above embodiments have been described herein, the invention is not limited thereto. Therefore, based on the innovative concepts of the present invention, the technical solutions of the present invention can be directly or indirectly applied to other related technical fields by changing and modifying the embodiments described herein or by using the equivalent structures or equivalent processes of the content of the present specification and the attached drawings, and are included in the scope of the present invention.
Claims (9)
1. A driving method of a synchronization device based on PCIE data is characterized by comprising the following steps:
the MMU unit acquires an operation request for the IOVA;
the MMU unit converts the operation request of the IOVA into a virtual channel in the VF unit;
the PF unit judges whether a responding virtual channel with higher priority than the virtual channel exists, if so, the PF unit suspends responding to the virtual channel and enables the virtual channel to enter a waiting queue, and after the response of the virtual channel with the higher priority is finished, the PF unit responds to the operation request of the virtual channel;
when the virtual channel is allowed to enter the waiting queue, the method further comprises the following steps:
the PF unit judges whether the virtual channels in the waiting queue exceed preset time, if so, the PF unit raises the priority level of the virtual channels to the highest priority level, and when the virtual channels with the highest priority level transmit, the transmission of the virtual channels with the lower priority level is stopped.
2. The method according to claim 1, wherein if the PF unit raises the priority of the virtual lane to the highest priority, the method further comprises the following steps:
and the VF unit controls the virtual channel which is raised to the highest priority level to carry out single transmission.
3. The method according to claim 2, further comprising the following steps:
after the virtual channel with the highest priority is promoted to perform single transmission, the VF unit restores the original priority of the virtual channel.
4. The method according to claim 1, further comprising the following steps:
the PF unit judges whether a responding virtual channel with lower priority than the virtual channel exists, if so, the PF unit responds to the operation request of the virtual channel, the virtual channel with lower priority enters a waiting queue, after the operation request response of the virtual channel is finished, the PF unit responds to the suspended operation request with lower priority, and if not, the PF unit responds to the operation request of the virtual channel.
5. The method according to claim 1, wherein when the virtual channel is allowed to enter the wait queue, the method further comprises the following steps:
the PF unit controls the virtual channel to enter the buffer of the VF unit.
6. The method according to claim 1, wherein when the virtual channel is allowed to enter the wait queue, the method further comprises the following steps:
and the real-time control module of the MMU unit closes the translation action of the access request of the corresponding IOVA of the virtual channel.
7. The method according to claim 5, further comprising the following steps:
a page fault message is generated, and the real-time control module shelves the page fault message.
8. The method according to claim 7, further comprising:
the real-time control module responds to the translation action of the access request of the virtual channel corresponding to the IOVA and eliminates page fault messages.
9. A synchronization apparatus based on PCIE data, comprising an MMU unit, a VF unit, and a PF unit, where the MMU unit, the VF unit, and the PF unit are configured to execute the synchronization management method based on PCIE data according to any one of claims 1 to 8.
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