CN111722877A - PCIE configuration identification method and related assembly - Google Patents

PCIE configuration identification method and related assembly Download PDF

Info

Publication number
CN111722877A
CN111722877A CN202010530564.1A CN202010530564A CN111722877A CN 111722877 A CN111722877 A CN 111722877A CN 202010530564 A CN202010530564 A CN 202010530564A CN 111722877 A CN111722877 A CN 111722877A
Authority
CN
China
Prior art keywords
pcie
information
riser card
server
equipment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202010530564.1A
Other languages
Chinese (zh)
Other versions
CN111722877B (en
Inventor
刘超逸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Inspur Intelligent Technology Co Ltd
Original Assignee
Suzhou Inspur Intelligent Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Inspur Intelligent Technology Co Ltd filed Critical Suzhou Inspur Intelligent Technology Co Ltd
Priority to CN202010530564.1A priority Critical patent/CN111722877B/en
Publication of CN111722877A publication Critical patent/CN111722877A/en
Application granted granted Critical
Publication of CN111722877B publication Critical patent/CN111722877B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The application discloses a PCIE configuration identification method, which comprises the steps that a BIOS accesses an RISER card FRU to obtain the type of a current server RISER card and various information of PCIE equipment, and PCIE configuration is identified according to determined information to obtain PCIE configuration information; meanwhile, the method avoids manual addition and manual update of information, reduces the maintenance labor of the system, greatly reduces the maintenance cost of the server, displays more comprehensive PCIE equipment information for users, enables the users to know the use condition of the PCIE equipment of the current server more clearly, and is favorable for improving the product competitiveness. The application also provides a PCIE configuration identification device, equipment and a readable storage medium, and has the beneficial effects.

Description

PCIE configuration identification method and related assembly
Technical Field
The present application relates to the field of server technologies, and in particular, to a PCIE configuration identification method, apparatus, device, and a readable storage medium.
Background
With the rapid development of information technology and the vigorous progress of industries such as artificial intelligence and large arrays, users have higher requirements on the reliability and information processing capability of servers. The requirements of a new generation server based on the whitley platform on management and monitoring are more precise and accurate, and particularly, the PCIE (a high-speed serial computer extended bus standard) configuration of the current server needs to be identified and PCIE information is more clearly displayed to a user, and the user often needs to know information such as the type of PCIE devices inserted in the current server, slots inserted by the devices in the server, and how many vacant slots are left in the current server.
In the related art, the configuration of the PCIE equipment needs to be manually identified and input into a form, and the implementation mode needs to consume more human resources; errors are easily caused in the manual input process, so that the configuration of PCIE equipment is wrong; moreover, a PCIE device is often newly added, so that maintenance personnel need to add a part of workload for maintaining the configuration table, and flexibility is not provided. With the increase of server configuration types, the disadvantages of large maintenance difficulty and large labor consumption of the traditional scheme are gradually exposed.
Therefore, how to improve the efficiency of PCIE device configuration management is a problem that those skilled in the art will continuously solve.
Disclosure of Invention
The application aims to provide a PCIE configuration identification method, which can improve the PCIE equipment configuration management efficiency; another object of the present application is to provide a PCIE configuration identification apparatus, a device and a readable storage medium.
To solve the above technical problem, the present application provides a PCIE configuration identification method, including:
the BIOS extracts equipment information of PCIE equipment installed in the server; the device information comprises a PCIE channel occupied by the PCIE device;
determining the installation position of the PCIE equipment in the RISER card according to the PCIE channel;
accessing the RISER card and reading FRU information of the RISER card, and determining a PN number in the FRU information;
determining the type of the RISER card and the installation position in the server according to the PN number;
and taking the equipment information, the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server as PCIE configuration information.
Optionally, the PCIE configuration identification method further includes:
determining a total number of slots of the RISER card under the type;
counting the positions and the total amount of all PCIE equipment installed on the RISER card as occupied slot information;
determining the information of vacant card slots according to the total number of the slots of the RISER card and the occupied slot information;
and taking the information of the spare card slot as the PCIE configuration information.
Optionally, the PCIE configuration identification method further includes:
determining the number of the RISER card according to the PN number;
and taking the serial number of the RISER card as the PCIE configuration information.
Optionally, the extracting, by the BIOS, device information of the PCIE device installed in the server includes:
the BIOS extracts the type, the speed, the manufacturer and the occupied PCIE channel of the PCIE equipment installed in the server as the equipment information.
Optionally, the PCIE configuration identification method further includes:
and sending the PCIE configuration information to a BMC for information visualization processing.
Optionally, the PCIE configuration identification method further includes:
generating an upgrade instruction command according to the position information of the PCIE equipment so as to control the PCIE equipment corresponding to the position information to be upgraded automatically;
wherein, the location information of the PCIE device includes: the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server.
Optionally, the PCIE configuration identification method further includes:
counting the position information of each PCIE device and the position information of each server fan; wherein, the location information of the PCIE device includes: the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server;
judging the position information of the server fan to judge whether the server fan is in the vicinity of the PCIE equipment;
if so, increasing the rotating speed of the server fan;
and if not, reducing the rotating speed of the server fan.
The application also provides a PCIE configuration identification apparatus, which is applied to the BIOS, and the apparatus includes:
the device information extraction unit is used for extracting the device information of the PCIE device installed in the server; the device information comprises a PCIE channel occupied by the PCIE device;
the equipment position determining unit is used for determining the installation position of the PCIE equipment in the RISER card according to the PCIE channel;
a PN number reading unit for accessing the RISER card and reading the FRU information of the RISER card, and determining the PN number in the FRU information;
a card position determining unit for determining the type of the RISER card and the installation position in the server according to the PN number;
and the configuration information generating unit is used for taking the equipment information, the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server as PCIE configuration information.
The present application further provides a PCIE configuration identification device, including:
a memory for storing a computer program;
and the processor is used for realizing the steps of the PCIE configuration identification method when executing the computer program.
The application also provides a readable storage medium, wherein a program is stored on the readable storage medium, and the program realizes the steps of the PCIE configuration identification method when being executed by a processor.
According to the PCIE configuration identification method provided by the application, the RISER card FRU is accessed by the BIOS to obtain the type of the current server RISER card and various information of the PCIE equipment, and the PCIE configuration is identified according to the determined information to obtain the PCIE configuration information; in the method, the mounting position of the RISER card is determined by reading the PN number in the FRU information of the RISER card, the PN number is not easy to be tampered, and the safety and the reliability are high when the identification is carried out according to the PN number; meanwhile, the method avoids manual addition and manual update of information by means of automatic identification and configuration information processing, reduces maintenance labor of the system, greatly reduces maintenance cost of the server, enables the displayed PCIE equipment information to be more comprehensive, facilitates display of comprehensive PCIE equipment information for users, enables the users to know the use condition of the PCIE equipment of the current server more clearly, and is beneficial to improvement of product competitiveness.
The application also provides a PCIE configuration identification device, PCIE configuration identification equipment, and a readable storage medium, which have the above beneficial effects and are not described herein again.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a flowchart of a PCIE configuration identification method applied to a server according to an embodiment of the present application;
fig. 2 is a block diagram of a PCIE configuration identification apparatus according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a PCIE configuration identification device according to an embodiment of the present application.
Detailed Description
The core of the application is to provide a PCIE configuration identification method which is suitable for different types of FPGA accelerator cards of different manufacturers and can realize the solidification of static information of products; at the other core of the present application, a PCIE configuration identification apparatus, a device, and a readable storage medium are provided.
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a flowchart of a PCIE configuration identification method provided in this embodiment, where the method mainly includes:
step s110, extracting device information of the PCIE device installed in the server by the BIOS; the device information comprises a PCIE channel occupied by the PCIE device;
it should be noted that, in this embodiment, the triggering condition of step s110 is not limited, the server is powered on as the triggering condition, and accordingly, after the server is powered on, the BIOS executes the step of extracting the device information of the PCIE device installed in the server, and this kind of triggering manner can ensure that the information of the PCIE device of the current server can be obtained after each time the server is started, so as to implement effective update of the information; the access of the PCIE device may also be used as a trigger condition, that is, when the BIOS recognizes that there is access of the PCIE device on the server, the step of extracting device information of the newly accessed PCIE device is executed, and this kind of trigger manner may ensure that information when the new device is accessed is automatically updated, and ensure that changes of all currently accessed PCIE devices can be reflected in the configuration information of the PCIE in real time; in addition, a timing trigger mechanism may also be set, and the triggering is performed at intervals of a preset time interval, in this embodiment, the triggering method is only described as an example, and other triggering methods can refer to the description of this embodiment, and are not described herein again.
The BIOS is a basic input/output system, and can identify information such as the type and rate of the PCIE device, in this embodiment, the BIOS is used as an execution main body, some basic information identification functions of the BIOS for the PCIE device are used to extract basic operation information of the PCIE device, and PCIE configuration identification is performed based on the basic operation information.
Specifically, the BIOS extracts the device information of the PCIE device installed in the server, where the type of information specifically included in the specifically extracted device information is not limited, and the information includes a PCIE channel occupied by the PCIE device, and may further include any basic data that needs to be known by the user, such as the type, rate, manufacturer, and the like of the PCIE device, in order to ensure comprehensiveness of the information, so as to satisfy comprehensive acquisition of the PCIE configuration information by the user, optionally, the device information of the PCIE device installed in the server for extracting by the BIOS may specifically be: the BIOS extracts the type, rate, manufacturer, and occupied PCIE channel of the PCIE device installed in the server, as the device information, which is only described in this embodiment by taking the above information type as an example, and the description of this embodiment can be referred to for obtaining other information types, which is not described herein again.
Step s120, determining the installation position of the PCIE device in the RISER card according to the PCIE channel;
the PCIE channel occupied by the PCIE equipment indicates the slot position of the PCIE equipment in the current RISER card, the RISER card is an external plug-in card, and most of the PCIE equipment can be used only by being plugged in the RISER card. And determining that the PCIE equipment is specifically inserted into a plurality of card slots of the RISER card to obtain the installation position of the PCIE equipment in the RISER card.
Determining the installation position of the PCIE device in the RISER card can help to know the specific installation position of the PCIE device on the server, and can also help to know the installation situation of the device on the RISER card, for example, which slots are installed with devices, what types of devices are specifically installed, and the like, so as to help a user to comprehensively know the use situation of the slots.
Step s130, reading FRU information of the RISER card, and determining the PN number of the RISER card;
accessing a RISER card where PCIE equipment is located, reading a nonvolatile storage medium of the RISER card to acquire FRU (information specification, including information of manufacturer of a component, PN code and the like, the information being stored in the nonvolatile medium) information of the RISER card, wherein the FRU information includes a PN number, and analyzing the FRU information to obtain the PN number of the RISER card. The PN number is corresponding to the bar code pasted on the RISER card, indicating the type of RISER card.
Generally, a server needs to be adapted to different RISER cards, and the configurations of the different RISER cards are different, so that the type information of the RISER card where the current PCIE device is located needs to be determined, thereby further determining the configuration of the RISER card where the current PCIE device is located.
Step s140, determining the type of the RISER card and the installation position in the server according to the PN number;
the type of the RISER card can be determined by analyzing the PN number in the FRU information, and the number of slots is different for different types of cards, for example, the number of card slots (i.e., slots) is 3 when the RISER card PN is XXXX-0624-XXX and 5 when the RISER card PN is XXXX-0630-XXX. The total slot number can be determined by the type of the RISER card, and a user can be helped to know the total slot number of the RISER card to which the current PCIE equipment belongs and the slots of the installed equipment in the slots.
The installation position of the RISER card corresponding to each PN number in the server is fixed, so that the current installation position of the RISER card in a plurality of RISER cards of the server can be determined by determining the PN number, and the installation relation between the PCIE equipment and the server is further determined.
And step s150, taking the device information, the installation position of the PCIE device in the RISER card and the installation position of the RISER card in the server as PCIE configuration information.
And the BIOS counts the acquired equipment information, the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server, and takes the information as the acquired configuration information of the current PCIE equipment.
It should be noted that, in this embodiment, only the device information, the installation position of the PCIE device in the RISER card, and the installation position of the RISER card in the server are taken as the configuration information of the PCIE device for example for introduction, and the subsequent user can know, according to the configuration information, which type of device (GPU, RAID card, network card, etc.) is inserted in which RISER card of the current server is specifically.
In addition, other information types which help the user to know the PCIE configuration can be further acquired and used as configuration information, such as the device information of the RISER card, the serial number of the RISER card, and the like, and the information can be set according to the need of the actual user, which is not described herein again.
Based on the above description, the PCIE configuration identification method provided in this embodiment accesses the RISER card FRU to obtain the current server RISER card type and various information of the PCIE device, and identifies the PCIE configuration according to the determined information to obtain PCIE configuration information, and the method can dynamically and adaptively identify the PCIE device configuration, identify the server hardware configuration by dynamically identifying the RISER card type and the PCIE device, and can dynamically adapt to multiple configuration types, thereby facilitating comprehensive acquisition of PCIE configuration information; in the method, the mounting position of the RISER card is determined by reading the PN number in the FRU information of the RISER card, the PN number is not easy to be tampered, and the safety and the reliability are high when the identification is carried out according to the PN number; meanwhile, the method avoids manual addition and manual update of information by means of automatic identification and configuration information processing, reduces maintenance labor of the system, greatly reduces maintenance cost of the server, enables the displayed PCIE equipment information to be more comprehensive, facilitates display of comprehensive PCIE equipment information for users, enables the users to know the use condition of the PCIE equipment of the current server more clearly, and is beneficial to improvement of product competitiveness.
In the above embodiment, the device information, the installation position of the PCIE device in the RISER card, and the PCIE device configuration information outside the installation position of the RISER card in the server are not limited, so as to further help the user to know the use condition of the RISER card to which the PCIE device belongs, and facilitate further device installation and configuration for the RISER card, optionally, the following steps may be further performed:
(1) determining the total slot number of the RISER cards under the type;
(2) counting the positions and the total amount of all PCIE equipment installed on the RISER card as occupied slot information;
(3) determining the information of the vacant card slots according to the total number of the slots of the RISER card and the occupied slot information;
(4) and taking the information of the spare card slot as PCIE configuration information.
The type of the RISER card and the number of the card slots of the card can be known by acquiring the serial number of the RISER card, and the number and the position of the vacant card slots can be known by combining the currently inserted equipment. The method takes the spare card slot information as the PCIE configuration information, so that the information type of the PCIE configuration information can be further enriched, the comprehensiveness of the configuration information is ensured, a user is helped to comprehensively know the PCIE configuration, and the equipment management is further carried out on the RISER card to which the PCIE equipment belongs.
In addition, the following steps may be further performed: determining the number of the RISER card according to the PN number; and taking the number of the RISER card as PCIE configuration information.
Generally, because of the longer PN number, developers of BMC and BIOS will number each RISER card in order to manage it, as illustrated in Table (1) below.
RISER card PN Corresponding number Number of slots
XXXX-0624-XXX 0 3
XXXX-0630-XXX 1 5
XXXX-0635-XXX 2 2
Watch (1)
In order to facilitate related technicians to quickly determine the type of the RISER card, after the BIOS acquires the PN number, the serial number of the RISER card can be correspondingly obtained, and finally, the information of the PCIE equipment type, the speed, the manufacturer and the like, the slot position of the RISER card where the RISER card is located, the serial number, the type and the like of the RISER card where the RISER card is located are taken as PCIE configuration information.
Based on the foregoing embodiment, to further display the configuration information, preferably, the PCIE configuration information may be sent to a BMC (Baseboard Management Controller) for information visualization processing.
The configuration information can be directly sent to the BMC, the BMC receives the information and performs corresponding information processing, and because the memory in the BMC is limited, the excessive occupation of the data processing space of the BMC is avoided while the management of the BMC is facilitated, and the process of sending the configuration information to the BMC can be specifically as follows: the BIOS writes the configuration information into a fixed area of a nonvolatile storage medium in a non-BMC space, when the BIOS finishes writing the asset, the BMC is informed in a hardware signal mode, and after receiving the signal, the BMC accesses the nonvolatile storage medium to acquire the asset information. Therefore, the limited BMC space occupied by the original data of the configuration information can be avoided, the safe storage of the configuration information can be ensured, and the BMC can also receive the information to perform corresponding processing.
The implementation process of information visualization processing after the BMC receives the configuration information is not limited, the BMC may separately create a process dedicated to information processing of PCIE-related devices, when the BMC receives PCIE equipment configuration information sent by the BIOS, the total number of the card slots of the RISER card can be obtained by analyzing the serial number of the RISER card in the configuration information, the BMC can know the number of serial RISER cards inserted in the current server, the number of the slots of the RISER cards, and the type of equipment (GPU, RAID card, network card and the like) inserted in the xth slot of each RISER card by summarizing the information, and finally can know the spare slots on the RISER, the information can be uniformly placed in the memory of the BMC small system for visualization (see the introduction of the related art for the implementation process of information visualization).
The visualization processing can be specifically carried out, so that the slot use condition of each RISER on the server can be displayed in a graphical display mode on a web interface of the BMC, and information such as the number of spare slots, the equipment speed rate inserted into the slots, the equipment type and the like is prompted, so that the server configuration condition is more vividly and vividly displayed to a user. The configuration information is sent to the BMC, the BMC analyzes and processes the sent information, and finally a more visual PCIE equipment use condition is presented to a user on a web interface, so that the user interface is more friendly, the information is more visual, and the information acquisition and understanding of maintenance personnel are facilitated.
In this embodiment, the information display implementation manner is not limited, and the information displayed on different web interfaces of the platform may be different, and may be adjusted correspondingly on other platforms.
Based on the above embodiment, further, it may further be performed that: and generating an upgrade instruction command according to the position information of the PCIE equipment so as to control the PCIE equipment corresponding to the position information to be upgraded automatically.
After the position information of the PCIE device is obtained, when device upgrade needs to be performed on the PCIE device, an upgrade instruction may be directly sent to a device position corresponding to the device, so as to control automatic upgrade of the PCIE device. Wherein the location information comprises: the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server.
Further, the following steps may also be performed:
(1) counting the position information of each PCIE device and the position information of each server fan;
wherein, the location information of the PCIE device includes: the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server;
(2) judging the position information of the server fan to judge whether the server fan is in the vicinity of the PCIE equipment;
the adjacent area refers to an area close to the PCIE device, and the specific range of the adjacent area is not limited, for example, an area with the PCIE device as a center and a certain specified value (for example, 5cm) as a radius may be set as the adjacent area; or taking the linear distance between the PCIE device and the server fan as a determination condition, and taking the server fan area where the linear distance is smaller than the specified threshold as a proximity area; or a user may define a range for each PCIE device, which is used as a proximity area of the PCIE device, and the like. In this embodiment, only the above three adjacent area range setting manners are taken as examples for description, and other adjacent area settings based on the present application can refer to the description of this embodiment and are not described herein again.
(3) If so, increasing the rotating speed of the server fan;
(4) and if not, reducing the rotating speed of the server fan.
The rotating speed of the fan is adjusted according to the position of the PCIE equipment, the rotating speed of the fan is high when the fan is close to the PCIE equipment, and the rotating speed is adjusted to be low when the fan is far away from the PCIE equipment, so that the power consumption of the fan of the server is reduced while the normal heat dissipation of the PCIE equipment is ensured, and useless power is avoided.
For deepening understanding of the PCIE configuration identification method described in the foregoing embodiment, a specific implementation manner is described as an example in this embodiment, and other implementations of the PCIE configuration identification method based on this application can refer to the description of this embodiment, and are not described herein again.
The method mainly comprises the following steps:
1. after the server is started, the BIOS first obtains information such as PCIE equipment type, speed, manufacturer, occupied PCIE slot position and the like, then obtains FRU information of the RISER card by accessing the nonvolatile storage medium on the RISER card, and then analyzes the FRU information to obtain the PN number of the RISER card.
After obtaining the PN number, the BIOS can correspondingly obtain the number of the RISER card, and send the PCIE equipment type, the speed, the manufacturer, the slot position of the RISER card and the type of the RISER card to the BMC in a mode of production information by taking the PCIE equipment type, the speed, the manufacturer, the slot position of the RISER card and the type of the RISER card as configuration information.
2. The asset information sent by the BIOS is firstly written into a fixed area of a nonvolatile storage medium, when the BIOS finishes writing the configuration information, the BIOS informs the BMC in a hardware signal mode, and the BMC accesses the nonvolatile storage medium to acquire the asset information after receiving the signal.
3. The BMC independently creates a process specially used for information processing of PCIE related devices, when the BMC receives PCIE device asset information sent by the BIOS, the BMC can know the number of RISER cards with the numbers inserted in a current server, the number of the card slots of the RISER cards and the type of a device (GPU, RAID card, network card and the like) inserted in the x-th slot of each RISER card through information collection, and finally can know the spare card slots on the RISER, and the information is uniformly placed in the memory of the BMC small system.
4. The slot position use condition of each RISER on the server is displayed in a graphical mode on a web interface of the BMC, and information such as the number of spare slots, the equipment speed rate inserted on the slots, the equipment type and the like is prompted, so that the server configuration condition is more vividly and vividly displayed to a user.
According to the PCIE configuration identification method based on the FRU, the RISER card FRU is accessed through the BIOS to obtain the type of the current server RISER card and various information of PCIE equipment, then the information is sent to the BMC in a mode of resource information, the BMC analyzes the sent information and processes the information, and finally a more visual PCIE equipment use condition is presented to a user on a web interface.
Referring to fig. 2, fig. 2 is a block diagram of a PCIE configuration identification apparatus provided in the embodiment; the device mainly includes: a device information extraction unit 210, a device position determination unit 220, a PN number reading unit 230, a card position determination unit 240, and a configuration information generation unit 250. The PCIE configuration identification apparatus provided in this embodiment may be contrasted with the PCIE configuration identification method.
The device information extracting unit 210 is mainly configured to extract device information of a PCIE device installed in a server; the device information comprises a PCIE channel occupied by the PCIE device;
the device location determining unit 220 is mainly configured to determine, according to the PCIE channel, an installation location of the PCIE device in the RISER card where the PCIE device is located;
the PN number reading unit 230 is mainly used for accessing the RISER card and reading FRU information of the RISER card, and determining a PN number in the FRU information;
the card position determining unit 240 is mainly used for determining the type of the RISER card and the installation position in the server according to the PN number;
the configuration information generating unit 250 is mainly configured to use the device information, the installation position of the PCIE device in the RISER card, and the installation position of the RISER card in the server as PCIE configuration information.
The PCIE configuration identifying device provided in this embodiment may improve the efficiency of PCIE device configuration management.
This embodiment provides a PCIE configuration identification device, which mainly includes: a memory and a processor.
Wherein, the memory is used for storing programs;
when the processor is configured to execute a program, the steps of the PCIE configuration identification method described in the above embodiment may be specifically referred to the description of the PCIE configuration identification method.
Referring to fig. 3, a schematic structural diagram of a PCIE configuration identification device provided in this embodiment is shown, where the PCIE configuration identification device may generate a relatively large difference due to different configurations or performances, and may include one or more processors (CPUs) 322 (e.g., one or more processors) and a memory 332. Memory 332 may be, among other things, transient or persistent storage. Further, the central processor 322 may be configured to communicate with the memory 332, and execute a series of instruction operations in the memory 332 on the PCIE configuration identification device 301.
PCIE configuration identification device 301 may also include one or more power supplies 326, one or more wired or wireless network interfaces 350, one or more input-output interfaces 358, and/or one or more operating systems 341, such as Windows Server, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM, etc.
The steps in the PCIE configuration identification method described in fig. 1 above may be implemented by the structure of the PCIE configuration identification device described in this embodiment.
The present embodiment discloses a readable storage medium, on which a program is stored, and the program, when executed by a processor, implements the steps of the PCIE configuration identification method described in the foregoing embodiment, which may specifically refer to the description of the PCIE configuration identification method in the foregoing embodiment.
The readable storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and various other readable storage media capable of storing program codes.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The PCIE configuration identification method, apparatus, device, and readable storage medium provided in the present application are described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.

Claims (10)

1. A PCIE configuration identification method is characterized by comprising the following steps:
the BIOS extracts equipment information of PCIE equipment installed in the server; the device information comprises a PCIE channel occupied by the PCIE device;
determining the installation position of the PCIE equipment in the RISER card according to the PCIE channel;
accessing the RISER card and reading FRU information of the RISER card, and determining a PN number in the FRU information;
determining the type of the RISER card and the installation position in the server according to the PN number;
and taking the equipment information, the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server as PCIE configuration information.
2. The PCIE configuration identification method of claim 1, further comprising:
determining a total number of slots of the RISER card under the type;
counting the positions and the total amount of all PCIE equipment installed on the RISER card as occupied slot information;
determining the information of vacant card slots according to the total number of the slots of the RISER card and the occupied slot information;
and taking the information of the spare card slot as the PCIE configuration information.
3. The PCIE configuration identification method of claim 1, further comprising:
determining the number of the RISER card according to the PN number;
and taking the serial number of the RISER card as the PCIE configuration information.
4. The PCIE configuration identification method of claim 1, wherein the extracting, by the BIOS, device information of the PCIE devices installed in the server comprises:
the BIOS extracts the type, the speed, the manufacturer and the occupied PCIE channel of the PCIE equipment installed in the server as the equipment information.
5. The PCIE configuration identification method of claim 1, further comprising:
and sending the PCIE configuration information to a BMC for information visualization processing.
6. The PCIE configuration identification method of claim 1, further comprising:
generating an upgrade instruction command according to the position information of the PCIE equipment so as to control the PCIE equipment corresponding to the position information to be upgraded automatically;
wherein, the location information of the PCIE device includes: the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server.
7. The PCIE configuration identification method of any one of claims 1 to 6, further comprising:
counting the position information of each PCIE device and the position information of each server fan; wherein, the location information of the PCIE device includes: the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server;
judging the position information of the server fan to judge whether the server fan is in the vicinity of the PCIE equipment;
if so, increasing the rotating speed of the server fan;
and if not, reducing the rotating speed of the server fan.
8. A PCIE configuration identification device is applied to a BIOS, and comprises:
the device information extraction unit is used for extracting the device information of the PCIE device installed in the server; the device information comprises a PCIE channel occupied by the PCIE device;
the equipment position determining unit is used for determining the installation position of the PCIE equipment in the RISER card according to the PCIE channel;
a PN number reading unit for accessing the RISER card and reading the FRU information of the RISER card, and determining the PN number in the FRU information;
a card position determining unit for determining the type of the RISER card and the installation position in the server according to the PN number;
and the configuration information generating unit is used for taking the equipment information, the installation position of the PCIE equipment in the RISER card and the installation position of the RISER card in the server as PCIE configuration information.
9. A PCIE configuration identification device, comprising:
a memory for storing a computer program;
a processor configured to implement the steps of the PCIE configuration identification method according to any one of claims 1 to 7 when executing the computer program.
10. A readable storage medium, characterized in that the readable storage medium has stored thereon a program which, when executed by a processor, implements the steps of the PCIE configuration identification method according to any one of claims 1 to 7.
CN202010530564.1A 2020-06-11 2020-06-11 PCIE configuration identification method and related assembly Active CN111722877B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010530564.1A CN111722877B (en) 2020-06-11 2020-06-11 PCIE configuration identification method and related assembly

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010530564.1A CN111722877B (en) 2020-06-11 2020-06-11 PCIE configuration identification method and related assembly

Publications (2)

Publication Number Publication Date
CN111722877A true CN111722877A (en) 2020-09-29
CN111722877B CN111722877B (en) 2022-07-08

Family

ID=72568023

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010530564.1A Active CN111722877B (en) 2020-06-11 2020-06-11 PCIE configuration identification method and related assembly

Country Status (1)

Country Link
CN (1) CN111722877B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112732346A (en) * 2021-01-08 2021-04-30 浪潮商用机器有限公司 Method, device, equipment and medium for setting PCIE (peripheral component interface express) configuration information
CN113407397A (en) * 2021-06-10 2021-09-17 浪潮电子信息产业股份有限公司 Display method, device, equipment and medium for screen printing of equipment cabinet
CN114860343A (en) * 2022-05-26 2022-08-05 苏州浪潮智能科技有限公司 Speed regulation method, system, terminal and storage medium for accelerator card
CN116010327A (en) * 2022-12-30 2023-04-25 合芯科技有限公司 PCIe Switch automatic configuration system and method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108319539A (en) * 2018-02-28 2018-07-24 郑州云海信息技术有限公司 A kind of method and system generating GPU card slot position information
CN111143256A (en) * 2019-11-29 2020-05-12 苏州浪潮智能科技有限公司 Method and device for reading field replaceable unit information

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108319539A (en) * 2018-02-28 2018-07-24 郑州云海信息技术有限公司 A kind of method and system generating GPU card slot position information
CN111143256A (en) * 2019-11-29 2020-05-12 苏州浪潮智能科技有限公司 Method and device for reading field replaceable unit information

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112732346A (en) * 2021-01-08 2021-04-30 浪潮商用机器有限公司 Method, device, equipment and medium for setting PCIE (peripheral component interface express) configuration information
CN113407397A (en) * 2021-06-10 2021-09-17 浪潮电子信息产业股份有限公司 Display method, device, equipment and medium for screen printing of equipment cabinet
CN114860343A (en) * 2022-05-26 2022-08-05 苏州浪潮智能科技有限公司 Speed regulation method, system, terminal and storage medium for accelerator card
CN114860343B (en) * 2022-05-26 2024-03-26 苏州浪潮智能科技有限公司 Acceleration card rate adjustment method, system, terminal and storage medium
CN116010327A (en) * 2022-12-30 2023-04-25 合芯科技有限公司 PCIe Switch automatic configuration system and method
CN116010327B (en) * 2022-12-30 2024-01-23 合芯科技有限公司 PCIe Switch automatic configuration system and method

Also Published As

Publication number Publication date
CN111722877B (en) 2022-07-08

Similar Documents

Publication Publication Date Title
CN111722877B (en) PCIE configuration identification method and related assembly
CN108776595B (en) Method, device, equipment and medium for identifying display card of GPU (graphics processing Unit) server
CN104317684A (en) Method for synchronously and automatically testing bandwidths and transmission rates of multiple USB interfaces
CN111552486B (en) SSD firmware burning method and related components
CN109375956B (en) Method for restarting operating system, logic device and control device
CN108920334A (en) A kind of monitoring device of FPGA isomery accelerator card
CN114765051A (en) Memory test method and device, readable storage medium and electronic equipment
CN104199693A (en) Method, device and terminal for obtaining boot time
EP2869189A1 (en) Boot up of a multiprocessor computer
CN114138527A (en) Method, device and medium for improving performance of server
CN106886477B (en) Method and device for setting monitoring threshold in cloud system
CN110750346B (en) Task operation optimization method, device, terminal and storage medium
CN104156328B (en) A kind of method and USB device identifying OS Type
CN110347546B (en) Dynamic adjustment method, device, medium and electronic equipment for monitoring task
CN115098342A (en) System log collection method, system, terminal and storage medium
CN113655846B (en) OpenPOWER server time synchronization method and system
CN115659426A (en) Anti-counterfeiting method, device and medium for hard disk
CN114218001A (en) Fault repairing method and device, electronic equipment and readable storage medium
CN111930502A (en) Server management method, device, equipment and storage medium
CN115629952B (en) Android compatible environment battery simulation method based on power consumption fitting analysis
CN110703988A (en) Storage pool creating method, system, terminal and storage medium for distributed storage
CN112445670A (en) eMMC test method and device
CN113127001B (en) Method, device, equipment and medium for monitoring code compiling process
CN114153388B (en) Hard disk system, hard disk configuration information refreshing method, device and medium
CN113625956B (en) Cache setting method and device of RAID card, electronic equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant