CN111711441A - Apply to adjustable interface circuit of high-low pressure signal of controller - Google Patents
Apply to adjustable interface circuit of high-low pressure signal of controller Download PDFInfo
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- CN111711441A CN111711441A CN201910204558.4A CN201910204558A CN111711441A CN 111711441 A CN111711441 A CN 111711441A CN 201910204558 A CN201910204558 A CN 201910204558A CN 111711441 A CN111711441 A CN 111711441A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
- H03K19/017536—Interface arrangements using opto-electronic devices
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017545—Coupling arrangements; Impedance matching circuits
- H03K19/017572—Coupling arrangements; Impedance matching circuits using opto-electronic devices
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention relates to the technical field of electronic circuits, in particular to a high-low voltage signal adjustable interface circuit applied to a controller. The mode switching unit comprises a plurality of input interface circuits, the mode selection unit comprises a plurality of output interface circuits, and the input interface circuits and the output interface circuits are respectively connected with the processor. The invention can conveniently realize the access and output of the corresponding signal through the selection of the line mode, is convenient to operate and reduces the use threshold.
Description
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a high-low voltage signal adjustable interface circuit applied to a controller.
Background
As is well known, in the industrial control industry around the world, the occupancy of Programmable Logic Controller (PLC) products is around seven cents, but in the PLC usage alliance, PLCs mainly classified into the japanese (represented by mitsubishi/songhua/ohilong brand) and the european (represented by siemens/AB/rocwell brand) systems dominate the market. The usage ratio of the solar and the European and American derivatives is approximately four to six. Wherein, the input forms of most products of the PLC of the Japanese system and the European and American system are switchable between source input and drain input; however, there is a great difference in the output mode (here, transistor output is taken as an example), the output mode of the japanese PLC is drain output/source output, one type can only correspond to one type of output mode, and the output interface of the siemens PLC only has the source output mode.
At present, in practical application, the attribute of the common terminal is changed to meet the input of different types of sensors, so that a user is required to correspond to the type of an external sensor, then the corresponding wiring attribute of the common terminal S/S is selected, and peripheral wiring also needs to be correspondingly wired according to requirements, which causes troubles to the user, especially to a new user with an unclear peripheral circuit, and the PLC cannot normally receive signals and needs to change the wiring of the common terminal due to the frequent change of the output attribute of the external sensor; what is more troublesome is that the internal circuit of the PLC is a 4-way or 8-way group to realize functions, the input form of any one way cannot be changed at will, and only the whole group can be changed, so that the flexibility is not strong, and if the output form is a 2-type mixed output form, an additional switching device needs to be added to transfer signals, so that the operation is troublesome.
Disclosure of Invention
In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a high-low voltage signal adjustable interface circuit for a controller.
In order to achieve the purpose, the invention adopts the following technical scheme:
a high-low voltage signal adjustable interface circuit applied to a controller comprises a mode switching unit, a processor and a mode selection unit, wherein the mode switching unit comprises a plurality of input interface circuits, the mode selection unit comprises a plurality of output interface circuits, and the input interface circuit and the output interface circuits are respectively connected with the processor;
the input interface circuit is connected with a signal and selects a proper line to input the signal to the processor, and the output interface circuit receives the signal fed back by the processor and selects a proper line to output the signal.
Preferably, the input interface circuit includes a sensor/switching value signal interface, a first row of sockets and a first optocoupler, the sensor/switching value signal interface includes a first interface, a second interface and a third interface, the first interface is a power positive interface, the second interface is a power output signal interface, the third interface is a power negative interface, the first interface is connected with 1 pin and 3 pins of the first row of sockets respectively, the second interface is connected with 5 pins and 7 pins of the first row of sockets respectively, the third interface is connected with 9 pins and 11 pins of the first row of sockets respectively, 2 pins of the first row of sockets are connected with a 24V power supply, 4 pins and 6 pins of the first row of sockets are connected with 1 pin of the first optocoupler through a resistor R69, 8 pins and 10 pins of the first row of sockets are connected between a resistor 69 and 1 pin of the first optocoupler through a resistor R70 and a capacitor C36 respectively and are connected with the first optocoupler through a resistor R70 and a capacitor C36 simultaneously The first light emitting diode is connected with the 2-end pin of the first optical coupler, and the 4-end pin of the first optical coupler is connected with a power supply through a resistor R71 and is connected with the processor through a resistor R93.
Preferably, the output interface circuit includes a triode, a second optocoupler, a second extension socket interface, a first drive circuit, a second drive circuit and a load interface, a base of the triode is connected with the processor through a resistor R251 and is connected to a power supply through a resistor R250 and a zener diode, a collector of the triode is connected with an end pin 1 of the second optocoupler through a resistor R252, an end pin 4 and an end pin 3 of the second optocoupler are connected with an end pin 2 and an end pin 5 of the second extension socket interface, an end pin 1 and an end pin 4 of the second extension socket interface are connected with the first drive circuit, an end pin 3 and an end pin 6 of the second extension socket interface are connected with the second drive circuit, the first drive circuit and the second drive circuit are connected with the load interface, and the load interface is externally connected with an inductive load.
Preferably, the first driving circuit includes a first MOS transistor and a first light emitting diode, a source of the first MOS transistor is connected to a 24V power supply and is grounded through a capacitor C131, a gate of the first MOS transistor is connected to a 1-terminal pin of the second socket interface through a resistor R254, a source of the first MOS transistor is connected to the load interface and is connected to an anode of the first light emitting diode through a resistor R256, and a cathode of the first light emitting diode is grounded and is connected to a 4-terminal pin of the second socket interface through a resistor R255.
Preferably, the first MOS transistor is a CJ2303 type MOS transistor.
Preferably, the second drive circuit includes second MOS pipe and second emitting diode, the source ground of second MOS pipe, the gate of second MOS pipe is through resistance R259 and the ground connection of resistance R260 that establish ties in proper order, connect in the 6 end feet of second row socket interface between resistance R259 and the resistance R260, the drain electrode and the load interface connection of second MOS pipe and be connected with second emitting diode's negative pole, the anodal resistance R258 and the resistance R257 that establish ties in proper order of second emitting diode are connected with the 3 end feet of second row socket interface, insert 24V power between resistance R258 and the resistance R257.
Preferably, the second MOS transistor is a CJ2304 type MOS transistor.
Preferably, the load interface is connected with the first driving circuit through a first diode and grounded, and the load interface is connected with the second driving circuit through a second diode and connected to a 24V power supply.
Due to the adoption of the scheme, the invention has the following beneficial effects:
1. the part of the interface input signal can be switched at will by the NPN/PNP signal through the mode selection of the first row of interfaces, any channel can be switched at will according to the requirement, and the signal is subjected to photoelectric isolation protection through the first optocoupler;
2. the interface outputs to the part of the external inductive load, and a proper mode is selected through the second extension socket interface, so that the source output/drain output can be switched at will, and any channel can be switched at will according to the requirement;
3. the first MOS tube and the second MOS tube respectively adopt CJ2303 and CJ2304 type MOS tubes, so that the load current of each channel of an output signal end is over 1.5A and cannot be reduced along with the increase of the number of points;
4. the labor cost is saved indirectly, the external wiring is convenient, any line cannot be changed due to the change of the signal attribute in the peripheral wiring of the input end, and only the position of a short-circuit cap at the socket interface needs to be changed; for the wiring of the output port load, the wiring position can only be changed along with the change of the load attribute, and the customer can correctly wire without knowing any electronic circuit knowledge, thereby lowering the operation and use threshold of a user.
Drawings
Fig. 1 is a schematic structural diagram of an embodiment of the present invention.
Fig. 2 is a schematic structural diagram of an input interface circuit according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of an output interface circuit according to an embodiment of the present invention.
Fig. 4 is a schematic structural diagram of a first driving circuit according to an embodiment of the invention.
Fig. 5 is a schematic structural diagram of a second driving circuit according to an embodiment of the invention.
Fig. 6 is a schematic structural diagram of a load interface according to an embodiment of the present invention.
Fig. 7 is a schematic structural diagram of a processor according to an embodiment of the present invention.
Detailed Description
The embodiments of the invention will be described in detail below with reference to the drawings, but the invention can be implemented in many different ways as defined and covered by the claims.
As shown in fig. 1 to 7, the interface circuit with adjustable high and low voltage signals for a controller provided in this embodiment includes a mode switching unit 1, a processor 2, and a mode selecting unit 3, where the mode switching unit 1 includes a plurality of input interface circuits 4, the mode selecting unit 3 includes a plurality of output interface circuits 5, and the input interface circuits 4 and the output interface circuits 5 are respectively connected to the processor 2; the input interface circuit 4 accesses signals and selects a proper line to input the signals to the processor 2, and the output interface circuit 4 receives the signals fed back by the processor 2 and selects a proper line to output the signals. The corresponding signal can be conveniently accessed and output by selecting the line mode, so that the operation is convenient, and the use threshold is reduced.
Further, as shown in fig. 2, the input interface circuit 4 includes a sensor/switching value signal interface P25, a first row of sockets P26 and a first optocoupler U15, the sensor/switching value signal interface P25 includes a first interface, a second interface and a third interface, the first interface is a positive power interface, the second interface is a power output signal interface, and the third interface is a negative power interface, the first interface is connected to the 1 pin and the 3 pin of the first row of sockets P26 respectively, the second interface is connected to the 5 pin and the 7 pin of the first row of sockets P26 respectively, the third interface is connected to the 9 pin and the 11 pin of the first row of sockets P26 respectively, the 2 pin of the first row of sockets P26 is connected to a 24V power supply, the 4 pin and the 6 pin of the first row of sockets P26 are connected to the 1 pin of the first optocoupler U2 through a resistor R69, the 8 pin and the 10 pin of the first row of sockets P26 are connected to the 1 pin of a resistor R3869 and a capacitor U73742 and a resistor R68542 and a capacitor R68542 and a resistor R68542 is connected to the first optocoupler U84 simultaneously The first light emitting diode D26 is connected with the 2-end pin of the first optical coupler U15, and the 4-end pin of the first optical coupler U15 is connected with a power supply through a resistor R71 and is connected with the processor 2 through a resistor R93.
In the embodiment, the first row of socket P26 in the input interface circuit 4 is mode selection, wherein the short circuit of the terminal pins 3-4 and 7-8 is NPN sensor signal, and the short circuit of the terminal pins 5-6 and 9-10 is PNP sensor signal mode, and if signal reasonable processing is needed, the short circuit of the terminal pins 1-2 and 11-12 can be removed, so that complete signal isolation effect can be achieved, and interference can be prevented.
Further, the output interface circuit 5 of this embodiment includes a triode Q47, a second optocoupler U35, a second strip plug interface P38, a first driving circuit, a second driving circuit, and a load interface P39, a base of the triode Q47 is connected to the processor 2 through a resistor R251 and is connected to a power supply through a resistor R250 and a zener diode Q46, a collector of the triode Q47 is connected to a 1-terminal pin of the second optocoupler U35 through a resistor R252, a 4-terminal pin and a 3-terminal pin of the second optocoupler U35 are connected to a 2-terminal pin and a 5-terminal pin of the second strip plug interface P38 respectively, the 1-terminal pin and the 4-terminal pin of the second strip plug interface P38 are connected to the first driving circuit, a 3-terminal pin and a 6-terminal pin of the second strip plug interface P38 are connected to the second driving circuit, the first driving circuit and the second driving circuit are connected to the load interface P39, and the load interface P39 is externally connected to an inductive load.
Further, the first driving circuit comprises a first MOS transistor Q48 and a first light emitting diode D45, a source of the first MOS transistor Q48 is connected to a 24V power supply and grounded through a capacitor C131, a gate of the first MOS transistor Q48 is connected to a pin 1 of the second socket P38 through a resistor R254, a source of the first MOS transistor Q48 is connected to the load interface P39 and connected to an anode of the first light emitting diode D45 through a resistor R256, and a cathode of the first light emitting diode D45 is grounded and connected to a pin 4 of the second socket P38 through a resistor R255.
Further, the first MOS transistor Q48 is a CJ2303 type MOS transistor.
Further, the second driving circuit comprises a second MOS transistor Q49 and a second light emitting diode D46, the source of the second MOS transistor Q49 is grounded, the gate of the second MOS transistor Q49 is grounded through a resistor R259 and a resistor R260 which are sequentially connected in series, the resistor R259 and the resistor R260 are connected with the terminal pin 6 of the second socket P38, the drain of the second MOS transistor Q49 is connected with the load interface P39 and connected with the cathode of the second light emitting diode D46, the anode of the second light emitting diode D46 is connected with the terminal pin 3 of the second socket P38 through a resistor R258 and a resistor R257 which are sequentially connected in series, and a 24V power supply is connected between the resistor R258 and the resistor R257.
Further, the second MOS transistor Q49 is a CJ2304 type MOS transistor.
Further, as shown in fig. 6, the load interface P39 of the present embodiment is connected to the ground through the first diode D66 at the connection point with the first driving circuit, and the load interface P39 is connected to the 24V power supply through the second diode D65 at the connection point with the second driving circuit, wherein in fig. 6, the pins 1-2 of the load interface P39 are drain-type output loads, and the pins 3-4 are source-type output loads.
In the embodiment, the second add/drop interface P38 in the output interface circuit 5 corresponds to a switching interface of an output mode, the 1-2 connector and the 4-5 connector of the second add/drop interface P38 are in a selected source output mode, the 2-3 and the 5-6 connector are in a selected drain output mode, the interface terminals are configured with the first diode D66 and the second diode D65, and the first diode D66 and the second diode D65 are schottky diodes, which solves the problem of freewheeling discharge of an inductive load.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (8)
1. The utility model provides an apply to adjustable interface circuit of high-low pressure signal of controller which characterized in that: the mode switching unit comprises a plurality of input interface circuits, the mode selection unit comprises a plurality of output interface circuits, and the input interface circuits and the output interface circuits are respectively connected with the processor;
the input interface circuit is connected with a signal and selects a proper line to input the signal to the processor, and the output interface circuit receives the signal fed back by the processor and selects a proper line to output the signal.
2. The interface circuit as claimed in claim 1, wherein the interface circuit comprises: the input interface circuit comprises a sensor/switching value signal interface, a first row of insertion ports and a first optical coupler, the sensor/switching value signal interface comprises a first interface, a second interface and a third interface, the first interface is a power supply positive electrode interface, the second interface is a power output signal interface, the third interface is a power supply negative electrode interface, the first interface is respectively connected with 1 end pin and 3 end pins of the first row of insertion ports, the second interface is respectively connected with 5 end pins and 7 end pins of the first row of insertion ports, the third interface is respectively connected with 9 end pins and 11 end pins of the first row of insertion ports, 2 end pins of the first row of insertion ports are connected with a 24V power supply, 4 end pins and 6 end pins of the first row of insertion ports are connected with 1 end pin of the first optical coupler through a resistor R69, 8 end pins and 10 end pins of the first row of insertion ports are respectively connected between a resistor 69 and 1 end pin of the first optical coupler through a resistor R70 and a capacitor C36 and simultaneously pass through the first light-emitting diode The diode is connected with the 2 end pin of the first optical coupler, and the 4 end pin of the first optical coupler is connected with a power supply through a resistor R71 and is connected with the processor through a resistor R93.
3. The interface circuit as claimed in claim 1, wherein the interface circuit comprises: the output interface circuit comprises a triode, a second optocoupler, a second extension socket, a first drive circuit, a second drive circuit and a load interface, wherein a base of the triode is connected with the processor through a resistor R251 and is connected with a power supply through a resistor R250 and a voltage stabilizing diode respectively, a collector of the triode is connected with a terminal pin 1 of the second optocoupler through a resistor R252, a terminal pin 4 and a terminal pin 3 of the second optocoupler are connected with a terminal pin 2 and a terminal pin 5 of the second extension socket respectively, a terminal pin 1 and a terminal pin 4 of the second extension socket are connected with the first drive circuit, a terminal pin 3 and a terminal pin 6 of the second extension socket are connected with the second drive circuit, the first drive circuit and the second drive circuit are connected with the load interface respectively, and the load interface is externally connected with an inductive load.
4. The interface circuit as claimed in claim 3, wherein the interface circuit comprises: the first driving circuit comprises a first MOS tube and a first light-emitting diode, a source electrode of the first MOS tube is connected to a 24V power supply and grounded through a capacitor C131, a grid electrode of the first MOS tube is connected with a 1-end pin of the second row plug interface through a resistor R254, a source electrode of the first MOS tube is connected with a load interface and is connected with an anode of the first light-emitting diode through a resistor R256, and a cathode of the first light-emitting diode is grounded and is connected with a 4-end pin of the second row plug interface through a resistor R255.
5. The interface circuit of claim 4, wherein the interface circuit is a high-low voltage signal adjustable interface circuit, and comprises: the first MOS tube is a CJ2303 type MOS tube.
6. The interface circuit as claimed in claim 3, wherein the interface circuit comprises: the second drive circuit includes second MOS pipe and second emitting diode, the source ground connection of second MOS pipe, the grid of second MOS pipe is through resistance R259 and the resistance R260 ground connection that establishes ties in proper order, connect in the 6 end feet that the interface was inserted to the second row between resistance R259 and the resistance R260, the drain electrode and the load interface connection of second MOS pipe and be connected with second emitting diode's negative pole, the anodal resistance R258 and the resistance R257 that establish ties in proper order of second emitting diode are connected with the 3 end feet that the interface was inserted to the second row, insert 24V power between resistance R258 and the resistance R257.
7. The interface circuit of claim 6, wherein the interface circuit comprises: the second MOS tube is a CJ2304 type MOS tube.
8. The interface circuit as claimed in claim 3, wherein the interface circuit comprises: the load interface is positioned at the joint of the first drive circuit and is grounded through a first diode, and the load interface is positioned at the joint of the second drive circuit and is connected with a 24V power supply through a second diode.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910204558.4A CN111711441B (en) | 2019-03-18 | 2019-03-18 | High-low voltage signal adjustable interface circuit applied to controller |
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| CN201910204558.4A CN111711441B (en) | 2019-03-18 | 2019-03-18 | High-low voltage signal adjustable interface circuit applied to controller |
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| CN111711441A true CN111711441A (en) | 2020-09-25 |
| CN111711441B CN111711441B (en) | 2023-04-25 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112596462A (en) * | 2020-12-22 | 2021-04-02 | 深圳市英威腾电气股份有限公司 | Output method, device and system based on signal type |
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| CN111711441B (en) | 2023-04-25 |
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