CN111697942B - Cavity processing technology for MEMS device, bulk acoustic wave resonator and manufacturing technology thereof - Google Patents
Cavity processing technology for MEMS device, bulk acoustic wave resonator and manufacturing technology thereof Download PDFInfo
- Publication number
- CN111697942B CN111697942B CN202010404255.XA CN202010404255A CN111697942B CN 111697942 B CN111697942 B CN 111697942B CN 202010404255 A CN202010404255 A CN 202010404255A CN 111697942 B CN111697942 B CN 111697942B
- Authority
- CN
- China
- Prior art keywords
- cavity
- oxide
- substrate
- mask layer
- acoustic wave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 238000012545 processing Methods 0.000 title claims abstract description 23
- 238000005516 engineering process Methods 0.000 title claims abstract description 13
- 238000000034 method Methods 0.000 claims abstract description 78
- 239000000758 substrate Substances 0.000 claims abstract description 67
- 239000010410 layer Substances 0.000 claims abstract description 52
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 claims abstract description 17
- 230000003647 oxidation Effects 0.000 claims abstract description 17
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 12
- 239000002346 layers by function Substances 0.000 claims abstract description 9
- 238000001259 photo etching Methods 0.000 claims abstract description 6
- 238000000151 deposition Methods 0.000 claims abstract description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 13
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 12
- 238000001035 drying Methods 0.000 claims description 4
- 230000007797 corrosion Effects 0.000 claims description 2
- 238000005260 corrosion Methods 0.000 claims description 2
- 238000003754 machining Methods 0.000 claims 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 44
- 229910052710 silicon Inorganic materials 0.000 description 44
- 239000010703 silicon Substances 0.000 description 44
- 230000003746 surface roughness Effects 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- 229910052814 silicon oxide Inorganic materials 0.000 description 9
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 8
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 238000001039 wet etching Methods 0.000 description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 5
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 4
- 238000004891 communication Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 239000013043 chemical agent Substances 0.000 description 3
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 239000003082 abrasive agent Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000009279 wet oxidation reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/02244—Details of microelectro-mechanical resonators
- H03H9/02433—Means for compensation or elimination of undesired effects
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00047—Cavities
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00444—Surface micromachining, i.e. structuring layers on the substrate
- B81C1/00468—Releasing structures
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00523—Etching material
- B81C1/00531—Dry etching
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00523—Etching material
- B81C1/00539—Wet etching
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/0072—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks of microelectro-mechanical resonators or networks
Abstract
Disclosed is a cavity processing technology for a MEMS device, comprising the following steps: depositing a mask layer on a substrate; etching the mask layer on the substrate in the area where the cavity is to be formed by using a photoetching process; etching the area where the cavity is to be formed by an APCVD thermal oxidation process and simultaneously growing to form an oxide; removing the mask layer by using a wet process; and after a device functional layer covered with oxide is manufactured on the substrate, the oxide is released. The manufacturing process of the bulk acoustic wave resonator is also disclosed, and the cavity is manufactured in the substrate by adopting the cavity processing process, wherein the device functional layers are the electrode layer and the piezoelectric layer. The bulk acoustic wave resonator is manufactured by adopting the process. The process can improve the roughness of the surface of the substrate, greatly improve the productivity and is suitable for mass production.
Description
Technical Field
The application relates to the field of communication devices, in particular to a cavity processing technology for an MEMS device, a bulk acoustic wave resonator and a manufacturing technology thereof.
Background
With the increasing crowding of electromagnetic spectrum and the increase of frequency bands and functions of wireless communication equipment, the electromagnetic spectrum used for wireless communication increases at a high speed from 500MHz to more than 5GHz, and the demand for a radio frequency front-end module with high performance, low cost, low power consumption and small size also increases increasingly. The filter is one of radio frequency front end modules, can improve transmitting and receiving signals and is mainly formed by connecting a plurality of resonators through a topological network structure. Fbar (film bulk acoustic resonator) is a bulk acoustic wave resonator, and a filter formed by the Fbar (film bulk acoustic resonator) has the advantages of small volume, strong integration capability, high quality guarantee during high-frequency operation, strong power bearing capability and the like and is used as a core device of a radio frequency front end.
Air Cavity (Cavity structure at the bottom of electrode) is the most prominent feature of Fbar, and is one of the key processes of Fbar, and SiO is used above the Cavity2Or SiO doped with phosphorus or boron2(PSG/BSG) as a sacrificial layer material, HF or BOE (Buffered oxide Etch) is used to release the sacrificial layer material after the device processing is completed to form the cavity structure.
The Cavity structure is classified into an underground type (Air Cavity under ground) and an above ground type (Air Cavity on ground) with respect to the initial surface of the silicon substrate.
The fabrication process for an underground Air Cavity generally includes a fabrication process typified by Avago corporation, usa; the process for producing terrestrial Air Cavity generally includes a process represented by Taiyo, korea, samsung, japan. The manufacturing process of the American Avago company is specifically as follows: manufacturing a cavity on a substrate (generally a Si sheet) by photoetching and dry etching processes; oxide (SiO) by PECVD after stripping2Or SiO doped with phosphorus or boron2) Growing; performing surface planarization by CMP; and after the CMP is finished, sequentially growing a bottom electrode, an electric film layer and an upper electrode, and finally releasing the oxide in the Cavity through HF (hydrogen fluoride), thereby obtaining Fbar of the Air Cavity structure. The fabrication process of Taiyo, samsung, japan differs from Avago corporation, usa in that the oxide is raised above the substrate surface by photolithography and dry etching.
However, in the manufacturing process of Avago corporation in the united states, the oxide and the Si substrate are two different materials, the step at the junction of the oxide and the substrate is about 50-70nm due to the whole surface planarization of CMP, the middle area of the oxide becomes the lowest point after the CMP is completed, the height of the oxide near the two sides of the Air Cavity is about 50nm higher than that of the middle area, the cost of CMP equipment is high, about 500 ten thousand dollars are spent in the mainstream CMP equipment, and the cost of the abrasive consumable slurry is high. The bombardment of plasma in dry etching in the manufacturing process of Taiyo, samsung of korea can cause the surface roughness of the two side substrates of Air Cavity, and the surface roughness can affect the film forming quality of the electrode and the piezoelectric layer, thereby affecting the performance of the device. The oxide deposition throughput UPH is lower, and the single-cavity PECVD deposits 2um (industry universal thickness) oxide which is less than 3 pcs/Hour.
Disclosure of Invention
The invention provides a cavity processing technology for an MEMS device, a bulk acoustic wave resonator and a manufacturing process thereof, aiming at solving the technical problems that the surface roughness of an oxide and a substrate is overlarge, the CMP equipment cost and the abrasive material consumption are overhigh and the productivity is lower when the CMP whole surface is flattened because the oxide and a silicon substrate are two different materials in the prior art.
According to a first aspect of the present invention, there is provided a cavity processing process for a MEMS device, comprising the steps of:
a) depositing a mask layer on a substrate;
b) etching the mask layer on the substrate in the area where the cavity is to be formed by using a photoetching process; and
c) an oxide is grown by means of an APCVD thermal oxidation process while etching the area where the cavity is to be formed.
Preferably, step c) comprises: the area on the substrate where the cavity is to be formed is etched using a dry process to form a portion of the cavity, and then the remaining portion of the cavity is etched using an APCVD thermal oxidation process while growing oxide within the cavity. The APCVD thermal oxidation process can improve the growth efficiency of the oxide, thereby greatly improving the productivity.
Preferably, the mask layer is a silicon nitride material. The silicon nitride material is used as a mask layer, so that the problem of poor surface roughness caused by direct photoetching or dry etching can be avoided.
Further preferably, the process further comprises the steps of:
d) removing the mask layer by using a wet process; and
e) and after a device functional layer covered with oxide is manufactured on the substrate, the oxide is released. The surface quality after removal by wet process is much better than that after CMP planarization.
It is further preferred that the wet process in step d) comprises the use of H3PO4And (6) carrying out corrosion. H3PO4Does not react with the oxide and the substrate, and can make the surface roughness smaller.
According to a second aspect of the present invention, there is provided a process for manufacturing a bulk acoustic wave resonator, wherein a cavity is manufactured in a substrate by using the above-mentioned cavity processing process, and wherein device functional layers are an electrode layer and a piezoelectric layer.
According to a third aspect of the present invention, a bulk acoustic wave resonator is provided, which is manufactured by the above-mentioned process.
According to the Cavity processing technology for the MEMS device, disclosed by the invention, a layer of silicon nitride is deposited on a substrate in advance to serve as a mask layer, an Air Cavity groove is etched by utilizing a photoetching and wet etching process and a dry process, an APCVD thermal oxidation process is adopted to replace PECVD for oxide growth, the production capacity is improved, the equipment and material consumption cost is reduced, and finally the silicon nitride mask layer is removed by utilizing the wet process. The cavity processing technology can be applied to the production of bulk acoustic wave resonators in batches, the production cost and the material consumption can be greatly reduced while the quality is guaranteed, and the productivity is greatly improved.
Drawings
The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and together with the description serve to explain the principles of the invention. Other embodiments and many of the intended advantages of embodiments will be readily appreciated as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts.
FIG. 1 is a process flow diagram of a cavity process for a MEMS device according to one embodiment of the invention;
FIG. 2 is a process flow diagram of a cavity process for a MEMS device according to another embodiment of the invention;
figure 3 is a flow diagram of a process for fabricating a bulk acoustic wave resonator according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a bulk acoustic wave resonator according to an embodiment of the present invention.
Detailed Description
The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the related invention are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
Fig. 1 shows a flow chart of a cavity processing process for a MEMS device according to an embodiment of the present invention, and as shown in fig. 1, the cavity processing process for a MEMS device includes the following processes:
first, as shown in fig. 1a, a mask layer 102 is deposited on a silicon substrate 101 in advance, and the mask layer 102 is used to protect the upper surface of the silicon substrate 101 from being damaged during the processing. Preferably, the mask layer 102 is silicon nitride, the silicon nitride is used as the mask layer 102 to protect the surface of the silicon substrate 101, and a wet process using phosphoric acid H can be used for removal3PO4The property of not reacting with the silicon substrate 101 further ensures the surface roughness of the silicon substrate 101. It should be appreciated that, besides silicon nitride, other silicide or nitride may be selected as the material of the mask layer 102 for the mask layer 102, and a chemical agent that does not react with the silicon substrate 101 is used for the wet process to remove the mask layer 102, which also achieves the technical effects of the present invention.
With continuing reference to fig. 1b, as shown in fig. 1b, a layer of photoresist 103 is coated on the upper surface of the mask layer 102, and a prototype of the Air Cavity trench is formed on the photoresist 103 and the mask layer 102 by using photolithography and wet etching processes, it should be noted that the etching solution selected by the wet etching process should not react with the silicon substrate 101, so as to avoid damaging the silicon substrate 101 and affecting the control of the depth of the Air Cavity trench subsequently processed on the silicon substrate 101.
As shown in fig. 1c, on the basis of forming the Air Cavity trench prototype on the photoresist 103 and the mask layer 102 in fig. 1b, the photoresist 103 is removed and the Air Cavity trench is etched on the silicon substrate 101 by using a dry process. After the etching of the Air Cavity trench is completed, growing the oxide 104 by a thermal oxidation process, wherein the growth of the oxide 104 is enough to just fill the Air Cavity trench on the silicon substrate 101 after the growth, and a schematic structural diagram after the growth of the oxide 104 is shown in fig. 1 d.
In a preferred embodiment, the growth of the oxide 104 is performed using an APCVD thermal oxidation (dry or wet oxygen) process, wherein the oxide 104 is specifically silicon oxide. When APCVD thermal oxidation (dry oxygen or wet oxygen) process is adopted to grow silicon oxide, silicon in the Air Cavity grooves on the silicon substrate 101 is correspondingly consumed, and the depth of the Air Cavity grooves on the silicon substrate 101 can be controlled by the growth proportion of the silicon oxide, so that the height of the silicon oxide after growth is consistent with that of the surface of the silicon substrate 101. The reactor structure required by the APCVD thermal oxidation process is simpler, the deposition rate is higher, the productivity can be improved, and the production cost can be reduced.
In a specific embodiment, according to a plurality of experiments by the applicant of the present invention, based on the ratio of the growth of silicon oxide by the thermal oxidation process to the consumption of the silicon substrate 101, the silicon oxide of 2 μm consumes 0.92 μm, so that a trench of 1.08 μm depth needs to be etched, and the trench is filled up just after the silicon oxide growth is completed.
With continued reference to fig. 1e, as shown in fig. 1e, the mask layer 102 is removed by a wet process, specifically, when the mask layer 102 is silicon nitride, the wet process is performed by using phosphoric acid H3PO4The characteristic of no reaction with the silicon substrate 101 does not affect the surface roughness of the silicon substrate 101, and the surface quality of the silicon substrate 101 processed by the wet process is greatly superior to the surface quality processed by CMP planarization in the prior art.
The cavity processing technology solves the technical problems that the joint of the oxide 104 and the silicon substrate 101 has a section difference of about 50-70nm due to the utilization of CMP whole surface planarization in the prior art, the cost of CMP equipment is high, about 500 million dollars are generally used in the current mainstream CMP equipment, and the cost of a grinding material consumable material slurry is high. By utilizing the cavity processing technology, the surface roughness of the oxide 104 and the silicon substrate 101 can be reduced to be within 3nm from about 10nm, and the surface quality of the silicon substrate 101 is greatly improved.
With continued reference to fig. 2, fig. 2 shows a flow chart of a cavity processing process for a MEMS device according to another embodiment of the present invention, which, as shown in fig. 2, comprises the following flows:
referring first to fig. 2a, a mask layer 202 is pre-deposited on a silicon substrate 201, and the mask layer 202 is used to protect the surface of the silicon substrate 201 from damage during processing. Preferably, the mask layer 202 is silicon nitride, the silicon nitride is used as the mask layer 202 to protect the surface of the silicon substrate 201, and a wet process using phosphoric acid H may be used for removal3PO4The property of not reacting with the silicon substrate 201 further ensures the surface roughness of the silicon substrate 201. It should be appreciated that, besides silicon nitride, other silicide or nitride may be selected as the mask layer 202 for the mask layer 202, and the chemical agent that does not react with the silicon substrate 201 is used for removing the mask layer 202 by the wet process, which can also achieve the technical effects of the present invention.
With continuing reference to fig. 2b, as shown in fig. 2b, a layer of photoresist 203 is coated on the upper surface of the mask layer 202, and a prototype of the Air Cavity trench is formed on the photoresist 203 and the mask layer 202 by using photolithography and wet etching processes, it should be noted that the etching solution selected by the wet etching process should not react with the silicon substrate 201, so as to avoid damaging the silicon substrate 201 and affecting the control of the depth of the Air Cavity trench subsequently processed on the silicon substrate 201.
Referring to fig. 2c and 2d, after removing the photoresist 203, growing the oxide 204 directly by using APCVD thermal oxidation process, and removing the mask layer 202 by using wet process, specifically, when the mask layer 202 is silicon nitride, using phosphoric acid H by using wet process3PO4The characteristic of no reaction with the silicon substrate 201 does not cause the surface roughness of the silicon substrate 201, and the surface quality of the silicon substrate 201 processed by the wet process is greatly superior to the surface quality processed by CMP planarization in the prior art.
In a specific embodiment, the growth of silicon oxide based on a thermal oxidation process is proportional to the consumption of the silicon substrate 201, such that Air Cavity trenches of a desired depth are processed in the silicon substrate 201. Among them, according to a plurality of experiments of the applicant of the present invention, the ratio of the growth of silicon oxide of the thermal oxidation process to the consumption of the silicon substrate 201 was 1: 0.46.
Compared with the cavity processing process in fig. 1, the cavity processing process flow chart for the MEMS device shown in fig. 2 omits a process of etching a part of the trench by using a dry method, and directly uses an APCVD thermal oxidation process to grow the oxide 204, thereby simplifying the process and further improving the production efficiency.
Both processes of fig. 1 and 2 use APCVD instead of PECVD to grow the oxide 104, 204, which is a common apparatus for APCVD that can grow at least 150pcs Wafer at a time, with 2 μm of the oxide 104, 204 growing for about 6 hours, and the formula is: x is the number of0 2Bt, where, x0For thickness, B is the oxidation parabola constant (about 0.012 μm for 1200 ℃ wet oxidation)2Min), t is time, calculated from this, t ≈ x0 2/B≈2μm2/0.012μm2The/min is approximately equal to 333min, so the productivity UPH of the APCVD is approximately 25pcs/Hour calculated in 6 hours, and the yield is improved by more than 800 percent compared with the 3pcs/Hour of the PECVD.
Compared with the existing Air Cavity manufacturing process, the new Air Cavity manufacturing process abandons CMP equipment, adopts wet process and APCVD equipment, and has the mainstream Single Wafer wet process equipment cost of about 80 million dollars, APCVD equipment cost of about 60 million dollars, total cost of about 140 million dollars and CMP equipment cost of about 500 million dollars, so that the equipment cost of the new Air Cavity manufacturing process is reduced by about 72 percent.
In a preferred embodiment, on the basis of the cavity processing process of fig. 1 and 2, a device functional layer covering the oxide 104, 204 may be further fabricated on the silicon substrate 101, 201, and finally, the oxide 104, 204 is released by using a chemical agent such as hydrofluoric acid to obtain a desired product for a communication module, for example, a bulk acoustic wave resonator.
Figure 3 shows a flow diagram of a process for fabricating a bulk acoustic wave resonator according to one embodiment of the present invention. On the basis of the wet etching in the cavity processing process of fig. 1 and 2, sequentially growing a bottom electrode 302, a piezoelectric layer 303 and a top electrode 304 on the upper surface of a silicon substrate 301 to obtain the structure shown in fig. 3 a; the oxide 305 is released by hydrofluoric acid, and finally the bulk acoustic wave resonator with the Air Cavity structure shown in fig. 3b is obtained.
Fig. 4 shows a schematic structural diagram of a bulk acoustic wave resonator according to an embodiment of the present invention. As shown in fig. 4, the bulk acoustic wave resonator includes a silicon substrate 401 and a functional layer grown on the upper surface of the silicon substrate 401, the functional layer includes a bottom electrode 402, a piezoelectric layer 403, and a top electrode 404 from bottom to top, wherein an Air cavity 405 is present between the silicon substrate 401 and the bottom electrode 402, the bulk acoustic wave resonator has the advantages of small size, strong integration capability, high quality guarantee during high-frequency operation, strong power-bearing capability, and the like, and is widely applied to a core device at the front end of radio frequency.
While the present invention has been described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined by the appended claims. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
In the description of the present application, it is to be understood that the terms "upper", "lower", "inner", "outer", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application. The word 'comprising' does not exclude the presence of elements or steps not listed in a claim. The word 'a' or 'an' preceding an element does not exclude the presence of a plurality of such elements. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims shall not be construed as limiting the scope.
Claims (6)
1. A cavity processing technology for a MEMS device comprises the following steps:
a) depositing a mask layer on a substrate;
b) etching the mask layer on the area on the substrate where the cavity is to be formed by utilizing a photoetching process; and
c) etching a region where a cavity is to be formed by an APCVD thermal oxidation process and simultaneously growing an oxide, so that the oxide is not required to be subjected to planarization treatment, and the height of the oxide after growth is consistent with that of the surface of the substrate;
d) removing the mask layer by using a wet process; and
e) and after a device functional layer covering the oxide is manufactured on the substrate, releasing the oxide.
2. A cavity machining process according to claim 1,
the step c) comprises: etching the area on the substrate where the cavity is to be formed by using a dry process to form a part of the cavity, and then etching the rest part of the cavity by using an APCVD thermal oxidation process and simultaneously growing an oxide in the cavity.
3. A cavity machining process according to claim 1,
the mask layer is made of silicon nitride material.
4. The cavity machining process of claim 1, wherein the wet process in step d) comprises utilizing H3PO4And (6) carrying out corrosion.
5. A process for manufacturing a bulk acoustic wave resonator, characterized in that a cavity is manufactured in a substrate using the cavity-machining process as claimed in claim 1 or 4, wherein the device functional layers are an electrode layer and a piezoelectric layer.
6. A bulk acoustic wave resonator, characterized in that it is manufactured by the process of claim 5.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010404255.XA CN111697942B (en) | 2020-05-13 | 2020-05-13 | Cavity processing technology for MEMS device, bulk acoustic wave resonator and manufacturing technology thereof |
| PCT/CN2020/097807 WO2021227208A1 (en) | 2020-05-13 | 2020-06-23 | Cavity machining process for mems device, bulk acoustic wave resonator and manufacturing process therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010404255.XA CN111697942B (en) | 2020-05-13 | 2020-05-13 | Cavity processing technology for MEMS device, bulk acoustic wave resonator and manufacturing technology thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111697942A CN111697942A (en) | 2020-09-22 |
| CN111697942B true CN111697942B (en) | 2022-04-08 |
Family
ID=72477313
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010404255.XA Active CN111697942B (en) | 2020-05-13 | 2020-05-13 | Cavity processing technology for MEMS device, bulk acoustic wave resonator and manufacturing technology thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN111697942B (en) |
| WO (1) | WO2021227208A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114506811A (en) * | 2021-12-22 | 2022-05-17 | 杭州士兰集成电路有限公司 | MEMS device and manufacturing method thereof |
| CN115178314A (en) * | 2022-08-08 | 2022-10-14 | 深圳市麦科思技术有限公司 | Micro-fluid device of micro-electro-mechanical system and manufacturing method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6905970B2 (en) * | 2001-11-20 | 2005-06-14 | Industrial Technology Research Institute | Method for making a thin film bulk acoustic-wave resonator |
| CN101154618A (en) * | 2006-09-30 | 2008-04-02 | 中芯国际集成电路制造(上海)有限公司 | Method for forming device isolation region |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1085343C (en) * | 1998-07-22 | 2002-05-22 | 李韫言 | Infrared FABRY-PEROT filter used for fine processing procedure |
| CN100375348C (en) * | 2004-09-30 | 2008-03-12 | 中国科学院半导体研究所 | Method for forming semiconductor laser and spot-size converter by once epitaxy |
| CN101465628B (en) * | 2009-01-15 | 2011-05-11 | 电子科技大学 | Film bulk acoustic wave resonator and preparation method thereof |
| NL2015534B1 (en) * | 2015-09-30 | 2017-05-10 | Tempress Ip B V | Method of manufacturing a solar cell. |
-
2020
- 2020-05-13 CN CN202010404255.XA patent/CN111697942B/en active Active
- 2020-06-23 WO PCT/CN2020/097807 patent/WO2021227208A1/en active Application Filing
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6905970B2 (en) * | 2001-11-20 | 2005-06-14 | Industrial Technology Research Institute | Method for making a thin film bulk acoustic-wave resonator |
| CN101154618A (en) * | 2006-09-30 | 2008-04-02 | 中芯国际集成电路制造(上海)有限公司 | Method for forming device isolation region |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2021227208A1 (en) | 2021-11-18 |
| CN111697942A (en) | 2020-09-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111697942B (en) | Cavity processing technology for MEMS device, bulk acoustic wave resonator and manufacturing technology thereof | |
| US7354840B1 (en) | Method for opto-electronic integration on a SOI substrate | |
| CN110113022B (en) | Film bulk acoustic resonator and manufacturing method thereof | |
| CN112039481B (en) | Bulk acoustic wave resonator and method of manufacturing the same | |
| KR100406580B1 (en) | Method for forming contact plug of semiconductor device | |
| WO2022063053A1 (en) | Resonator manufacturing method and resonator | |
| CN115395911B (en) | Preparation method of film bulk acoustic resonator | |
| KR20000015161A (en) | Method of forming trench of semiconductor device | |
| CN115377229A (en) | Silicon dioxide passivation film and manufacturing method thereof | |
| CN107799459B (en) | Germanium-silicon substrate on insulator, manufacturing method thereof and semiconductor device | |
| CN112466804B (en) | Manufacturing method of semiconductor device and semiconductor device | |
| CN114640321A (en) | Resonator and preparation method thereof | |
| CN106876269A (en) | Possesses SiO in dipole antenna2The preparation method of the SPiN diodes of protective layer | |
| CN107666297A (en) | FBAR and its manufacture method with hydrophobic anti-adhesion structure | |
| CN114421909A (en) | Method for optimizing FBAR cavity planarization defect, cavity type FBAR and application | |
| CN112151511A (en) | Semiconductor structure and preparation method thereof | |
| KR100359858B1 (en) | Method of forming device isolation film in semiconductor device | |
| CN112864088A (en) | Method for manufacturing shallow trench isolation structure | |
| KR100295917B1 (en) | Shallow trench isolation manufacturing method | |
| CN113651288B (en) | Method for preparing micro-channel structure with nano through holes on partition wall | |
| WO2019007324A1 (en) | Method for manufacturing dual-cavity structure, and dual-cavity structure | |
| KR19990004561A (en) | Device Separation Method of Semiconductor Device | |
| CN116299854B (en) | Preparation method of silicon nitride device based on stress dispersion and crack blocking patterns | |
| CN116936351B (en) | Etching method | |
| US20220103154A1 (en) | Substrate processing and membrane release of transversely-excited film bulk acoustic resonator using a sacrificial tub |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: 313000 building 3, No. 1366, Hongfeng Road, Kangshan street, Huzhou City, Zhejiang Province Applicant after: Jianwenlu (Zhejiang) Semiconductor Co.,Ltd. Address before: 310019 room 1004, 10th floor, building 4, No. 9, Jiuhuan Road, Jianggan District, Hangzhou City, Zhejiang Province Applicant before: Hangzhou Wenwenlu Technology Co.,Ltd. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: Cavity processing technology, bulk acoustic resonator and its manufacturing process for MEMS devices Effective date of registration: 20231018 Granted publication date: 20220408 Pledgee: Huzhou Wuxing Rural Commercial Bank Co.,Ltd. Pledgor: Jianwenlu (Zhejiang) Semiconductor Co.,Ltd. Registration number: Y2023980061546 |