CN111695318A - Method for calculating semiconductor device model of circuit simulation program - Google Patents

Method for calculating semiconductor device model of circuit simulation program Download PDF

Info

Publication number
CN111695318A
CN111695318A CN202010479429.9A CN202010479429A CN111695318A CN 111695318 A CN111695318 A CN 111695318A CN 202010479429 A CN202010479429 A CN 202010479429A CN 111695318 A CN111695318 A CN 111695318A
Authority
CN
China
Prior art keywords
circuit
circuit simulation
hardware unit
semiconductor device
external hardware
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010479429.9A
Other languages
Chinese (zh)
Inventor
黄益飞
张征
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Fuhu Electronic Technology Co ltd
Original Assignee
Suzhou Fuhu Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Fuhu Electronic Technology Co ltd filed Critical Suzhou Fuhu Electronic Technology Co ltd
Priority to CN202010479429.9A priority Critical patent/CN111695318A/en
Publication of CN111695318A publication Critical patent/CN111695318A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The invention discloses a method for calculating a semiconductor device model of a circuit simulation program, which comprises the following steps: 1, initializing a circuit matrix equation; 2 accessing the external hardware unit through the ports of the computer and the external hardware unit operated by the connecting circuit simulation main program; 3, completing the calculation of the semiconductor device model by an external hardware unit; 4, returning the calculation result of the external hardware unit in the step 3 to the circuit simulation main program through a port connecting a computer operated by the circuit simulation main program and the external hardware unit; 5, the circuit simulation main program fills the calculation result data obtained in the step 4 into the circuit matrix equation initialized in the step 1; 6, completing the solution of the circuit matrix equation in the main circuit simulation program. The invention realizes the acceleration of the semiconductor device model calculation process and the whole circuit simulation program in a mode of putting the work of semiconductor device model calculation in the circuit simulation program into an external hardware unit for carrying out.

Description

Method for calculating semiconductor device model of circuit simulation program
Technical Field
The invention relates to the technical field of electronic design automation, in particular to a method for calculating a semiconductor device model of a circuit simulation program.
Background
In the design process of modern integrated circuits, in order to verify whether the function and performance of a designed integrated circuit meet the design expectations before the integrated circuit is actually produced, circuit simulation analysis needs to be performed on the designed integrated circuit to obtain the information of node voltage, branch current and the like of the integrated circuit during operation, and whether the designed integrated circuit can normally work as expected is determined. To achieve this, models of semiconductor devices of varying complexity and varying simulation accuracy have been developed in succession. However, as semiconductor processes continue to advance and the requirements for simulation accuracy become higher, the models of semiconductor devices required for circuit simulation become more complex. The calculation of the complex semiconductor device model needs to solve a very complex calculation formula, and the operation of the formula occupies a large amount of running time of the circuit simulation program, so that the running speed of the circuit simulation program is influenced.
In view of the above, it is necessary to provide a method capable of rapidly implementing the above complex semiconductor device model calculation, and integrate the model calculation method into a circuit simulation program, so as to achieve an increase in circuit simulation speed.
Disclosure of Invention
The invention aims to reduce the running time of a circuit simulation program.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a method of semiconductor device model computation of a circuit simulation program, comprising the steps of:
step 1, completing initialization of a circuit matrix equation on a computer operated by a circuit simulation main program;
step 2, accessing the external hardware unit through the ports of the computer and the external hardware unit which are connected with the circuit simulation main program to run;
step 3, completing the calculation of the semiconductor device model by an external hardware unit;
step 4, returning the result calculated in step 3 by the external hardware unit to the circuit simulation main program through connecting the computer operated by the circuit simulation main program and the port of the external hardware unit;
step 5, filling the calculation result data obtained in the step 4 into the circuit matrix equation initialized in the step 1 in a circuit simulation main program;
and 6, completing the solution of a circuit matrix equation in a circuit simulation main program.
Preferably, the external hardware unit is a graphics processing unit.
Preferably, the external hardware unit is an application specific integrated circuit chip customized for semiconductor device model calculation.
Preferably, the external hardware unit is a field programmable gate array.
Preferably, the ports of the computer and the external hardware unit operated by the circuit simulation main program are PCIe ports.
Preferably, the ports of the computer and the external hardware unit operated by the circuit simulation main program are USB ports.
Based on the technical scheme, the invention has the beneficial effects that: by completing the calculation of the semiconductor device model by the external hardware unit, compared with the traditional method of completing the calculation of the semiconductor device model on a computer running a main program of a circuit simulation program, the method has the advantages that the speed is increased, the running speed of the whole circuit simulation program is increased, and the running time of the circuit simulation program is reduced.
Drawings
FIG. 1: a schematic flow chart of a method for semiconductor device model calculation of a circuit simulation program according to a first embodiment of the present invention;
FIG. 2: a flow diagram of a method for semiconductor device model computation for a circuit simulation program according to a second embodiment of the present invention;
FIG. 3: a flow diagram of a method for semiconductor device model computation for a circuit simulation program according to a third embodiment of the present invention;
FIG. 4: a flow diagram of a method for semiconductor device model computation for a circuit simulation program according to a fourth embodiment of the present invention;
FIG. 5: a flow chart of a method for semiconductor device model computation of a circuit simulation program according to a fifth embodiment of the present invention is shown.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
Example one
As shown in fig. 1, when the external hardware unit is a Graphics Processing Unit (GPU) hardware unit, a method for calculating a semiconductor device model of a circuit simulation program includes the following steps:
step 1, initializing a circuit matrix equation, including but not limited to: memory space is allocated to the circuit matrix equation on a computer running a main program of circuit simulation, and initial values are filled in coefficients of the circuit matrix equation with the allocated space.
And 2, sending a command of semiconductor device model calculation and device model parameters required by the semiconductor device model calculation to an external Graphics Processing Unit (GPU) hardware unit by connecting a computer for running a circuit simulation main program and a port of the GPU hardware.
And 3, finishing the calculation of the semiconductor device model by an external GPU hardware unit.
And 4, returning the calculation result of the semiconductor device model performed by the external GPU hardware unit to the circuit simulation main program by connecting the computer for operating the circuit simulation main program and the port of the external GPU hardware.
And 5, filling the calculation result of the semiconductor device model obtained in the step 4 into the circuit matrix equation which is initialized in the step 1 in the main program of the circuit simulation.
And 6, completing the solution of the circuit matrix equation in the running of the main circuit simulation program.
Example two
As shown in fig. 2, when the external hardware unit is an Application Specific Integrated Circuit (ASIC) hardware unit, a method for calculating a semiconductor device model of a circuit simulation program includes the following steps:
step 1, initializing a circuit matrix equation, including but not limited to: memory space is allocated for the circuit matrix equations on a computer running a main program of circuit simulation, and coefficient values of the circuit matrix equations with the allocated space are initialized.
And 2, sending a command of semiconductor device model calculation to an external Application Specific Integrated Circuit (ASIC) hardware unit by connecting a computer for running a circuit simulation main program and a port of the external ASIC hardware unit, and transmitting device model parameters required by the semiconductor device model calculation.
And 3, finishing the calculation of the semiconductor device model by an external ASIC hardware unit.
And 4, connecting a computer running the circuit simulation main program with a port of external ASIC hardware, and sending back the calculation result of the semiconductor device model of the external ASIC hardware unit to the circuit simulation main program.
And 5, filling the calculation result of the semiconductor device model obtained in the step 4 into the circuit matrix equation which is initialized in the step 1 in the main program of the circuit simulation.
And 6, completing the solution of the circuit matrix equation in the running of the main circuit simulation program.
EXAMPLE III
As shown in fig. 3, when the external hardware unit is a programmable logic array (FPGA) hardware unit, a method for calculating a semiconductor device model of a circuit simulation program includes the following steps:
step 1, initializing a circuit matrix equation, including but not limited to: memory space is allocated for the circuit matrix equations on a computer running a main program of circuit simulation, and coefficient values of the circuit matrix equations with the allocated space are initialized.
And 2, sending a command of semiconductor device model calculation to an external programmable logic (FPGA) hardware unit by connecting a computer for running a circuit simulation main program and a port of external application-specific integrated circuit hardware, and transmitting device model parameters required by the semiconductor device model calculation.
And 3, completing the calculation of the semiconductor device model by an external FPGA hardware unit.
And 4, connecting a computer for running the circuit simulation main program with a port of external application-specific integrated circuit hardware, and returning the result of the calculation of the semiconductor device model by the external application-specific integrated circuit hardware unit to the circuit simulation main program.
And 5, filling the calculation result of the semiconductor device model obtained in the step 4 into the circuit matrix equation which is initialized in the step 1 in the main program of the circuit simulation.
And 6, completing the solution of the circuit matrix equation in the running of the main circuit simulation program.
Example four
As shown in fig. 4, a method for calculating a semiconductor device model of a circuit simulation program when an external hardware unit is connected to a computer running a main program of the circuit simulation program through a PCIe port, comprises the steps of:
step 1, initializing a circuit matrix equation, including but not limited to: memory space is allocated for the circuit matrix equations on a computer running a main program of circuit simulation, and coefficient values of the circuit matrix equations with the allocated space are initialized.
And 2, sending a command of semiconductor device model calculation to an external hardware unit by connecting a computer for running the circuit simulation main program and a PCIe port of external hardware, and transmitting device model parameters required by the semiconductor device model calculation.
And 3, finishing the calculation of the semiconductor device model by an external hardware unit.
And 4, sending back the result of the calculation of the semiconductor device model by the external hardware unit to the circuit simulation main program by connecting the computer running the circuit simulation main program and the PCIe port of the external hardware.
And 5, filling the calculation result of the semiconductor device model obtained in the step 4 into the circuit matrix equation which is initialized in the step 1 in the main program of the circuit simulation.
And 6, completing the solution of the circuit matrix equation in the running of the main circuit simulation program.
EXAMPLE five
As shown in fig. 5, a method for calculating a semiconductor device model of a circuit simulation program when an external hardware unit is connected to a computer running a main program of the circuit simulation program through a USB port, comprises the steps of:
step 1, initializing a circuit matrix equation, including but not limited to: memory space is allocated for the circuit matrix equations on a computer running a main program of circuit simulation, and coefficient values of the circuit matrix equations with the allocated space are initialized.
And 2, sending a command of semiconductor device model calculation to an external hardware unit by connecting a computer for running a circuit simulation main program and a USB port of external hardware, and transmitting device model parameters required by the semiconductor device model calculation.
And 3, finishing the calculation of the semiconductor device model by an external hardware unit.
And 4, returning the calculation result of the semiconductor device model of the external hardware unit to the circuit simulation main program by connecting the computer running the circuit simulation main program and the USB port of the external hardware.
And 5, filling the calculation result of the semiconductor device model obtained in the step 4 into the circuit matrix equation which is initialized in the step 1 in the main program of the circuit simulation.
And 6, completing the solution of the circuit matrix equation in the running of the main circuit simulation program.
In this document, a semiconductor device refers to a basic component or a circuit block constituting a semiconductor integrated circuit.
In this context, the basic components that make up a semiconductor integrated circuit include, but are not limited to, the following: metal-oxide-semiconductor field effect transistors (MOSFETs), Bipolar Junction Transistors (BJTs), electrodes, capacitors, inductors, resistors, current sources, voltage sources, devices using verilog-a language to describe behavioral characteristics.
In this context, the meaning of a circuit module comprising a semiconductor integrated circuit includes, but is not limited to, a circuit consisting of one or more basic components covered by the above definition.
In this context, the meaning of a circuit module constituting a semiconductor integrated circuit includes, but is not limited to, a circuit composed of one or more basic components and circuit modules covered by the above definition.
In this document, the meaning of the semiconductor device constituting the semiconductor integrated circuit includes, but is not limited to, the following kinds: a semiconductor device or a circuit module, whose physical, electrical, or behavior characteristics can be described by mathematical expressions, or a programming language, or by using a model such as a neural network.
In this document, the meaning of the semiconductor device constituting the semiconductor integrated circuit includes, but is not limited to, the following kinds: another circuit module capable of performing the same or similar function as a certain circuit module.
In this document, the meaning of a semiconductor device constituting a semiconductor integrated circuit includes a circuit block whose physical, electrical, and behavior characteristics are described by mathematical expressions or program languages, but whose basic components of its specific implementation cannot be determined.
In this context, a circuit module constituting a semiconductor integrated circuit means a circuit composed of one or more basic components covered by the above definition.
In this context, a semiconductor device model refers to a mathematical expression or software code of physical, electrical, or behavioral characteristics of the above-described semiconductor device or a circuit module composed of semiconductor devices.
In this context, a model of a base component means a mathematical formula or software code that describes its physical, electrical, or behavioral characteristics.
In this context, for the basic component, the meaning of the model includes a mathematical expression derivation model obtained by training a large number of reference simulation or actual measurement data using artificial intelligence techniques (including but not limited to deep neural network techniques).
In this context, for MOSFET devices, the meaning of the model includes the BSIM series model developed by berkeley division, university of california.
In this context, for MOSFET devices, the meaning of the model includes derivation of the model from mathematical expressions by artificial intelligence techniques (including but not limited to deep neural network techniques) through training of simulated or actual measurement data for a large number of references.
In this context, a circuit module is defined as a model that includes a mathematical expression or software code that describes a physical, electrical, or behavioral characteristic of the circuit module, which is obtained by performing an abstraction of a model of a basic component constituting the circuit module and then performing modeling.
In this context, for a circuit module, the meaning of its model is to derive the model by using artificial intelligence techniques (including but not limited to deep neural network techniques) through mathematical expressions that are trained on simulated or actual measurement data for a large number of references.
The above description is only a preferred embodiment of the method for calculating the semiconductor device model of the circuit simulation program disclosed in the present invention, and is not intended to limit the scope of the embodiments of the present disclosure. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the embodiments of the present disclosure should be included in the protection scope of the embodiments of the present disclosure.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The embodiments in the present specification are all described in a progressive manner, and the same and similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.

Claims (6)

1. A method for semiconductor device model computation of a circuit simulation program, comprising the steps of:
step 1, completing initialization of a circuit matrix equation on a computer operated by a circuit simulation main program;
step 2, accessing the external hardware unit through the ports of the computer and the external hardware unit which are connected with the circuit simulation main program to run;
step 3, completing the calculation of the semiconductor device model by an external hardware unit;
step 4, returning the result calculated in step 3 by the external hardware unit to the circuit simulation main program through connecting the computer operated by the circuit simulation main program and the port of the external hardware unit;
step 5, filling the calculation result data obtained in the step 4 into the circuit matrix equation initialized in the step 1 in a circuit simulation main program;
and 6, completing the solution of a circuit matrix equation in a circuit simulation main program.
2. The method of claim 1, wherein the external hardware unit is a graphics processing unit.
3. The method of claim 1, wherein the external hardware unit is an application specific integrated circuit chip customized for semiconductor device model calculation.
4. The method of claim 1, wherein the external hardware unit is a field programmable gate array.
5. The method of claim 1, wherein the ports of the computer and external hardware unit on which the circuit emulation main program runs are PCIe ports.
6. The method of claim 1, wherein the ports of the computer and the external hardware unit on which the circuit simulation main program runs are USB ports.
CN202010479429.9A 2020-05-29 2020-05-29 Method for calculating semiconductor device model of circuit simulation program Pending CN111695318A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010479429.9A CN111695318A (en) 2020-05-29 2020-05-29 Method for calculating semiconductor device model of circuit simulation program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010479429.9A CN111695318A (en) 2020-05-29 2020-05-29 Method for calculating semiconductor device model of circuit simulation program

Publications (1)

Publication Number Publication Date
CN111695318A true CN111695318A (en) 2020-09-22

Family

ID=72479067

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010479429.9A Pending CN111695318A (en) 2020-05-29 2020-05-29 Method for calculating semiconductor device model of circuit simulation program

Country Status (1)

Country Link
CN (1) CN111695318A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1828617A (en) * 2006-03-31 2006-09-06 电子科技大学 Software and hardware synergistic simulation/ validation system and vector mode simulation/ validation method
CN103399841A (en) * 2013-07-31 2013-11-20 清华大学 Sparse matrix LU decomposition method based on GPU
CN107563079A (en) * 2017-09-11 2018-01-09 杨宇翔 A kind of collaborative simulation accelerator and analogue system and method based on FPGA
CN109782625A (en) * 2018-12-20 2019-05-21 中国电力科学研究院有限公司 A kind of real-time emulation method and system of circuit model

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1828617A (en) * 2006-03-31 2006-09-06 电子科技大学 Software and hardware synergistic simulation/ validation system and vector mode simulation/ validation method
CN103399841A (en) * 2013-07-31 2013-11-20 清华大学 Sparse matrix LU decomposition method based on GPU
CN107563079A (en) * 2017-09-11 2018-01-09 杨宇翔 A kind of collaborative simulation accelerator and analogue system and method based on FPGA
CN109782625A (en) * 2018-12-20 2019-05-21 中国电力科学研究院有限公司 A kind of real-time emulation method and system of circuit model

Similar Documents

Publication Publication Date Title
US8117576B2 (en) Method for using an equivalence checker to reduce verification effort in a system having analog blocks
KR20190052604A (en) System and method for circuit simulation based on recurrent neural networks
CN111797581A (en) System and method for generating a model of a transistor
US6182269B1 (en) Method and device for fast and accurate parasitic extraction
US9898566B2 (en) Method for automated assistance to design nonlinear analog circuit with transient solver
CN106529080B (en) A kind of construction method of square resistance SPICE model
JPH10124563A (en) Method and for calculating delay of logic circuit and method for calculating delay data in delay library
US5796985A (en) Method and apparatus for incorporating a miller compensation for modeling electrical circuits
CN111859835A (en) Order reduction method, order reduction device and order reduction equipment of circuit interconnection network model
US10452797B2 (en) Fault insertion for system verification
CN112836454B (en) Integrated circuit simulation method and system
CN111695318A (en) Method for calculating semiconductor device model of circuit simulation program
US8676547B2 (en) Parameter extraction method
Hoelldampf et al. Efficient generation of analog circuit models for accelerated mixed-signal simulation
EP2899654A1 (en) Method, system and computer program product for characterizing the variability of an integrated circuit design
Wu et al. Accurate speed improvement techniques for RC line and tree interconnections in CMOS VLSI
US20030195736A1 (en) Method of storing cross-hierarchy coupling data in a hierarchical circuit model
US6944834B2 (en) Method and apparatus for modeling dynamic systems
Zhu et al. Two-stage newton–raphson method for transistor-level simulation
US9665673B2 (en) Input capacitance modeling for circuit performance
Stievano et al. Behavioral modeling of digital devices via composite local linear state–space relations
Saviz et al. Pyramid-a hierarchical waveform relaxation-based circuit simulation program
US20190005174A1 (en) Methods and apparatus for performing timing driven hardware emulation
Zaum et al. An accelerated mixed-signal simulation kernel for SystemC
Kolka et al. Program for multi-domain symbolic analysis

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination