CN111681591B

CN111681591B - Display module and display device

Info

Publication number: CN111681591B
Application number: CN202010600563.XA
Authority: CN
Inventors: 蔡寿金; 朱绎桦; 陈国照
Original assignee: Xiamen Tianma Microelectronics Co Ltd
Current assignee: Xiamen Tianma Microelectronics Co Ltd
Priority date: 2020-06-28
Filing date: 2020-06-28
Publication date: 2022-12-13
Anticipated expiration: 2040-06-28
Also published as: CN111681591A

Abstract

The invention discloses a display module and a display device, belonging to the technical field of display, wherein the display module comprises a display panel and a driving chip; the display panel between the binding area and the display area of the display panel is provided with a multiplexing module, the multiplexing module is connected with at least two shunt control signal lines extending along a first direction, each shunt control signal line at least comprises a first connecting node, a second connecting node and a third connecting node, and the third connecting node is positioned between the first connecting node and the second connecting node; the driving chip comprises at least two shunt control pins which are electrically connected with the third connecting node through connecting wires. The display device comprises the display module. The invention can greatly reduce the length of the connecting wire, thereby being beneficial to reducing the load of the shunt control signal wire to a greater extent, further being beneficial to improving the charging capability of the display panel and improving the display quality of the display panel.

Description

Display module and display device

Technical Field

The invention relates to the technical field of display, in particular to a display module and a display device.

Background

The Display devices such as Liquid Crystal Display (LCD) and Organic Light Emitting Diode (OLED) Display devices include a plurality of pixels arranged in an array, each pixel generally includes at least red, green, and blue sub-pixels, each sub-pixel is controlled by a gate line and a data line, the gate line is used to control the on and off of the sub-pixel, and the data line applies different data voltage signals to the sub-pixels to enable the sub-pixels to Display different gray scales, thereby realizing the Display of a full-color image. In the prior art, a driving chip (IC) generally transmits a control signal to a data line in a display panel to transmit an electrical signal, the larger the size of the display panel is, the larger the number of the data line is, the more signal transmission ports on the IC chip are, and in order to reduce the number of output channels of the driving chip, a demultiplexer is generally selected to reduce the number of output channels of the driving chip, so as to reduce the number of output channels of the driving chip by multiple times.

With the development of intelligent automobile technology, the display screen is applied more and more in the automobile, including central control display, instrument panel, head-up display, rearview mirror display and the like. At present, the application of the center control display is the most common, the size of the center control display is larger, and the size is generally between 10 inches and 13 inches, so the development of a middle-size vehicle-mounted display screen is particularly important. With the improvement of the integration level of the display screen and the development of cost control, the middle-size display screen is currently developing more mux schemes such as 3mux and 6mux of a single IC chip, for example, a 1 to 6 demux display screen can implement time-sharing supply of data voltages output by 1 channel to corresponding 6 data lines, and has the main advantages that: the single IC chip can reduce half the cost, and is beneficial to simplifying the back-end binding process, but the risk that the single IC chip is connected to the data lines close to the two sides of the panel or the control wires connected to the demux are long and the charging capability is insufficient exists.

Therefore, it is an urgent problem to provide a display module and a display device capable of improving the problem of insufficient charging capability in a medium-sized vehicle-mounted display screen product.

Disclosure of Invention

In view of this, the invention provides a display module and a display device, so as to solve the problems of insufficient charging capability and poor display quality in the products of the medium-sized vehicle-mounted display screen in the prior art.

The invention discloses a display module, comprising: a display panel and a driving chip; the display panel comprises a plurality of scanning lines which are arranged along a second direction and extend along the first direction, and a plurality of data lines which are arranged along the first direction and extend along the second direction; wherein the first direction and the second direction intersect; the display panel further comprises a display area and a non-display area arranged around the display area, the non-display area comprises a binding area, the binding area is located on one side of the display area along the second direction, and the driving chip is electrically bound with the display panel in the binding area; along the second direction, a multiplexing module is arranged on the display panel between the binding region and the display region, the input end of the multiplexing module is electrically connected with the driving chip, and the output end of the multiplexing module is electrically connected with the data line; the multiplexing module is connected with at least two shunt control signal lines extending along a first direction, each shunt control signal line at least comprises a first connection node, a second connection node and a third connection node, the first connection node and the second connection node are respectively positioned at two opposite ends of the shunt control signal line in the first direction, and the third connection node is positioned between the first connection node and the second connection node; the driving chip comprises at least two shunt control pins which are electrically connected with the third connecting node through connecting wires.

Based on the same invention concept, the invention also discloses a display device which comprises the display module.

Compared with the prior art, the display module and the display device provided by the invention at least realize the following beneficial effects:

the driving signal provided by the driving chip in the display module can be electrically connected with each data line of the display panel through the multiplexing module, the input end of the multiplexing module is electrically connected with the driving chip, and the output end of the multiplexing module is electrically connected with the data line. The display panel is used for the vehicle-mounted display screen with the medium and large size, only one driving chip is bound, half of the cost can be reduced, and the back-end binding process can be simplified. According to the invention, the shunt control pins on the drive chip are not connected to two ends of the multiplexing module in the binding area, namely along the first direction, the shunt control pins on the drive chip are not electrically connected with the first connecting nodes and the second connecting nodes at two ends of the shunt control signal line, but are connected to the third connecting nodes closer to the middle position of the display panel through the connecting lines.

Of course, it is not necessary for any product in which the present invention is practiced to specifically achieve all of the above-described technical effects simultaneously.

Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

Fig. 1 is a schematic plan view illustrating a display module according to an embodiment of the present invention;

fig. 2 is a schematic plan view illustrating another display module according to an embodiment of the present invention;

FIG. 3 is a schematic plan view of a display module according to the related art;

FIG. 4 is an enlarged partial view of region M of FIG. 2;

FIG. 5 is a schematic plan view of another display module according to an embodiment of the present invention;

FIG. 6 is an enlarged view of a portion of region N of FIG. 5;

FIG. 7 is a schematic plan view of another display module according to an embodiment of the present invention;

FIG. 8 is an enlarged partial view of area E of FIG. 7;

FIG. 9 is a schematic plan view of another display module according to an embodiment of the present invention;

FIG. 10 is an enlarged fragmentary view of region F of FIG. 9;

FIG. 11 is a schematic plan view of another display module according to an embodiment of the present invention;

FIG. 12 is an enlarged view of a portion of region K of FIG. 11;

FIG. 13 is a schematic plan view of another display module according to an embodiment of the present invention;

FIG. 14 is an enlarged partial view of region J of FIG. 13;

fig. 15 is a schematic plan view of a display device according to an embodiment of the present invention.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

In the related art, the demultiplexer demux is a circuit capable of transferring data of 1 input terminal to any one of m output terminals as required under the action of a control signal line and a switch. After the demultiplexer is used, the number of the transmission ports of the signals on the IC chip is greatly reduced, and the design of the whole display panel is more reasonable. The control signals of the demultiplexer circuit are transmitted from two ends of the display panel, so that the control signal lines of the demultiplexer circuit can only receive the control signals from two ends of the control signal lines, because the line between the two ends of the control line is long, and the resistance of the routing between the two ends of the control line is large, the delay is too large in the transmission process of the control signals from the two ends to the middle, so that the on time of the switch controlled by the control signal lines is different, the charging time of the data lines in the display panel is different, and the charging capability of partial data signals in the display panel is influenced.

Based on above-mentioned problem, this application has provided a display module assembly and display device, can improve the problem that the charging capability is not enough in the on-vehicle display screen product of medium-size. The following description is provided for a specific embodiment of the display module and the display device.

Referring to fig. 1 and fig. 2, fig. 1 is a schematic plan structure diagram of a display module according to an embodiment of the present invention, fig. 2 is a schematic plan structure diagram of another display module according to an embodiment of the present invention, where a display module 000 according to the present embodiment includes: a display panel 10 and a driving chip 20; it is understood that the driving chip 20 may be replaced by a flexible circuit board;

the display panel 10 includes a plurality of scan lines G arranged along the second direction Y and extending along the first direction X, and a plurality of data lines S arranged along the first direction X and extending along the second direction Y; the first direction X intersects the second direction Y, optionally, the first direction X and the second direction Y are perpendicular to each other, the display panel 10 may include a plurality of sub-pixels 100 arranged in an array, and each sub-pixel 100 is electrically connected to the scan line G and the data line S respectively;

the display panel 10 further comprises a display area AA and a non-display area NA arranged around the display area AA, the non-display area NA comprises a binding area BA, the binding area BA is located on one side of the display area AA along the second direction Y, and the driving chip 20 is bound and electrically connected with the display panel 10 within the range of the binding area BA;

along the second direction Y, the multiplexing module 30 is disposed on the display panel 10 between the bonding area BA and the display area AA, the input end 301 of the multiplexing module 30 is electrically connected to the driving chip 20, the output end 302 of the multiplexing module 30 is electrically connected to the data line S, and optionally, the number of the input ends 301 of the multiplexing module 30 is less than the number of the output ends 302 of the multiplexing module 30; the multiplexing module 30 in fig. 1 and 2 of this embodiment is illustrated in a block diagram form, and it is understood that the multiplexing module 30 may be a specific multiplexing circuit structure, which is not illustrated in fig. 1 and 2 of this embodiment;

the multiplexing module 30 is connected to at least two shunt control signal lines 40 extending along the first direction X, i.e., the multiplexing module 30 may be a 2mux demultiplexer, a 3mux demultiplexer, a 6mux demultiplexer, etc.; optionally, the shunt control signal line 40 may be a CKH signal line connected to the multiplexing module 30, each shunt control signal line 40 at least includes a first connection node 40A, a second connection node 40B, and a third connection node 40C, the first connection node 40A and the second connection node 40B are respectively located at two opposite ends of the shunt control signal line 40 in the first direction X, and the third connection node 40C is located between the first connection node 40A and the second connection node 40B;

the driving chip 20 includes at least two shunt control pins 201, and the shunt control pins 201 are electrically connected to the third connection node 40C through the connection line 50.

Specifically, the display module 000 provided in this embodiment includes the display panel 10 and the driving chip 20 electrically connected to the display panel 10 in the bonding area BA of the display panel 10, optionally, the driving chip 20 may provide a scanning driving signal to each sub-pixel 100 through the scanning line G, and the driving chip 20 may further provide a data voltage signal to each sub-pixel 100 through the data line S. The display panel 10 of the present embodiment can be used for a vehicle-mounted display screen with a medium size (the medium size may refer to a larger width along the first direction X), and the display panel 10 is electrically connected to a driving chip 20 in a binding manner. The driving signal (which may be a data voltage signal) provided by the driving chip 20 of the embodiment may be electrically connected to each data line S of the display panel 10 through the multiplexing module 30, the input end 301 of the multiplexing module 30 is electrically connected to the driving chip 20, and the output end 302 of the multiplexing module 30 is electrically connected to the data line S, which uses a multiplexing technology, so as to facilitate simplifying the production process of the display panel 10, and at the same time, reduce the number of leads led out from the pins of the driving chip 20 for providing the data voltage signal, thereby facilitating reducing the width of the non-display area NA at the driving chip 20 in the second direction Y, further increasing the range of the display area AA of the display panel 10, and having more space for setting the sub-pixels 100, and while increasing the screen occupation ratio of the display panel 10, facilitating implementing a narrow frame of the display panel 10. Therefore, the display panel 10 of the embodiment is used for a vehicle-mounted display screen with a medium size and a large size, and only one driver chip is bound, so that the cost can be reduced by half, and the back-end binding process can be simplified. In this embodiment, a multiplexing module 30 is disposed between the bonding area BA and the display area AA on the display panel 10, the multiplexing module 30 is connected to at least two shunt control signal lines 40 extending along the first direction X, each shunt control signal line 40 at least includes a first connection node 40A, a second connection node 40B, and a third connection node 40C, wherein the first connection node 40A and the second connection node 40B are respectively located at two opposite ends of the shunt control signal line 40 in the first direction X, the third connection node 40C is located between the first connection node 40A and the second connection node 40B, that is, in the first direction, the third connection node 40C is located near a middle position of the display panel 10, the driving chip 20 includes at least two shunt control pins 201, the shunt control pins 201 are electrically connected to the third connection node 40C near the middle position of the display panel through a connection line 50,

alternatively, among the at least two shunt control pins 201, one shunt control pin 201 may be electrically connected to a third connection node 40C of one shunt control signal line 40, which is located near the middle of the display panel, through one connection line 50 (it may be understood that the shunt control pin 201A in fig. 1 and 2 is electrically connected to the third connection node 40C of the other shunt control signal line 40, which is located near the middle of the display panel, through the connection line 50A), and the other shunt control pin 201 is electrically connected to the third connection node 40C of the other shunt control signal line 40, which is located near the middle of the display panel, through another connection line 50 (it may be understood that the shunt control pin 201B in fig. 1 and 2 is electrically connected to the third connection node 40C of the shunt control signal line 400B, which is located near the middle of the display panel, through at least two connection lines 50, that is, the at least two shunt control pins 201 are electrically connected to the at least two third connection nodes 40C one-to-one (as shown in fig. 1 and 2). Optionally, the at least two shunt control pins 201 may be electrically connected to the same third connection node 40C through the connection line 50, which is not described herein in detail, and may be selectively set according to actual requirements during specific implementation (not shown).

In the present embodiment, the shunt control pins 201 on the driver chip 20 are not connected to two ends of the multiplexing module 30 in the bonding area BA, that is, along the first direction X, the shunt control pins 201 on the driver chip 20 are not electrically connected to the first connection node 40A and the second connection node 40B on two ends of the shunt control signal line 40, but are connected to the third connection node 40C of the shunt control signal line 40 closer to the middle of the display panel 10 through the connection line 50, it can be understood that along the first direction X, the distance from the third connection node 40C to the first connection node 40A may not be equal to the distance from the third connection node 40C to the second connection node 40B (as shown in fig. 1, although the third connection node 40C is located closer to the middle area of the display panel 10, but may not be the middle position of the display panel 10), the distance from the third connection node 40C to the first connection node 40A may also be equal to the distance from the third connection node 40C to the second connection node 40B (as shown in fig. 2, the third connection node 40C may be the middle position of the display panel 10), compared with the scheme in the related art, in which the shunt control pin 201 on the driving chip 20 is electrically connected to the first connection node 40A and the second connection node 40B at two ends of the shunt control signal line 40, the present embodiment may greatly reduce the length of the connection line 50, thereby being beneficial to reducing the load of the shunt control signal line 40 to a greater extent, further being beneficial to improving the charging capability of the display panel 10, and improving the display quality of the display panel 10.

Referring to fig. 3, fig. 3 is a schematic plan view of a display module provided in the related art, in the display module 000 'shown in fig. 3, a single driver chip 20' is taken as an example of a 12-inch display panel, and a scheme of electrically connecting a shunt control pin 201 'on the driver chip 20' with a first connection node 40A 'and a second connection node 40B' at two ends of a shunt control signal line 40', wherein a length of a connection line 50' connecting the shunt control pin 201 'and the first connection node 40A' reaches 133000um. However, in the present embodiment, a single driver chip 20 (as shown in fig. 1 and fig. 2) is also used in a 12-inch display panel with the same size, and the shunt control pins 201 on the driver chip 20 are not connected to two ends of the multiplexing module 30 in the bonding area BA, that is, along the first direction X, the shunt control pins 201 on the driver chip 20 are not electrically connected to the first connection node 40A and the second connection node 40B at two ends of the shunt control signal line 40, but are connected to the third connection node 40C of the shunt control signal line 40, which is closer to the middle position of the display panel 10, through the connection line 50, the length of the connection line 50 is significantly shorter than that of the connection line 50' in fig. 3, and the connection line 50 may only have 18000um, which only accounts for 13% in the related art in fig. 3, because the length of the connection line 50 in the present embodiment is long, which is beneficial to greatly reducing the load of the shunt control signal line 40, and enhancing the charging capability of a display panel with a medium size and a large size using a single driver chip 20.

As shown in the following table, the following table is a comparison list of the charging rates of the sub-pixels of the display panel 10 and the multiplexing module 30 obtained by using the display module 000 shown in fig. 1 in the present embodiment and the charging rates of the sub-pixels of the display panel 10' and the multiplexing module 30' obtained by using the display module 000' shown in fig. 3 in the related art:

as can be seen from the above table, the structure of the display module 000 of this embodiment, the shunt control pins 201 on the driver chip 20 are not connected to two ends of the multiplexing module 30 in the bonding area BA, that is, along the first direction X, the shunt control pins 201 on the driver chip 20 are not electrically connected to the first connection nodes 40A and the second connection nodes 40B at two ends on the shunt control signal line 40, but are connected to the third connection nodes 40C of the shunt control signal line 40 closer to the middle position of the display panel 10 through the connection lines 50, the length of the connection lines 50 is shortened, the charging rate of the entire display module can be improved by about 0.3%, and the charging capability is improved to a greater extent.

It should be noted that fig. 1 and fig. 2 in this embodiment only schematically illustrate the structures of the display panel 10 and the driving chip 20 in the display module 000, and in a specific implementation, the structure of the display module 000 is not limited thereto, and may also include other structures capable of implementing a display function, which can be specifically understood with reference to the structure of the display module in the related art, and this embodiment is not described herein again. Fig. 1 and fig. 2 of the present embodiment only schematically show the positions of at least two shunt control pins 201 on the driving chip 20, in a specific implementation, the arrangement positions of the shunt control pins 201 are not limited thereto, and it can also be any position on the driving chip 20, and whether the connection line 50 runs straight or in a bent manner can be selected according to the positions of the at least two shunt control pins 201 on the driving chip 20, only that the shunt control pins 201 on the driving chip 20 are not electrically connected to the first connection node 40A and the second connection node 40B at two ends of the shunt control signal line 40, but are connected to the third connection node 40C of the shunt control signal line 40, which is closer to the middle position of the display panel 10, through the connection line 50, and the present embodiment is not particularly limited.

In some alternative embodiments, please refer to fig. 2 and fig. 4 in combination, fig. 4 is a partial enlarged view of the region M in fig. 2, in this embodiment, the driving chip 20 includes a first partition 20A, a second partition 20B, and a third partition 20C, and along the first direction X, the first partition 20A and the second partition 20B are respectively located at two opposite sides of the third partition 20C, that is, the first partition 20A and the second partition 20B are respectively regions near two ends of the driving chip 20, and the third partition 20C is a region in the middle of the driving chip 20; the shunt control pins 201 are located within the first partition 20A and/or the second partition 20B.

This embodiment further explains that when the shunt control pins 201 on the driver chip 20 are not connected to two ends of the multiplexing module 30 in the bonding area BA, that is, along the first direction X, the shunt control pins 201 on the driver chip 20 are not electrically connected to the first connection nodes 40A and the second connection nodes 40B at two ends of the shunt control signal line 40, but are connected to the third connection nodes 40C of the shunt control signal line 40 closer to the middle position of the display panel 10 through the connection lines 50, whether the connection lines 50 run straight or in a bent manner may be selected according to the positions of at least two shunt control pins 201 on the driver chip 20. As shown in fig. 2 and 4, the driving chip 20 may include a first partition 20A, a second partition 20B, and a third partition 20C, and along the first direction X, the first partition 20A and the second partition 20B are respectively located at two opposite sides of the third partition 20C, that is, the first partition 20A and the second partition 20B are respectively areas near two ends of the driving chip 20, and the third partition 20C is an area in the middle of the driving chip 20; the shunt control pins 201 may be disposed in the range of the first partition 20A and/or the second partition 20B, that is, one of the at least two shunt control pins 201A may be disposed in the range of the first partition 20A, and the other shunt control pin 201B may be disposed in the range of the second partition 20B, so that the pins on the driver chip 20 bound and electrically connected to the input 301 of the multiplexing module 30 may be aggregated between the first partition 20A and the second partition 20B, thereby reducing the possibility of interference of the shunt control pins 201 on other pins, and further rationalizing the pin layout of the driver chip 20.

It should be noted that, in the present embodiment, the size of the first partition 20A, the second partition 20B, and the third partition 20C on the driving chip 20 is not specifically limited, the third partition 20C may be slightly larger in the present embodiment, and the first partition 20A and the second partition 20B are respectively small partial areas close to two ends of the driving chip 20, so that the third partition 20C between the first partition 20A and the second partition 20B is used for placing a larger number of other types of pins (for example, pins connected to the input 301 of the multiplexing module 30), and may be set according to actual requirements during specific implementation, which is not specifically limited in the present embodiment.

In some optional embodiments, with continued reference to fig. 2 and fig. 4, when the shunt control pins 201 are located in the range of the first partition 20A and/or the second partition 20B, that is, at least two shunt control pins 201, one shunt control pin 201A is located in the range of the first partition 20A, and another shunt control pin 201B is located in the range of the second partition 20B, the driver chip 20 further includes a control signal auxiliary pin 202 located in the range of the third partition 20C;

the connecting line 50 includes a first sub-line 501 and a second sub-line 502 connected to each other, the first sub-line 501 is integrally disposed inside the driver chip 20, one end of the first sub-line 501 is electrically connected to the shunt control pin 201, the other end of the first sub-line 501 is electrically connected to the control signal auxiliary pin 202, one end of the second sub-line 502 is electrically connected to the control signal auxiliary pin 202 in a binding manner, and the other end of the second sub-line 502 is electrically connected to the third connection node 40C.

This embodiment further explains that when the shunt control pins 201 on the driver chip 20 are not connected to two ends of the multiplexing module 30 in the bonding area BA, that is, along the first direction X, the shunt control pins 201 on the driver chip 20 are not electrically connected to the first connection node 40A and the second connection node 40B at two ends on the shunt control signal line 40, but are connected to the third connection node 40C of the shunt control signal line 40 closer to the middle of the display panel 10 through the connection line 50, the connection line 50 may include a multi-segment sub-line bending structure, wherein part of the connection line 50 may also be integrally disposed in the driver chip 20, specifically, at least two control signal auxiliary pins 202 may be disposed in the third sub-area 20C of the driver chip 20, one control signal auxiliary pin 202A corresponds to one shunt control pin 201A, and the other control signal auxiliary pin 202B corresponds to the other shunt control pin 201B. In the present embodiment, the connection line 50 connecting one shunt control pin 201A with the third connection node 40C on one shunt control signal line 400A and connecting the other shunt control pin 201B with the third connection node 40C on the other shunt control signal line 400B includes the first sub-line 501 and the second sub-line 502 connected to each other, the first sub-line 501 may be integrally disposed inside the driver chip 20, one end of the first sub-line 501 routed inside the driver chip 20 is electrically connected to the shunt control pin 201 of the driver chip 20, and the other end is electrically connected to the control signal auxiliary pin 202 of the driver chip 20, while outside the driver chip 20, the control signal auxiliary pin 202 of the driver chip 20 may be connected to the third connection node 40C on the shunt control signal line 40 through the second sub-line 502 of the connection line 50, that is, that one end of the second sub-line 502 is electrically connected to the control signal auxiliary pin 202, and the other end of the second sub-line 502 is electrically connected to the third connection node 40C, thereby achieving the integral electrical connection of the control pin 201 with the third connection node 40C on the shunt control signal line 40, and it can be understood that the connection line of the connection line 20 is a bridge that the connection line 50 electrically connects the connection line of the control signal auxiliary pin 201 with the first sub-line 50, and the sub-line 50.

The first sub-line 501 of the connection line 50 in this embodiment is firstly routed inside the driver chip 20, penetrates through a part of the driver chip 20, penetrates out of the third sub-area 20C (i.e., the area near the middle) of the driver chip 20, and is then electrically connected to the third connection node 40C in the middle of the shunt control signal line 40, so that the first sub-line 501 of the connection line 50 can be prevented from occupying the space of the non-display area NA, the area of the non-display area NA can be reduced, a narrow frame can be realized, and the driver chip 20 can be provided with the control signal auxiliary pin 202 inside the driver chip 20 and the first sub-line 501 which electrically connects the shunt control pin 201 and the control signal auxiliary pin 202 when the driver chip 20 is set in a factory, which is beneficial to simplifying the binding process of the driver chip 20 and improving the process efficiency.

Alternatively, with continuing reference to fig. 2 and 4, the first sub-line 501 extends along the first direction X, and the second sub-line 502 extends along the second direction Y.

The embodiment further explains that the first sub-line 501 routed inside the driver chip 20 may be set to extend along the first direction X, the second sub-line 502 routed outside the driver chip 20 may be set to extend along the second direction Y, and the control signal auxiliary pin 202 may be set at a corresponding position on the driver chip 20, so as to satisfy the situation that the first sub-line 501 extends along the first direction X, and the second sub-line 502 extends along the second direction Y, thereby making the layout of the connection line 50 more reasonable, and avoiding the cross short circuit between the connection line 50 and other lines (for example, fan-out lines of the bonding area BA, not shown in the figure) of the non-display area NA, and affecting the display effect.

In some optional embodiments, please refer to fig. 5 and fig. 6 in combination, fig. 5 is a schematic plan view of another display module provided in the embodiments of the present invention, fig. 6 is a partial enlarged view of a region N in fig. 5, in this embodiment, the driving chip 20 includes a first partition 20A, a second partition 20B, and a third partition 20C, and along the first direction X, the first partition 20A and the second partition 20B are respectively located at two opposite sides of the third partition 20C, that is, the first partition 20A and the second partition 20B are respectively areas near two ends of the driving chip 20, and the third partition 20C is a relatively middle area of the driving chip 20; the shunt control pin 201 is located within the third partition 20C.

This embodiment further explains that when the shunt control pins 201 on the driver chip 20 are not connected to two ends of the multiplexer module 30 in the bonding area BA, that is, along the first direction X, the shunt control pins 201 on the driver chip 20 are not electrically connected to the first connection node 40A and the second connection node 40B at two ends of the shunt control signal line 40, but are connected to the third connection node 40C of the shunt control signal line 40 closer to the middle position of the display panel 10 through the connection line 50, the straight line direction or the bent line direction of the connection line 50 can be selected according to the positions of at least two shunt control pins 201 on the driver chip 20. As shown in fig. 5 and 6, the driving chip 20 may include a first partition 20A, a second partition 20B, and a third partition 20C, and along the first direction X, the first partition 20A and the second partition 20B are respectively located at two opposite sides of the third partition 20C, that is, the first partition 20A and the second partition 20B are respectively areas near two ends of the driving chip 20, and the third partition 20C is an area in the middle of the driving chip 20; the shunt control pins 201 may be disposed in the third partition 20C, that is, at least two shunt control pins 201 may be disposed in the third partition 20C, so that the pins on the driver chip 20 bound and electrically connected to the input 301 of the multiplexing module 30 may be disposed in the first partition 20A and the second partition 20B on both sides of the third partition 20C, respectively, so that the layout of the pins of each type on the driver chip 20 is rationalized, and the possibility of mutual interference between the pins of different types is reduced.

It should be noted that, in this embodiment, the size of the first partition 20A, the second partition 20B, and the third partition 20C on the driving chip 20 is not specifically limited, the third partition 20C may be slightly smaller in this embodiment, and the first partition 20A and the second partition 20B are respectively a majority of areas close to two ends of the driving chip 20, so that the third partition 20C between the first partition 20A and the second partition 20B is used to place a smaller number of the shunt control pins 201, and the first partition 20A and the second partition 20B are used to place a larger number of other types of pins (such as pins connected to the input end 301 of the multiplexing module 30), which may be set according to actual requirements in specific implementation, and this embodiment is not specifically limited.

In some alternative embodiments, with continued reference to fig. 5 and 6, when the shunt control pin 201 is located within the third partition 20C, one end of the connection line 50 is electrically connected to the shunt control pin 201 in a binding manner, and the other end of the connection line 50 is electrically connected to the third connection node 40C.

This embodiment further explains that when the shunt control pins 201 on the driver chip 20 are not connected to two ends of the multiplexing module 30 in the bonding area BA, that is, along the first direction X, the shunt control pins 201 on the driver chip 20 are not electrically connected to the first connection node 40A and the second connection node 40B at two ends on the shunt control signal line 40, but are connected to the third connection node 40C of the shunt control signal line 40 closer to the middle of the display panel 10 through the connection line 50, the connection line 50 may be in a single-segment linear structure, the shunt control pins 201 are located in the range of the third shunt area 20C, and the third connection node 40C is also located in a region closer to the middle on the shunt control signal line 40, so that one shunt control pin 201A is directly electrically connected to the third connection node 40C on one shunt control signal line 400A through the connection line 50A in the single-segment linear structure, another shunt control pin B is directly electrically connected to the third connection node 40C on another shunt control signal line 400B through the connection line 50B in the single-segment linear structure, and the connection line 201B is located on the middle of the driver chip 20, which the connection line 20 is closer to the middle of the display panel, and the display panel is further reducing the load capacity of the display panel 10.

Alternatively, with continuing reference to fig. 5 and fig. 6, the connection line 50 extends along the second direction Y.

The present embodiment further explains that the connection line 50 connecting the shunt control pin 201 on the driver chip 20 and the third connection node 40C on the shunt control signal line 40 may be arranged to extend along the second direction Y, that is, projections of the shunt control pin 201 on the driver chip 20 and the third connection node 40C on the shunt control signal line 40 in the second direction Y may overlap with each other, so that the extending direction of the connection line 50 is the same as the second direction Y, thereby preventing the connection line 50 from being crossed and shorted with other traces (for example, fan-out traces of the bonding area BA, not shown in the drawings) in the non-display area NA, and affecting the display effect.

In some optional embodiments, please refer to fig. 7 and 8, fig. 7 is a schematic plan view of another display module according to an embodiment of the present invention, fig. 8 is a partially enlarged view of a region E in fig. 7, in this embodiment, the multiplexing module 30 includes a plurality of multiplexing units 300, each multiplexing unit 300 includes a signal input terminal in and a plurality of signal output terminals out, a plurality of shunt control terminals ct, and a plurality of switching transistors TFT;

the grid electrode of the switching transistor TFT is electrically connected with the shunt control end ct, the first pole of the switching transistor TFT is electrically connected with the signal output end out, and the second pole of the switching transistor TFT is electrically connected with the signal input end in;

the signal input terminal in is electrically connected to the driving chip 20, the signal output terminals out are electrically connected to the data lines S in a one-to-one correspondence, and the shunt control terminal ct is electrically connected to the shunt control signal line 40.

The present embodiment further explains a circuit connection structure that the multiplexing module 30 can be configured with, and specifically, the multiplexing module 30 may include a plurality of multiplexing units 300, each multiplexing unit 300 includes a signal input terminal in and a plurality of signal output terminals out, a plurality of shunt control terminals ct, a plurality of switching transistors TFT; the number of signal output terminals out in each multiplexing unit 300 is the same as the number of switching transistors TFT in the multiplexing unit 300 and the number of shunt control terminals ct in the multiplexing unit 300. In the embodiment, the gate of the switching transistor TFT is electrically connected to the shunt control terminal ct, the first pole of the switching transistor TFT is electrically connected to the signal output terminal out, and the second pole of the switching transistor TFT is electrically connected to the signal input terminal in; the signal input terminal in may be used as the input terminal 301 of the multiplexing module 30 to be electrically connected to the driving chip 20, the signal output terminal out may be used as the output terminal 302 of the multiplexing module 30 to be electrically connected to the data lines S in a one-to-one correspondence, and the shunt control terminal ct is electrically connected to the shunt control signal line 40. The multiplexing module 30 of the present embodiment is advantageous to simplify the manufacturing process of the display panel 10 by adopting the demultiplexing technology, and each multiplexing unit 300 has a structure in which the ratio of the input end to the output end is 1 to many. Because one input end 301 of the multiplexing unit 300 can transmit the same data voltage signal to a plurality of different output ends 302 through the lead of the driving chip 20, and the plurality of different output ends 302 are respectively connected to different data lines S, the number of leads led out from the driving chip 20 and used for providing the data voltage signal can be reduced, which is beneficial to reducing the width of the non-display area NA at the driving chip 20 in the second direction Y, and further can increase the range of the display area AA of the display panel 10, improve the screen occupation ratio of the display panel, and is beneficial to realizing a narrow frame of the display panel, and can also alleviate the signal coupling phenomenon between the leads caused by the fact that the number of leads used for providing the data voltage input signal is large and the arrangement of the leads is dense.

It should be noted that fig. 7 and 8 of the present embodiment only illustrate the multiplexing module 30 of the present embodiment as an example, in which the number of signal output terminals out in each multiplexing unit 300, the number of switching transistors TFT in the multiplexing unit 300, and the number of demultiplexing control terminals ct in the multiplexing unit 300 are all 2, that is, each multiplexing unit 300 has a structure in which the ratio of input terminals to output terminals is 1 to 2, but the present embodiment is not limited thereto, and the multiplexing module 30 of the present embodiment may also be a demultiplexer having a structure in which the ratio of input terminals to output terminals is 1 to more, such as a 3mux demultiplexer, a 6mux demultiplexer, and the like, and the present embodiment is not limited thereto. Fig. 7 and 8 of the present embodiment only schematically illustrate the circuit connection structure of each multiplexing unit 300 with the driving chip 20 and the data lines S, and in particular, the connection structure of the multiplexing module 30 with the display panel 10 and the driving chip 20 may be in other connection manners, and the present embodiment is not limited in particular.

In some optional embodiments, please refer to fig. 9 and 10 in combination, fig. 9 is a schematic plan view of another display module provided in the embodiments of the present invention, fig. 10 is a partially enlarged view of a region F in fig. 9, in the embodiments, the multiplexing module 30 is connected to a first shunt control signal line CKH1, a second shunt control signal line CKH2, and a third shunt control signal line CKH3, a plurality of signal output ends out of each multiplexing unit 300 includes a first signal output end out1, a second signal output end out2, and a third signal output end out3, a plurality of shunt control ends ct includes a first shunt control end ct1, a second shunt control end ct2, and a third shunt control end ct3, and a plurality of switch transistors TFT includes a first switch transistor TFT1, a second switch transistor TFT2, and a third switch transistor TFT3;

the gate of the first switching transistor TFT1 of each multiplexing unit 300 is electrically connected to a first shunt control signal line CKH1 through a first shunt control terminal ct1, the gate of the second switching transistor TFT2 of each multiplexing unit 300 is electrically connected to a second shunt control signal line CKH2 through a second shunt control terminal ct2, and the gate of the third switching transistor TFT3 of each multiplexing unit 300 is electrically connected to a third shunt control signal line CKH3 through a third shunt control terminal ct 3;

a first pole of the first switching transistor TFT1 of each multiplexing unit 300 is electrically connected to the first signal output terminal out1, a first pole of the second switching transistor TFT2 of each multiplexing unit 300 is electrically connected to the second signal output terminal out2, and a first pole of the third switching transistor TFT3 of each multiplexing unit 300 is electrically connected to the third signal output terminal out 3;

the second poles of the plurality of switching transistors TFT of each multiplexing unit 300 are electrically connected to the signal input terminal in;

the driving chip 20 includes a first shunt control pin 201A, a second shunt control pin 201B, and a third shunt control pin 201C, the first shunt control pin 201A is electrically connected to a third connection node of the first shunt control signal line CKH1 through the first connection line 50A, the second shunt control pin 201B is electrically connected to a third connection node of the second shunt control signal line CKH2 through the second connection line 50B, and the third shunt control pin 201C is electrically connected to a third connection node of the third shunt control signal line CKH3 through the third connection line 50C.

The present embodiment further illustrates a connection relationship between the multiplexing module 30 in the display module 000, the data lines S in the display panel 10, and the driving chip 20, taking as an example a structure in which each multiplexing unit 300 has a ratio of input end to output end of 1: 3 (i.e. 3 mux). The multiplexing module 30 may include a plurality of multiplexing units 300, each multiplexing unit 300 including a signal input terminal in and 3 signal output terminals out, 3 shunt control terminals ct, 3 switching transistors TFT; the number of signal output terminals out in each multiplexing unit 300, the number of switching transistors TFT in the multiplexing unit 300, and the number of shunt control terminals ct in the multiplexing unit 300 are all 3. The signal input terminal in may be used as the input terminal 301 of the multiplexing module 30 to be electrically connected to the driving chip 20, the signal output terminal out may be used as the output terminal 302 of the multiplexing module 30 to be electrically connected to the data lines S in a one-to-one correspondence, and the shunt control terminal ct is electrically connected to the shunt control signal line 40. The multiplexing module 30 of the present embodiment is advantageous to simplify the manufacturing process of the display panel 10 by adopting the demultiplexing technology, and each multiplexing unit 300 has a structure in which the ratio of the input end to the output end is 1 to 3. Because an input 301 of the multiplexing unit 300 can transmit the same data voltage signal to 3 different output terminals 302 through the leads of the driving chip 20, and the 3 different output terminals 302 are respectively connected to different data lines S, the number of leads for providing the data voltage signal led out from the driving chip 20 can be reduced, which is beneficial to reducing the width of the non-display area NA at the driving chip 20 in the second direction Y, and further the range of the display area AA of the display panel 10 can be increased, thereby improving the screen occupation ratio of the display panel, being beneficial to realizing the narrow frame of the display panel, and also relieving the phenomenon of signal coupling between the leads caused by the dense arrangement of the leads.

It should be noted that fig. 9 and 10 of this embodiment only schematically illustrate the circuit connection structure between each multiplexing unit 300 and the driving chip 20 and the data lines S, and in particular, the connection structure between the multiplexing module 30 and the display panel 10 and the driving chip 20 may be other connection manners, and this embodiment is not limited in particular.

In some optional embodiments, referring to fig. 11 and 12, fig. 11 is a schematic plan view of another display module according to an embodiment of the present invention, and fig. 12 is a partially enlarged view of a region K in fig. 11, in this embodiment, one of the shunt control pins 201 is further electrically connected to a first connection node 40A of one of the shunt control signal lines 40 through a first oblique trace 60A, and the other of the shunt control pins 201 is further electrically connected to a second connection node 40B of the other of the shunt control signal lines 40 through a second oblique trace 60B. That is, one of the shunt control pins 201A is further electrically connected to the first connection node 40A of one of the shunt control signal lines 400A through the first slanted trace 60A, and the other of the shunt control pins 201B is further electrically connected to the second connection node 40B of the other of the shunt control signal lines 400B through the second slanted trace 60B. Optionally, since the shunt control signal line 40 extends along the first direction X, and the shunt control pin 201 is located on the driver chip 20, the extending direction of the first oblique trace 60A intersects with the first direction X, and the extending direction of the second oblique trace 60B intersects with the first direction X (as shown in fig. 11 and 12).

This embodiment explains that when the shunt control pin 201 on the driver chip 20 is not connected to two ends of the multiplexing module 30 in the bonding area BA, that is, along the first direction X, the shunt control pin 201 on the driver chip 20 is not electrically connected to the first connection node 40A and the second connection node 40B at two ends on the shunt control signal line 40, but is connected to the third connection node 40C of the shunt control signal line 40 that is closer to the middle of the display panel 10 through the connection line 50, the non-display area NA of the display panel 10 may further be provided with a first oblique trace 60A and a second oblique trace 60B, where the first oblique trace 60A is used to electrically connect one shunt control pin 201A on the driver chip 20 with the first connection node 40A of one shunt control signal line 400A, the second oblique trace 60B is used to electrically connect the other shunt control pin 201B on the driver chip 20 with the second connection node 40B of the other shunt control signal line 400B, the first oblique trace 60A may form a parallel structure with the control signal line 400A and the connection line 50A, and the second oblique shunt control line 60B may further reduce the impedance of the display panel 10, which further improves the display panel.

In some optional embodiments, please refer to fig. 13 and 14 in combination, fig. 13 is a schematic plan view of another display module according to an embodiment of the present invention, fig. 14 is a partially enlarged view of a region J in fig. 13, in this embodiment, a plurality of first auxiliary traces 70A are connected between the first oblique traces 60A and the shunt control signal lines 40 (which may be one shunt control signal line 40A), one end of the first auxiliary trace 70A is connected to the first oblique trace 60A, and the other end of the first auxiliary trace 70A is connected to the shunt control signal line 40; in the first direction X, the first connection node 40A points to the third connection node 40C, and the lengths of the plurality of first auxiliary traces 70A in the second direction Y gradually increase; optionally, the first auxiliary trace 70A extends along the second direction Y;

a plurality of second auxiliary traces 70B are connected between the second oblique traces 60B and the shunt control signal line 40 (or another shunt control signal line 40B), one end of the second auxiliary traces 70B is connected to the second oblique traces 60B, and the other end of the second auxiliary traces 70B is connected to the shunt control signal line 40; in the first direction X, the second connection node 40B points to the third connection node 40C, and the lengths of the plurality of second auxiliary traces 70B in the second direction Y gradually increase; optionally, the second auxiliary trace 70B extends along the second direction Y.

The present embodiment further explains that the non-display area NA of the display panel 10 is provided with a first oblique trace 60A and a second oblique trace 60B, the first oblique trace 60A is used to electrically connect one shunt control pin 201A on the driver chip 20 with a first connection node 40A of one shunt control signal line 400A, the first oblique trace 60A may form a parallel structure with the partial shunt control signal line 400A and the connection line 50A, the second oblique trace 60B is used to electrically connect another shunt control pin 201B on the driver chip 20 with a second connection node 40B of another shunt control signal line 400B, and the second oblique trace 60B may form a parallel structure with the partial shunt control signal line 400B and the connection line 50B, which is beneficial to further reducing the impedance of the shunt control signal line 40, further improving the charging capability of the display panel 10, and improving the display quality of the display panel 10. At this time, a plurality of first auxiliary traces 70A may be connected between the first oblique trace 60A and one shunt control signal line 40A, and a plurality of second auxiliary traces 70B may be connected between the second oblique trace 60B and another shunt control signal line 40B, because along the direction in which the third connection node 40C points to the first connection node 40A, the longer the trace is away from the shunt control pin 201A of the driver chip 20, the impedance is larger, and therefore, the longer the trace is, the impedance is larger, and the length of the first auxiliary trace 70A in the second direction Y is set in the first direction X, along the direction in which the third connection node 40C points to the first connection node 40A, and the shortest the length of the first auxiliary trace in the second direction Y is away from the shunt control pin 201A of the driver chip 20, and the capacitance of the first auxiliary trace in the second direction Y is the shortest, and thus the capacitance of the first auxiliary trace farthest the shunt control pin 201A from the shunt control pin 201A of the driver chip 20 between the first oblique trace 60A and the shunt control signal line 40A is away from the shunt control pin 20A can be equalized, and the capacitance of the shunt control signal line R is smaller, and the capacitance of the oblique control pin RC control pin 201A is closer to the load control pin 20 (i.e., the capacitance difference between the first auxiliary trace is smaller the oblique control pin 201A is greater the capacitance is greater the oblique control pin 201A, and the oblique load control pin R is greater the oblique load control pin). Similarly, since the longer the trace is, the greater the impedance is, the further away from the other shunt control pin 201B of the driving chip 20 along the direction that the third connection node 40C points to the second connection node 40B, the length of the plurality of second auxiliary traces 70B in the second direction Y is gradually reduced along the direction that the third connection node 40C points to the second connection node 40B, and the length of the second auxiliary trace farthest from the other shunt control pin 201B of the driving chip 20 in the second direction Y is shortest, so that the capacitance between the second oblique trace 60B and the other shunt control signal line 40B of the second auxiliary trace farthest from the other shunt control pin 201B of the driving chip 20 is smallest, thereby equalizing the RC load difference between the other shunt control pin 201B away from the driving chip 20 and the other shunt control pin 201B close to the driving chip 20.

In some alternative embodiments, please refer to fig. 15, where fig. 15 is a schematic plan view of a display device according to an embodiment of the present invention, and the display device 111 provided in this embodiment includes the display module 000 provided in the above embodiment of the present invention. The embodiment of fig. 15 is only an example of a mobile phone, and the display device 111 is described, it is understood that the display device 111 provided in the embodiment of the present invention may be another display device 111 having a display function, such as a computer, a television, and a vehicle-mounted display device, and the present invention is not limited thereto. The display device 111 provided in the embodiment of the present invention has the beneficial effects of the display module 000 provided in the embodiment of the present invention, and specific descriptions on the display module 000 may be specifically provided with reference to the above embodiments, and the detailed descriptions of the embodiment are omitted here.

According to the embodiment, the display module and the display device at least achieve the following beneficial effects:

the driving signals provided by the driving chip in the display module can be electrically connected with all data lines of the display panel through the multiplexing module, the input end of the multiplexing module is electrically connected with the driving chip, the output end of the multiplexing module is electrically connected with the data lines, and the multiplexing technology is adopted, so that the production process of the display panel is simplified, the number of lead wires which are led out from pins of the driving chip and used for providing data voltage signals can be reduced, the width of a non-display area of the driving chip in the second direction is reduced, the range of a display area of the display panel can be further increased, more space is used for arranging sub-pixels, the screen occupation ratio of the display panel is improved, and the narrow frame of the display panel is facilitated. The display panel is used for the vehicle-mounted display screen with the medium and large size, only one driving chip is bound, half of the cost can be reduced, and the back-end binding process can be simplified. According to the invention, the shunt control pins on the drive chip are not connected to two ends of the multiplexing module in the binding area, namely along the first direction, the shunt control pins on the drive chip are not electrically connected with the first connecting nodes and the second connecting nodes at two ends of the shunt control signal line, but are connected to the third connecting nodes closer to the middle position of the display panel through the connecting lines.

Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display module, comprising: a display panel and a driving chip;

the display panel comprises a plurality of scanning lines which are arranged along a second direction and extend along a first direction, and a plurality of data lines which are arranged along the first direction and extend along the second direction; wherein the first direction and the second direction intersect;

the display panel further comprises a display area and a non-display area arranged around the display area, the non-display area comprises a binding area, the binding area is located on one side of the display area along the second direction, and the driving chip is electrically bound with the display panel in the binding area;

along the second direction, a multiplexing module is arranged on the display panel between the binding region and the display region, the input end of the multiplexing module is electrically connected with the driving chip, and the output end of the multiplexing module is electrically connected with the data line;

the multiplexing module is connected with at least two shunt control signal lines extending along the first direction, each shunt control signal line at least comprises a first connection node, a second connection node and a third connection node, the first connection node and the second connection node are respectively located at two opposite ends of the shunt control signal line in the first direction, and the third connection node is located between the first connection node and the second connection node;

the driving chip comprises at least two shunt control pins which are electrically connected with the third connecting node through connecting wires;

the driving chip comprises a first partition, a second partition and a third partition, and the first partition and the second partition are respectively positioned on two opposite sides of the third partition along the first direction;

the shunt control pin is positioned in the range of the third subarea; or the shunt control pin is positioned in the range of the first partition and/or the second partition;

when the shunt control pin is located in the range of the first partition and/or the second partition, the connecting line extends from the shunt control pin to the third partition inside the driving chip, and is electrically connected with the shunt control signal line from the third partition, wherein one end of the same connecting line is electrically connected with the shunt control pin, and the other end of the same connecting line is electrically connected with the third connection node.

2. The display module according to claim 1, wherein when the shunt control pin is located in the first partition and/or the second partition, the driving chip further comprises a control signal auxiliary pin located in the third partition;

the connecting wire comprises a first sub-wire and a second sub-wire which are connected with each other, the first sub-wire is integrally arranged inside the driving chip, one end of the first sub-wire is electrically connected with the shunt control pin, the other end of the first sub-wire is electrically connected with the control signal auxiliary pin, one end of the second sub-wire is electrically connected with the control signal auxiliary pin in a binding mode, and the other end of the second sub-wire is electrically connected with the third connecting node.

3. The display module of claim 2, wherein the first sub-line extends in the first direction and the second sub-line extends in the second direction.

4. The display module according to claim 1, wherein when the shunt control pin is located within the third partition, one end of the connecting wire is electrically connected to the shunt control pin, and the other end of the connecting wire is electrically connected to the third connection node.

5. The display module according to claim 1, wherein the connecting line extends along the second direction.

6. The display module of claim 1, wherein the multiplexing module comprises a plurality of multiplexing units, each multiplexing unit comprising a signal input terminal and a plurality of signal output terminals, a plurality of shunt control terminals, and a plurality of switching transistors;

the grid electrode of the switch transistor is electrically connected with the shunt control end, the first electrode of the switch transistor is electrically connected with the signal output end, and the second electrode of the switch transistor is electrically connected with the signal input end;

the signal input end is electrically connected with the driving chip, the signal output ends are electrically connected with the data lines in a one-to-one correspondence mode, and the shunt control end is electrically connected with the shunt control signal line.

7. The display module according to claim 6, wherein a first shunt control signal line, a second shunt control signal line, and a third shunt control signal line are connected to the multiplexing module, the plurality of signal output terminals of each multiplexing unit includes a first signal output terminal, a second signal output terminal, and a third signal output terminal, the plurality of shunt control terminals includes a first shunt control terminal, a second shunt control terminal, and a third shunt control terminal, and the plurality of switching transistors includes a first switching transistor, a second switching transistor, and a third switching transistor;

a gate of the first switching transistor of each multiplexing unit is electrically connected to the first shunt control signal line through the first shunt control terminal, a gate of the second switching transistor of each multiplexing unit is electrically connected to the second shunt control signal line through the second shunt control terminal, and a gate of the third switching transistor of each multiplexing unit is electrically connected to the third shunt control signal line through the third shunt control terminal;

a first pole of the first switching transistor of each multiplexing unit is electrically connected to the first signal output terminal, a first pole of the second switching transistor of each multiplexing unit is electrically connected to the second signal output terminal, and a first pole of the third switching transistor of each multiplexing unit is electrically connected to the third signal output terminal;

a second pole of the plurality of switching transistors of each multiplexing unit is electrically connected to the signal input terminal;

the driving chip comprises a first shunt control pin, a second shunt control pin and a third shunt control pin, the first shunt control pin is electrically connected with a third connecting node of the first shunt control signal line through a first connecting line, the second shunt control pin is electrically connected with the third connecting node of the second shunt control signal line through a second connecting line, and the third shunt control pin is electrically connected with the third connecting node of the third shunt control signal line through a third connecting line.

8. The display module of claim 1,

one of the shunt control pins is further electrically connected with a first connection node of one of the shunt control signal lines through a first oblique routing line, and the other shunt control pin is further electrically connected with a second connection node of the other shunt control signal line through a second oblique routing line.

9. The display module of claim 8,

a plurality of first auxiliary wires are connected between the first oblique wires and the shunt control signal wires, one end of each first auxiliary wire is connected with the corresponding first oblique wire, and the other end of each first auxiliary wire is connected with the shunt control signal wire;

in the first direction, the first connection node points to the third connection node along the first connection node, and the lengths of the plurality of first auxiliary traces in the second direction gradually increase;

a plurality of second auxiliary wires are connected between the second oblique wires and the shunt control signal wires, one end of each second auxiliary wire is connected with the corresponding second oblique wire, and the other end of each second auxiliary wire is connected with the shunt control signal wire;

in the first direction, the second connection node is pointed to the third connection node along the second connection node, and the lengths of the second auxiliary traces in the second direction are gradually increased.

10. The display module according to claim 9, wherein the first auxiliary trace is disposed along the second direction, and the second auxiliary trace is disposed along the second direction.

11. A display device comprising the display module according to any one of claims 1 to 10.