CN111680037B - Dynamic data time scale acquisition method and device - Google Patents

Dynamic data time scale acquisition method and device Download PDF

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Publication number
CN111680037B
CN111680037B CN202010407945.0A CN202010407945A CN111680037B CN 111680037 B CN111680037 B CN 111680037B CN 202010407945 A CN202010407945 A CN 202010407945A CN 111680037 B CN111680037 B CN 111680037B
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data
time
millisecond
process layer
bit
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CN111680037A (en
Inventor
马小燕
许云龙
闫志辉
蔺立
赵剑松
冯广杰
赵丹
李磊
杨培迪
杨佳昊
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State Grid Corp of China SGCC
Xuji Group Co Ltd
XJ Electric Co Ltd
Xuchang XJ Software Technology Co Ltd
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State Grid Corp of China SGCC
Xuji Group Co Ltd
XJ Electric Co Ltd
Xuchang XJ Software Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/22Indexing; Data structures therefor; Storage structures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/24Querying
    • G06F16/245Query processing
    • G06F16/2458Special types of queries, e.g. statistical queries, fuzzy queries or distributed queries
    • G06F16/2477Temporal data queries
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J4/00Circuit arrangements for mains or distribution networks not specified as ac or dc
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2203/00Indexing scheme relating to details of circuit arrangements for AC mains or AC distribution networks
    • H02J2203/20Simulating, e g planning, reliability check, modelling or computer assisted design [CAD]

Abstract

The invention discloses a method and a device for acquiring a dynamic data time scale, wherein the method comprises the following steps: acquiring time data of a process layer and a device; judging whether the time difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration or not; when the time difference between the first millisecond bit and the second millisecond bit is smaller than the preset duration, second bit data of the device time data and the first millisecond bit data are input into a protocol structure of a dynamic data time scale; and when the time difference value is greater than or equal to the preset duration, correcting the second data, and inputting the corrected second data and the first millisecond data into a protocol structure of a dynamic data time scale. And comparing the millisecond data of the device time data with the millisecond data of the process layer to judge whether the error value of the millisecond data and the millisecond data is smaller than a preset value so as to determine the specific value of the dynamic data time mark of the synchronous phasor measurement device, thereby solving the problem of second-bit jump error of the dynamic data uploading time mark.

Description

Dynamic data time scale acquisition method and device
Technical Field
The invention relates to the technical field of power grid equipment, in particular to a method and a device for acquiring a dynamic data time scale.
Background
The dynamic data recording and analyzing function of the synchronous phasor measuring device is widely applicable to places such as transformer substations, is an important means for monitoring and analyzing dynamic characteristics of large power grids and new energy power generation, and plays an important role in safe operation of the current AC/DC large power grids. The time scale of the dynamic data is an important means for engineering personnel to find and analyze the fault reasons, so the time scale of the dynamic data must be effective and accurate.
The dynamic data time scale of the synchrophasor measurement device is formed by combining the process layer time and the device time. The millisecond bit in the dynamic data time stamp is from the sample sequence number of the process layer, but the second bit in the dynamic data time stamp is read by the device clock because the process layer SV message cannot transfer other time-related information.
The sampling pointer and sampling sequence number are locked, i.e., the time of the process layer is locked, from the beginning of the dynamic data computation task to the end of the task. At this time, the device clock is still running normally, so that when the dynamic data sets frames and marks the time, the millisecond bit from the process layer is the calculation time of the dynamic data, and the second bit from the device clock is the current time. Combining the milliseconds of process layer time with the seconds of device time can result in two time unsynchronized errors.
Disclosure of Invention
The embodiment of the invention aims to provide a method and a device for acquiring a dynamic data time scale, which are used for judging whether an error value of millisecond bit data of device time data and millisecond bit of a process layer is smaller than a preset value or not by comparing the millisecond bit data of the device time data and the millisecond bit of the process layer so as to determine a specific numerical value of the dynamic data time scale of the device, thereby solving the technical problem of second bit jump errors occurring in the uploading time scale of the dynamic data.
To solve the above technical problem, a first aspect of an embodiment of the present invention provides a method for obtaining a dynamic data time stamp, including: acquiring time data of a process layer and a device;
judging whether the time difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration or not;
when the time difference value between the first millisecond bit and the second millisecond bit is smaller than the preset duration, second bit data of the device time data and the first millisecond bit data are input into a protocol structure of a dynamic data time scale;
and when the time difference value is greater than or equal to the preset duration, correcting the second data, and inputting the corrected second data and the first millisecond data into a protocol structure of the dynamic data time scale.
Further, the correcting the second bit time data includes:
adding 1 to the value of the second bit time data when the first millisecond bit is greater than the second millisecond bit;
when the first millisecond bit is less than the second millisecond bit, the value of the second bit time data is decremented by 1.
Further, before the acquiring the time data of the process layer and the device, the method further includes:
judging whether the process layer sampling is interrupted or not;
when the process layer sampling is interrupted, acquiring the device time data and inputting the second bit data and the first millisecond bit data into a protocol structure of the dynamic data time scale;
and when the process layer sampling is not interrupted, acquiring time data of the process layer and the device.
Further, before the acquiring the time data of the process layer and the device, the method further includes:
judging whether the device is electrified for the first time;
when the device is powered on for the first time, acquiring the device time data and inputting the second bit data and the first millisecond bit data into a protocol structure of the dynamic data time scale;
and when the device is not powered on for the first time, acquiring time data of the process layer and the device.
Further, before the acquiring the time data of the process layer and the device, the method further includes:
judging whether the device is in a step-out state or not;
when the device is in a step-out state, the backup time is increased by a second preset duration, and then the protocol structure of the dynamic data time mark is input.
Further, the acquiring time data of the process layer includes:
acquiring an SV sampling sequence number of the process layer;
taking a preset numerical value as a unit to forward round the SV sampling sequence number to obtain the nearest SV sampling integer sequence number;
and obtaining the first millisecond bit data of the process layer time data according to the nearest SV sampling integer sequence number.
Further, before the acquiring the time data of the process layer and the device, the method further includes:
acquiring an SV sampling sequence number of the process layer;
judging whether the SV sampling sequence number of the process layer is in a first preset numerical range or not;
when the SV sampling sequence number of the process layer is in the first preset numerical range, second bit data of the device time data and the first millisecond bit data are input into a protocol structure of a dynamic data time scale;
and when the SV sampling sequence number of the process layer is not in the first preset numerical range, judging whether the difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration.
Accordingly, a second aspect of an embodiment of the present invention provides a dynamic data time stamp obtaining apparatus, including: the device comprises an acquisition module, a judgment module and a control module;
the acquisition module is used for acquiring time data of the process layer and the device;
the judging module is used for judging whether the time difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration;
the control module is used for inputting second bit data of the device time data and first millisecond bit data into a protocol structure of a dynamic data time scale when the time difference between the first millisecond bit and the second millisecond bit is smaller than a preset duration;
the control module is also used for correcting the second data when the time difference value is greater than or equal to the preset time length, and inputting the corrected second data and the first millisecond data into the protocol structure of the dynamic data time scale.
A third aspect of an embodiment of the present invention provides an electronic device, including: at least one processor; and a memory coupled to the at least one processor; wherein the memory stores instructions executable by the one processor to cause the at least one processor to perform any of the dynamic data time stamp retrieval methods described above.
A fourth aspect of an embodiment of the present invention provides a computer readable storage medium having stored thereon computer instructions which, when executed by a processor, implement any of the dynamic data time stamp obtaining methods described above.
The technical scheme provided by the embodiment of the invention has the following beneficial technical effects:
by comparing the millisecond data of the device time data with the millisecond data of the process layer, judging whether the error value of the millisecond data and the millisecond data is smaller than a preset value so as to determine the specific value of the dynamic data time mark of the synchronous phasor measurement device, the technical problem of second jump errors of the dynamic data uploading time mark is solved, the technical problem of the synchronous phasor measurement device when the synchronous phasor measurement device is electrified for the first time, the sampling terminal and in an out-of-step state is solved, the accuracy of the dynamic data time mark of the synchronous vector measurement device is improved, and the running safety of an alternating current and direct current power grid is improved.
Drawings
FIG. 1 is a flow chart of a method for obtaining a dynamic data time scale according to an embodiment of the present invention;
FIG. 2 is a block diagram of a dynamic data time stamp obtaining apparatus according to an embodiment of the present invention;
FIG. 3 is a block diagram of an acquisition module provided by an embodiment of the present invention;
FIG. 4 is a block diagram of a sampling interrupt determination module according to an embodiment of the present invention;
FIG. 5 is a block diagram of a primary power-on determination module provided by an embodiment of the present invention;
FIG. 6 is a block diagram of a step-out status determination module provided by an embodiment of the present invention;
fig. 7 is a block diagram of an SV sampling sequence number determination module according to an embodiment of the present invention.
Reference numerals:
1. an acquisition module, 11, a first acquisition unit, 12, a first calculation unit, 13, a second calculation unit, 2, a judgment module, 3, a control module, 4, a sampling interruption judgment module, 41, a first judgment unit, 42, a first control unit, 5, a primary power-on judgment module, 51, a second judgment unit, 52, a second control unit, 6, a step-out state judgment module, 61, a third judgment unit, 62, a third control unit, 7, an SV sampling sequence number judgment module, 71, a second acquisition unit, 72, a fourth judgment unit, 73, a fourth control unit,
Detailed Description
The objects, technical solutions and advantages of the present invention will become more apparent by the following detailed description of the present invention with reference to the accompanying drawings. It should be understood that the description is only illustrative and is not intended to limit the scope of the invention. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the present invention.
FIG. 1 is a flow chart of a dynamic data time scale acquisition method according to an embodiment of the present invention
Referring to fig. 1, an embodiment of the present invention provides a method for obtaining a dynamic data time stamp, including the following steps:
s200, time data of the process layer and the device are acquired.
S400, judging whether the time difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration.
S600, when the time difference between the first millisecond bit and the second millisecond bit is smaller than the preset duration, second bit data of the device time data and the first millisecond bit data are input into a protocol structure of a dynamic data time scale.
S800, correcting the second data if the time difference value is greater than or equal to the preset time length, and inputting the corrected second data and the first millisecond data into a protocol structure of a dynamic data time scale.
In step S800, the dynamic data time stamp obtaining method corrects the second bit time data, which may include the following two cases:
s810, when the first millisecond bit is greater than the second millisecond bit, adding 1 to the value of the second bit time data.
S820, when the first millisecond bit is smaller than the second millisecond bit, the value of the second bit time data is subtracted by 1.
Before acquiring the time data of the process layer and the device, the dynamic data time scale acquisition method further comprises the following steps:
s111, judging whether process layer sampling is interrupted or not.
S112, if the process layer sampling is interrupted, acquiring device time data and inputting second bit data and first millisecond bit data into a protocol structure of a dynamic data time scale.
S113, if the process layer sampling is not interrupted, acquiring time data of the process layer and the device.
Before acquiring the time data of the process layer and the device, the dynamic data time scale acquisition method further comprises the following steps:
s121, judging whether the device is powered on for the first time.
S122, if the device is powered on for the first time, acquiring device time data and inputting second bit data and first millisecond bit data into a protocol structure of a dynamic data time scale.
S123, if the device is not powered on for the first time, acquiring time data of the process layer and the device.
Before acquiring the time data of the process layer and the device, the dynamic data time scale acquisition method further comprises the following steps:
s131, judging whether the device is in a step-out state.
S132, if the device is in the out-of-step state, the backup time is increased by a second preset duration and then the protocol structure of the dynamic data time mark is input.
If the device is in the synchronous state, step S133 is executed.
In one specific implementation of the embodiment of the present invention, the acquiring time data of the process layer may include the following steps:
s210, acquiring the SV sampling sequence number of the process layer.
S220, taking a preset numerical value as a unit, rounding the SV sampling sequence number forwards to obtain the nearest SV sampling integer sequence number.
S230, obtaining first millisecond data of the process layer time data according to the nearest SV sampling integer sequence number.
In one implementation of the embodiment of the present invention, before the time data of the process layer and the device are acquired, the method for acquiring the dynamic data time stamp further includes:
s141, acquiring the SV sampling sequence number of the process layer.
S142, judging whether the SV sampling sequence number of the process layer is in a first preset numerical range.
S143, if the SV sampling sequence number of the process layer is in the first preset numerical range, second bit data and first millisecond bit data of the device time data are input into a protocol structure of a dynamic data time scale.
S144, if the SV sampling sequence number of the process layer is not in the first preset value range, step S400 is executed.
Fig. 2 is a block diagram of a dynamic data time stamp obtaining apparatus according to an embodiment of the present invention.
Referring to fig. 2, a second aspect of the embodiment of the present invention provides a dynamic data time stamp obtaining apparatus, including: the device comprises an acquisition module, a judging module and a control module. The acquisition module is used for acquiring time data of the process layer and the device; the judging module is used for judging whether the time difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration; the control module is used for inputting second bit data of the device time data and first millisecond bit data into a protocol structure of a dynamic data time scale when the time difference between the first millisecond bit and the second millisecond bit is smaller than a preset duration; the control module is also used for correcting the second data when the time difference value is greater than or equal to the preset time length, and inputting the corrected second data and the first millisecond data into the protocol structure of the dynamic data time scale.
Specifically, the correction of the second data by the control module includes: when the first millisecond bit is greater than the second millisecond bit, adding 1 to the value of the second bit time data; when the first millisecond bit is less than the second millisecond bit, the value of the second bit time data is decremented by 1.
Fig. 3 is a block diagram of an acquisition module according to an embodiment of the present invention.
Referring to fig. 3, in one implementation manner of the present embodiment, the obtaining module includes: the device comprises a first acquisition unit, a first calculation unit and a second calculation unit. The first acquisition unit is used for acquiring an SV sampling sequence number of the process layer; the first calculation unit is used for rounding the SV sampling sequence number forwards by taking a preset numerical value as a unit to obtain the nearest SV sampling integer sequence number; the second calculation unit obtains first millisecond data of the process layer time data according to the nearest SV sampling integer sequence number.
Fig. 4 is a block diagram of a sampling interrupt determination module according to an embodiment of the present invention.
Referring to fig. 4, optionally, the dynamic data time stamp obtaining apparatus further includes: and a sampling interruption judging module. The sampling interruption judging module comprises: a first judging unit and a first control unit. The first judging unit is used for judging whether the process layer sampling is interrupted or not; the first control unit is configured to obtain device time data and to input second bit data and first millisecond bit data into a protocol structure of a dynamic data time stamp when process layer sampling is interrupted.
Fig. 5 is a block diagram of a primary power-up determination module according to an embodiment of the present invention.
Referring to fig. 5, optionally, the dynamic data time stamp obtaining apparatus further includes: and a primary power-on judging module. The first power-on judging module comprises: a second judging unit and a second control unit. The second judging unit is used for judging whether the device is electrified for the first time or not; the second control unit is used for acquiring device time data and inputting second bit data and first millisecond bit data into a protocol structure of a dynamic data time scale when the device is powered on for the first time; the second control unit is also configured to obtain time data for the process layer and the device when the device is not initially powered up.
Fig. 6 is a block diagram of a step-out status determination module according to an embodiment of the present invention.
Referring to fig. 6, optionally, the dynamic data time stamp obtaining apparatus further includes: and the step-out state judging module. The step-out state judgment module includes: a third judging unit and a third control unit. The third judging unit is used for judging whether the device is electrified for the first time or not; the third control unit is used for acquiring device time data for the primary power-on of the device and inputting second bit data and first millisecond bit data into a protocol structure of a dynamic data time scale; the third control unit is also configured to obtain time data of the process layer and the device when the device is not initially powered up.
Fig. 7 is a block diagram of an SV sampling sequence number determination module according to an embodiment of the present invention.
Referring to fig. 7, optionally, the dynamic data time stamp obtaining apparatus further includes: and the SV sampling sequence number judging module. The SV sampling sequence number judging module comprises: the device comprises a second acquisition unit, a fourth judgment unit and a fourth control unit. The second acquisition unit is used for acquiring the SV sampling sequence number of the process layer; the fourth judging unit judges whether the SV sampling sequence number of the process layer is in a first preset numerical range or not; the fourth control unit is used for inputting second bit data and first millisecond bit data of the device time data into a protocol structure of a dynamic data time scale when the SV sampling sequence number of the process layer is in a first preset numerical range; the fourth control unit is further configured to determine whether a difference between the first millisecond data of the device time data and the second millisecond data of the process layer time data is less than a preset duration when the SV sample number of the process layer is not within a first preset numerical range.
The dynamic data time scale acquisition device judges whether the error value of the millisecond data of the device time data is smaller than the preset value by comparing the millisecond data of the device time data with the millisecond data of the process layer so as to determine the specific value of the dynamic data time scale of the synchronous phasor measurement device, solves the technical problem of second-bit jump errors of the dynamic data uploading time scale, solves the technical problem of the synchronous phasor measurement device when the synchronous phasor measurement device is electrified for the first time, the sampling terminal and is in a step-out state, improves the accuracy of the dynamic data time scale of the synchronous vector measurement device, and improves the operation safety of an alternating-current and direct-current power grid.
A third aspect of an embodiment of the present invention provides an electronic device, including: at least one processor; and a memory coupled to the at least one processor; the memory stores instructions executable by a processor to cause the at least one processor to perform any of the dynamic data time stamp retrieval methods described above.
A fourth aspect of an embodiment of the present invention provides a computer readable storage medium having stored thereon computer instructions which, when executed by a processor, implement any of the dynamic data time stamp obtaining methods described above.
The embodiment of the invention aims to protect a method and a device for acquiring a dynamic data time scale, wherein the method comprises the following steps: acquiring time data of a process layer and a device; judging whether the time difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration or not; when the time difference between the first millisecond bit and the second millisecond bit is smaller than the preset duration, second bit data of the device time data and the first millisecond bit data are input into a protocol structure of a dynamic data time scale; and when the time difference value is greater than or equal to the preset duration, correcting the second data, and inputting the corrected second data and the first millisecond data into a protocol structure of a dynamic data time scale. The technical scheme has the following effects:
by comparing the millisecond data of the device time data with the millisecond data of the process layer, judging whether the error value of the millisecond data and the millisecond data is smaller than a preset value so as to determine the specific value of the dynamic data time mark of the synchronous phasor measurement device, the technical problem of second jump errors of the dynamic data uploading time mark is solved, the technical problem of the synchronous phasor measurement device when the synchronous phasor measurement device is electrified for the first time, the sampling terminal and in an out-of-step state is solved, the accuracy of the dynamic data time mark of the synchronous vector measurement device is improved, and the running safety of an alternating current and direct current power grid is improved.
It is to be understood that the above-described embodiments of the present invention are merely illustrative of or explanation of the principles of the present invention and are in no way limiting of the invention. Accordingly, any modification, equivalent replacement, improvement, etc. made without departing from the spirit and scope of the present invention should be included in the scope of the present invention. Furthermore, the appended claims are intended to cover all such changes and modifications that fall within the scope and boundary of the appended claims, or equivalents of such scope and boundary.

Claims (7)

1. A method for obtaining a dynamic data time scale, comprising the steps of:
acquiring time data of a process layer and a device;
judging whether the time difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration or not;
when the time difference value between the first millisecond bit and the second millisecond bit is smaller than the preset duration, second bit data of the device time data and the first millisecond bit data are input into a protocol structure of a dynamic data time scale;
when the time difference value is greater than or equal to the preset duration, correcting the second data, and inputting the corrected second data and the first millisecond data into a protocol structure of the dynamic data time scale;
before the time data of the process layer and the device are acquired, the method further comprises the following steps:
judging whether the process layer sampling is interrupted or not;
when the process layer sampling is interrupted, acquiring the device time data and inputting the second bit data and the first millisecond bit data into a protocol structure of the dynamic data time scale;
when the process layer sampling is not interrupted, acquiring time data of the process layer and the device;
before the time data of the process layer and the device are acquired, the method further comprises the following steps:
judging whether the device is electrified for the first time;
when the device is powered on for the first time, acquiring the device time data and inputting the second bit data and the first millisecond bit data into a protocol structure of the dynamic data time scale;
when the device is not powered on for the first time, acquiring time data of the process layer and the device;
before the time data of the process layer and the device are acquired, the method further comprises the following steps:
judging whether the device is in a step-out state or not;
when the device is in a step-out state, the backup time is increased by a second preset duration, and then the protocol structure of the dynamic data time mark is input.
2. The method of claim 1, wherein said modifying said second bit time data comprises:
adding 1 to the value of the second bit time data when the first millisecond bit is greater than the second millisecond bit;
when the first millisecond bit is less than the second millisecond bit, the value of the second bit time data is decremented by 1.
3. The method of claim 1, wherein the step of obtaining time data of a process layer comprises:
acquiring an SV sampling sequence number of the process layer;
taking a preset numerical value as a unit to forward round the SV sampling sequence number to obtain the nearest SV sampling integer sequence number;
and obtaining the first millisecond bit data of the process layer time data according to the nearest SV sampling integer sequence number.
4. The method of claim 1, further comprising, prior to the step of obtaining the time data for the process layer and the device:
acquiring an SV sampling sequence number of the process layer;
judging whether the SV sampling sequence number of the process layer is in a first preset numerical range or not;
when the SV sampling sequence number of the process layer is in the first preset numerical range, inputting second bit data of the device time data and the first millisecond bit data into a protocol structure of a dynamic data time scale;
when the SV sampling sequence number of the process layer is not in the first preset numerical range, judging whether the difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration.
5. A dynamic data time stamp obtaining apparatus, comprising: the device comprises an acquisition module, a judgment module and a control module;
the acquisition module is used for acquiring time data of the process layer and the device;
the judging module is used for judging whether the time difference value between the first millisecond data of the device time data and the second millisecond data of the process layer time data is smaller than a preset duration;
the control module is used for inputting second bit data of the device time data and first millisecond bit data into a protocol structure of a dynamic data time scale when the time difference between the first millisecond bit and the second millisecond bit is smaller than a preset duration;
the control module is also used for correcting the second data when the time difference value is greater than or equal to the preset time length, and inputting the corrected second data and the first millisecond data into a protocol structure of a dynamic data time scale;
further comprises: the first power-on judging module comprises: a second judgment unit and a second control unit; the second judging unit is used for judging whether the device is electrified for the first time or not; the second control unit is used for acquiring device time data and inputting second bit data and first millisecond bit data into a protocol structure of a dynamic data time scale when the device is powered on for the first time; the second control unit is also used for acquiring time data of the process layer and the device when the device is not powered on for the first time;
further comprises: the step-out state judging module comprises: a third judgment unit and a third control unit; the third judging unit is used for judging whether the device is electrified for the first time or not; the third control unit is used for acquiring device time data for the primary power-on of the device and inputting second bit data and first millisecond bit data into a protocol structure of a dynamic data time scale; the third control unit is further used for acquiring time data of the process layer and the device when the device is not powered on for the first time;
further comprises: the SV sampling sequence number judging module comprises: the device comprises a second acquisition unit, a fourth judgment unit and a fourth control unit; the second acquisition unit is used for acquiring an SV sampling sequence number of the process layer; the fourth judging unit judges whether the SV sampling sequence number of the process layer is in a first preset numerical range or not; the fourth control unit is used for inputting second bit data and first millisecond bit data of the device time data into a protocol structure of a dynamic data time scale when the SV sampling sequence number of the process layer is in a first preset numerical range; the fourth control unit is further configured to determine whether a difference between the first millisecond data of the device time data and the second millisecond data of the process layer time data is less than a preset duration when the SV sampling sequence number of the process layer is not within a first preset numerical range.
6. An electronic device, comprising: at least one processor; and a memory coupled to the at least one processor; wherein the memory stores instructions executable by the one processor to cause the at least one processor to perform the dynamic data time stamp retrieval method of any of claims 1-4.
7. A computer readable storage medium having stored thereon computer instructions which, when executed by a processor, implement the dynamic data time stamp obtaining method of any of the preceding claims 1-4.
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