CN111679516A - Array substrate and liquid crystal display panel - Google Patents

Array substrate and liquid crystal display panel Download PDF

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Publication number
CN111679516A
CN111679516A CN202010506799.7A CN202010506799A CN111679516A CN 111679516 A CN111679516 A CN 111679516A CN 202010506799 A CN202010506799 A CN 202010506799A CN 111679516 A CN111679516 A CN 111679516A
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sub
pixel
electrode
main
area
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张翼鹤
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to CN202010506799.7A priority Critical patent/CN111679516A/en
Publication of CN111679516A publication Critical patent/CN111679516A/en
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/40Arrangements for improving the aperture ratio

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)

Abstract

The application provides an array substrate and a liquid crystal display panel, wherein the array substrate comprises a substrate, a thin film transistor layer positioned on the substrate, and a pixel electrode positioned on the thin film transistor layer; the array substrate comprises a plurality of sub-pixel areas, wherein each sub-pixel area comprises a main area and a sub-area; the pixel electrode is arranged corresponding to the main area and the sub area, and comprises a first main electrode and a first branch electrode corresponding to the main area, and comprises a second main electrode and a second branch electrode corresponding to the sub area; the first branch electrode is electrically connected with the first main electrode at a first preset angle, the second branch electrode is electrically connected with the second main electrode at a second preset angle, and the first preset angle is different from the second preset angle. The angle of the pixel electrode is controlled, so that the number of thin film transistors in the prior art is reduced, the aperture opening ratio and the transmittance of the pixel are increased, and the effect of wide viewing angle of the liquid crystal display panel is achieved.

Description

Array substrate and liquid crystal display panel
Technical Field
The application relates to the technical field of display, in particular to an array substrate and a liquid crystal display panel.
Background
The lcd panel generally includes a color filter substrate, a thin film transistor array substrate, and a liquid crystal layer disposed between the two substrates, and includes a Twisted Nematic (TN) mode, an Electronically Controlled Birefringence (ECB) mode, a Vertical Alignment (VA) mode, and the VA mode is a common display mode with advantages of high contrast, wide viewing angle, and no rubbing and alignment. However, since the VA mode employs vertically rotating liquid crystal, the difference of birefringence of liquid crystal molecules is large, which causes a problem of color shift (color shift) under a large viewing angle to be serious.
Currently, in order to improve the viewing angle performance of the panel, a PSVA pixel design of 3T-8domain (8-domain 3 transistor) is generally used, however, in the 3T-8domain (8-domain 3 transistor), a display panel of a VA pixel structure using 3 TFTs for driving is required, and although the viewing angle can be increased, the design may lose the aperture ratio, and at the same time, a backlight panel is required to provide higher brightness, thereby increasing the power consumption.
Disclosure of Invention
The application provides an array substrate and a display panel, which are used for increasing driving voltage in a pixel electrode sub-area and simultaneously increasing the pixel aperture opening ratio and the transmittance so as to achieve the effect of reducing the power consumption of the pixel electrode sub-area.
In order to realize the functions, the technical scheme provided by the application is as follows:
an array substrate comprises a substrate, a thin film transistor layer positioned on the substrate, and a pixel electrode positioned on the thin film transistor layer;
the array substrate comprises a plurality of sub-pixel regions, wherein each sub-pixel region comprises a main region and a sub-region;
the pixel electrodes are arranged corresponding to the main area and the sub area, and comprise a first main electrode and a first branch electrode corresponding to the main area, and comprise a second main electrode and a second branch electrode corresponding to the sub area;
the first branch electrode and the first main electrode are electrically connected at a first preset angle, the second branch electrode and the second main electrode are electrically connected at a second preset angle, and the first preset angle is different from the second preset angle.
In the array substrate of the present application, the second preset angle is smaller than the first preset angle.
In the array substrate of this application, every set up a thin film transistor in the sub-pixel district, thin film transistor is located the main district with between the subregion, thin film transistor's drain electrode is connected respectively the pixel electrode of main district and connection the pixel electrode of subregion.
In the array substrate of the present application, the first main electrode includes a first sub-main electrode and a second sub-main electrode that are vertically disposed; the two main electrodes comprise a third sub-main electrode and a fourth sub-main electrode which are vertically arranged;
the first sub-main electrode and the second sub-main electrode divide the main area into four liquid crystal alignment areas, and the third sub-main electrode and the fourth sub-main electrode divide the sub-area into four liquid crystal alignment areas.
In the array substrate of the present application, in two adjacent liquid crystal alignment regions in the main region, the tilt directions of the first branch electrodes are different; in two adjacent liquid crystal alignment regions in the sub-region, the tilt directions of the second branch electrodes are different.
In the array substrate, the first preset angles between the corresponding first branch electrodes and the first main electrode in the two adjacent sub-pixel regions are the same;
the second preset angle between the second branch electrode and the second main electrode corresponding to the two adjacent sub-pixel regions is different, or the second preset angle between the second branch electrode and the second main electrode corresponding to the two adjacent sub-pixel regions is the same.
In the array substrate of this application, correspond in two adjacent sub-pixel regions first branch electrode with between the first main electrode first predetermine the angle with second branch electrode with between the second main electrode the angle is predetermine to the second is inequality.
In the array substrate of the present application, the plurality of sub-pixel regions include a red sub-pixel region corresponding to a red sub-pixel, a green sub-pixel region corresponding to a green sub-pixel, and a blue sub-pixel region corresponding to a blue sub-pixel;
the first branch electrodes corresponding to the red sub-pixel area, the green sub-pixel area and the blue sub-pixel area respectively form the same first preset angle with the first main electrode;
a second preset angle formed by the second branch electrode and the second main electrode corresponding to each of the red sub-pixel area, the green sub-pixel area, and the blue sub-pixel area is different, or a second preset angle formed by the second branch electrode and the second main electrode corresponding to each of the red sub-pixel area, the green sub-pixel area, and the blue sub-pixel area is the same, which is not limited in this embodiment.
The application provides a liquid crystal display panel, which comprises any one of the array substrate and the color film substrate, an opposite substrate arranged opposite to the array substrate, and a liquid crystal layer positioned between the array substrate and the opposite substrate.
In the liquid crystal display panel of the application, the array substrate comprises a plurality of sub-pixel areas, and each sub-pixel area comprises a main area and a sub-area; the main area and the auxiliary area respectively correspond to four liquid crystal alignment areas; and the turning angles of the liquid crystal above the corresponding two adjacent liquid crystal alignment areas are different.
Has the advantages that: the pixel electrode structure has the advantages that the area of the pixel opening area is increased and the transmittance is increased by controlling the angle of the pixel electrode; the number of thin film transistors in the prior art is reduced, so that electric leakage in pixels disappears, a display panel can maintain a higher voltage value, and the brightness is increased; meanwhile, a direct current driving voltage is saved, and the energy consumption of the display panel can be effectively reduced; and the angles of the pixel electrodes in the adjacent sub-pixels are different, so that the liquid crystal display panel can achieve the effect of wide visual angle.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of an array substrate provided in the present application;
fig. 2 is a top view of a pixel region of an array substrate provided in the present application;
fig. 3 is a top view of a pixel region of an array substrate according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.
In the prior art, in order to improve the viewing angle performance of the panel, a PSVA pixel design of 3T-8domain (8-domain 3 transistor) is generally used, however, in the 3T-8domain (8-domain 3 transistor), a display panel of a VA pixel structure driven by 3 TFTs is required, although the viewing angle can be increased, the aperture ratio is lost, although the aperture ratio is improved, the defect of luminance loss is caused, and meanwhile, a backlight plate is required to provide higher luminance, thereby increasing the power consumption. Based on this, the application provides an array substrate and a liquid crystal display panel, can solve the defect of complaining.
Referring to fig. 1, a schematic structural diagram of an array substrate provided in the present application is shown.
The present application provides an array substrate 100, the array substrate 100 includes a substrate 110, a thin-film transistor layer 120 located on the substrate 110, and a pixel electrode layer 130 located on the thin-film transistor layer 120.
Referring to fig. 2, a top view of a pixel region of an array substrate provided in the present application is shown.
In the present application, the array substrate 100 includes a plurality of sub-pixel regions 140, and each sub-pixel region 140 includes a main region 1401 and a sub-region 1402.
In the present application, the pixel electrode 130 is disposed corresponding to the main region 1401 and the sub region 1402, and the area of the main region 1401 is smaller than the area of the sub region 1402.
In the present application, one thin film transistor 120 is disposed in each of the sub-pixel regions 140, the thin film transistor 120 is located between the main region 1401 and the sub-region 1402, and the drains of the thin film transistors 120 are respectively connected to the pixel electrode 130 of the main region 1401 and the pixel electrode 130 of the sub-region 1402.
In this application, the pixel electrode 130 includes a first trunk electrode 131 and a first branch electrode 132 corresponding to the main region 1401, and includes a second trunk electrode 133 and a second branch electrode 134 corresponding to the sub region 1402.
In the present application, the first trunk electrode 131 includes a first sub-trunk electrode 1311 and a second sub-trunk electrode 1312 that are vertically disposed; the two main electrodes 133 include a third sub-main electrode 1331 and a fourth sub-main electrode 1332 that are vertically disposed.
In the present application, the first sub trunk electrode 1311 and the second sub trunk electrode 1312 are located in a middle region of the main region 1401; the third sub-trunk electrode 1331 and the fourth sub-trunk electrode 1332 are located in a middle region of the sub-region 1402.
The first sub-trunk electrode 1311 and the second sub-trunk electrode 1312 divide the main region 1401 into four liquid crystal alignment regions, and the third sub-trunk electrode 1331 and the fourth sub-trunk electrode 1332 divide the sub-region 1402 into four liquid crystal alignment regions.
In the present application, the two first branch electrodes 132 in any one of the liquid crystal alignment regions in the main region 1401 are parallel to each other; the two second branch electrodes 134 in any one of the liquid crystal alignment regions in the sub-region 1402 are parallel to each other.
In the present application, in two adjacent liquid crystal alignment regions in the main region 1401, the tilt directions of the first branch electrodes 132 are different; in two adjacent liquid crystal alignment regions in the sub-region 1402, the tilt directions of the second branch electrodes 134 are different.
In the present application, the first branch electrode 132 is electrically connected to the first sub-trunk electrode 1311 or the second sub-trunk electrode 1312 at a first preset angle α, the second branch electrode 134 is electrically connected to the third sub-trunk electrode 1331 or the fourth sub-trunk electrode 1332 at a second preset angle β, and the first preset angle α is different from the second preset angle β.
In the present application, the first preset angle α between the first branch electrode 132 and the first main electrode 131 in two adjacent sub-pixel regions 130 is the same.
The second preset angle β between the second branch electrode 134 and the second main electrode 133 corresponding to each of the two adjacent sub-pixel regions 130 is different, or the second preset angle β between the second branch electrode 134 and the second main electrode 133 corresponding to each of the two adjacent sub-pixel regions 130 is the same, which is not limited in this application.
In the present application, the first preset angle α between the first branch electrode 132 and the first main electrode 131 and the second preset angle β between the second branch electrode 134 and the second main electrode 133 in two adjacent sub-pixel regions 130 are different.
In the present application, the first branch electrode 132 is electrically connected to the first main electrode 131 at a first preset angle α, the second branch electrode 134 is electrically connected to the second main electrode 133 at a second preset angle β, and the first preset angle α is different from the second preset angle β, so that the liquid crystal display panel achieves a wide viewing angle effect; meanwhile, the pixel electrode 130 of the main area 1401 and the pixel electrode 130 of the auxiliary area 1402 are driven by one thin film transistor 120, so that the number of the thin film transistors 120 in the prior art is reduced, and the pixel aperture ratio and the transmittance are increased; and because the thin film transistor 120 which originally divides the voltage of the sub-area 1402 of the pixel electrode 130 is reduced, a direct current driving voltage is saved, thereby effectively reducing the energy consumption of the liquid crystal display panel.
The technical solution of the present application will now be described with reference to specific embodiments.
Referring to fig. 3, a top view of a pixel area of an array substrate according to an embodiment of the present disclosure is provided.
In this embodiment, the plurality of sub-pixel regions 130 include a red sub-pixel region 1301 corresponding to a red sub-pixel, a green sub-pixel region 1302 corresponding to a green sub-pixel, and a blue sub-pixel region 1303 corresponding to a blue sub-pixel.
In this embodiment, the first branch electrodes 132 corresponding to the red sub-pixel region 1301, the green sub-pixel region 1302, and the blue sub-pixel region 1303 respectively have the same first preset angle α with the first main electrode 131.
The second preset angles β between the second branch electrodes 134 and the second main electrodes 133 corresponding to the red sub-pixel region 1301, the green sub-pixel region 1302, and the blue sub-pixel region 1303 are different, or the second preset angles β between the second branch electrodes 134 and the second main electrodes 133 corresponding to the red sub-pixel region 1301, the green sub-pixel region 1302, and the blue sub-pixel region 1303 are the same, which is not limited in this embodiment.
Further, in this embodiment, the second preset angle β is smaller than the first preset angle α.
In this embodiment, the first preset angle α is 10 ° to 45 °, and the second preset angle β is 5 ° to 15 °.
Further, the first preset angle α is 45 °, and the second preset angle β is 30 °.
It should be noted that, in the present embodiment, the first preset angle α is 45 ° and the second preset angle β is 30 ° for illustration only, and the present invention is not limited thereto.
In this embodiment, the second preset angle β between the second branch electrode 134 and the second main electrode 133 corresponding to two adjacent sub-pixel regions 130 is different, so as to compensate the viewing angle of the sub-region 1402 in the sub-pixel region 130, thereby achieving the effect of wide viewing angle of the liquid crystal display panel; and the number of the thin film transistors in the prior art is reduced, so that the aperture opening ratio and the transmittance of the pixel are increased, and the energy consumption of the display panel is effectively reduced.
The application provides a liquid crystal display panel, the liquid crystal display panel includes embodiment one the array substrate 100, with the opposite direction base plate that array substrate 100 set up relatively and be located the array substrate with the liquid crystal layer between the opposite direction base plate.
In the present application, the array substrate 100 includes a plurality of sub-pixel regions 130, each sub-pixel region 130 including a main region 1401 and a sub-region 1402; the main region 1401 and the sub region 1402 each correspond to four liquid crystal alignment regions.
The liquid crystal display panel has the advantages that the liquid crystal above the corresponding adjacent two liquid crystal alignment areas has different steering angles, so that the effect of wide visual angle of the liquid crystal display panel is achieved.
The application provides an array substrate and a liquid crystal display panel, wherein the array substrate comprises a substrate, a thin film transistor layer positioned on the substrate, and a pixel electrode positioned on the thin film transistor layer; the array substrate comprises a plurality of sub-pixel areas, wherein each sub-pixel area comprises a main area and a sub-area; the pixel electrode is arranged corresponding to the main area and the sub area, and comprises a first main electrode and a first branch electrode corresponding to the main area, and comprises a second main electrode and a second branch electrode corresponding to the sub area; the first branch electrode is electrically connected with the first main electrode at a first preset angle, the second branch electrode is electrically connected with the second main electrode at a second preset angle, and the first preset angle is different from the second preset angle.
The first preset angle between the first branch electrode and the first main electrode corresponding to the two adjacent sub-pixel areas is the same, the second preset angle between the second branch electrode and the second main electrode corresponding to the two adjacent sub-pixel areas is different, and the first preset angle and the second preset angle are different, so that the wide-view-angle effect of the liquid crystal display panel is realized; meanwhile, the pixel electrode corresponding to the main area and the pixel electrode corresponding to the sub-area in the sub-pixel area are driven by one thin film transistor, so that the number of thin film transistors in the prior art is reduced, and the aperture ratio and the transmittance of pixels are increased; and because the thin film transistor which originally divides the voltage for the sub-area in the sub-pixel area is reduced, a direct current driving voltage is saved, and the energy consumption of the liquid crystal display panel is effectively reduced.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The array substrate and the liquid crystal display panel provided by the embodiment of the present application are described in detail above, and the principle and the implementation manner of the present application are explained in the present application by applying specific examples, and the description of the above embodiments is only used to help understanding the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.

Claims (10)

1. The array substrate is characterized by comprising a substrate, a thin film transistor layer positioned on the substrate, and a pixel electrode positioned on the thin film transistor layer;
the array substrate comprises a plurality of sub-pixel regions, wherein each sub-pixel region comprises a main region and a sub-region;
the pixel electrodes are arranged corresponding to the main area and the sub area, and comprise a first main electrode and a first branch electrode corresponding to the main area, and comprise a second main electrode and a second branch electrode corresponding to the sub area;
the first branch electrode and the first main electrode are electrically connected at a first preset angle, the second branch electrode and the second main electrode are electrically connected at a second preset angle, and the first preset angle is different from the second preset angle.
2. The array substrate of claim 1, wherein the second predetermined angle is smaller than the first predetermined angle.
3. The array substrate of claim 1, wherein a thin film transistor is disposed in each of the sub-pixel regions, the thin film transistor being located between the main region and the sub-region, and a drain of the thin film transistor being connected to a pixel electrode of the main region and a pixel electrode of the sub-region, respectively.
4. The array substrate of claim 1, wherein the first trunk electrode comprises a first sub-trunk electrode and a second sub-trunk electrode arranged vertically; the two main electrodes comprise a third sub-main electrode and a fourth sub-main electrode which are vertically arranged;
the first sub-main electrode and the second sub-main electrode divide the main area into four liquid crystal alignment areas, and the third sub-main electrode and the fourth sub-main electrode divide the sub-area into four liquid crystal alignment areas.
5. The array substrate of claim 4, wherein the tilt directions of the first branch electrodes are different in two adjacent liquid crystal alignment regions in the main region; in two adjacent liquid crystal alignment regions in the sub-region, the tilt directions of the second branch electrodes are different.
6. The array substrate of claim 1, wherein the first predetermined angles between the first branch electrodes and the first main electrode in two adjacent sub-pixel regions are the same;
the second preset angle between the second branch electrode and the second main electrode corresponding to the two adjacent sub-pixel regions is different, or the second preset angle between the second branch electrode and the second main electrode corresponding to the two adjacent sub-pixel regions is the same.
7. The array substrate of claim 6, wherein the first predetermined angle between the first branch electrode and the first main electrode in two adjacent sub-pixel regions is different from the second predetermined angle between the second branch electrode and the second main electrode.
8. The array substrate of claim 1, wherein the plurality of sub-pixel regions comprises a red sub-pixel region corresponding to a red sub-pixel, a green sub-pixel region corresponding to a green sub-pixel, and a blue sub-pixel region corresponding to a blue sub-pixel;
the first branch electrodes corresponding to the red sub-pixel area, the green sub-pixel area and the blue sub-pixel area respectively form the same first preset angle with the first main electrode;
the second preset angles of the second branch electrodes and the second main electrode corresponding to the red sub-pixel area, the green sub-pixel area and the blue sub-pixel area are different, or the second preset angles of the second branch electrodes and the second main electrode corresponding to the red sub-pixel area, the green sub-pixel area and the blue sub-pixel area are the same.
9. A liquid crystal display panel, wherein the liquid crystal display comprises the array substrate according to any one of claims 1 to 8, a counter substrate disposed opposite to the array substrate, and a liquid crystal layer disposed between the array substrate and the counter substrate.
10. The liquid crystal display panel of claim 9, wherein the array substrate includes a plurality of sub-pixel regions, each of the sub-pixel regions including a main region and a sub-region; the main area and the auxiliary area respectively correspond to four liquid crystal alignment areas; and the turning angles of the liquid crystal above the corresponding two adjacent liquid crystal alignment areas are different.
CN202010506799.7A 2020-06-05 2020-06-05 Array substrate and liquid crystal display panel Pending CN111679516A (en)

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Cited By (4)

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Publication number Priority date Publication date Assignee Title
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Application publication date: 20200918