CN1116787A - Multibit decade-BCD code quick conversion circuit - Google Patents
Multibit decade-BCD code quick conversion circuit Download PDFInfo
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- CN1116787A CN1116787A CN 94107447 CN94107447A CN1116787A CN 1116787 A CN1116787 A CN 1116787A CN 94107447 CN94107447 CN 94107447 CN 94107447 A CN94107447 A CN 94107447A CN 1116787 A CN1116787 A CN 1116787A
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- circuit
- latch
- door
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Abstract
The fast transform circuit for multi-digit decadal BCD codes is composed of a latch involving more parallel latch circuits for latching and outputting multiple groups of BCD codes from decoder and a timing controller between decoder and latch for strobing the latch circuits sequentially from high to low digits by generating step strobe pulses according to order of BCD code groups from decoder.
Description
The present invention relates to the fast switching circuit that a kind of multidigit decimal number becomes binary-coded decimal.
The device that can finish the conversion of the decimal system-binary-coded decimal at present has two classes, and a class is a toggle switch, and the conversion by mechanical contacts becomes decimal number into binary-coded decimal.Another kind of is integrated circuit, for example external product XX147 or home products C304, and this circuit can only be exported corresponding to decimal numeral one group of binary-coded decimal, and does not have latch function.If input N position decimal number just needs N integrated circuit and joins N keyboard.Usually will pass through unwanted pilot process when using toggle switch, for example become to 5 at 9 o'clock, just dialling need be through 6,7,8, and backwash need be through 4,3,2,1,0, and this is unallowed to some special application scenarios.
The purpose of this invention is to provide a kind of multidigit decimal that can realize and count to the fast switching circuit of binary-coded decimal conversion, only finish the conversion of any digit word, and needn't pass through sandwich digit, can be directly changed into binary-coded decimal to the numeral of desire input with a keyboard.The present invention not only can replace XX147, C304 and various toggle switch, and purposes is widely arranged.
Technical scheme of the present invention is: a kind of multidigit decimal-binary-coded decimal fast switching circuit, comprise a decimal system-BCD decoder 2, it becomes the decimal number that keyboard 1 sends into binary-coded decimal, it is characterized in that the latch of forming by a plurality of latch cicuits arranged side by side by, can latch and export the binary-coded decimal that many groups send from decoder 4; A sequential control circuit 3 is arranged between decoder 2 and latch 4, and the order of every group of binary-coded decimal that it sends according to decoder 2 sends the stepping strobe pulse to latch 4, and big-endian is the latch cicuit in the gating latch successively; The twitter circuit 6 that disappears is arranged between decoder 2 and sequential control circuit 3, that its receiver decoder sends, with every group of clock signal that binary-coded decimal is synchronous, tremble shaping through disappearing after input timing control circuit 3 carry out the stepping gating; One two input and door 8 are arranged between each latch cicuit in sequential control circuit 3 and latch 4, the gating output of sequential control circuit 3 is connected with each input with door 8 respectively, is connected with the CP end of each latch cicuit in the latch with the output of door 8; A differential circuit 7 is arranged, and its input is connected with the output of the twitter circuit 6 that disappears, its output with above-mentioned each be connected with door another input of 8; A clear circuit 5 is arranged, and it sends quenching pulse according to the clear command of keyboard 1 to sequential control circuit 3 and latch 4.
Referring to Fig. 1, the corresponding binary-coded decimal of ten's digit output that decoder 2 keypads 1 provide, the corresponding ten's digit of four binary-coded decimals of each group, these binary-coded decimals are delivered to the input of each latch cicuit in the latch 4 and are prepared to latch output; When sending every group of binary-coded decimal, decoder send the signal of the ten's digit place order of precedence that a sign is converted to sequential control circuit 3, make sequential control circuit produce latch cicuit of a step-by-step impulse gating, it is just corresponding to the order of precedence at this ten's digit place, so this latch cicuit latchs output with the binary-coded decimal of its input, other latch cicuits are constant because of not maintained the original state by gating.Like this along with keyboard big-endian input ten's digit, the latch cicuit in the latch also big-endian is latched output by gating one by one by group with corresponding binary-coded decimal.As long as the step-by-step impulse figure place of expansion sequential control circuit and increases corresponding latch cicuit, that just can realize a ten's digit arbitrarily parallelly latchs output.In order to eliminate misoperation because of the shake generation of key switch, guarantee that sequential control circuit correctly exports and actuation of keys strobe pulse one to one, the twitter circuit 6 that disappears is arranged between decoder and sequential control circuit, that its receiver decoder sends, with every group of clock signal that binary-coded decimal is synchronous, tremble shaping through disappearing after the input timing control circuit carry out the stepping gating; One two input and door 8 are arranged between each latch cicuit in sequential control circuit 3 and latch 4, the gating output of sequential control circuit is connected with each input with door 8 respectively, is connected with the CP end of each latch cicuit in the latch 4 with the output of door 8; Also have a differential circuit 7, its input is connected with the output of the twitter circuit 6 that disappears, its output with above-mentioned each be connected with another input of 8.The input that the binary-coded decimal of decoder output is at this moment still delivered to each latch cicuit is carried out and is latched preparation, the order of precedence signal of decoder output disappears through the twitter circuit that disappears and is divided into two-way after trembling shaping, one the tunnel send sequential control circuit to produce strobe pulse enters a input with door 8, another road enters another input with door 8 behind the differential circuit differential, latch output by finishing with the output signal triggering latch cicuit upset of door 8.
Advantage of the present invention is: can realize of the quick conversion of multidigit decimal numeral to binary-coded decimal, and more convenient than using toggle switch, and needn't can directly import any numeral through pilot process.Compare with a decimal system-binary-coded decimal converter ic, function strengthens greatly, only can finish the input of any digit word with a keyboard.
Description of drawings.Fig. 1 is the functional-block diagram of technical solution of the present invention.Fig. 2 is a kind of electrical schematic diagram that can change the embodiment of the invention of nine decimal system-binary-coded decimals.Fig. 3 and Fig. 4 are the schematic diagrams of forming sequential control circuit with d type flip flop.Fig. 5 is a schematic diagram of forming sequential control circuit with shift register.Fig. 6 is a schematic diagram of expanding decimal numeral figure place by 4017 cascade.
Further specify content of the present invention below in conjunction with the embodiment in the accompanying drawing.Referring to one embodiment of the present of invention shown in Figure 2, wherein 1 is and the matching used keyboard of the present invention, and it should have 0～9 10 numeric keys and a reset key.The 2nd, decoder, formations such as its available matrix circuit, gate circuit.Adopt better simply matrix circuit herein.Its effect is to convert ten's digit 0～9 to corresponding binary-coded decimal and produce the required sequential triggering signal of time schedule controller.By D
16～D
25Ten diodes are formed or door provides the sequential triggering signal.R
5～R
9Be output resistance.The 3rd, sequential control circuit, what adopt is decade counter/pulsqe distributor 4017 herein.Also can use C187 or other homogeneous circuits, perhaps form sequential control circuit with various shift registers, ring counter.The 4th, latch, it is made up of a plurality of latch cicuits arranged side by side, and each latch cicuit latchs integrated circuit 4042 by a slice four D and a slice four is formed four input D of integrated circuit 4042 with door integrated circuit 4081
1～D
4Is connected with four of integrated circuit 4081 outputs with door respectively, these four have two inputs respectively with door, one of them with sequential control circuit in corresponding gating output connection, another is connected respectively with four outputs of decoder.An adding four and a door integrated circuit 4081, make the input that under the control of sequential control circuit gating output, just can be added to corresponding latch cicuit from the next binary-coded decimal of decoder, promptly have only the binary-coded decimal that just can be received decoder output by the input of that latch cicuit of gating, this has just further guaranteed the accuracy of data.The device that can be used for latch cicuit is quite a lot of.The sequential control circuit of present embodiment allows in the latch nine latch cicuits to be arranged at most, so present embodiment can be finished one group nine or be less than the conversion of nine ten's digit.Nine bit digital can satisfy use generally speaking.Being higher than at needs under nine the situation to utilize the cascade technology to expand the figure place of conversion to any positive integer.
Key switch might produce jitter phenomenon under many circumstances, and it may influence the operate as normal of circuit.In order to eliminate the influence of the shake of switch when being switched on or switched off, add anti-jitter circuits 6 and differential circuit 7 to circuit.Disappear twitter circuit by R
1, C
1RC delay circuit of forming and the shaping circuit of being made up of gate circuit 4081 are composed in series; Differential circuit is by being parallel with diode D
35Resistance R
2And capacitor C
3The series loop that constitutes is formed.The time constant of differential circuit can be got 10～30 milliseconds, usually about 20 milliseconds.Be subjected to the control of sequential control circuit 3 and differential circuit 7 to the CP of latch cicuit end output triggering signal with door 8.The 5th, clear circuit, the clear terminal of the direct control timing control circuit of reset key R, and by isolating diode D
26～D
34Receive the CP end (CP of nine latch cicuits respectively
1～CP
9).The effect of clear circuit is to make sequential control circuit get back to initial state, and to make the output of latch all be zero, for new set of number input is prepared.If the figure place of the numeral of each input is a determined value, can add suitable feedback at sequential control circuit, make entire circuit after every group of numeral is totally lost, automatically restore to initial condition, thereby save special clear circuit.
Because there is the signal warfare in the delay of various transmission gates in the circuit, influence the reliability of data output, for this reason and door 8 and latch cicuit between elimination contention circuit 9 is arranged, it is by diode D
36, capacitor C
4And resistance R
10Constitute, the positive pole of diode connects the output with door 8, and its negative pole connects the CP end of latch cicuit, capacitor C
4And resistance R
10Be connected on diode D after the parallel connection
36Between negative pole and the ground.
Except 4017, can constitute sequential control circuit with additive method, Fig. 3 is a kind of schematic diagram with the sequential control circuit of d type flip flop formation.Q with nine d type flip flops
1, Q
2Q
8Respectively with D
2, D
3D
9Link to each other and and Q
2, Q
3Q
9With, can obtain eight sequencing control pulse A, B ... H.Fig. 4 is another kind of method, only draws for simplicity's sake to produce the circuit of four sequencing control pulses.Q with d type flip flop
1, Q
2, Q
3Respectively with D
2, D
3, D
4Link to each other and be connected with three inputs of a NOR gate respectively, the output of NOR gate meets D
1, Q among the figure
1, Q
2, Q
3, Q
4Be sequencing control pulse output.If need n sequencing control pulse, if n d type flip flop, and it is individual that the NOR gate input is expanded to n.Fig. 5 is the sequential control circuit that constitutes with shift register.The 4 bit timing control circuits that only draw and constitute as example with half CC4015 (two 4 bit strings go into-and go out shift register).Meet Q respectively with four inputs of door
1, Q
2, Q
3, Q
4, its output termination D is from Q
1～Q
4The output timing control impuls.
When the ten's digit of needs inputs greater than 9 the time, can meet the demands by 4017 cascade.Fig. 6 is a kind of principle of cascade.The figure place n of the ten's digit of input this moment is smaller or equal to 22.
Operation principle of the present invention is as follows: when on external connection keyboard, pressing certain numerical key, the binary-coded decimal of decoder output respective digital and be sent to each latch cicuit before with door in an input, decoder is also via D simultaneously
16～D
25Form or door is exported a high level pulse, and it is through R
1, C
1Behind the integrator of forming and gate circuit shaping, be sent to the CP end of sequential control circuit 4017 on the one hand, enter by C on the other hand
3, R
2, D
35The differential circuit of being formed.4017 Q holds (Q simultaneously
1～Q
9) along with the input of numeral on the keyboard presents high level successively, it delivers to before the corresponding latch cicuit and another input door on the one hand, make the binary-coded decimal of decoder output be sent to the input of corresponding latch cicuit, on the other hand it also with the output of differential circuit together as controlling the triggering of corresponding latch cicuit with the input signal of door 8.When the output voltage of differential circuit is reduced to the off level of gate circuit, just export a negative step with door 8, under this trailing edge effect, latch cicuit is with the binary-coded decimal value output latch of input.When pressing reset key, make 4017 to return to initial state, Q immediately
1～Q
9Be low level, making the input of each latch cicuit is 0000 all, passes through by R simultaneously
3, R
4And D
26～D
34The clear circuit of forming produces and latchs triggering signal, triggers binary-coded decimal 0000 output latch of each latch cicuit with input simultaneously.
Claims (8)
1, a kind of multidigit decimal-binary-coded decimal fast switching circuit comprises a decimal system-BCD decoder (2), and it becomes the decimal number that keyboard (1) sends into binary-coded decimal, it is characterized in that,
(1), the latch of forming by a plurality of latch cicuits arranged side by side by, can latch and export the binary-coded decimal that many groups send from decoder (4);
(2), between decoder (2) and latch (4), a sequential control circuit (3) is arranged, the order of every group of binary-coded decimal that it sends according to decoder (2), send the stepping strobe pulse to latch (4), big-endian is the latch cicuit in the gating latch successively;
(3), between decoder (2) and sequential control circuit (3), the twitter circuit that disappears (6) is arranged, that its receiver decoder sends, with every group of clock signal that binary-coded decimal is synchronous, tremble shaping through disappearing after input timing control circuit (3) carry out the stepping gating; One two input and door (8) are arranged between each latch cicuit in sequential control circuit (3) and latch (4), the gating output of sequential control circuit (3) is connected with each input with door (8) respectively, is connected with the CP end of each latch cicuit in the latch with the output of door (8);
(4), a differential circuit (7) is arranged, its input is connected with the output of the twitter circuit that disappears (6), its output with above-mentioned each with the door (8) another input be connected;
(5), a clear circuit (5) is arranged, it sends quenching pulse according to the clear command of keyboard (1) to sequential control circuit (3) and latch (4).
2, change-over circuit according to claim 1, it is characterized in that, said latch (4) is made up of a plurality of latch cicuits arranged side by side, each latch cicuit latchs integrated circuit 4042 by a slice four D and a slice four is formed with door integrated circuit 4081, four input D1～D4 of integrated circuit 4042 are connected with four outputs with door of integrated circuit 4081 respectively, these four have two inputs respectively with door, one of them connects with the middle corresponding gating output of sequential control circuit (3), and another is connected respectively with four outputs of decoder (2).
3, change-over circuit according to claim 1 and 2 is characterized in that, the said twitter circuit that disappears (6) is composed in series by RC delay circuit and shaping circuit; Said differential circuit (7) is by the resistance R that is parallel with diode
2And capacitor C
3The series loop that constitutes is formed.
4, change-over circuit according to claim 1 and 2 is characterized in that, said sequential control circuit (3) is made up of decade counter 4017.
5, change-over circuit according to claim 3 is characterized in that, said sequential control circuit (3) is made up of decade counter 4017.
6, change-over circuit according to claim 3 is characterized in that, and door (8) and latch cicuit between elimination contention circuit (9) is arranged, it is by diode D
36, capacitor C
4And resistance R
10Constitute, the positive pole of diode connects the output with door (8), and its negative pole connects the CP end of latch cicuit, capacitor C
4And resistance R
10Be connected on diode D after the parallel connection
36Between negative pole and the ground.
7, change-over circuit according to claim 4 is characterized in that, and door (8) and latch cicuit between elimination contention circuit (9) is arranged, it is by diode D
36, capacitor C
4And resistance R
10Constitute, the positive pole of diode connects the output with door (8), and its negative pole connects the CP end of latch cicuit, capacitor C
4And resistance R
10Be connected on diode D after the parallel connection
36Between negative pole and the ground.
8, change-over circuit according to claim 5 is characterized in that, and door (8) and latch cicuit between elimination contention circuit (9) is arranged, it is by diode D
36, capacitor C
4And resistance R
10Constitute, the positive pole of diode connects the output with door (8), and its negative pole connects the CP end of latch cicuit, capacitor C
4And resistance R
10Be connected on diode D after the parallel connection
36Between negative pole and the ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN94107447A CN1034383C (en) | 1994-07-22 | 1994-07-22 | Multibit decade-BCD code quick conversion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN94107447A CN1034383C (en) | 1994-07-22 | 1994-07-22 | Multibit decade-BCD code quick conversion circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1116787A true CN1116787A (en) | 1996-02-14 |
| CN1034383C CN1034383C (en) | 1997-03-26 |
Family
ID=5033054
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN94107447A Expired - Fee Related CN1034383C (en) | 1994-07-22 | 1994-07-22 | Multibit decade-BCD code quick conversion circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1034383C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1945981B (en) * | 2005-09-15 | 2012-06-27 | 国际商业机器公司 | System and method for converting from decimal floating point into scaled binary coded decimal |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0644714B2 (en) * | 1985-02-16 | 1994-06-08 | ソニー株式会社 | Code conversion device |
| US4792793A (en) * | 1987-05-28 | 1988-12-20 | Amdahl Corporation | Converting numbers between binary and another base |
-
1994
- 1994-07-22 CN CN94107447A patent/CN1034383C/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1945981B (en) * | 2005-09-15 | 2012-06-27 | 国际商业机器公司 | System and method for converting from decimal floating point into scaled binary coded decimal |
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| Publication number | Publication date |
|---|---|
| CN1034383C (en) | 1997-03-26 |
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