CN111669200A

CN111669200A - CSS transmitter design method based on low-complexity chrip signal generator

Info

Publication number: CN111669200A
Application number: CN202010401709.8A
Authority: CN
Inventors: 谭洪舟; 贺宇翔; 陆许明; 徐永键
Original assignee: SYSU HUADU INDUSTRIAL SCIENCE AND TECHNOLOGY INSTITUTE; National Sun Yat Sen University
Current assignee: SYSU HUADU INDUSTRIAL SCIENCE AND TECHNOLOGY INSTITUTE; Sun Yat Sen University; National Sun Yat Sen University
Priority date: 2020-05-13
Filing date: 2020-05-13
Publication date: 2020-09-15

Abstract

According to the CSS transmitter design method based on the low-complexity Chirp signal generator, the Chirp signal generator is designed, the bandwidth, the spreading factor, the center frequency and the direction of the Chirp signal can be freely set according to the adjusting control signal, and the flexibility of the signal generator is improved; on the basis, the Chirp spread spectrum signal is directly modulated to the passband under very low complexity, and the complexity of a signal generator for generating different frequency bands is effectively reduced.

Description

CSS transmitter design method based on low-complexity chrip signal generator

Technical Field

The invention relates to the technical field of Spread spectrum communication and short-distance wireless communication, in particular to a CSS (chip Spread spectrum) transmitter design method based on a low-complexity chip signal generator.

Background

Most of Chirp signal generators researched at home and abroad are applied to a Chirp ultra-wideband radar system, and the communication field is mainly applied to the fields of indoor wireless positioning and the like. At present, the development of the internet of things technology is very popular, the short-distance wireless communication technology is applied to the internet of things, and the gap of the application of the Chirp spread spectrum technology with low complexity in the field of low-power-consumption internet of things communication technology is filled.

The Chirp signal, also called Chirp signal, sweeps across the frequency at a fast rate, and the duration of the signal varies continuously and linearly, so that the frequency spectrum of the signal occupies a certain bandwidth. When the sweep frequency bandwidth is B and the sweep frequency time is T, the basic signal time domain expression is as follows:

wherein

f₀At the center frequency, a (t) is the chirp envelope.

Phase of Chirp signal

Instantaneous frequency f (t) ═ f₀+ μ t, the instantaneous frequency f (t) varies linearly with time t, the slope of the variation being controlled by the sweep rate μ. μ represents the rate of the Chirp signal, i.e. also the speed of the Chirp signal sweep over time. Can be expressed as:

the positive and negative of μ represent the direction of the frequency sweep of the Chirp signal.

As shown in fig. 1, when the "+" sign is taken, it indicates that the instantaneous frequency of the Chirp signal increases with time, and is an Up-swept Chirp signal (Up-Chirp);

as shown in fig. 2, when the "-" sign is taken, it indicates that the instantaneous frequency of the Chirp signal decreases with time, and is a Down-swept Chirp signal (Down-Chirp).

The frequency sweep rate, bandwidth and time width of the upper frequency sweep Chirp signal and the lower frequency sweep Chirp signal are all the same.

The time bandwidth product TB of the Chirp signal is abbreviated as TB product, which is an important standard for measuring the Chirp signal, and the modulation order of Chirp spread spectrum is M × 2^SFSF (Spreading Factor) is the Spreading Factor, where M denotes the number of bits carrying the Spreading Factor per CSS symbol. At baseband, each CSS symbol contains M complex samples that are transmitted at a rate equal to the signal bandwidth B.

The conventional Chirp signal is generated by two methods: analog and digital methods, wherein the analog generation method of the Chirp signal can be further divided into an active method and a passive method. The active method, as shown in fig. 3, controls a Voltage Controlled Oscillator (VCO) to generate a Chirp signal by using an analog signal (such as a triangular wave, a sawtooth wave, etc.) with a certain rate. The passive method mainly adopts a Surface Acoustic Wave (SAW) filter to generate a Chirp signal, and can generate a Chirp signal with high frequency and high bandwidth.

The analog active method is easy to realize, simple in structure and high in flexibility, helps low interception in a RADAR system, and is widely applied to RADAR (RADAR) systems, but the pulse initial oscillation generated by the method is irrelevant to new phases and is not suitable for designing digital baseband systems.

The passive method mainly adopts a Surface Acoustic Wave (SAW) filter to generate a Chirp signal. The method can generate a Chirp signal with high frequency and high bandwidth, and is widely applied to a modern indoor positioning Chirp spread spectrum communication system. However, the frequency and the bandwidth of the generated Chirp signal are fixed and unchangeable, which is common in the Chirp spread spectrum communication technology, but once the SAW device is produced and shaped, the frequency sweep starting frequency and the frequency sweep time width are determined, so that the Chirp system adopting the SAW device cannot be changed, and the flexibility is poor, and the SAW device has high manufacturing process requirement precision and harsh conditions, so the cost is high, and the price is high.

The digital generation method of the Chrip signal mainly adopts a Direct Digital Synthesis (DDS) technology to generate a Chirp signal. The digital method can generate a Chirp signal with large time width, large bandwidth and high stability, and the signal generated by the DSS technology has the characteristics of high frequency resolution and short frequency conversion time.

Most of the methods for generating Chirp signals by the currently common digital generation method are Look-up table (Look-up LUT) methods as shown in fig. 4. Storing phase sampling points of chirp signals with different specifications in a lookup table, and then outputting the chirp signals. However, the traditional DDS implementation method needs to occupy more memory cells, and high-precision multiplication needs to take more operation time, and particularly when the system needs a larger spreading factor, the complexity of the Chirp signal generator designed by the LUT method will be significantly increased, and the method is not suitable for the requirements of low power consumption and low cost communication system design.

Spreading Factor (SF) and chirp Bandwidth (BW) in the chip signal are very important adjustable parameters. The larger the Spreading Factor (SF) parameter is, the more the coverage area of Chirp spread spectrum communication can be obviously expanded, but the complexity of the communication system can also rise along with the increase of the size of the spreading factor; the larger the Bandwidth (BW) parameter is, the faster the signal transmission speed is, and the stronger the narrow-band interference resistance is.

The Chirp spread spectrum communication system can balance the relationship among the effectiveness, the reliability and the low cost of the communication system, the Chirp signal generator with low complexity is the key of the Chirp spread spectrum communication system with low power consumption and low cost, and the flexibility of the traditional Chirp signal generator is positively correlated with the consumption of hardware resources. The more flexible the signal generator is, the more complex the design of the signal generator is, the more hardware resources are consumed, which in turn leads to the larger the power consumption of the communication system and the higher the production cost.

Disclosure of Invention

The invention provides a CSS transmitter design method based on a low-complexity chrip signal generator, aiming at overcoming the technical defects that the more flexible the signal generator is, the more complex the design is, the more consumed hardware resources are, the higher the power consumption of a communication system is and the higher the production cost is as the flexibility of the traditional Chirp signal generator is positive correlation with the consumption of hardware resources is, and the like.

In order to solve the technical problems, the technical scheme of the invention is as follows:

the CSS transmitter design method based on the low-complexity chip signal generator comprises the following steps:

s1: constructing a Chirp signal generator;

s2: generating an adjustable Chirp combined signal through a control unit CU, and using the adjustable Chirp combined signal as the input of a Chirp signal generator;

s3: a Chirp signal generator generates in-phase y [ n ] real and orthogonal y [ n ] image according to a Chirp combined signal, and combines the signals together through an adder to generate a Chirp signal with required specification;

s4: shaping and filtering the Chirp signal through a pulse shaping filter, and reducing out-of-band leakage of frequency spectrum components of the Chirp spread spectrum signal;

s5: the Chirp signal after shaping and filtering is up-converted to a passband by adopting a quadrature modulator, then an input Chirp signal sampling point is converted into an analog signal by a pair of DACs, and the signal is transmitted by a power amplifier.

In step S1, the Chirp signal generator includes a frequency accumulator, a frequency modulation module, a phase accumulator and a vector rotator; wherein:

the frequency accumulator generates a frequency ramp function by repeatedly accumulating the frequency input step word freq _ step;

the frequency modulation module is used for modulating the frequency ramp function to obtain a frequency sampling value;

the frequency sampling value is used as the input of a phase accumulator, and the phase sampling point of the Chrip signal is generated through accumulation;

the phase sampling points are input into a vector rotator, the phase of the Chrip signal is rotated by the vector rotator, and the Chrip signal is output.

In step S3, the process of generating the Chrip signal by the Chirp signal generator specifically includes:

s31: the Chirp signal generator receives a Chirp combined signal at a control unit CU, wherein the Chirp combined signal comprises a frequency control word signal Step _ freq which represents increment of the frequency of the Chirp signal and is used for controlling the slope of a frequency ramp function; a Chirp direction controller C _ dir for controlling the direction of the Chirp signal: when a plus sign is taken, the instantaneous frequency of the Chirp signal is increased along with the time, and the Chirp signal is an Up-swept Chirp signal, namely Up-Chirp; when a "-" sign is taken, the instantaneous frequency of the Chirp signal is reduced along with the time, and the Chirp signal is a lower sweep frequency Chirp signal, namely Down-Chirp; a Center frequency control signal Center _ freq, which represents the size of the Center frequency of the Chirp signal and is used for controlling the Center frequency of the Chirp signal; the spread spectrum factor control signal Sf represents the number of spread spectrum factors of the Chirp signal and is used for controlling the size of the spread spectrum factor of the Chirp signal; the bandwidth control signal Bw represents the bandwidth of the Chirp signal, is used for controlling the bandwidth of the Chirp signal and an input vector x [ n ], represents a modulation signal, and can modulate the amplitude and the phase of the Chirp signal by multiplying the input vector by the generated Chirp signal;

s32: a Step _ freq control signal output by the control unit CU is input into the frequency accumulator, and a frequency function which linearly increases along with time is output;

s33: the frequency slope function generated by the frequency accumulator obtains a modulated frequency sampling value through a frequency modulation module;

s34: inputting the frequency sampling value into a phase accumulator to generate a phase sampling point of a Chirp signal; the phase accumulator consists of an adder and a phase accumulation register; the phase accumulator performs discrete integration on the modulated frequency sampling function to obtain phase sampling points of the Chirp signal

Expression (c):

in the formula:

M＝2^SF＝Bw×T_subis the spreading factor, where Bw is the Chirp signal bandwidth, T_subIs the period of the chirp symbol;

is the over-sampling factor of the signal,wherein F_sysIs the system clock frequency;

n∈[0，ML-1]where ML ═ T_sub×F_sysSubscripts of time domain sampling points; in mathematical expression, the phase accumulator represents a main summation term for generating a Chirp signal equation;

s35: sampling point of vector rotator at input phase

Sum vector x [ n ]]The phase rotation is performed under the control of (2).

Wherein, the step S32 specifically includes:

the frequency accumulator consists of an accumulation register and an adder, wherein the accumulation register in the frequency accumulator accumulates input words in the adder to generate a frequency ramp function; the frequency slope function consists of a frequency sampling point sequence; the bit width of the frequency accumulator is determined according to a Chirp signal spreading factor Sf and a bandwidth Bw, and the bit width of the frequency accumulator is enough to accommodate a Chirp signal formed by combining a maximum spreading factor Sf and a minimum bandwidth Bw; the bit width formula specifically includes:

wherein Sf_maxAnd Bw_minRespectively representing the maximum spreading factor and the minimum signal bandwidth, F_sysIs the system clock frequency.

In step S33, the frequency modulation module is composed of an adder, a spreading factor controller, a center frequency controller, and a Chirp signal direction controller; the step S33 specifically includes the following steps:

s331: an adder in the frequency modulation module adds an additional one bit for correcting the half-step frequency for the frequency ramp function output by the frequency accumulator;

s332: the corrected frequency ramp function determines the spreading factor and the bandwidth of a Chirp signal generated by a signal generator through a spreading factor controller, and then the Chirp signal is input into a central frequency controller;

s333: inputting the frequency ramp function modulated by the mask into a central frequency controller, adding the determined central frequency, and outputting the frequency ramp function to a Chirp signal direction controller;

s334: inputting a frequency slope function determined by the central frequency into a Chirp signal direction controller to determine the direction of generating a Chirp signal;

s335: the direction-determined frequency ramp function is output to the phase accumulator.

Wherein, the step S332 specifically includes:

the spread spectrum factor controller consists of a mask and a bitwise AND gate. The mask can control the frequency overturning speed of the frequency ramp function; the mask and the frequency accumulator have the same bit width; mask log₂(ML) +1 least significant bits LSBs are all 1, the remaining number of bits is 0; the masking operation of the bitwise and gate corresponds to the modulo operation in formula (4) in units of 2 ML; different SFs generate different Chirp signals;

the mask is created by the mask according to the Bw signal and the Sf signal in the control unit CU, the generated mask information and the frequency accumulator generate a frequency ramp function which is obtained by performing phase-and-phase operation on frequency sampling points output after correction, and the frequency ramp function is input into the central frequency controller.

Wherein, the step S333 specifically includes:

the central frequency controller consists of an MSB flip circuit AND an adder, the MSB flip circuit flips frequency slope function sampling points which are modulated by a mask device AND output by a bitwise AND gate, the frequency slope function frequency sampling points modulated by the mask device start from 0Hz, each frequency slope sampling point modulated by the mask device respectively represents a character from a least significant bit to a most significant bit, the most significant flip circuit only flips the most significant potential of a byte, AND the most significant bit is flipped to enable the data format of the frequency slope function sampling points modulated by the mask device to be from an unsigned number to a signed number; before turning over, the frequency ramp function is turned over between 0 and BW, after turning over, the frequency is from-BW/2 to BW/2 respectively, in the formula, the frequency center represents-ML terms in the formula (4);

the adder directly centersThe frequency is applied to the MSB flipping circuit, i.e., the reciprocal frequency sampling of the inverter output; the Center frequency of the Chrip signal is controlled by a Center frequency signal Center _ freq, which is a control word having the same bit width as the frequency accumulator, and thus the resolution of the Center frequency is also F_sys/freq_acc_width(Hz)。

Wherein, the step S334 specifically includes:

the Chirp signal direction controller consists of a selective inverter and is controlled by a Chirp _ dir signal output by the control unit CU, and when a plus sign is taken, the Chirp signal direction controller represents that the instantaneous frequency of the Chirp signal increases along with the time and is an Up-swept Chirp signal, namely Up-Chirp; when the "-" sign is taken, it indicates that the instantaneous frequency of the Chirp signal decreases with time, and is a Down-swept Chirp signal, i.e., Down-Chirp.

Wherein, the step S35 specifically includes:

the vector rotation is completed through a CORDIC algorithm of a pipeline structure, and the CORDIC algorithm does not need to consume a multiplier, so that the Chirp signal generator does not need to consume any multiplier hardware, and the power consumption of the design of the signal generator can be greatly reduced;

the input vector x [ n ] changes the amplitude and phase of the generated Chirp symbol by:

when x [ n ] is a scalar, adding a power ratio factor to the Chirp signal; in this case, the Chirp spread spectrum signal generated by the Chirp signal generator has continuous phases, i.e. each Chirp spread spectrum symbol starts from zero phase and ends from zero phase; the continuity of the phase of the Chirp symbol is very important to the frequency and time synchronization of the Chirp signal;

when x [ n ] is a unit complex number, generating phase rotation for the Chirp signal; in this case, the phase start and end of each symbol is determined by the input x [ n ]; this provides the opportunity to encode additional bits into the phase information of each chirp symbol;

when x [ n ] is a general complex number, simultaneously changing the amplitude and the phase of the Chirp signal; this may encode additional bits into the phase and coaching information for each chirp symbol.

Compared with the prior art, the technical scheme of the invention has the beneficial effects that:

Drawings

FIG. 1 is a plot of instantaneous frequency of an up-swept signal versus time;

FIG. 2 is a plot of instantaneous frequency of an up-sweep signal versus time;

fig. 3 is a schematic diagram of a Chirp signal generation circuit based on an active method in the prior art;

FIG. 4 is a schematic diagram of a Chirp signal generating circuit based on a look-up table in the prior art;

FIG. 5 is a block diagram of a low complexity CSS system transmitter designed in accordance with the present invention;

FIG. 6 is a flow chart of the operation of a low complexity CSS system transmitter designed by the present invention;

FIG. 7 is a block diagram of a low complexity, flexible Chirp signal generator designed in accordance with the present invention;

fig. 8 is a flowchart illustrating a method for generating a Chirp signal by a Chirp signal generator according to the present invention.

Detailed Description

The drawings are for illustrative purposes only and are not to be construed as limiting the patent;

for the purpose of better illustrating the embodiments, certain features of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product;

it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.

The technical solution of the present invention is further described below with reference to the accompanying drawings and examples.

Example 1

As shown in fig. 5, the present invention provides a CSS transmitter design method based on a low complexity chirip signal generator, including a Control Unit (CU), a Chirp signal generator, a pulse shaping filter, and a quadrature modulator.

In a specific implementation, as shown in fig. 6, the CSS transmitter is provided with an input signal for the Chirp signal generator by the Control Unit (CU); a Chirp signal generator for generating a required Chirp signal; the pair of pulse shaping filters can reduce the out-of-band leakage of the frequency spectrum components of the Chirp spread spectrum signal. For example, square root raised cosine filtering (SRRC); and a radio frequency part. The Chirp signal is up-converted to the passband by a quadrature modulator (radio frequency), and then the input sampling points of the Chirp signal are converted into analog signals by a pair of DACs. A digital oscillator of the quadrature modulator generates two sinusoidal signals with a phase difference of 90 degrees in a passband, the two sinusoidal signals are multiplied by Chirp signals output by two DACs respectively, and then the two sinusoidal signals are mixed together through an adder to obtain a single-side signal frequency spectrum in the passband. And finally, configuring a signal generator and a DCO through a control unit, and transmitting the mixed signal through a power amplifier.

In the implementation, the core of the transmitter system is a low complexity, flexible Chirp signal generator. The complexity level of the Chirp signal generator plays a decisive role in the complexity level of the CSS system transmitter.

In order to achieve the technical effect of low overall power consumption of the transmitter, the invention further provides a design method of the Chirp signal generator with low complexity and flexibility.

In order to enable the designed Chirp signal generator to achieve the technical effects of low complexity and high flexibility, the technical scheme of the invention is as follows:

as shown in fig. 7, a low complexity, flexible Chrip signal generator is designed to include a frequency accumulator that generates a frequency ramp function by iteratively accumulating frequency input step words (freq step). A frequency controller, a frequency ramp function generated by the frequency accumulator is obtained by the frequency modulation moduleThe modulated frequency samples. The resulting frequency sample will be the input to the phase accumulator. And the modulated frequency sampling points are input into the phase accumulator, and the phase sampling points of the Chrip signal are generated by accumulation. A vector rotator for sampling the input phase

Sum vector x [ n ]]The phase rotation is performed under the control of (2).

More specifically, in a conventional digital communication system, data symbols are generally sent by using an up-conversion technique, where the data symbols are first IQ-modulated on a baseband to improve the storage efficiency of low-speed transmission signals, then processed in I-domain and Q-domain by up-conversion, and finally converted into analog signals by two digital-to-analog converters (DACs). However, if the center frequency of the Chirp signal is in a different frequency band, the up-conversion technique is very complicated.

The Chirp signal generator of the design scheme of the patent can directly modulate a Chirp spread spectrum signal to a passband under very low complexity. The complexity of the signal generator generating the different frequency bands can be reduced.

The spreading factor (SpreadingFactorSF) and Chirp signal Bandwidth (BW) in the Chrip signal are very important parameters. The larger the Spreading Factor (SF) parameter is, the more the coverage area of Chirp spread spectrum communication can be obviously expanded, but the complexity of the communication system can also rise along with the increase of the size of the spreading factor; the larger the Bandwidth (BW) parameter is, the faster the signal transmission speed is, and the stronger the narrow-band interference resistance is.

The flexibility of the Chirp signal generator designed by the invention is embodied in that the bandwidth, the spreading factor, the center frequency and the direction of the Chirp signal can be freely set according to the adjusting control signal.

The low complexity of the Chirp signal generator designed by the invention is embodied in that:

firstly, the method comprises the following steps: the Chirp signal generator consists of two accumulators and one CORDIC, and does not need to use LUT (look-up table) and multiplier, thus having very low complexity.

Secondly, the method comprises the following steps: the invention can generate different Chirp signal combinations by modifying the directions of SF, BW, freq-step and Chirp signals, and has almost no more complex design and more consumption.

Example 2

More specifically, based on embodiment 1, the present invention provides a complete design of a Chirp signal transmitter with low complexity, which includes a Control Unit (CU), a Chirp signal generator, a pulse shaping filter, and a quadrature modulator. The work flow of the transmitter comprises the following steps:

s1: a Control Unit (CU) provides input signals for the chirp signal generator, comprising: the chip _ dir, Center _ Freq, Sf, Bw, Freq _ step and the vector x [ n ] are used as the input of a low-complexity chip signal generator to flexibly generate a required chip signal.

S2: a Chirp signal generator receives Chirp signal information generated in a Control Unit (CU), generates in-phase yn-real and quadrature yn-image, and combines the in-phase yn-real and the quadrature yn-image through an adder to generate a Chirp signal with a required specification.

S3: the Chirp signal generator is followed by a pair of pulse shaping filters which reduce the out-of-band leakage of the spectral components of the Chirp spread spectrum signal. Such as square root raised cosine filtering (SRRC). The frequency spectrum roll-off of the Chirp spread spectrum signal can be controlled by adjusting the roll-off factor of the pulse shaping filter. The use of the SRRC matched filter at the receiving end can remove inter-symbol interference (ISI), and thus orthogonality between Chirp symbols can be maintained.

S4: the Chirp signal is up-converted to the passband by a quadrature modulator (radio frequency), and then the input sampling points of the Chirp signal are converted into analog signals by a pair of DACs. A digital oscillator of the quadrature modulator generates two sinusoidal signals with a phase difference of 90 degrees in a passband, the two sinusoidal signals are multiplied by Chirp signals output by two DACs respectively, and then the two sinusoidal signals are mixed together through an adder to obtain a single-side signal frequency spectrum in the passband. Finally, the signal generator and the DCO are configured by a control unit, which may be a microcontroller or a finite state machine. The mixed signal is transmitted through a power amplifier.

The low-complexity and flexible Chirp signal generator is an important component of a low-complexity CSS communication system transmitter, and fig. 5 is a block diagram of a structure of the low-complexity and flexible Chirp signal generator, and the Chirp signal generator designed by the invention comprises: frequency accumulator, frequency modulator, phase accumulator, and CORDIC module. The intermediate frequency modulator consists of a mask, a bitwise AND gate, a highest bit flipping circuit, an adder and an inverter.

The Chirp signal generator supports changes of Chirp signal frequency stepping words, Chirp signal spreading factors and bandwidths, can control the Chirp signal direction (up/down frequency sweeping), can control the center frequency of the generated Chirp signal, and can directly generate an oversampled baseband combined Chirp symbol.

More specifically, as shown in fig. 8, the specific steps of generating the Chirp signal by the Chirp signal generator of the present invention are as follows:

s1: a low complexity, flexible Chirp signal generator generates an adjustable Chirp combined signal based on a series of signals sent by a receiving Control Unit (CU).

The input signal of the Chirp signal generator comprises: a frequency control word signal Step _ freq, which represents the increment of the frequency of the Chirp signal and is used for controlling the slope of the frequency ramp function; a Chirp direction controller C _ dir, which, when taking a "+" sign, indicates that the instantaneous frequency of the Chirp signal increases with time, being an Up-swept Chirp signal (Up-Chirp); when the "-" sign is taken, the instantaneous frequency of the Chirp signal is reduced along with the time, and the Chirp signal is a Down-frequency sweep Chirp signal (Down-Chirp); used for controlling the direction of the Chirp signal; a Center frequency control signal Center _ freq, which represents the size of the Center frequency of the Chirp signal and is used for controlling the Center frequency of the Chirp signal; a spreading factor control signal Sf, which represents the number of spreading factors of the Chirp signal and is used for controlling the size of the spreading factor of the Chirp signal; and the bandwidth control signal Bw represents the bandwidth of the Chirp signal, is used for controlling the bandwidth of the Chirp signal and represents a modulation signal, and the amplitude and the phase of the Chirp signal can be modulated by multiplying the input vector by the generated Chirp signal.

S2: the Step _ freq control signal output by the control unit is input into the frequency accumulator, and a frequency function which increases linearly along with time is output.

The frequency accumulator is composed of an accumulation register and an adder, and the accumulation register in the frequency accumulator accumulates input words in the adder to generate a frequency ramp function. The frequency ramp function consists of a sequence of frequency sample points. The bit width of the frequency accumulator is determined according to the spreading factor (Sf) and the bandwidth (Bw) of the Chirp signal, and the bit width of the frequency accumulator is enough to accommodate the Chirp signal with the combination of the maximum spreading factor (Sf) and the minimum bandwidth (Bw). The bit width formula is as in formula (3):

S3: the frequency ramp function generated by the frequency accumulator obtains a modulated frequency sampling value through a frequency modulation module. The resulting frequency sample will be the input to the phase accumulator.

The frequency modulation module consists of an adder 1, a spread spectrum factor controller, a central frequency controller and a Chirp signal direction controller. Function of the frequency modulation module:

(1) and selecting the bandwidth of the Chirp signal according to the bandwidth control signal Bw.

(2) And selecting the spreading factor of the Chirp signal according to the spreading factor control signal Sf.

(3) The center frequency of the Chirp signal generated by the signal generator is determined.

(4) The direction of the Chirp signal generated by the signal generator is determined.

A controllable, modulated frequency ramp function generated by the frequency modulation module is provided as an input to the phase accumulator.

S4: the adder in the frequency modulation module adds an additional one bit to the frequency ramp function output by the frequency accumulator for half-step frequency correction. Since the phase is the integral of the frequency over time, the frequency is corrected by an adder in half steps for the difference between the discrete integral of the linearly varying frequency over time and the continuous integral.

S5: the corrected frequency ramp function determines the spreading factor and the bandwidth size of a Chirp signal generated by the signal generator through the spreading factor controller, and then the Chirp signal is input into the center frequency controller.

The spread spectrum factor controller consists of a mask and a bitwise AND gate. The mask can control the frequency flipping speed of the frequency ramping function. The mask is the same bit width as the frequency accumulator. Mask log₂The (ML) +1 Least Significant Bits (LSBs) are all 1, and the remaining number of bits is 0 the masking operation by bit AND gate corresponds to the modulo 2ML operation in equation (4). Different SFs produce different Chirp signals (as an example): for a given bandwidth Bw, if the spreading factor Sf is reduced by one bit, the masking operation will reduce the most significant bit of the masking frequency sampling function by one more bit, and the frequency flipping speed will be increased by a factor of two. For a given spreading factor Sf, if the bandwidth Bw is reduced by one bit, the result is exactly the opposite.

The mask device creates a mask according to a Bw signal and an Sf signal in a Control Unit (CU), and the generated mask information and a frequency accumulator generate a frequency sampling point output after correction and obtain a frequency ramp function with a determined spreading factor according to bit phase and are input into a central frequency controller.

S6: and inputting the frequency ramp function modulated by the mask into a central frequency controller, adding the determined central frequency, and outputting the frequency ramp function to a Chirp signal direction controller.

The central frequency controller consists of a Most Significant Bit (MSB) flip circuit AND an adder, the MSB flip circuit flips frequency slope function sampling points which are modulated by a mask device AND output by a bit-AND (AND) gate, the frequency slope function frequency sampling points modulated by the mask device start from 0Hz, each frequency slope sampling point modulated by the mask device respectively represents a character from a least significant bit to a most significant bit, the most significant bit effective flip circuit only flips the most significant potential of a byte, AND the most significant bit is flipped to enable the data format of the frequency slope function sampling points modulated by the mask device to be from an unsigned number to a signed number. Before flipping, the frequency ramp function flips between 0 and BW, and after flipping, the frequencies are from-BW/2 to BW/2, respectively, and in the formula, the center of the frequency represents the-ML term in equation (4).

The adder 3 directly adds the center frequency to the reciprocal frequency samples output by the MSB flip circuit (inverter). The Center frequency of the Chrip signal is controlled by a Center frequency signal Center _ freq, which is a control word having the same bit width as the frequency accumulator, and thus the resolution of the Center frequency is also F_sys/freq_acc_width(Hz)。

S7: the frequency ramp function determined by the center frequency is input into a Chirp signal direction controller to determine the direction of generating a Chirp signal. The Chirp signal direction controller consists of a selective inverter and is controlled by a Chirp _ dir signal output by a Control Unit (CU), and when a plus sign is taken, the Chirp signal direction controller represents that the instantaneous frequency of the Chirp signal increases along with the time and is an Up-frequency-sweeping Chirp signal (Up-Chirp); when the "-" sign is taken, it indicates that the instantaneous frequency of the Chirp signal decreases with time, and is a Down-swept Chirp signal (Down-Chirp).

S8: the frequency slope function with determined direction is input to a phase accumulator to generate phase sampling points of the Chirp signal. The phase accumulator consists of an adder and a phase accumulation register. The phase accumulator performs discrete integration on the modulated frequency sampling function to obtain phase sampling points of the Chirp signal

Expression (c):

in the equation:

M＝2^SF＝Bw×T_subis the spreading factor, where Bw is the Chirp signal bandwidth, T_subIs the period of the chirp symbol.

Is an oversampling factor, where F_sysIs the system clock frequency.

n∈[0，ML-1]Where ML ═ T_sub×F_sysSubscripts to the time domain sample points. Mathematically, the phase accumulator represents the main summation term for generating the Chirp signal equation.

S9: sampling point of vector rotator at input phase

Sum vector x [ n ]]The phase rotation is performed under the control of (2).

In the specific implementation process, the vector rotation is completed through a CORDIC algorithm of a pipeline structure, and the CORDIC algorithm does not need to consume a multiplier, so that the Chirp signal generator does not need to consume any multiplier hardware, and the power consumption of the signal generator design can be greatly reduced.

when x [ n ] is a scalar, a power ratio factor is added to the Chirp signal. In this case, the Chirp spread spectrum signal generated by the Chirp signal generator has a continuous phase, that is, each Chirp spread spectrum symbol starts from a zero phase and ends from a zero phase. The continuity of the Chirp symbol phase is very important to the frequency and time synchronization of the Chirp signal.

When x [ n ] is a unit complex number, a phase rotation is generated for the Chirp signal. In this case, the phase start and end of each symbol is determined by the input x [ n ]. This provides the opportunity to encode additional bits into the phase information of each chirp symbol.

When x [ n ] is a general complex number, the Chirp signal is simultaneously subjected to amplitude and phase changes. This may encode additional bits into the phase and coaching information for each chirp symbol. For example: a PSK/QAM modulated phase modulator applies PSK/QAM mapping to additional information.

The Chirp signal generator designed by the invention has many advantages:

Secondly, the method comprises the following steps: the chirp signal generator of the present invention is flexible in that different combinations of chirp signals can be generated by modifying the SF, BW, freq step and direction of the chirp signals with little more consumption.

Thirdly, the method comprises the following steps: the present invention relates to a chirp signal generator capable of encoding additional information into the phase and amplitude of a chirp spread spectrum signal by setting different values of x [ n ].

It should be understood that the above-described embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the claims of the present invention.

Claims

1. The CSS transmitter design method based on the low-complexity chip signal generator is characterized by comprising the following steps of:

s1: constructing a Chirp signal generator;

2. The CSS transmitter design method based on low-complexity Chirp signal generator of claim 1, characterized in that in step S1, the Chirp signal generator includes a frequency accumulator, a frequency modulation module, a phase accumulator and a vector rotator; wherein:

3. The method for designing a CSS transmitter based on a low-complexity Chirp signal generator as claimed in claim 2, wherein in step S3, the process of generating the Chirp signal by the Chirp signal generator is specifically as follows:

Expression (c):

in the formula:

is an oversampling factor, where F_sysIs the system clock frequency;

n∈[0,ML-1]where ML ═ T_sub×F_sysSubscripts of time domain sampling points; in mathematical expression, the phase accumulator represents a main summation term for generating a Chirp signal equation;

s35: sampling point of vector rotator at input phase

Sum vector x [ n ]]The phase rotation is performed under the control of (2).

4. The method for designing a CSS transmitter based on a low-complexity chip signal generator as claimed in claim 3, wherein the step S32 is specifically as follows:

5. The CSS transmitter design method based on low complexity chip signal generator of claim 4, wherein in the step S33, the frequency modulation module is composed of an adder, a spreading factor controller, a center frequency controller and a Chirp signal direction controller; the step S33 specifically includes the following steps:

6. The method for designing a CSS transmitter based on a low-complexity chip signal generator as claimed in claim 5, wherein the step S332 is specifically as follows:

7. The method for designing a CSS transmitter based on a low-complexity chip signal generator as claimed in claim 6, wherein the step S333 is specifically as follows:

the adder directly adds the center frequency to the MSB flip circuit, namely, the reciprocal frequency sampling output by the inverter; the Center frequency of the Chrip signal is controlled by a Center frequency signal Center _ freq, which is a control word having the same bit width as the frequency accumulator, and thus the resolution of the Center frequency is also F_sys/freq_acc_width(Hz)。

8. The method for designing a CSS transmitter based on a low-complexity chip signal generator as claimed in claim 7, wherein the step S334 is specifically:

9. The method for designing a CSS transmitter based on a low-complexity chip signal generator as claimed in claim 8, wherein the step S35 is specifically: