CN111639041B - Memory control method, memory storage device and memory controller - Google Patents
Memory control method, memory storage device and memory controller Download PDFInfo
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- CN111639041B CN111639041B CN202010474553.6A CN202010474553A CN111639041B CN 111639041 B CN111639041 B CN 111639041B CN 202010474553 A CN202010474553 A CN 202010474553A CN 111639041 B CN111639041 B CN 111639041B
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
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Abstract
The invention provides a memory control method, a memory storage device and a memory controller. The method comprises the following steps: obtaining respective characteristic information of a plurality of entity units; dividing the entity units into a plurality of groups according to the characteristic information; setting an initial value of a use reference value for each of the entity units according to the group, so that the use reference values corresponding to a plurality of entity units belonging to the same group have the same initial value, and the use reference values corresponding to a plurality of entity units belonging to different groups have different initial values; and selecting a target entity unit from the entity units according to the use reference values respectively corresponding to the entity units and executing a wear leveling operation on the target entity unit. Therefore, the service life of the whole memory module can be prolonged.
Description
Technical Field
The present invention relates to a memory control technology, and in particular, to a memory control method, a memory storage device, and a memory controller.
Background
Most memory storage devices support wear leveling operations to move data in a memory block with a smaller erase count to other memory blocks for storage, and to store new data in the memory block with the smaller erase count. Therefore, the erase counts of all the memory blocks in the memory storage device can be averagely increased in the using process of the memory storage device, and the specific memory blocks are prevented from being damaged early due to overuse.
Generally, each memory block has the same erase count (i.e., the initial value of the erase count is zero) when the memory storage device is shipped from the factory. During the use of the memory block, the erase count of the memory block gradually increases as the number of times of being erased increases. However, in practice, each memory block in a memory storage device has different factory quality, so even if wear leveling operation is adopted, some memory blocks with poor quality will be damaged early before the erase count reaches the preset risk value.
Disclosure of Invention
Embodiments of the present invention provide a memory control method, a memory storage device, and a memory controller, which can extend the service life of the entire memory module by dynamically allocating initial values of usage reference values of each entity unit in the memory module.
An embodiment of the present invention provides a memory control method for controlling a memory module including a plurality of physical units, and the memory control method includes: obtaining respective characteristic information of the plurality of entity units; dividing the plurality of entity units into a plurality of groups according to the characteristic information; setting an initial value of a use reference value for each of the plurality of entity units according to the plurality of groups, so that the use reference values corresponding to a plurality of entity units belonging to the same group in the plurality of entity units have the same initial value, and the use reference values corresponding to a plurality of entity units belonging to different groups in the plurality of entity units have different initial values; and selecting a target entity unit from the plurality of entity units according to the use reference values respectively corresponding to the plurality of entity units and performing a wear leveling operation on the target entity unit.
An embodiment of the present invention further provides a memory storage device, which includes a memory module, a connection interface, and a memory controller. The memory module includes a plurality of physical units. The connection interface is used for connecting to a host system. The memory controller is coupled to the memory module and the connection interface. The memory controller is used for obtaining respective characteristic information of the plurality of entity units. The memory controller is further configured to divide the plurality of physical units into a plurality of groups according to the characteristic information. The memory controller is further configured to set an initial value of a usage reference value for each of the plurality of physical units according to the plurality of groups, so that the usage reference values corresponding to a plurality of physical units belonging to the same group among the plurality of physical units have the same initial value, and the usage reference values corresponding to a plurality of physical units belonging to different groups among the plurality of physical units have different initial values. The memory controller is further configured to select a target physical unit from the plurality of physical units according to the usage reference values corresponding to the plurality of physical units respectively and perform a wear leveling operation on the target physical unit.
The embodiment of the invention also provides a memory controller which is used for controlling the memory module. The memory module includes a plurality of physical units. The memory controller includes a host interface, a memory interface, and a memory control circuit. The host interface is used for connecting to a host system. The memory interface is used for connecting to the memory module. The memory control circuit is coupled to the host interface and the memory interface. The memory control circuit is used for obtaining respective characteristic information of the plurality of physical units. The memory control circuit is further configured to divide the plurality of physical units into a plurality of groups according to the characteristic information. The memory control circuit is further configured to set an initial value of the usage reference value for each of the plurality of physical units according to the plurality of groups, so that the usage reference values corresponding to a plurality of physical units belonging to the same group among the plurality of physical units have the same initial value, and the usage reference values corresponding to a plurality of physical units belonging to different groups among the plurality of physical units have different initial values. The memory control circuit is further configured to select a target physical unit from the plurality of physical units according to the usage reference values respectively corresponding to the plurality of physical units and perform a wear leveling operation on the target physical unit.
Based on the above, after obtaining the respective characteristic information of a plurality of entity units, the entity units may be divided into a plurality of groups according to the characteristic information. Then, an initial value of the use reference value may be set for each of the physical units according to the groups, so that the use reference values corresponding to multiple physical units belonging to the same group among the physical units have the same initial value, and the use reference values corresponding to multiple physical units belonging to different groups among the physical units have different initial values. Thereafter, a target entity unit may be selected from the plurality of entity units according to the usage reference values respectively corresponding to the plurality of entity units, and a wear-leveling operation may be performed on the target entity unit. Therefore, the service life of the whole memory module can be prolonged by dynamically allocating the initial value of the use reference value of each entity unit in the memory module.
Drawings
FIG. 1 is a schematic diagram of a memory storage device according to one embodiment of the present invention;
FIG. 2 is a schematic diagram of a memory controller according to an embodiment of the invention;
FIG. 3 is a schematic diagram illustrating a management memory module according to an embodiment of the invention;
FIG. 4 is a diagram illustrating grouping of physical units and assigning initial values of usage reference values according to an embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating updating a usage reference value according to an embodiment of the present invention;
FIG. 6 is a diagram illustrating an embodiment of changing a group to which an entity unit belongs and updating table information;
FIG. 7 is a flow chart illustrating a memory control method according to an embodiment of the invention.
Detailed Description
Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.
FIG. 1 is a schematic diagram of a memory storage device according to an embodiment of the present invention. Referring to fig. 1, the memory storage system includes a host system 11 and a memory storage device 12. The host system 11 may be any type of computer system. For example. The host system 11 may be a notebook computer, desktop computer, smart phone, tablet computer, industrial computer, or the like. The memory storage device 12 is used to store data from the host system 11. For example, the memory storage device 12 may include a solid state disk, a U-disk, or other type of non-volatile storage device. The host system 11 may be electrically connected to the memory storage device 12 via a Serial Advanced Technology Attachment (SATA) interface, a Peripheral Component Interconnect Express (PCI Express), a Universal Serial Bus (USB), or other types of connection interfaces. Thus, the host system 11 may store data to the memory storage device 12 and/or read data from the memory storage device 12.
The memory module 122 is used for storing data. The memory module 122 may include a rewritable non-volatile memory module. The memory module 122 includes an array of memory cells. The memory cells in the memory module 122 store data in the form of voltages. For example, the memory module 122 may include a Single Level Cell (SLC) NAND flash memory module, a Multi-Level Cell (MLC) NAND flash memory module, a Triple Level Cell (TLC) NAND flash memory module, a Quad Level Cell (QLC) NAND flash memory module, or other memory modules with similar characteristics.
The memory controller 123 is connected to the connection interface 121 and the memory module 122. Memory controller 123 may be used to control memory storage device 12. For example, the memory controller 123 can control the connection interface 121 and the memory module 122 for data access and data management. For example, the memory controller 123 may include a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), or other Programmable general purpose or special purpose microprocessor, a Digital Signal Processor (DSP), a Programmable controller, an Application Specific Integrated Circuit (ASIC), a Programmable Logic Device (PLD), or other similar devices or combinations thereof.
In one embodiment, memory controller 123 is also referred to as a flash memory controller. In one embodiment, the memory module 122 is also referred to as a flash memory module. The memory module 122 may receive a sequence of instructions from the memory controller 123 and access data stored in the memory cells according to this sequence of instructions.
FIG. 2 is a schematic diagram of a memory controller according to an embodiment of the invention. Referring to fig. 1 and 2, the memory controller 123 includes a host interface 21, a memory control circuit 22, and a memory interface 23. The host interface 21 is used to couple to the host system 11 through the connection interface 121 to communicate with the host system 11. The memory interface 23 is connected to the memory module 122 to communicate with the memory module 122.
The memory control circuit 22 is connected to the host interface 21 and the memory interface 23. The memory control circuit 22 may be used to control the host interface 21 and the memory interface 23. For example, the memory control circuit 22 can communicate with the host system 11 via the host interface 21 and access the memory module 122 via the memory interface 23. The memory control circuit 22 may also be considered a control core of the memory controller 123. In the following embodiments, the description of the memory control circuit 22 is equivalent to that of the memory controller 123. In addition, the memory control circuit 22 may include one or more buffer memories for temporarily storing data.
FIG. 3 is a schematic diagram illustrating a management memory module according to an embodiment of the invention. Referring to fig. 1 to 3, the memory module 122 includes a plurality of physical units 302(1) -302 (B). Each of the physical units 302(1) -302 (B) includes a plurality of memory cells and is configured to store data non-volatilely. Specifically, a physical unit refers to a physical block. All memory cells in a physical cell can be erased simultaneously. The erased physical units are also referred to as spare physical units (or spare blocks) and may be used to store new data (e.g., user data from host system 11). In addition, the memory control circuit 22 may configure a plurality of logic units 301(1) to 301(a) to map entity units storing valid data among the entity units 302(1) to 302 (B). For example, a logical unit may consist of one or more logical addresses. The mapping relationship between the logic unit and the entity unit can be recorded in the logic-to-entity mapping table.
In one embodiment, a physical unit may be determined to be a bad block (i.e., a damaged physical unit) due to a bit error rate being too high or other factors. Once a physical unit is determined to be a bad block, the physical unit cannot be written with new data any more, but the stored data can still be read and can be copied to other physical units for backup. In one embodiment, once all available physical units in the memory module 122 become bad blocks, the memory storage device 12 may enter a write-protected state and no more new data may be stored.
The memory control circuit 22 may divide the physical units 302(1) to 302(B) into a plurality of groups according to the obtained characteristic information. Each group may contain one or more physical units, and each physical unit can only belong to a single group at a certain point in time. At some point in time, entity units belonging to the same group may have the same or similar factory quality and/or health, while entity units belonging to different groups may have different or dissimilar factory quality and/or health. In addition, after the group is initially divided, the group to which a certain physical unit belongs may be dynamically changed, rather than being permanently fixed.
The memory control circuit 22 may set an initial value of the use reference value for each of the entity units 302(1) to 302(B) according to the divided group, so that the use reference values corresponding to the entity units belonging to the same group in the entity units 302(1) to 302(B) have the same initial value, and the use reference values corresponding to the entity units belonging to different groups in the entity units 302(1) to 302(B) have different initial values.
In one embodiment, the usage reference value corresponding to a physical cell may be an erase count, and the erase count may be updated in response to the physical cell being erased. However, in another embodiment, the usage reference value corresponding to a physical unit may be a write count or a read count, and the write count or the read count may be updated in response to the physical unit being written or read. In addition, the usage reference value may also include other types of parameter values, as long as the usage reference value can reflect the degree and/or frequency of usage of a certain entity unit.
When it is desired to perform wear leveling operations, memory control circuitry 22 may select one or more physical units from physical units 302(1) -302 (B) as target physical units based on the respective usage references corresponding to physical units 302(1) -302 (B). Memory control circuitry 22 may perform the wear leveling operation on the target physical unit. For example, after selecting a physical unit as a target physical unit, the memory control circuit 22 may copy valid data stored in the target physical unit to one or more other physical units for storage and may erase the target physical unit.
Fig. 4 is a diagram illustrating grouping of entity units and allocation of initial values using reference values according to an embodiment of the present invention. Referring to FIG. 4, assume that entity units 401(1) - (401C) are divided into groups 41(1), entity units 402(1) - (402D) are divided into groups 41(2), and entity units 403(1) - (403 (E) are divided into groups 41 (n).
In one embodiment, the physical units 401(1) -401 (C) may have the same or similar factory quality and/or health. For example, at least one of the number of error bits, the operation delay time, the erase time parameter, and the program time parameter of the physical cells 401(1) - (401 (C) may be within the same value range. Thus, physical units 401(1) -401 (C) may be divided into the same group 41 (1). By analogy, entity units 402(1) -402 (D) may have the same or similar factory quality and/or health, and entity units 403(1) -403 (E) may have the same or similar factory quality and/or health. In addition, the physical units belonging to different groups of the groups 41(1) - (41 (n) may have different or dissimilar shipping qualities and/or health degrees, and thus be divided into different groups.
In one embodiment, the memory control circuit 22 can manage the use reference values corresponding to each physical unit in the groups 41(1) to 41(n) through the table information 42(1) to 42 (n). For example, table information 42(1) may describe usage reference values corresponding to entity units 401(1) to 401(C), table information 42(2) may describe usage reference values corresponding to entity units 402(1) to 402(D), and table information 42(n) may describe usage reference values corresponding to entity units 403(1) to 403 (E).
Taking fig. 4 as an example, after the group is initially divided, table information 42(1) may record that the initial values of the usage reference values corresponding to physical units 401(1) to 401(C) are all 2, table information 42(2) may record that the initial values of the usage reference values corresponding to physical units 402(1) to 402(D) are all 5, and table information 42(n) may record that the initial values of the usage reference values corresponding to physical units 403(1) to 403(E) are all 20. In addition, the embodiment of FIG. 4 is an example of using the reference value as the erase count, but the invention is not limited thereto.
In other words, in the embodiment of fig. 4, the shipment quality and/or health degree of the entity units 401(1) to 401(C) belonging to the group 41(1) may be higher than the shipment quality and/or health degree of the entity units 402(1) to 402(D) belonging to the group 41(2), and the shipment quality and/or health degree of the entity units 402(1) to 402(D) belonging to the group 41(2) may be higher than the shipment quality and/or health degree of the entity units 403(1) to 403(E) belonging to the group 41 (3).
In one embodiment, the groups 41(1) to 41(n) respectively correspond to a reference threshold, and the reference thresholds corresponding to the groups 41(1) to 41(n) are different. The memory control circuit 22 may determine an initial value of the use reference value corresponding to the entity unit belonging to a certain group according to the reference threshold corresponding to the group, so that the determined initial value is not less than the reference threshold corresponding to the group. Taking fig. 4 as an example, assuming that the reference threshold values corresponding to the groups 41(1) to 41(n) are 2, 5 and 20, respectively, the memory control circuit 22 may determine the initial values of the use reference values corresponding to the entity units 401(1) to 401(C), 402(1) to 402(D) and 403(1) to 403(E) to be 2, 5 and 20. However, the initial values of the usage reference values corresponding to the entity units 401(1) - (401 (C)) cannot be higher than the reference threshold values corresponding to the group 41(2), and the initial values of the usage reference values corresponding to the entity units 402(1) - (402 (D)) cannot be higher than the reference threshold values corresponding to the group 41 (n). It should be noted that, in another embodiment, the reference threshold corresponding to each group may be other values, and the invention is not limited thereto.
When performing the wear leveling operation, the memory control circuit 22 may select a target entity unit according to the usage reference value corresponding to each entity unit described in the table information 42(1) - (42 (n) and perform the wear leveling operation on the target entity unit. For example, the memory control circuit 22 may preferentially select at least one of the entity units 401(1) to 401(C) (e.g., the entity unit 401(2)) having the smallest reference value as the target entity unit and copy the valid data from the target entity unit to the remaining entity units for storage. After the valid data stored by the target physical unit is completely copied, the memory control circuit 22 may perform an erase operation on the target physical unit. In response to the target physical unit being erased, the usage reference value corresponding to the target physical unit may be updated.
Fig. 5 is a schematic diagram illustrating updating of a usage reference value according to an embodiment of the present invention. Referring to fig. 5, continuing with the embodiment of fig. 4, assuming that physical unit 401(2) is erased, the usage reference corresponding to physical unit 401(2) in table information 42(1) may be updated to 3(2+ 1-3). It should be noted that although the usage reference value corresponding to the physical unit 401(2) is updated to 3, the physical unit 401(2) is actually erased only once after being shipped, instead of 3 times. In addition, the execution of the erase operation is not limited to wear leveling, and any time or erase operation performed during the program can result in the usage reference value corresponding to a physical unit being updated.
In one embodiment, if the usage reference value corresponding to a physical unit originally belonging to a group (also referred to as a first group) is updated to be equal to or greater than the reference threshold value corresponding to another group (also referred to as a second group), the memory control circuit 22 may set the physical unit to belong to the second group instead. At the same time, the memory control circuit 22 can add the information of the use reference value of the physical unit to the related table information.
Fig. 6 is a diagram illustrating a group to which an entity unit belongs and update table information according to an embodiment of the invention. Referring to fig. 4 to fig. 6, it is assumed that the usage reference value corresponding to the entity unit 401(2) originally belonging to the group 41(1) is updated to 5. At this time, in response to the use reference value (i.e. 5) corresponding to the entity unit 401(2) being equal to the reference threshold value (i.e. 5) corresponding to the group 41(2), the memory control circuit 22 may set the entity unit 401(2) to belong to the group 41(2) instead of the original group 41 (10). In addition, the memory control circuit 22 may add information of the usage reference value corresponding to the entity unit 401(2) to the table information 42 (2).
In one embodiment, if a physical unit in a group is defective (i.e., becomes a bad block), memory control circuitry 22 may preferentially select an available physical unit from among the physical units that also belong to the group to replace the defective physical unit. If there are no other available physical units in the group, the memory control circuit 22 will select an available physical block from the other group with the closest reference threshold to replace the damaged physical unit.
Taking fig. 4 as an example, in one embodiment, assuming that the physical units 401(1) in the group 41(1) become bad blocks, the available physical units in the group 41(1) may be preferentially selected to replace the damaged physical units 401 (1). If there are no available physical units in group 41(1), the available physical units in group 41(2) may also be selected to replace the damaged physical unit 401 (1).
FIG. 7 is a flow chart illustrating a memory control method according to an embodiment of the invention. Referring to fig. 7, in step S701, respective characteristic information of a plurality of entity units is obtained. In step S702, the plurality of entity units are divided into a plurality of groups according to the characteristic information. In step S703, an initial value of a usage reference value is set for each of the plurality of physical units according to the plurality of groups, so that the usage reference values corresponding to a plurality of physical units belonging to the same group in the plurality of physical units have the same initial value, and the usage reference values corresponding to a plurality of physical units belonging to different groups in the plurality of physical units have different initial values. In step S704, a target physical unit is selected from the plurality of physical units according to the usage reference values respectively corresponding to the plurality of physical units and a wear leveling operation is performed on the target physical unit.
However, the steps in fig. 7 have been described in detail above, and are not described again here. It is to be noted that, the steps in fig. 7 can be implemented as a plurality of program codes or circuits, and the invention is not limited thereto. In addition, the method of fig. 7 may be used with the above exemplary embodiments, or may be used alone, and the invention is not limited thereto.
In summary, according to different factory qualities and/or health degrees of the respective entity units, the entity units having the same or similar factory qualities and/or health degrees may be divided into the same groups and assigned with the same initial values of the usage reference values. For example, the initial value of the usage reference value corresponding to the entity unit with higher factory quality and/or health degree may be determined to be smaller, so as to increase the number of times and/or probability that the entity unit is subsequently selected as the target entity unit in the wear leveling operation.
Taking the embodiments of fig. 4 to 6 as examples, after the system operates for a period of time, the number of the physical units belonging to the group 41(1) is gradually decreased, and the number of the physical units belonging to the group 41(2) is gradually increased. By analogy, when the usage references of most of the physical units are increased on average, the physical units may be set to belong to the group 41 (n). At this time, the entity units (e.g., the entity units 403(1) -403 (E)) that are preset to belong to the group 41(n) and have low factory quality and/or health will start to be selected as the target entity units in the wear leveling operation. Therefore, the service life of the entity unit with lower factory quality and/or health degree in the whole memory module (or the memory storage device) can be prolonged.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (21)
1. A memory control method for controlling a memory module, the memory module including a plurality of physical units, the memory control method comprising:
obtaining respective characteristic information of the plurality of entity units;
dividing the plurality of entity units into a plurality of groups according to the characteristic information;
setting an initial value of a use reference value for each of the plurality of entity units according to the plurality of groups, so that the use reference values corresponding to a plurality of entity units belonging to the same group in the plurality of entity units have the same initial value, and the use reference values corresponding to a plurality of entity units belonging to different groups in the plurality of entity units have different initial values; and
selecting a single entity unit from the plurality of entity units as a target entity unit according to the usage reference values respectively corresponding to the plurality of entity units, and performing a wear leveling operation on the target entity unit.
2. The method according to claim 1, wherein the characteristic information of each of the plurality of physical units comprises at least one of a number of error bits, an operation delay time, an erase time parameter and a program time parameter corresponding to each of the plurality of physical units.
3. The memory control method according to claim 1, wherein the plurality of groups include a first group corresponding to a first reference threshold, and the step of setting the initial value of the usage reference value for the each of the plurality of physical units according to the plurality of groups comprises:
and determining an initial value of a use reference value corresponding to a first entity unit belonging to the first group in the plurality of entity units as a first value according to the first reference threshold, wherein the first value is not less than the first reference threshold.
4. The memory control method according to claim 3, wherein the plurality of groups further includes a second group corresponding to a second reference threshold, the second reference threshold being greater than the first reference threshold, and the step of setting the initial value of the usage reference value for the each of the plurality of physical units according to the plurality of groups further includes:
and determining an initial value of a usage reference value corresponding to a second physical unit belonging to the second group in the plurality of physical units as a second value according to the second reference threshold, wherein the second value is not less than the second reference threshold.
5. The memory control method of claim 4, further comprising:
performing an erase operation on the first physical cells belonging to the first group; and
updating the usage reference value corresponding to the first physical cell in response to the erase operation.
6. The memory control method of claim 5, further comprising:
if the updated usage reference value corresponding to the first entity unit is equal to or greater than the second reference threshold, the first entity unit is set to belong to the second group.
7. The memory control method of claim 1, wherein the plurality of groups comprises a third group, and further comprising:
if a third entity unit belonging to the third group is damaged, a fourth entity unit belonging to the third group is preferentially selected to replace the damaged third entity unit.
8. A memory storage device, comprising:
a memory module comprising a plurality of physical units;
a connection interface for connecting to a host system; and
a memory controller connected to the memory module and the connection interface,
wherein the memory controller is configured to obtain respective characteristic information of the plurality of physical units,
the memory controller is further configured to divide the plurality of physical units into a plurality of groups according to the characteristic information,
the memory controller is further configured to set an initial value of the usage reference value for each of the plurality of physical units according to the plurality of groups, such that the usage reference values corresponding to a plurality of physical units belonging to the same group among the plurality of physical units have the same initial value, and the usage reference values corresponding to a plurality of physical units belonging to different groups among the plurality of physical units have different initial values, and
the memory controller is further configured to select a single physical unit from the plurality of physical units as a target physical unit according to the usage reference values corresponding to the plurality of physical units respectively and perform a wear leveling operation on the target physical unit.
9. The memory storage device of claim 8, wherein the characteristic information of each of the plurality of physical units comprises at least one of a number of error bits, an operation delay time, an erase time parameter, and a program time parameter corresponding to each of the plurality of physical units.
10. The memory storage device of claim 8, wherein the plurality of groups comprises a first group corresponding to a first reference threshold, and the operation of setting the initial value of the usage reference value for the each of the plurality of physical units according to the plurality of groups comprises:
and determining an initial value of a use reference value corresponding to a first entity unit belonging to the first group in the plurality of entity units as a first value according to the first reference threshold, wherein the first value is not less than the first reference threshold.
11. The memory storage device of claim 10, wherein the plurality of groups further comprises a second group, the second group corresponds to a second reference threshold, the second reference threshold is greater than the first reference threshold, and the operation of setting the initial value of the usage reference value for the each of the plurality of physical units according to the plurality of groups further comprises:
and determining an initial value of a usage reference value corresponding to a second physical unit belonging to the second group in the plurality of physical units as a second value according to the second reference threshold, wherein the second value is not less than the second reference threshold.
12. The memory storage device of claim 11, wherein the memory controller is further configured to perform an erase operation on the first physical cells belonging to the first group, and
the memory controller is further configured to update the usage reference value corresponding to the first physical unit in response to the erase operation.
13. The memory storage device of claim 12, wherein the memory controller is further configured to set the first physical unit to belong to the second group instead if the updated usage reference value corresponding to the first physical unit is equal to or greater than the second reference threshold.
14. The memory storage device of claim 8, wherein the plurality of groups comprises a third group, and
if a third physical unit of the plurality of physical units belonging to the third group is damaged, the memory controller is further configured to preferentially select a fourth physical unit of the plurality of physical units, which also belongs to the third group, to replace the damaged third physical unit.
15. A memory controller to control a memory module, the memory module including a plurality of physical units, and the memory controller comprising:
a host interface for connecting to a host system;
a memory interface to connect to the memory module; and
a memory control circuit connected to the host interface and the memory interface,
wherein the memory control circuit is configured to obtain respective characteristic information of the plurality of physical units,
the memory control circuitry is further configured to divide the plurality of physical units into a plurality of groups according to the characteristic information,
the memory control circuit is further configured to set an initial value of the usage reference value for each of the plurality of physical units according to the plurality of groups, such that the usage reference values corresponding to a plurality of physical units belonging to the same group among the plurality of physical units have the same initial value, and the usage reference values corresponding to a plurality of physical units belonging to different groups among the plurality of physical units have different initial values, and
the memory control circuit is further configured to select a single physical unit from the plurality of physical units as a target physical unit according to the usage reference values corresponding to the plurality of physical units respectively and perform a wear leveling operation on the target physical unit.
16. The memory controller of claim 15, wherein the characteristic information of each of the plurality of physical units comprises at least one of a number of error bits, an operation delay time, an erase time parameter, and a program time parameter corresponding to each of the plurality of physical units.
17. The memory controller of claim 15, wherein the plurality of groups comprises a first group corresponding to a first reference threshold, and the operation of setting the initial value of the usage reference value for the each of the plurality of physical units according to the plurality of groups comprises:
and determining an initial value of a use reference value corresponding to a first entity unit belonging to the first group in the plurality of entity units as a first value according to the first reference threshold, wherein the first value is not less than the first reference threshold.
18. The memory controller of claim 17, wherein the plurality of groups further comprises a second group, the second group corresponds to a second reference threshold, the second reference threshold is greater than the first reference threshold, and the operation of setting the initial value of the usage reference value for the each of the plurality of physical units according to the plurality of groups further comprises:
and determining an initial value of a usage reference value corresponding to a second physical unit belonging to the second group in the plurality of physical units as a second value according to the second reference threshold, wherein the second value is not less than the second reference threshold.
19. The memory controller of claim 18, wherein the memory control circuitry is further configured to perform an erase operation on the first physical cells belonging to the first group, and
the memory control circuit is further configured to update the usage reference value corresponding to the first physical cell in response to the erase operation.
20. The memory controller of claim 19, wherein the memory control circuit is further configured to set the first physical unit to belong to the second group instead if the updated usage reference value corresponding to the first physical unit is equal to or greater than the second reference threshold.
21. The memory controller of claim 15, wherein the plurality of groups comprises a third group, and
if a third physical unit of the plurality of physical units belonging to the third group is damaged, the memory control circuit is further configured to preferentially select a fourth physical unit of the plurality of physical units, which also belongs to the third group, to replace the damaged third physical unit.
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