CN111638575A - Light time delay array chip based on chirp Bragg grating - Google Patents
Light time delay array chip based on chirp Bragg grating Download PDFInfo
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/26—Optical coupling means
- G02B6/28—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals
- G02B6/2804—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals forming multipart couplers without wavelength selective elements, e.g. "T" couplers, star couplers
- G02B6/2861—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals forming multipart couplers without wavelength selective elements, e.g. "T" couplers, star couplers using fibre optic delay lines and optical elements associated with them, e.g. for use in signal processing, e.g. filtering
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/122—Basic optical elements, e.g. light-guiding paths
- G02B6/124—Geodesic lenses or integrated gratings
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/26—Optical coupling means
- G02B6/28—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals
- G02B6/2804—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals forming multipart couplers without wavelength selective elements, e.g. "T" couplers, star couplers
- G02B6/2808—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals forming multipart couplers without wavelength selective elements, e.g. "T" couplers, star couplers using a mixing element which evenly distributes an input signal over a number of outputs
- G02B6/2813—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals forming multipart couplers without wavelength selective elements, e.g. "T" couplers, star couplers using a mixing element which evenly distributes an input signal over a number of outputs based on multimode interference effect, i.e. self-imaging
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/03—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels effect or Kerr effect
- G02F1/035—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels effect or Kerr effect in an optical waveguide structure
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12083—Constructional arrangements
- G02B2006/12107—Grating
Abstract
The invention discloses an optical delay array chip based on a chirped Bragg grating, which comprises a plurality of short delay waveguides to be cascaded and a power division structure to be cascaded, wherein the power division structure to be cascaded is provided with an input port and two output ports; the invention has the advantages that: the transverse size of the delay waveguide is reduced through cascading, the multichannel output is constructed through the power dividing structure to be cascaded, the sharing of delay paths among channels is realized, the integration level of a chip is increased, the chip processing area is greatly reduced, and therefore the processing cost is reduced.
Description
Technical Field
The invention relates to the technical field of integrated photoelectron, in particular to an optical time delay array chip based on chirped Bragg grating.
Background
The optical time delay technology has wide application in the fields of optical communication and radar detection. In the phased array radar, when the traditional phased array antenna based on the electrical phase shifter works in a large bandwidth, the wave beam of the traditional phased array antenna is inclined, the instantaneous bandwidth is limited, and the problem can be well solved by the phased array antenna based on the optical true delay line. The conventional optical delay line is realized based on a chirped Bragg grating optical fiber, and as the requirements of an optical delay system on volume, weight and precision are improved, an optical delay integrated chip gets more and more attention.
The reverse coupling chirped grating is a new delay line integration scheme proposed in recent years. The structure characteristics and the working principle of the chirped grating delay waveguide are shown in fig. 1, grating teeth with fixed periods are added at the edge of the tapered waveguide with gradually changed refractive index to form the chirped grating waveguide, light with different wavelengths is reflected at different positions of the waveguide and coupled into the adjacent tapered waveguide for propagation, the path of the light can be adjusted by adjusting the wavelength of the light, and the adjustment and control of the optical delay amount are realized.
In 2014, the Wei Shi task group at mcgill university, canada, first made an optical delay waveguide based on a reverse coupling chirped grating, where the delay waveguide is composed of two ridge waveguides with gradually changed widths, one of the waveguides with chirped grating structure reflects light with different wavelengths at different positions, and the reflected light is coupled to the other common waveguide for transmission, so as to complete the path separation of the reflected light from the incident light. By adjusting the wavelength, the delay waveguide can realize the adjustable delay amount of 96ps, and the loss is less than 2db [ Optics Letters,2014,39, 701-. On the basis, the board-building topic group of the university of science and technology in Huazhong is further improved, and a tapered ridge waveguide is replaced by a tapered square waveguide, so that the processing difficulty and the cost are reduced [ Photonics Research,2018,6,880-886 ]. Further, the subject group initially explores a multi-channel delay array, and a 4-channel delay waveguide array is realized by adopting positive and negative dispersion waveguides, as shown in fig. 2, the array structure is a cascade-free multi-channel delay array [ ieee photonics Society Journal of Selected Topics in quantum electronics,2020,2983579 ]. However, the delay array has the following problems: 1. the optical delay waveguide is a linear waveguide, the transverse length is too long, the waveguide length of 1.4cm is needed for realizing 300ps delay, and the longer length is needed for realizing the larger delay, so that the requirement of small size of an integrated chip is not met; 2. the multi-channel waveguides are mutually independent, loose in structure, large in processing area and high in cost.
Disclosure of Invention
The invention aims to solve the technical problems that the optical delay array chip in the prior art is too long in transverse length and mutually independent among multi-channel waveguides, so that the small-size requirement of an integrated chip is not met, the processing area is large and the cost is high.
The invention solves the technical problems by the following technical means: the output end of the short delay waveguide to be cascaded is connected with the input end of the adjacent short delay waveguide to be cascaded through the power division structure to be cascaded, a delay output end is separated from the power division structure to be cascaded, all the short delay waveguides to be cascaded are cascaded in sequence, input optical signals are input at the input end of the power division structure to be cascaded, and each stage of the power division structure to be cascaded outputs an optical signal with delay.
The invention splits a single linear long delay waveguide into a plurality of short delay waveguides to be cascaded, connects the output end of the short delay waveguide to be cascaded with the input end of the adjacent short delay waveguide to be cascaded through a power dividing structure to be cascaded, and sequentially cascades all the short delay waveguides to be cascaded. On one hand, the transverse length folding of the delay waveguide is realized through cascading, and the transverse size of the delay waveguide is reduced; on the other hand, a plurality of optical delay outputs are led out from one multi-cascade delay waveguide through the power division structure to be cascaded to construct multi-channel outputs, so that the delay paths among multiple channels are shared, and the integration level of the chip is increased. Compared with the multichannel delay array with mutually independent delay channels in the prior art, the invention can output all delay amount only by intercepting the longest delay waveguide in the prior art for splitting, cascading and power dividing, thereby greatly reducing the area of a delay chip and reducing the processing cost.
Further, splitting a single linear long delay waveguide into a plurality of short delay waveguides to be cascaded, inputting an optical signal into an input end of a first power division structure to be cascaded, connecting an output end of the power division structure to be cascaded with the input end of the first short delay waveguide to be cascaded, and outputting an optical signal with 0t delay quantity by another output end; the output end of the Nth to-be-cascaded short delay waveguide is connected with the input end of an (N +1) th to-be-cascaded power division structure, one output end of the (N +1) th to-be-cascaded power division structure is connected with the input end of an (N +1) th to-be-cascaded short delay waveguide, and the other output end of the (N +1) th to-be-cascaded power division structure outputs an optical signal with Nt delay, wherein N is more than or equal to 1; and the output end of the last delay waveguide directly outputs an optical signal with a delay amount.
Furthermore, a single linear long delay waveguide with the length of 3L is split into 3 short delay waveguides to be cascaded with the length of L, an input end of a first power division structure to be cascaded inputs an optical signal, one output end of the power division structure to be cascaded is connected with the input end of the first short delay waveguide to be cascaded, and the other output end of the power division structure to be cascaded outputs an optical signal with the delay amount of 0 t; the output end of the first to-be-cascaded short delay waveguide is connected with the input end of a second to-be-cascaded power division structure, one output end of the second to-be-cascaded power division structure is connected with the input end of a second to-be-cascaded short delay waveguide, and the other output end of the second to-be-cascaded power division structure outputs an optical signal with delay of 1 t; the output end of the second to-be-cascaded short delay waveguide is connected with the input end of a third to-be-cascaded power division structure, one output end of the third to-be-cascaded power division structure is connected with the input end of a third to-be-cascaded short delay waveguide, and the other output end of the third to-be-cascaded power division structure outputs an optical signal with 2t delay; and the output end of the third short delay waveguide to be cascaded directly outputs an optical signal with the delay amount of 3 t.
Furthermore, a single linear long delay waveguide is split into a plurality of short waveguides with the lengths of 1L and 2L … xL respectively, the short waveguide with the length of xL is used as the short delay waveguide to be cascaded, the other one is used as a non-cascaded waveguide, input optical signals are input at the input end of a first to-be-cascaded power division structure, one output end of the first to-be-cascaded power division structure is connected with the input end of a first to-be-cascaded short delay waveguide, the other output end of the first to-be-cascaded power division structure is connected with the input ends of x-1 non-cascaded waveguides through x-1 output ends in a 1x non-cascaded power division structure, the remaining output end in the 1 × x non-cascaded power division structure outputs an optical signal with the delay amount of 0t, and the output ends of the non-cascaded waveguides with the lengths of 1L and 2L … (x-1) L output optical signals with the delay amounts of 0t, 1t and 2t … (x-1) t; wherein, the 1 × x non-cascaded power division structure represents a power division structure having one input terminal and x output terminals.
The output end of the Nth to-be-cascaded short delay waveguide is connected with the input end of an (N +1) th to-be-cascaded power division structure, one output end of the (N +1) th to-be-cascaded power division structure is connected with the input end of the (N +1) th to-be-cascaded short delay waveguide, the other output end of the (N +1) th to-be-cascaded power division structure is respectively connected with the input ends of the (x-1) th non-cascaded waveguides through the x-1 output end in the 1x non-cascaded power division structure, the rest output end in the 1x non-cascaded power division structure outputs optical signals with the delay amount of Nxt, and the output ends of the non-cascaded waveguides with the lengths of 1L and 2L … (x-1) L and the lengths of (Nx +2) t … (Nx + x-1) t.
The last short delay waveguide to be cascaded (set as the Mth waveguide) is directly connected with the input ends of the x-1 non-cascaded waveguides through x-1 output ends in a 1 xx non-cascaded power division structure, the rest output end in the 1 xx non-cascaded power division structure outputs optical signals with the delay amount of Mxt, and the output ends of the non-cascaded waveguides with the lengths of 1L and 2L … (x-1) L respectively output optical signals with the delay amounts of (Mx +1) t and (Mx +2) t … (Mx + x-1) t.
Furthermore, the single linear long delay waveguide is split into a plurality of short waveguides with the length of 2L and a plurality of short waveguides with the length of L, the short waveguides with the length of 2L are both used as short delay waveguides to be cascaded, the short waveguides with the length of L are used as non-cascaded waveguides, an input end of a first power division structure to be cascaded inputs an optical signal, one output end of the first power division structure to be cascaded is connected with an input end of the first short delay waveguide to be cascaded, the other output end of the first power division structure to be cascaded is connected with an input end of the non-cascaded waveguides through one output end of a 1 × 2 non-cascaded power division structure, the other output end of the 1 × 2 non-cascaded power division structure outputs an optical signal with the delay of 0t, and the output end of the non-cascaded waveguides outputs an optical signal with the delay of 1 t.
The output end of the 1 st to-be-cascaded short delay waveguide is connected with the input end of the 2 nd to-be-cascaded power division structure, one output end of the 2 nd to-be-cascaded power division structure is connected with the input end of the 2 nd to-be-cascaded short delay waveguide, the other output end of the 2 nd to-be-cascaded power division structure is connected with the input end of a non-cascaded waveguide through one output end of a 1x2 non-cascaded power division structure, the other output end of the 1x2 non-cascaded power division structure outputs an optical signal with 2t of delay, and the output end of the non-cascaded waveguide outputs an optical signal with 3t of delay;
the output end of the 2 nd to-be-cascaded short delay waveguide is connected with the input end of a non-cascaded waveguide through one output end of a 1 × 2 non-cascaded power division structure, the other output end of the 1 × 2 non-cascaded power division structure outputs an optical signal with the delay amount of 4t, and the output end of the non-cascaded waveguide outputs an optical signal with the delay amount of 5 t.
Still further, the single linear long-delay waveguide is a waveguide based on a chirped bragg grating, and all the structural parameters of the short waveguides are the same except for the length, wherein the structural parameters include the waveguide width, the waveguide gap, the period interval of the grating teeth, the duty ratio and the tooth length.
Furthermore, the power division structure to be cascaded is a multi-mode interferometer, and the power ratio of the two output ends is regulated and controlled by controlling the input end of the multi-mode interferometer, so that the amplitude of the signal output port is adjusted.
Furthermore, the input end of the multimode interferometer is a square inlet, a first inclined plane is arranged at the joint of the input end and the upper part of the input end, a second inclined plane is arranged at the joint of the input end and the lower part of the input end, the first inclined plane and the second inclined plane are inclined towards the direction deviating from the central axis of the square inlet and are in a splayed shape, and the first inclined plane is connected with the third inclined plane through a plane and a vertical plane; the slope angles of the first slope, the second slope and the third slope relative to the central axis are the same, and the sum of the lengths of the first slope, the plane and the third slope in the direction of the central axis is equal to the length of the second slope in the direction of the central axis.
Further, the to-be-cascaded power division structure is an MZI electro-optic modulator, and the optical output of the delay array is switched and amplitude-modulated by adjusting the electrical input of the MZI electro-optic modulator.
Further, the power division structure to be cascaded is a directional coupler composed of dual waveguides, and the optical output of the delay array is subjected to amplitude modulation by adjusting the coupling length of the directional coupler.
Further, the optical time delay array chip is processed by a CMOS process or an EBL (electron beam lithography) process, and the chip material is one or more of silicon base, silicon nitride base, silicon oxide base and indium phosphide III-V family.
The invention has the advantages that: the method comprises the steps of splitting a single linear long delay waveguide into a plurality of short delay waveguides to be cascaded, connecting the output end of each short delay waveguide to be cascaded with the input end of the adjacent short delay waveguide to be cascaded through a power dividing structure to be cascaded, sequentially cascading all the short delay waveguides to be cascaded, and outputting a specific delay amount at each power dividing position; the transverse size of the delay waveguide is reduced through cascading, the multichannel output is constructed through the power dividing structure to be cascaded, the sharing of delay paths among channels is realized, the integration level of a chip is increased, the chip processing area is greatly reduced, and therefore the processing cost is reduced.
Drawings
FIG. 1 is a schematic diagram of a prior art chirped Bragg grating-based delay line structure;
FIG. 2 is a schematic diagram of a prior art cascade-less multi-channel delay array;
fig. 3 is a schematic diagram of a cascading method in an optical delay array chip based on chirped bragg gratings according to embodiment 1 of the present invention;
fig. 4 is a schematic structural diagram of an optical delay array chip based on chirped bragg gratings according to embodiment 1 of the present invention;
fig. 5 is a front view of a to-be-cascaded power division structure in an optical delay array chip based on a chirped bragg grating according to embodiment 1 of the present invention;
fig. 6 is a diagram of a power output simulation result of an optical delay array chip with 2-stage power division in an optical delay array chip based on a chirped bragg grating according to embodiment 1 of the present invention;
fig. 7 is a graph of a delay output simulation result of an optical delay array chip with 2-stage power division in an optical delay array chip based on chirped bragg gratings according to embodiment 1 of the present invention;
fig. 8 is a schematic structural diagram of an embodiment of an optical delay array chip based on chirped bragg gratings according to embodiment 2 of the present invention;
fig. 9 is a schematic diagram of a port loss and a transmission loss in an optical delay array chip based on chirped bragg gratings according to embodiment 2 of the present invention, where the port loss and the transmission loss vary with a waveguide length;
fig. 10 is a schematic structural diagram of another specific embodiment of an optical delay array chip based on chirped bragg gratings according to embodiment 2 of the present invention;
fig. 11 is a schematic diagram illustrating a relationship between lengths of short waveguides in an optical delay array chip based on chirped bragg gratings according to embodiment 2 of the present invention when the lengths are mixed by multiple multiples.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
The invention provides a multi-cascade waveguide structure for reducing the transverse size of a delay waveguide, and aims to solve the problem that the transverse length of a multi-channel optical delay array based on a chirped Bragg grating is too long. As shown in fig. 3, a schematic diagram of 2 cascaded waveguides instead of a single straight waveguide is given. The structural parameters of the single straight waveguide are kept unchanged, and the single straight waveguide is split and cascaded according to the length halving (L is changed into L/2), so that the conversion of the single linear long wave guide 2-cascaded short waveguide is completed. The same amount of delay occurs because the light travels the same path within the 2-stage waveguide and the tapered dispersive waveguide of the single straight waveguide (as in the black dashed path of fig. 3).
Based on the problems of loose structure and large processing area of the multichannel optical delay array, the invention further provides a cascade + power division structure. The multi-cascade waveguide has only one output end, so that only one delay quantity is output, and in order to enable the multi-cascade waveguide to output more delay quantities, the power division structure 2 to be cascaded is added at the cascade position, so that each cascade position can additionally output one delay quantity, and one N cascade waveguide can output N +1 delay quantities. Compared with the multi-channel delay array with mutually independent delay channels in fig. 2, by the cascade and power division structure, all delay amount can be output only by intercepting the longest delay waveguide in fig. 2 for splitting, cascading and power division, and the area of a delay chip is greatly reduced. According to the fundamental principle, the cascade + power division structure realizes the sharing of the delay paths among multiple channels, so that a plurality of delay waveguides can be reduced. The embodiments of the present invention are described in detail below. In this embodiment, the power division structure to be cascaded is a 1 × 2 power division structure, and has one input port and two output ports.
Referring to fig. 4, an optical delay array chip based on a chirped bragg grating includes a plurality of to-be-cascaded short delay waveguides 1 and a to-be-cascaded power division structure 2 having an input port and two output ports, an input optical signal is input to an input end of the first to-be-cascaded power division structure 2, and an output end of the to-be-cascaded power division structure 2 is connected to an input end of the first to-be-cascaded short delay waveguide 1; the output end of the nth to-be-cascaded short delay waveguide 1 is connected with the input end of the (N +1) th to-be-cascaded power division structure 2, one output end of the (N +1) th to-be-cascaded short delay waveguide 2 is connected with the input end of the (N +1) th to-be-cascaded short delay waveguide 1, wherein N is greater than or equal to 1, and the output end of the last delay waveguide and the other output ends of all to-be-cascaded power division structures 2 output optical signals with specific delay.
Continuing to refer to fig. 4, taking 3 short waveguides with the same length as an example, each short waveguide is taken as a short delay waveguide 1 to be cascaded, an input end of the first power division structure 2 to be cascaded inputs an optical signal, one output end of the power division structure 2 to be cascaded is connected to the input end of the first short delay waveguide 1 to be cascaded, and the other output end outputs an optical signal with a delay amount of 0 t; the output end of the first to-be-cascaded short delay waveguide 1 is connected with the input end of the second to-be-cascaded power division structure 2, one output end of the second to-be-cascaded power division structure 2 is connected with the input end of the second to-be-cascaded short delay waveguide 1, and the other output end outputs an optical signal with delay amount of 1 t. The output end of the second to-be-cascaded short delay waveguide 1 is connected with the input end of a third to-be-cascaded power division structure 2, one output end of the third to-be-cascaded power division structure 2 is connected with the input end of the third to-be-cascaded short delay waveguide 1, and the other output end outputs an optical signal with delay of 2 t. The output end of the third to-be-cascaded short delay waveguide 1 directly outputs an optical signal with the delay amount of 3 t.
As a further improved scheme of the present invention, the short delay waveguide to be cascaded is a waveguide based on a chirped bragg grating, and all the structural parameters of the short delay waveguide to be cascaded are the same, where the structural parameters include a waveguide width, a waveguide gap, a period interval of grating teeth, a duty ratio, and a tooth length. The structure of a waveguide based on a chirped bragg grating is shown in figure 1.
As a further improved scheme of the present invention, as shown in fig. 5, the to-be-cascaded power dividing structure 2 is a multimode interferometer, which has an input end and two output ends, and by adjusting the width of the input end plane 204, the optical power ratio between the output of the current stage and the input of the next stage can be continuously adjusted. As shown in fig. 5, in the present invention, the input end of the multimode interferometer has a tapered slope gradual change structure, the input end is a square inlet 201, a first slope 202 is arranged at the connection with the upper part of the input end, a second slope 203 is arranged at the connection with the lower part of the input end, and both the first slope 202 and the second slope 203 are inclined in a splayed manner towards the direction deviating from the central axis of the square inlet 201, and the inclination slopes of the first slope 202 and the second slope 203 are the same as each other with respect to the central axis; a plane 204 and a vertical plane 205 are arranged on the first inclined plane 202, the plane 204 is parallel to the upper part of the input port, and the vertical plane 205 is vertical to the upper part of the input port; adjoining the vertical surface 205 is a third inclined surface 206, which is inclined in the same direction and gradient as the first inclined surface 202. The width of the plane 204 is adjusted to continuously adjust and control the optical power ratio between the output of the current stage and the input of the next stage. The design of the first inclined plane 202, the second inclined plane 203 and the third inclined plane 206 can effectively reduce the light reflection of the next-stage delay waveguide entering the output end of the present stage, and reduce crosstalk and delay disturbance, which is the difference between the power divider of the present invention and the power divider in the prior art document [ IEEE 11th international reference on group iv optical, 2014, 187-. The two output end structures of the power dividing structure 2 to be cascaded are not specific, but only two ports identical to the input end are not described in detail here.
As a further improved scheme of the present invention, the to-be-cascaded power division structure 2 may also be an MZI electro-optical modulator, and the power of the output port may be adjusted and controlled even the port is closed by an external voltage, so that the output power may be adjusted and the port may be reconfigured. As in table 1, the 8-channel delay waveguide can be changed to 4-channel, 3-channel, etc. The power division structure 2 to be cascaded may also be a directional coupler composed of dual waveguides, and the optical output of the delay array is amplitude-modulated by adjusting the coupling length of the directional coupler.
Output port reconfiguration for table 18 channel delay waveguides
It should be noted that, the manufacturing process and the material of the chip are not particularly limited, and the chip material in the embodiment of the present invention is an SOI (silicon on insulator) wafer, but is not limited to an SOI wafer, and the material may be one or more of silicon base, silicon nitride base, silicon oxide base, and indium phosphide III-V group.
As shown in fig. 6, a simulation result diagram of the optical output power of the chirped bragg grating-based optical delay array chip for the 2-cascade power division is given, and as shown in fig. 7, a simulation result diagram of the delay curve of the chirped bragg grating-based optical delay array chip for the 2-cascade power division is given, and it can be seen that the power ratio of the two output ports is 2:8 and the delay ratio is 1: 2.
Through the above technical solution, in the optical delay array chip based on the chirped bragg grating provided in embodiment 1 of the present invention, the output end of the short delay waveguide 1 to be cascaded is connected to the input end of the short delay waveguide 1 to be cascaded adjacent to the output end of the short delay waveguide 1 to be cascaded through the power dividing structure 2 to be cascaded, and all the short delay waveguides 1 to be cascaded are cascaded in sequence. The transverse size of the delay waveguide is reduced through cascading, the delay path sharing among channels is realized through the power dividing structure 2 to be cascaded, the integration level of a chip is increased, the chip processing area is greatly reduced, and therefore the processing cost is reduced.
Example 2
The difference between embodiment 2 of the present invention and embodiment 1 is that: as shown in fig. 8, a single linear long delay waveguide 5 is split into a plurality of short waveguides with lengths of 1L and 2L … xL, the short waveguide with the length of xL is used as the short delay waveguide 1 to be cascaded, and the others are used as the non-cascaded waveguides 3. An input end of a first to-be-cascaded power division structure 2 inputs an optical signal, one output end of the first to-be-cascaded power division structure 2 is connected with an input end of a first to-be-cascaded short delay waveguide 1, the other output end of the first to-be-cascaded power division structure 2 is connected with an input end of a non-cascaded waveguide 3 through x-1 output ends in a 1x non-cascaded power division structure 4, the remaining output end in the 1x non-cascaded power division structure 4 outputs an optical signal with a delay of 0t, and the output ends of the non-cascaded waveguides 3 with lengths of 1L and 2L … (x-1) L output optical signals with delays of 1t and 2t … (x-1) t; wherein, the 1 × x non-cascaded power division structure 4 represents a power division structure having one input terminal and x output terminals, and the non-cascaded representation does not participate in the cascade.
The output end of the nth to-be-cascaded short delay waveguide 1 is connected with the input end of an N + 1th to-be-cascaded power dividing structure 2, one output end of the N + 1th to-be-cascaded short delay waveguide 2 is connected with the input end of the N + 1th to-be-cascaded short delay waveguide 1, the other output end of the N + 1th to-be-cascaded power dividing structure 2 is respectively connected with the input ends of x-1 non-cascaded waveguides 3 through x-1 output ends in a 1 xx non-cascaded power dividing structure 4, the rest output end in the 1 xx x non-cascaded power dividing structure 4 outputs optical signals with the delay amount of Nxt, and the output ends of the non-cascaded waveguides 3 with the lengths of 1L and 2L … (x-1) L respectively output optical signals with the delay amount of (Nx +1) t and (Nx +2) t … (Nx + x-1) t;
the last short delay waveguide to be cascaded (set as the Mth waveguide) is directly connected with the input ends of the x-1 non-cascaded waveguides through x-1 output ends in a 1 xx non-cascaded power division structure, the rest output end in the 1 xx non-cascaded power division structure outputs optical signals with the delay amount of Mxt, and the output ends of the non-cascaded waveguides with the lengths of 1L and 2L … (x-1) L respectively output optical signals with the delay amounts of (Mx +1) t and (Mx +2) t … (Mx + x-1) t.
Continuing to refer to fig. 8, a single linear delay waveguide 1 with a length of 5L is split into two short waveguides with a length of 2L and 1 short waveguide with a length of L, the short waveguides with a length of 2L are both used as short delay waveguides 1 to be cascaded, the short waveguides with a length of L are used as non-cascaded waveguides 3, and do not participate in the cascade, and one non-cascaded waveguide 3 with a length of L is added in each cascade. In fig. 8, two cascades are performed, so that two non-cascaded waveguides 3 with a length of L are supplemented, and finally, two short delay waveguides 1 to be cascaded with a length of 2L and three non-cascaded waveguides 3 with a length of L are provided. An input end of a first to-be-cascaded power division structure 2 inputs an optical signal, an output end of the to-be-cascaded power division structure 2 is connected with an input end of a first to-be-cascaded short waveguide with a length of 2L, another output end of the to-be-cascaded power division structure 2 is connected with a non-cascaded short waveguide with a length of 1L through an output end of a 1 × 2 non-cascaded power division structure 4, another output end of the 1 × 2 non-cascaded power division structure 4 directly outputs an optical signal with a delay of 0t, and an output end of the non-cascaded short waveguide outputs an optical signal with a delay of 1 t.
An output end of a 1 st to-be-cascaded short delay waveguide 1 is connected with an input end of a 2 nd to-be-cascaded power division structure 2, one output end of the 2 nd to-be-cascaded power division structure 2 is connected with an input end of the 2 nd to-be-cascaded short delay waveguide 1, another output end of the 2 nd to-be-cascaded power division structure 2 is connected with a non-cascaded waveguide 3 through an output end of a 1 × 2 non-cascaded power division structure 4, another output end of the 1 × 2 non-cascaded power division structure 4 outputs an optical signal with a delay of 2t, and an output end of the non-cascaded waveguide 3 outputs an optical signal with a delay of 3 t.
The output end of the 2 nd to-be-cascaded short delay waveguide 1 is directly connected with a non-cascaded waveguide 3 through one output end of a 1 × 2 non-cascaded power division structure 4, the other output end of the 1 × 2 non-cascaded power division structure 4 directly outputs an optical signal with delay of 4t, and the output end of the non-cascaded short delay waveguide 3 outputs an optical signal with delay of 5 t.
For a waveguide with a short length based on a chirped bragg grating, the bragg grating cannot completely reflect light, so that part of the light escapes from the optical loop from the tail end of the waveguide, resulting in a port loss L _ p, where the total loss L is L _ p + L _ t (as shown in fig. 9), where L _ t is a transmission loss and is proportional to the length of the delay waveguide. The port loss L _ p gradually decreases and approaches to zero with the increase of the length of the delay waveguide, and therefore, in order to reduce the loss, the cascade unit in the multi-channel cascade + power dividing structure 2 preferably selects the delay waveguide with the port loss L _ p smaller or 0. As shown in fig. 4, if L is used as the cascaded unit to construct 4L delay waveguides, the total loss L (4L) ═ 4 × L _ p (L) +4 × L _ t (L), whereas if L2L delay waveguides with the port loss L _ p being 0 are used as the cascaded unit, L (4L) ═ 2 × L _ t (2L) ═ 4 × L _ t (L), the loss term is reduced by 4L _ p (L). In this case, in order to reduce the loss, the full-cascade structure in embodiment 1 is changed to a half-cascade structure as shown in fig. 8, a waveguide of 2L length with a small port loss L _ p is selected as a cascade unit, and a waveguide of L length with a large port loss L _ p does not participate in the cascade. Full cascading means that all the short waveguides participate in cascading, half cascading means that a part of the short waveguides participate in cascading, and the rest of the short waveguides do not participate in cascading.
Taking the construction of eight-channel delay arrays of 0t, 1t, 2t, 3t, 4t, 5t, 6t and 7t as an example. If 8 cascades are performed according to the full-cascade method of embodiment 1, as shown in fig. 4, the signal output from the port outputting the delay amount 7t needs to pass through 7 short waveguides with a length of 1L, and assuming that the loss of each short waveguide with 1L is 1db, the final loss is 7 db. If 4-stage concatenation is to be performed according to the semi-stage concatenation method of embodiment 2, as shown in fig. 8, a signal output from a port outputting a delay amount of 7t needs to pass through 3 short waveguides of 2L length and 1 short waveguide of 1L length. Since the shorter the length, the greater the escape loss of light at the end of the waveguide, the 2L length short waveguide will have a loss that is less than 2 times the 1L waveguide loss and possibly even less than the 1L short waveguide loss, assuming a 1.2db short waveguide loss per 2L length. The final loss is 1.2db +1.2db +1.2db +1db ═ 4.6 db. Therefore, under the condition that the loss of a short waveguide port with the length of 1L is large, the loss of the half cascade is smaller than that of the full cascade.
The half-cascade mode shown in fig. 8 is an optimal solution, and in practical application, the half-cascade mode is not limited to the cascade mode shown in fig. 8, and the waveguide to be cascaded may also be a delay waveguide with a length multiple relationship of 3 times as shown in fig. 10 or a hybrid combination of delay waveguides with a length multiple relationship of 2 times and 3 times as shown in fig. 11.
Fig. 2 and fig. 10 are combined to split a single linear long delay waveguide 5 into a plurality of short waveguides with lengths of 1L and 2L … 3L, respectively, the short waveguide with the length of 3L is used as the short delay waveguide 1 to be cascaded, and the others are used as the non-cascaded waveguides 3. An input end of a first to-be-cascaded power division structure 2 inputs an optical signal, one output end of the first to-be-cascaded power division structure 2 is connected with an input end of a first to-be-cascaded short delay waveguide 1, the other output end of the first to-be-cascaded power division structure 2 is respectively connected with non-cascaded waveguides 3 with the lengths of 1L and 2L through 2 output ends of a 1 × 3 non-cascaded power division structure 4, the remaining output end of the 1 × 3 non-cascaded power division structure 4 directly outputs an optical signal with the delay amount of 0t, and the output ends of the non-cascaded waveguides 3 with the lengths of 1L and 2L respectively output optical signals with the delay amounts of 1t and 2t, wherein the 1 × x non-cascaded power division structure 4 represents a power division structure with one input end and x output ends. An output end of a 1 st to-be-cascaded short delay waveguide 1 is connected with an input end of a 2 nd to-be-cascaded power division structure 2, one output end of the 2 nd to-be-cascaded power division structure 2 is connected with an input end of the 2 nd to-be-cascaded short delay waveguide 1, the other output end of the 2 nd to-be-cascaded power division structure 2 is respectively connected with non-cascaded waveguides 3 with lengths of 1L and 2L through 2 output ends of a 1x 3 non-cascaded power division structure 4, the remaining output end of the 1x 3 non-cascaded power division structure 4 outputs optical signals with delay of 3t, and the output ends of the non-cascaded waveguides 3 with lengths of 1L and 2L respectively output optical signals with delay of 4t and 5 t.
The output end of the 2 nd to-be-cascaded short delay waveguide 1 is directly connected with the 1L and 2L non-cascaded waveguides 3 through 2 output ends in a 1 × 3 non-cascaded power division structure 4, the remaining output end in the 1 × 3 non-cascaded power division structure 4 outputs optical signals with delay of 6t, and the output ends of the 1L and 2L non-cascaded waveguides 3 output optical signals with delay of 7t and 8 t.
In the invention, L is the length, but the specific length value is not limited, the length value is determined according to the single linear type long delay waveguide 5, and after the single linear type long delay waveguide 5 is split into a plurality of sections of short waveguides with multiple relations, the length of the short waveguide with the minimum multiple is L. The delay amount t is not limited, and 1t, 2t, 3t and the like are only used for representing the multiple relation among the delay amounts. The waveguide cascade based on the chirped bragg grating must ensure that the bandwidths of all the cascade units are consistent, so the structural parameters of the short delay waveguide 1 to be cascaded and the non-cascaded short waveguide in the invention are the same except for the length of the waveguide.
The half-cascade method shown in fig. 8 and fig. 10 is an optimal solution, and in practical application, the half-cascade method is not limited to the cascade method in which the length of the waveguide to be cascaded in fig. 8 or fig. 10 is a certain specific multiple, and may be a hybrid method in which the multiple relationship is 1 time, 2 times, 3 times, or 4 times. As shown in fig. 11, waveguides having a length multiple relationship of 2 times and 3 times are used as waveguides to be cascaded, and a waveguide having a length of 1 time and a waveguide having a partial length of 2 times do not participate in the cascade.
The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. An optical time delay array chip based on a chirped Bragg grating is characterized by comprising a plurality of short delay waveguides to be cascaded and a power division structure to be cascaded, wherein the power division structure to be cascaded is provided with an input port and two output ports, the output end of each short delay waveguide to be cascaded is connected with the input end of the adjacent short delay waveguide to be cascaded through the power division structure to be cascaded, a delay output end is separated from the power division structure to be cascaded, all the short delay waveguides to be cascaded are cascaded in sequence, an input optical signal is input into the input end of the power division structure to be cascaded, which is positioned at the head end, and each stage of the power division structure to be cascaded outputs an optical signal with delay.
2. The chip according to claim 1, wherein a single linear long delay waveguide is split into a plurality of short delay waveguides to be cascaded, an input end of a first power division structure to be cascaded inputs an optical signal, an output end of the power division structure to be cascaded is connected to an input end of the first short delay waveguide to be cascaded, and another output end outputs an optical signal with a delay amount of 0 t; the output end of the Nth to-be-cascaded short delay waveguide is connected with the input end of an (N +1) th to-be-cascaded power division structure, one output end of the (N +1) th to-be-cascaded power division structure is connected with the input end of an (N +1) th to-be-cascaded short delay waveguide, and the other output end of the (N +1) th to-be-cascaded power division structure outputs an optical signal with Nt delay, wherein N is more than or equal to 1; and the output end of the last delay waveguide directly outputs an optical signal with a delay amount.
3. The chip according to claim 2, wherein a single linear long delay waveguide with a length of 3L is split into 3 short delay waveguides to be cascaded with a length of L, an input end of a first power division structure to be cascaded inputs an optical signal, an output end of the power division structure to be cascaded is connected to an input end of the first short delay waveguide to be cascaded, and another output end of the power division structure to be cascaded outputs an optical signal with a delay amount of 0 t; the output end of the first to-be-cascaded short delay waveguide is connected with the input end of a second to-be-cascaded power division structure, one output end of the second to-be-cascaded power division structure is connected with the input end of a second to-be-cascaded short delay waveguide, and the other output end of the second to-be-cascaded power division structure outputs an optical signal with delay of 1 t; the output end of the second to-be-cascaded short delay waveguide is connected with the input end of a third to-be-cascaded power division structure, one output end of the third to-be-cascaded power division structure is connected with the input end of a third to-be-cascaded short delay waveguide, and the other output end of the third to-be-cascaded power division structure outputs an optical signal with 2t delay; and the output end of the third short delay waveguide to be cascaded directly outputs an optical signal with the delay amount of 3 t.
4. The chip of claim 1, wherein the chip is configured to split a single linear long delay waveguide into a plurality of short waveguides with lengths of 1L and 2L … xL, the short waveguide with a length of xL is used as the short delay waveguide to be cascaded, the others are used as non-cascaded waveguides, an input end of a first power division structure to be cascaded inputs an optical signal, an output end of the first power division structure to be cascaded is connected to an input end of a first short delay waveguide to be cascaded, another output end of the first power division structure to be cascaded is connected to input ends of x-1 non-cascaded waveguides through x-1 output ends of a 1 × x non-cascaded power division structure, a remaining output end of the 1 × x non-cascaded power division structure outputs an optical signal with a delay of 0t, and output ends of the non-cascaded waveguides with lengths of 1L and 2L … (x-1) L output a delay of 1t, and t, t and t is a total length of the output ends of the non-cascaded waveguides of 1L and 2, 2t … (x-1) t; wherein, the 1 × x non-cascaded power division structure represents a power division structure having one input end and x output ends and does not participate in the cascade connection;
the output end of the Nth to-be-cascaded short delay waveguide is connected with the input end of an (N +1) th to-be-cascaded power division structure, one output end of the (N +1) th to-be-cascaded power division structure is connected with the input end of the (N +1) th to-be-cascaded short delay waveguide, the other output end of the (N +1) th to-be-cascaded power division structure is respectively connected with the input ends of the (x-1) th non-cascaded waveguides through the x-1 output end in the 1x non-cascaded power division structure, the rest output end in the 1x non-cascaded power division structure outputs optical signals with the delay amount of Nxt, and the output ends of the non-cascaded waveguides with the lengths of 1L and 2L … (x-1) L respectively output optical signals with the delay amount of (Nx +1) t and (Nx +2) t … (Nx + x;
the last to-be-cascaded short delay waveguide is directly connected with the input ends of the x-1 non-cascaded waveguides through x-1 output ends in a 1 xx non-cascaded power division structure, the remaining output end in the 1 xx non-cascaded power division structure outputs an optical signal with the delay amount of Mxt, the output ends of the non-cascaded waveguides with the lengths of 1L and 2L … (x-1) L respectively output optical signals with the delay amounts of (Mx +1) t and (Mx +2) t … (Mx + x-1) t, and the last to-be-cascaded short delay waveguide is the Mth to-be-cascaded short delay waveguide.
5. The chip according to claim 4, the method is characterized in that a single linear long delay waveguide is split into a plurality of short waveguides with the length of 2L and a plurality of short waveguides with the length of L, the short waveguides with the length of 2L are used as short delay waveguides to be cascaded, the short waveguides with the length of L are used as non-cascaded waveguides, input optical signals are input at the input end of a first power division structure to be cascaded, one output end of the first power division structure to be cascaded is connected with the input end of the first short delay waveguide to be cascaded, the other output end of the first power division structure to be cascaded is connected with a non-cascaded waveguide through 1 output end in a 1x2 non-cascaded power division structure, the other output end of the 1 × 2 non-cascaded power division structure outputs an optical signal with a delay amount of 0t, and the output end of the non-cascaded waveguide outputs an optical signal with a delay amount of 1 t;
the output end of the 1 st to-be-cascaded short delay waveguide is connected with the input end of the 2 nd to-be-cascaded power division structure, one output end of the 2 nd to-be-cascaded power division structure is connected with the input end of the 2 nd to-be-cascaded short delay waveguide, the other output end of the 2 nd to-be-cascaded power division structure is connected with a non-cascaded waveguide through one output end of a 1x2 non-cascaded power division structure, the other output end of the 1x2 non-cascaded power division structure outputs an optical signal with 2t of delay, and the output end of the non-cascaded waveguide outputs an optical signal with 3t of delay;
the output end of the 2 nd to-be-cascaded short delay waveguide is connected with the input end of one non-cascaded waveguide through one output end of a 1 × 2 non-cascaded power division structure, the other output end of the 1 × 2 non-cascaded power division structure outputs an optical signal with the delay amount of 4t, and the output end of the non-cascaded waveguide outputs an optical signal with the delay amount of 5 t.
6. The chip according to claim 3 or 5, wherein the single linear long delay waveguide is a waveguide based on a chirped Bragg grating, and all the short waveguides have the same structural parameters except for the length, wherein the structural parameters include the waveguide width, the waveguide gap, the periodic interval of the grating teeth, the duty ratio and the tooth length.
7. The chirped bragg grating-based optical delay array chip according to claim 1, wherein the to-be-cascaded power division structure is a multimode interferometer, and the amplitude of the signal output port is adjusted by controlling the input end structure of the multimode interferometer to adjust the power ratio of the two output ends.
8. The chip as claimed in claim 7, wherein the input end of the multi-mode interferometer is a square entrance, a first inclined plane is disposed at a junction with an upper portion of the input end, a second inclined plane is disposed at a junction with a lower portion of the input end, the first inclined plane and the second inclined plane are both inclined in a splay shape deviating from a central axis direction of the square entrance, and the first inclined plane is connected to the third inclined plane through a plane and a vertical plane; the slope angles of the first slope, the second slope and the third slope relative to the central axis are the same, and the sum of the lengths of the first slope, the plane and the third slope in the direction of the central axis is equal to the length of the second slope in the direction of the central axis.
9. The chip according to claim 1, wherein the power division structure to be cascaded is an MZI electro-optic modulator, and an optical output of the delay array is switched and amplitude-modulated by adjusting an electrical input of the MZI electro-optic modulator.
10. The chip according to claim 1, wherein the power division structure to be cascaded is a directional coupler composed of two waveguides, and the optical output of the delay array is amplitude-modulated by adjusting the coupling length of the directional coupler.
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