CN111627986A - Expandable quantum bit structure and preparation method thereof - Google Patents

Expandable quantum bit structure and preparation method thereof Download PDF

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CN111627986A
CN111627986A CN202010577193.2A CN202010577193A CN111627986A CN 111627986 A CN111627986 A CN 111627986A CN 202010577193 A CN202010577193 A CN 202010577193A CN 111627986 A CN111627986 A CN 111627986A
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quantum dot
drain
source
metal gate
detected
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李海欧
徐刚
刘赫
曹刚
郭国平
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University of Science and Technology of China USTC
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Abstract

An expandable quantum bit structure and a preparation method thereof, the structure comprises: the device comprises a substrate (100), wherein rectangular grooves (102) arranged in an array are formed in the substrate, positioning type self-organization germanium-silicon nanowires (103) grow on two sides of each rectangular groove (102), and the positions and the sizes of the positioning type self-organization germanium-silicon nanowires (103) are controllable; the source and drain electrodes are arranged at two ends of the positioning type self-organizing germanium-silicon nanowire (103); the source and drain peripheral large electrode (300) is connected with the source and drain electrode; the insulating layer (400) is formed above the source-drain peripheral large electrode (300), and a charge induction quantum dot top metal gate (401) and a detected quantum dot top metal gate (402) which are separated are formed on the insulating layer (400); and the top layer peripheral large electrode (500) is connected with the top layer metal grid. The hole quantum spin bit of the quantum bit structure has longer coherence time, is beneficial to the expansion of the quantum bit structure, and the measurement mode belongs to nondestructive measurement and has high sensitivity.

Description

Expandable quantum bit structure and preparation method thereof
Technical Field
The present disclosure relates to the field of quantum computing, and in particular, to an expandable qubit structure and a method for fabricating the same.
Background
As the integration of chips has entered the nanometer scale, the quantum mechanical effect is not negligible, and in order to further promote the development of the chip field, physicists have proposed the concept of quantum computation. The quantum computing system based on the semiconductor quantum dots has higher efficiency than the classical scheme on certain specific problems, thereby attracting great attention of the scientific research and industrial fields.
Quantum computing systems based on semiconductor quantum dots need to complete quantum computation through a series of operations on qubits, and therefore, the coherence time and the number of bits of a qubit have direct decisive significance on the computational power and complexity of quantum computing systems. Among semiconductor materials, germanium and silicon, which are group IV elements, are considered to be the best semiconductor quantum dot quantum computing material systems due to their long spin qubit lifetimes and phase de-coherence times. The hole carrier in the germanium material has stronger spin orbit coupling effect while having long spin qubit coherence time, and can perform bit control more quickly, thereby realizing a qubit system reaching the fault-tolerant quantum computing threshold. For the above reasons, quantum dots prepared based on silicon germanium materials are an excellent platform for realizing high fidelity semiconductor quantum computing.
In the related art, a multi-quantum dot structure with a detection channel is prepared based on silicon germanium two-dimensional electron gas, but the method has the technical problems of number limitation, electrode size precision limitation, preparation extensible quantum bit structure limitation and the like.
Disclosure of Invention
Technical problem to be solved
In view of the above technical problems, the present disclosure provides an expandable qubit structure and a method for manufacturing the same, which are used to at least partially solve the technical problems in the prior art, such as the number limitation of a multi-quantum dot structure with a detection channel prepared based on a silicon germanium two-dimensional electron gas, the limitation of the electrode size precision, and the limitation of the preparation of the expandable qubit structure.
(II) technical scheme
According to a first aspect of the present disclosure, there is provided a scalable qubit structure comprising: the substrate 100 is provided with rectangular grooves 102 arranged in an array, positioning type self-organizing germanium-silicon nanowires 103 grow on two sides of the rectangular grooves 102, and the positions and the sizes of the positioning type self-organizing germanium-silicon nanowires 103 are controllable; a charge induction quantum dot source 301 and a charge induction quantum dot drain 302, which are respectively arranged at two ends of a positioning type self-organizing germanium-silicon nanowire 103; a detected quantum dot source 303 and a detected quantum dot drain 304, which are respectively arranged at two ends of the positioning type germanium-silicon nanowire 103 adjacent to the positioning type self-organizing germanium-silicon nanowire 103; the source-drain peripheral large electrode 300 is connected with a charge induction quantum dot source 301, a charge induction quantum dot drain 302, a detected quantum dot source 303 and a detected quantum dot drain 304; the insulating layer 400 is formed above the source-drain peripheral large electrode 300, a charge induction quantum dot top metal gate 401 and a detected quantum dot top metal gate 402 are formed on the insulating layer 400, the charge induction quantum dot top metal gate 401 is arranged between the charge induction quantum dot source 301 and the charge induction quantum dot drain 302, and the detected quantum dot top metal gate 402 is arranged between the detected quantum dot source 303 and the detected quantum dot drain 304; the top peripheral large electrode 500 is connected with the charge-sensing quantum dot top metal gate 401 and the detected quantum dot top metal gate 402.
Optionally, the length range of the positioning type self-organizing germanium-silicon nanowire 103 is 1-3 um, the width range is 60-150 nm, and the height range is 4-6 nm.
Optionally, the thickness of the substrate 100 ranges from 600 um to 800 um.
Optionally, the length of the rectangular groove 102 ranges from 2um to 4um, the width ranges from 300 nm to 500nm, and the depth ranges from 60nm to 90 nm.
Optionally, the charge-induced quantum dot top metal gate 401 and the detected quantum dot top metal gate 402 are in a strip shape, and the width of the strip shape is 20-60 nm.
Optionally, the distance between the charge-induced quantum-dot top metal gate 401 and the detected quantum-dot top metal gate 402 is 20-60 nm.
Optionally, the charge-induced quantum dot top metal gate 401, the detected quantum dot top metal gate 402 and the top peripheral large electrode 500 are made of titanium and palladium, wherein the thickness range of titanium is 2-5 nm, and the thickness range of palladium is 20-40 nm.
Optionally, the thickness of the insulating layer 400 is in the range of 10-25 nm.
Optionally, the material of the insulating layer 400 includes aluminum oxide or hafnium oxide.
According to another aspect of the present disclosure, there is provided a method for preparing an expandable qubit structure, comprising: carrying out integral marking positioning on the substrate 100, and determining the position and the integral size of the quantum bit structure, wherein the substrate 100 is a positioning type self-organization germanium-silicon nanowire substrate; preparing metal marks for alignment and photographing of all electrodes of the qubit structure on the substrate 100; scanning out the positioning type self-organizing germanium-silicon nano-wires 103 according to the metal marks; preparing a charge induction quantum dot source 301 and a charge induction quantum dot drain 302 at two ends of a positioning type self-organizing germanium-silicon nanowire 103, preparing a detected quantum dot source 303 and a detected quantum dot drain 304 at two ends of the positioning type germanium-silicon nanowire 103 adjacent to the positioning type self-organizing germanium-silicon nanowire 103, and preparing source drain peripheral large electrodes 300 respectively corresponding to the charge induction quantum dot source 301, the charge induction quantum dot drain 302, the detected quantum dot source 303 and the detected quantum dot drain 304; preparing an insulating layer 400 on the source-drain peripheral large electrode 300; according to the metal mark, a charge induction quantum dot top metal gate 401 and a detected quantum dot top metal gate 402 are separately prepared on the insulating layer 400, and a top peripheral large electrode 500 is prepared.
(III) advantageous effects
The present disclosure provides an expandable qubit structure and a method for making the same, which have the following beneficial effects:
1. the quantum bit structure is based on the positioning type self-organizing germanium-silicon nanowire, so that a hole quantum spin bit of the quantum bit structure has longer coherence time.
2. The position and the size of the positioning type self-organizing germanium-silicon nanowire in the quantum bit structure are controllable, so that the preparation and the mutual coupling of multiple quantum dots are facilitated, and the expansion of the quantum bit structure is facilitated.
3. The energy band structure of the nanowire is adjusted through the discrete charge induction quantum dot top metal grid and the detected quantum dot top metal grid, so that a high-quality hole carrier electronic control quantum dot system is obtained.
4. The mode of measuring the quantum bit by the quantum bit structure belongs to nondestructive measurement and has high sensitivity.
Drawings
For a more complete understanding of the present disclosure and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure, and together with the description serve to explain the principles of the disclosure. Wherein:
fig. 1 schematically shows a positioning type germanium-silicon nanowire substrate and a general mark and nanowire region position information diagram on the substrate according to an embodiment of the disclosure;
fig. 2 schematically shows a labeling diagram for preparing all electrode alignment and photographing of an extendable qubit structure on a localized sige nanowire substrate according to an embodiment of the disclosure;
fig. 3 schematically illustrates a source-drain electrode structure diagram of an expandable qubit structure in an embodiment of the disclosure;
fig. 4 schematically illustrates a nanoscale structure diagram inside a scalable qubit structure region in accordance with an embodiment of the disclosure;
fig. 5 schematically illustrates a peripheral overall structure diagram of an extensible qubit structure according to an embodiment of the disclosure;
fig. 6 schematically illustrates a flow chart of a method of scalable qubit structure fabrication of an embodiment of the present disclosure;
fig. 7 schematically illustrates a graph of charge transport information of opposite quantum dots detected by charge-sensing quantum dots according to an embodiment of the disclosure.
[ reference numerals ]
100 substrates, 101-substrate integral cross marks, 102-rectangular grooves, 103-positioning type self-organizing germanium-silicon nanowires, 200-micron-sized cross alignment marks, 201-nanometer-sized cross alignment marks, 300-source drain peripheral large electrodes, 301-charge induction quantum dot source electrodes, 302-charge induction quantum dot drain electrodes, 303-detected quantum dot source electrodes, 304-detected quantum dot drain electrodes, 400-insulating layers, 401-charge induction quantum dot top layer metal grid electrodes, 402-detected quantum dot top layer metal grid electrodes, 500-top layer peripheral large electrodes, 501-hundred micron write field regions, and nanoscale electrodes are located in the regions.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the disclosure. It may be evident, however, that one or more embodiments may be practiced without these specific details. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The terms "comprises," "comprising," and the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
The embodiment of the disclosure provides an indirectly-measured extensible qubit structure and a preparation method thereof, wherein the extensible qubit structure is based on a positioning type self-organizing silicon germanium nanowire material, and due to the effect of asymmetric stress of a germanium silicon nanowire shed-shaped structure, the structural material generates the damage of light-heavy hole energy level degeneracy, so that almost all carriers of the structural material are heavy holes. Due to the specific growth mode of the nanowire, the size, the position and the number of the nanowire which grows in a positioning mode are controllable, great convenience is brought to preparation and processing of a quantum bit structure and indirect measurement, and meanwhile, the nanowire has better integration and expandability.
Therefore, in order to realize the indirect measurement of the quantum bit and the expansion of the structure, on the basis of the material, the embodiment of the disclosure designs and prepares a device based on the coupling of the positioning type germanium-silicon nano wire and multiple quantum dots, the device is integrated on two germanium-silicon nano wires with controllable positions and a short distance, and two double quantum dots are coupled with each other and respectively used as a charge induction quantum dot and a detected double quantum dot. In a relatively small hole region, the tunneling coupling between electrodes of the quantum dots and between the quantum dots is weakened, so that a direct current signal is difficult to detect, and the charge state information of the opposite quantum dots can be measured by the charge induction quantum dots. The structure utilizes the positioning and array growth of the germanium nanowires, facilitates the preparation and mutual coupling of a plurality of quantum dots, can also realize high-sensitivity nondestructive measurement, is a premise for realizing multi-quantum-dot coupling and multi-bit integration based on the germanium-silicon nanowires, and has important significance for realizing multi-quantum-bit expansion.
For the purpose of promoting a better understanding of the objects, aspects and advantages of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings.
Referring to fig. 1, 4 and 5, the scalable qubit structure may include, for example:
the substrate 100, the substrate 100 is a localized germanium-silicon nanowire substrate, rectangular grooves 102 arranged in an array are formed on the substrate, and localized self-organized germanium-silicon nanowires 103 grow on two sides of the rectangular grooves 102, as described above, the size, position and number of the nanowires grown in a localized manner are controllable due to the specific growth mode of the nanowires.
In a feasible manner of the present embodiment, the thickness of the substrate 100 may be in a range of 600 to 800um, and preferably is 725 um. The substrate 100 may be an undoped substrate. The rectangular groove 102 has a length of 2 to 4um, preferably 3um, a width of 300 to 500nm, a width of 400nm, a depth of 60 to 90nm, and a depth of 70 nm. The positioning type self-organizing germanium-silicon nanowires 103 are strip-shaped nanowires, the length range of the nanowires is 1-3 um, the preferred length is 2um, the width range is 60-150 nm, the preferred width is 90nm, the height range is 4-6 nm, and the preferred height is 5 nm.
A charge induction quantum dot source 301 and a charge induction quantum dot drain 302, which are respectively disposed at two ends of the positioning type self-organizing sige nanowire 103. A detected quantum dot source 303 and a detected quantum dot drain 304, which are respectively disposed at two ends of the positioning type sige nanowire 103 adjacent to the positioning type self-organizing sige nanowire 103. Each source/drain electrode may be made of a palladium material, and the thickness of each source/drain electrode may be 35nm, which may be set according to actual requirements, and the disclosure is not limited.
The source-drain peripheral large electrode 300, which may correspond to the charge-induced quantum dot source 301, the charge-induced quantum dot drain 302, the detected quantum dot source 303, and the detected quantum dot drain 304 one by one, is connected to the tips of the charge-induced quantum dot source 301, the charge-induced quantum dot drain 302, the detected quantum dot source 303, and the detected quantum dot drain 304, respectively. The source-drain peripheral large electrode 300 may also be made of a palladium material, and the thickness thereof may be 35nm, for example, and may be specifically set according to actual requirements, which is not limited in the present disclosure.
The insulating layer 400 is formed above the source-drain peripheral large electrode 300, a charge induction quantum dot top metal gate 401 and a detected quantum dot top metal gate 402 are formed on the insulating layer 400, the charge induction quantum dot top metal gate 401 is arranged between the charge induction quantum dot source 301 and the charge induction quantum dot drain 302, and the detected quantum dot top metal gate 402 is arranged between the detected quantum dot source 303 and the detected quantum dot drain 304.
In a feasible manner of this embodiment, the thickness of the insulating layer 400 may be in a range of 10-25nm, and preferably 15 nm. The material of the insulating layer 400 may be aluminum oxide or hafnium oxide, and preferably, aluminum oxide. The charge induction quantum dot top layer metal gate 401 and the detected quantum dot top layer metal gate 402 can be made of titanium and palladium, the thickness of the titanium can be 2-5 nm, the preferable thickness can be 4nm, the thickness of the palladium can be 20-40 nm, the preferable thickness can be 30nm, and the titanium is an adhesion layer.
In a feasible manner of this embodiment, the charge-sensing quantum dot top metal gate 401 and the detected quantum dot top metal gate 402 may be in a stripe shape, a width of the stripe shape may be 20 to 60nm, preferably, a width of the stripe shape may be 35nm, and a distance between the charge-sensing quantum dot top metal gate 401 and the detected quantum dot top metal gate 402 may be 20 to 60nm, preferably, a distance may be 35 nm.
The top layer peripheral large electrode 500 is connected with the charge induction quantum dot top layer metal electrode 401 and the detected quantum dot top layer metal electrode 402. The top layer peripheral large electrode 500 is used for applying a certain range of voltage to the charge-induced quantum dot top layer metal electrode 401 and the detected quantum dot top layer metal electrode 402 to form a charge-induced quantum dot and a detected double-point. As shown in fig. 7, when charge is transported in the two points being probed, a change in conductance in the charge-induced quantum dots is caused, resulting in a conductance peak.
In a feasible manner of this embodiment, the material of the top layer peripheral large electrode 500 may be titanium and palladium, the thickness of the titanium may be in a range of 2 to 5nm, preferably 4nm, the thickness of the palladium may be in a range of 20 to 40nm, preferably 30nm, wherein the titanium is an adhesion layer.
In summary, the embodiments of the present disclosure provide an expandable qubit structure, which is based on a localized self-organized sige nanowire, so that a hole quantum spin bit of the qubit structure has a longer coherence time. The position and the size of the positioning type self-organizing germanium-silicon nanowire in the quantum bit structure are controllable, so that the preparation and the mutual coupling of multiple quantum dots are facilitated, and the expansion of the quantum bit structure is facilitated. And the adjustment of the nanowire energy band structure is realized through the discrete charge induction quantum dot top metal electrode and the detected quantum dot top metal electrode, so that a high-quality hole carrier electronic control quantum dot system is obtained. In addition, the mode of measuring the quantum bit by the quantum bit structure belongs to nondestructive measurement, and the quantum bit structure can have high sensitivity by combining the setting of the structure parameters of each structure.
An embodiment of the present disclosure further provides a method for preparing the scalable qubit structure, please refer to fig. 2, fig. 3, and fig. 6, where the method may include:
and S1, positioning the whole mark on the substrate, and determining the position and the whole size of the qubit structure.
The substrate 100 selects a positioning type self-organizing sige nanowire substrate, and the operation S1 specifically includes: and cutting the grown positioning type germanium-silicon nanowire substrate into square small blocks with the side length of 1 cm. And cleaning the substrate by using a standard sample cleaning process, then placing the substrate into an electron microscope, and recording the position information of the inherent mark and the positioning type nanowire region on the substrate so as to determine the position and the whole size of the expandable qubit structure.
And S2, preparing metal marks for alignment and photographing of all electrodes of the qubit structure on the substrate.
In the above operation S2, metal marks for all electrode alignment and photographing of the scalable qubit structure can be prepared by electron beam exposure, electron beam evaporation coating, and metal lift-off techniques. As shown in fig. 2, specifically: a sample substrate is cleaned by using a standard sample cleaning process, 2 groups of large cross electrodes 200 with the micron level are exposed on a substrate 100 of the positioning type germanium-silicon nanowire by using an electron beam exposure technology, and then four small cross electrodes with the nanometer level are exposed to serve as a photographing alignment mark and an alignment mark 201. And plating a titanium + gold metal layer on the cross marks by using an electron beam evaporation coating technology, wherein the thickness of titanium can be 5nm, the thickness of gold can be 50nm, and the cross metal marks are used as the basis for subsequent positioning photographing and exposure alignment of all metal electrodes.
And S3, scanning the positioning type self-organizing germanium-silicon nano-wires according to the metal marks.
In the above operation S2, the localized type self-organized sige nanowires 103 on the substrate 100 can be found by using the localized photographing technique of the electron beam exposure system. The method specifically comprises the following steps: on the basis of the preparation of the sample, the sample is cleaned by using a standard sample cleaning process, and then the positioning photographing technology of an electron beam exposure system is used for scanning the positioning type self-organizing germanium-silicon nanowires 103 in the area by taking the exposed nano-scale cross metal electrode as a positioning mark 201 and photographing and storing the positioning type self-organizing germanium-silicon nanowires. And (3) corresponding the positioning type self-organizing nanowire picture containing the position information with an exposure file, and drawing two groups of source and drain electrodes to be exposed in the next step.
And S4, preparing source and drain electrodes.
A charge induction quantum dot source 301 and a charge induction quantum dot drain 302 are prepared at two ends of a positioning type self-organizing germanium-silicon nanowire 103, wherein the positioning type self-organizing germanium-silicon nanowire (a detected quantum dot source 303 and a detected quantum dot drain 304 are prepared at two ends of the positioning type self-organizing germanium-silicon nanowire 103 adjacent to the positioning type self-organizing germanium-silicon nanowire 103, and a source drain peripheral large electrode 300 corresponding to the charge induction quantum dot source 301, the charge induction quantum dot drain 302, the detected quantum dot source 303 and the detected quantum dot drain 304 respectively is prepared.
In a feasible manner of this embodiment, two sets of source and drain electrodes with an expandable qubit structure can be prepared by electron beam exposure and electron beam evaporation coating. The method specifically comprises the following steps: on the basis of the preparation of the sample, a sample standard sample cleaning process is cleaned, after specific electron beam glue is uniformly coated, the exposure is carried out by using an electron beam exposure technology, nanoscale source and drain electrodes (301, 302, 303 and 304) with an expandable quantum bit structure are prepared, a prepared cross metal electrode mark is used for alignment during electron beam overlay exposure, after the electron beam exposure is finished, pattern development is carried out in specific developing solution, then diluted hydrofluoric acid solution is used for placing for 10s for wet etching, and a silicon dioxide oxidation layer on the surface is removed. Then, carrying out electron beam evaporation coating, wherein the coating metal can be palladium with the thickness of 35 nm; and forming nanoscale source and drain electrodes (301, 302, 303, 304) of the scalable quantum bit structure after finishing the metal stripping. The source-drain peripheral large electrodes 300 respectively corresponding to the nanoscale source-drain electrodes (301, 302, 303 and 304) are prepared by a similar method.
And S5, preparing an insulating layer on the large source-drain peripheral electrode.
In the above operation S5, the insulating layer 400 may be grown by using an atomic layer deposition method, specifically: and cleaning the sample substrate after the source and drain electrodes are prepared, and then placing the sample substrate into an atomic layer deposition system for growing an insulating layer, wherein the growing temperature range can be, for example, 100 ℃ and 300 ℃, and the preferable temperature is 250 ℃.
And S6, preparing a discrete charge induction quantum dot top metal gate, a detected quantum dot top metal gate and a top peripheral large electrode on the insulating layer according to the metal marks.
In the above operation S6, the top metal gate (including 401, 402) is fabricated by e-beam exposure, e-beam evaporation coating and metal lift-off techniques. The method specifically comprises the following steps: the top electrode structure of the charge induction quantum dot and the detected quantum dot is prepared by using an electron beam exposure technology after a sample substrate prepared by the process is subjected to standard sample cleaning and is uniformly coated with specific electron beam glue, and the top electrode structure comprises the following components: and (2) etching two groups of discrete top-layer metal gates (401, 402) between two nanowire source drain electrodes by using a nanoscale mark 201, then etching a top-layer peripheral large electrode 500 by using a micron-level mark 200, and finally preparing the top-layer electrodes (401, 402, 500) by using an electron beam evaporation coating technology and a metal stripping technology.
So far, the preparation of the extensible quantum bit structure based on the indirect measurement of the positioning type self-organizing germanium-silicon nanowire is completed. For the specific structural parameters of each structure in the above embodiment of the preparation method, please refer to the above embodiment of the structure, which is not described herein again.
The above-mentioned embodiments are intended to illustrate the objects, aspects and advantages of the present disclosure in further detail, and it should be understood that the above-mentioned embodiments are only illustrative of the present disclosure and are not intended to limit the present disclosure, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present disclosure should be included in the scope of the present disclosure.

Claims (10)

1. An extensible qubit structure comprising:
the device comprises a substrate (100), wherein rectangular grooves (102) arranged in an array are formed in the substrate, positioning type self-organization germanium-silicon nanowires (103) grow on two sides of each rectangular groove (102), and the positions and the sizes of the positioning type self-organization germanium-silicon nanowires (103) are controllable;
the charge induction quantum dot source (301) and the charge induction quantum dot drain (302) are respectively arranged at two ends of the positioning type self-organizing germanium-silicon nanowire (103); a detected quantum dot source (303) and a detected quantum dot drain (304) which are respectively arranged at two ends of the positioning type germanium-silicon nanowire (103) adjacent to the positioning type self-organizing germanium-silicon nanowire (103);
the source-drain peripheral large electrode (300) is connected with the charge induction quantum dot source (301), the charge induction quantum dot drain (302), the detected quantum dot source (303) and the detected quantum dot drain (304);
the insulating layer (400) is formed above the source-drain peripheral large electrode (300), a charge induction quantum dot top layer metal gate (401) and a detected quantum dot top layer metal gate (402) are formed on the insulating layer (400) in a separated mode, the charge induction quantum dot top layer metal gate (401) is arranged between the charge induction quantum dot source (301) and the charge induction quantum dot drain (302), and the detected quantum dot top layer metal gate (402) is arranged between the detected quantum dot source (303) and the detected quantum dot drain (304);
and the top layer peripheral large electrode (500) is connected with the charge induction quantum dot top layer metal gate (401) and the detected quantum dot top layer metal gate (402).
2. The scalable qubit structure of claim 1 wherein the localized self-organized SiGe nanowires (103) have a length in the range of 1-3 um, a width in the range of 60-150 nm, and a height in the range of 4-6 nm.
3. The scalable qubit structure of claim 1 wherein the thickness of the substrate (100) is in the range of 600-800 um.
4. The scalable qubit structure of claim 1 wherein the rectangular trench (102) has a length in the range of 2-4 um, a width in the range of 300-500 nm, and a depth in the range of 60-90 nm.
5. The scalable qubit structure of claim 1 wherein the charge inducing quantum dot top metal gate (401) and the probed quantum dot top metal gate (402) are in the shape of stripes having a width of 20-60 nm.
6. The scalable qubit structure of claim 5 wherein the spacing between the charge-inducing quantum-dot top-layer metal gate (401) and the probed quantum-dot top-layer metal gate (402) is 20-60 nm.
7. The scalable qubit structure of claim 1 wherein the charge-inducing quantum dot top metal gate (401), the probed quantum dot top metal gate (402), and the top peripheral bulk electrode (500) are made of titanium and palladium, wherein the thickness of titanium is in the range of 2-5 nm and the thickness of palladium is in the range of 20-40 nm.
8. The scalable qubit structure of claim 1, wherein the insulating layer (400) has a thickness in the range of 10-25 nm.
9. The scalable qubit structure of claim 1 wherein the material of the insulating layer (400) comprises aluminum oxide or hafnium oxide.
10. A method for preparing an expandable qubit structure, comprising:
carrying out overall marking positioning on a substrate (100) and determining the position and the overall size of a quantum bit structure, wherein the substrate (100) is a positioning type self-organization germanium-silicon nanowire substrate;
preparing all electrode overlay and photographed metal marks of the qubit structure on the substrate (100);
scanning out a positioning type self-organizing germanium-silicon nanowire (103) according to the metal mark;
preparing a charge induction quantum dot source (301) and a charge induction quantum dot drain (302) at two ends of one positioning type self-organizing germanium-silicon nanowire (103), preparing a detected quantum dot source (303) and a detected quantum dot drain (304) at two ends of the positioning type germanium-silicon nanowire (103) adjacent to the positioning type self-organizing germanium-silicon nanowire (103), and preparing source-drain peripheral large electrodes (300) respectively corresponding to the charge induction quantum dot source (301), the charge induction quantum dot drain (302), the detected quantum dot source (303) and the detected quantum dot drain (304);
preparing an insulating layer (400) on the source-drain peripheral large electrode (300);
according to the metal mark, a charge induction quantum dot top metal gate (401) and a detected quantum dot top metal gate (402) which are separated are prepared on the insulating layer (400), and a top peripheral large electrode (500) is prepared.
CN202010577193.2A 2020-06-22 2020-06-22 Expandable quantum bit structure and preparation method thereof Pending CN111627986A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114373635A (en) * 2022-01-12 2022-04-19 北京百度网讯科技有限公司 Quantum bit capacitor, quantum bit and construction method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114373635A (en) * 2022-01-12 2022-04-19 北京百度网讯科技有限公司 Quantum bit capacitor, quantum bit and construction method thereof

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