CN111625377A

CN111625377A - Agent and method for adding entries to a queue

Info

Publication number: CN111625377A
Application number: CN202010461038.4A
Authority: CN
Inventors: 沈飞; 蔡金池; 徐晓画
Original assignee: Beijing Starblaze Technology Co ltd
Current assignee: Beijing Starblaze Technology Co ltd
Priority date: 2017-04-01
Filing date: 2017-04-01
Publication date: 2020-09-04
Anticipated expiration: 2037-04-01
Also published as: CN108664335B; CN111625376B; CN108664335A; CN111625376A; CN111625377B

Abstract

The application provides an agent and a method for adding entries to a queue. The disclosed agent includes a first arbiter, a first translator, a second arbiter, a second translator, a queue TX module, and a queue RX module, the first arbiter coupling the queue TX module and the queue RX module to a message bus; a first translator couples a message bus to a queue TX module and a queue RX module; a second arbiter couples the queue TX module and the queue RX module to a second message bus; a second translator couples a second message bus to the queue TX module and the queue RX module; wherein the agent is based on data message communication, the agent identifying one or more messages.

Description

Agent and method for adding entries to a queue

Technical Field

The present application relates to the field of integrated circuit technology, and more particularly, to a method for adding entries to a queue via a proxy.

Background

A System on Chip (SoC) includes a plurality of components, such as one or more CPU cores, memory interfaces, bus interfaces, and the like. There are many kinds of messages exchanged between the components.

In an AMBA (Advanced micro controller Bus Architecture) Bus Architecture in the prior art, various buses are defined, including an AHB (Advanced High-Performance Bus), an ASB (Advanced system Bus), an APB (Advanced Peripheral Bus), an AXI (Advanced extensible Interface), and the like. The prior art system-on-chip bus Protocol also includes, for example, OCP (Open Core Protocol).

Disclosure of Invention

There are many different levels of communication between components of the system-on-chip, such as frequent exchange of memory pointers between components sharing memory, and messages between components can be exchanged in sequence via first-in-first-out (FIFO) queues.

Managing multiple message passing processes by various components of the system-on-chip increases the complexity of the components and requires additional effort to increase the processing efficiency of the message exchange.

A messaging system for communicating messages between components of a system on a chip is provided. Optimization is provided for various communication modes such as exchange of memory pointers among components, communication through queues, access of each component to a memory and the like, so that complexity of the components is reduced, and processing efficiency of message exchange is improved.

According to a first aspect of the present application, there is provided a messaging system of a first system on chip according to the first aspect of the present application, comprising an agent and a messaging bus, the agent coupling components of the system on chip to the messaging bus such that the components of the system on chip communicate with each other via the agent and the messaging bus.

The messaging system of the first system on chip according to the first aspect of the present application provides the messaging system of the second system on chip according to the first aspect of the present application, the agent being based on data message communication.

According to the first or second system-on-chip message system of the first aspect of the present application, there is provided the third system-on-chip message system of the first aspect of the present application, wherein the data packet carries a target agent identifier and a function identifier, the target agent identifier is used to identify a receiver agent of the data packet, and the function identifier is used to identify a type of the packet.

According to one of the first to third system-on-chip message systems of the first aspect of the present application, there is provided the fourth system-on-chip message system of the first aspect of the present application, wherein the type of the data packet includes one or more of a configuration packet, a memory access packet, a queue packet, and a pointer packet.

According to one of the message systems of the first to fourth system-on-chip of the first aspect of the present application, there is provided the message system of the fifth system-on-chip of the first aspect of the present application, wherein the agent identifies the type of the data packet by a function identifier of the packet.

According to one of the message systems of the first to fifth system-on-chip of the first aspect of the present application, there is provided the message system of the sixth system-on-chip of the first aspect of the present application, the message bus comprising two or more ports, the ports comprising an arbiter and a decoder, the arbiter of the message bus being coupled to the decoder of the message bus; the arbiter of the message bus and the decoder of the message bus are coupled to respective agents, the agents sending data messages to the message bus via the arbiter of the message bus, the agents receiving data messages from the message bus via the decoder of the message bus.

The message system of the sixth system on chip according to the first aspect of the present application provides the message system of the seventh system on chip according to the first aspect of the present application, the arbiter of the message bus being coupled to one, more or all decoders of the message bus.

According to the sixth or seventh system-on-chip message system of the first aspect of the present application, there is provided the eighth system-on-chip message system of the first aspect of the present application, wherein the arbiter of the message bus sends the data packet to the decoder of the message bus according to the target agent identifier of the received data packet.

According to one of the sixth to eighth system-on-chip messaging systems according to the first aspect of the present application, there is provided the messaging system of the ninth system-on-chip according to the first aspect of the present application, the decoder of the message bus being coupled to one, more or all of the arbiters of the message bus.

According to one of the message systems of the sixth to ninth systems on chip of the first aspect of the present application, there is provided the message system of the tenth system on chip of the first aspect of the present application, wherein the decoder of the message bus receives the data packet from the arbiter of the message bus and forwards the data packet to the agent coupled to the decoder of the message bus.

According to one of the message systems of the sixth to tenth systems on chip of the first aspect of the present application, there is provided the message system of the eleventh system on chip of the first aspect of the present application, the agent includes an arbiter, a decoder, and a message processing device, the arbiter, the decoder, and the message processing device are coupled, the arbiter of the agent is coupled to the arbiter of the message bus, the decoder of the agent is coupled to the decoder of the message bus, the message processing device generates the data message and transmits the data message to the message bus through the arbiter of the agent, and the decoder of the agent receives the data message from the decoder of the message bus and forwards the data message to the message processing device.

According to an eleventh message system of the first aspect of the present application, there is provided the message system of the twelfth system on chip of the first aspect of the present application, wherein the decoder of the proxy sends the data packet to the message processing apparatus of the proxy according to the function identifier in the data packet.

The message system of the eleventh or twelfth system-on-chip according to the first aspect of the present application provides the message system of the thirteenth system-on-chip according to the first aspect of the present application, the message processing apparatus comprising a register, the register of the message processing apparatus being accessible to a component of the system-on-chip.

According to one of the eleventh to thirteenth system-on-chip message systems of the first aspect of the present application, there is provided the fourteenth system-on-chip message system of the first aspect of the present application, wherein the message processing apparatus further includes an interrupt module configured to provide an interrupt to a component of the system-on-chip.

According to one of the message systems of the eleventh to fourteenth systems on chip of the first aspect of the present application, there is provided the message system of the fifteenth system on chip of the first aspect of the present application, wherein the message processing apparatus of the agent includes one or more of a configuration module, a pointer synchronization module, a queue TX module, a queue RX module, and a memory access module.

According to a fifteenth message system of the first aspect of the present application, there is provided the message system of the sixteenth system on chip of the first aspect of the present application, wherein the pointer synchronization module synchronizes pointers with the pointer synchronization modules of other agents by sending or receiving pointer messages.

According to the fifteenth or sixteenth system-on-chip messaging system of the first aspect of the present application, there is provided the seventeenth system-on-chip messaging system of the first aspect of the present application, wherein the configuration module configures the agent by a configuration message.

According to one of the fifteenth to seventeenth system-on-chip messaging systems of the first aspect of the present application, there is provided the eighteenth system-on-chip messaging system of the first aspect of the present application, wherein the queue TX module sends a queue entry to the queue RX module through a queue message, receives a response of the queue RX module, and updates a queue pointer.

According to one of the fifteenth to eighteenth system-on-chip message systems of the first aspect of the present application, there is provided the nineteenth system-on-chip message system of the first aspect of the present application, wherein the memory access module accesses the memory to which the cache agent is coupled by sending a memory access message to the cache agent.

According to one of the first to nineteenth system-on-chip messaging systems of the first aspect of the present application, there is provided the twenty-second system-on-chip messaging system of the first aspect of the present application, the agent comprising one or more of a first CPU agent, a caching agent and a message agent; a first CPU agent is coupled to the first CPU, the first tightly coupled memory, and the message bus, a caching agent is coupled to the message bus and the off-chip memory, and the message agent is coupled to the message bus and the caching agent.

The twenty-first system-on-chip messaging system according to the first aspect of the present application provides the twenty-first system-on-chip messaging system according to the first aspect of the present application, wherein the first CPU agent includes a queue TX module, a queue RX module, a configuration module, a pointer synchronization module, and a memory access module.

A twenty-first system-on-chip messaging system according to the first aspect of the present application provides the twenty-second system-on-chip messaging system according to the first aspect of the present application, wherein the memory access module of the first CPU agent is configured to access a tightly coupled memory and/or is configured to access an off-chip memory by generating a memory access packet sent to the caching agent.

According to one of the twentieth to twenty-second system-on-chip message systems of the first aspect of the present application, there is provided the twenty-third system-on-chip message system of the first aspect of the present application, the agent further comprising a second CPU agent; the second CPU agent comprises a queue TX module, a queue RX module, a configuration module, a pointer synchronization module and a memory access module.

According to a twenty-third system-on-chip messaging system of the first aspect of the present application, there is provided the twenty-fourth system-on-chip messaging system of the first aspect of the present application, wherein the queue TX module of the first CPU agent sends the queue entry to the queue RX module of the second CPU agent or the message agent by generating a queue message, and maintains the queue pointer; the queue RX module of the first CPU agent receives a queue entry from the queue TX module of the second CPU agent or the message agent by receiving a queue message, and maintains a queue pointer.

According to a twenty-third or twenty-fourth system-on-chip message system of the first aspect of the present application, there is provided the twenty-fifth system-on-chip message system of the first aspect of the present application, wherein the pointer synchronization module of the first CPU agent is configured to synchronize a pointer with the pointer synchronization module of the second CPU agent.

According to one of the twenty-fifth to twenty-fifth system-on-chips of the first aspect of the present application, there is provided the twenty-sixth system-on-chip of the first aspect of the present application, wherein the caching agent comprises a configuration module and a memory access module.

According to a twenty-sixth system-on-chip message system of the first aspect of the present application, there is provided the twenty-seventh system-on-chip message system of the first aspect of the present application, wherein the memory access module of the cache agent accesses the off-chip memory by receiving a memory access message sent by the CPU agent.

According to one of the twenty-eighth to twenty-seventh system-on-chip messaging systems of the first aspect of the present application, there is provided the twenty-eighth system-on-chip messaging system of the first aspect of the present application, the message broker comprising a queue TX module, a queue RX module and a configuration module.

The twenty-eighth system-on-chip message system according to the first aspect of the present application provides the twenty-ninth system-on-chip message system according to the first aspect of the present application, wherein the message broker further includes a memory access module configured to access an off-chip memory by generating a memory access packet sent to the cache broker.

The message system of the thirty-eighth system-on-chip according to the first aspect of the present application, the message agent is coupled to a second message bus, the caching agent is coupled to the second message bus, and the message agent accesses the caching agent through the second message bus, is provided according to the message system of the twenty-eighth or twenty-ninth system-on-chip of the first aspect of the present application.

According to one of the twentieth to thirty system-on-chip messaging systems of the first aspect of the present application, there is provided the thirty-first system-on-chip messaging system of the first aspect of the present application, the agent further comprising an NVMe agent; the NVMe agent comprises a queue TX module, a queue RX module, a configuration module, a pointer synchronization module and a memory access module.

The message system of the thirty-first system on chip according to the first aspect of the present application provides a message system of the thirty-second system on chip according to the first aspect of the present application, and the memory access module of the NVMe agent is configured to access a tightly coupled memory and/or configured to access an off-chip memory by generating a memory access message sent to the cache agent.

According to the thirty-first or thirty-second system on chip message system of the first aspect of the present application, there is provided the thirty-third system on chip message system of the first aspect of the present application, the queue TX module of the NVMe agent sends the queue entry to the queue RX module of the first CPU agent, the second CPU agent, or the message agent by generating the queue message, and maintains the queue pointer; and the queue RX module of the NVMe agent receives queue entries from the queue TX module of the first CPU agent, the second CPU agent or the message agent through receiving queue messages and maintains a queue pointer.

According to one of the thirty-first to thirty-third system-on-chip message systems of the first aspect of the present application, there is provided the thirty-fourth system-on-chip message system of the first aspect of the present application, wherein the pointer synchronization module of the NVMe agent is configured to synchronize a pointer with the pointer synchronization module of the first CPU agent or the second CPU agent.

According to a second aspect of the present application, there is provided a first agent according to the second aspect of the present application, comprising an arbiter, a decoder, a queue TX module and a queue RX module, the arbiter and the decoder being coupled to a message bus; an arbiter couples the queue TX module and the queue RX module to a message bus; the translator couples the message bus to the queue TX module and the queue RX module.

According to a first agent of the second aspect of the present application, there is provided a second agent of the second aspect of the present application, the agents communicating based on data packets.

According to the first or second agent of the second aspect of the present application, there is provided a third agent of the second aspect of the present application, where the data packet carries a target agent identifier and a function identifier, the target agent identifier is used to identify a recipient agent of the data packet, and the function identifier is used to identify a type of the packet.

According to one of the first to third agents of the second aspect of the present application, there is provided the fourth agent of the second aspect of the present application, wherein the type of the data packet includes one or more of a configuration packet, a memory access packet, a queue packet, and a pointer packet.

According to one of the first to fourth agents of the second aspect of the present application, there is provided the fifth agent of the second aspect of the present application, the arbiter of the agent sends the data packet to the message bus, and the decoder of the agent receives the data packet from the message bus.

According to one of the first to fifth agents of the second aspect of the present application, there is provided the sixth agent of the second aspect of the present application, wherein the queue TX module transmits a queue entry to the queue RX module through a queue message, receives a response of the queue RX module, and updates a queue pointer.

According to one of the first to sixth agents of the second aspect of the present application, there is provided the seventh agent of the second aspect of the present application, wherein the queue RX module obtains the queue entry from the queue TX module and updates the queue pointer.

According to one of the first to seventh agents of the second aspect of the present application, there is provided the eighth agent of the second aspect of the present application, wherein the agent further includes a memory access module, and the memory access module accesses the memory through the memory access packet.

According to one of the first to eighth agents of the second aspect of the present application, there is provided the ninth agent of the second aspect of the present application, the queue TX module and the queue RX module each comprising a register for indicating a queue status.

According to one of the first to ninth agents of the second aspect of the present application, there is provided the tenth agent of the second aspect of the present application, wherein the queue TX module comprises a pointer manager, a memory access unit, a response cache unit, a memory access receiving unit and an RCV unit, the RCV unit is coupled to the pointer manager and the decoder, the pointer manager is further coupled to the memory access unit, the RCV unit and the agent interface, the memory access unit is further coupled to the response cache unit, the response cache unit is further coupled to the memory access receiving module, and the memory access receiving module is further coupled to the arbiter.

According to one of the first to tenth agents of the second aspect of the present application, there is provided the eleventh agent of the second aspect of the present application, the queue RX module comprising a second pointer manager, a second memory access unit, a TXD unit, a second response buffer unit, and a second RCV unit; the second RCV unit is further coupled to a second pointer manager, a second reply buffer unit, and a decoder, the pointer manager is further coupled to a TXD unit, the TXD unit is coupled to the second reply buffer unit, and the arbiter.

According to a tenth or eleventh agent of the second aspect of the present application, there is provided the twelfth agent of the second aspect of the present application, wherein the pointer manager of the queue TX module indicates the status of the queue in a register of the queue TX module according to values of a head pointer and a tail pointer of the queue, and the pointer manager of the queue TX module further updates the value of the tail pointer.

According to one of the tenth to twelfth agents of the second aspect of the present application, there is provided the thirteenth agent of the second aspect of the present application, wherein the memory access unit of the queue TX module accesses the memory in accordance with the value of the head-of-line pointer.

According to one of the tenth to thirteenth agents of the second aspect of the present application, there is provided the fourteenth agent of the second aspect of the present application, wherein the memory access unit of the queue TX module further fills information of the queue entry into the response buffer unit of the queue TX module.

According to one of the tenth to fourteenth agents of the second aspect of the present application, there is provided the fifteenth agent of the second aspect of the present application, wherein the information of the response buffer unit filled in the queue TX module includes a queue identifier and a queue recipient agent identifier.

According to one of the tenth to fifteenth agents of the second aspect of the present application, there is provided the sixteenth agent of the second aspect of the present application, wherein the memory access receiving unit of the queue TX module acquires information of a queue entry of the queue and acquired entry content from the response cache unit of the queue TX module, encapsulates the information and the acquired entry content into a memory access message, and sends the memory access message to the message bus through the arbiter.

According to one of the tenth to sixteenth agents of the second aspect of the present application, there is provided the seventeenth agent of the second aspect of the present application, wherein the RCV unit of the queue TX module receives from the translator a message indicating that a receiving agent of the queue has received an entry of the queue being transmitted.

According to one of the tenth to seventeenth agents of the second aspect of the present application, there is provided the eighteenth agent of the second aspect of the present application, wherein in response to the RCV unit of the queue TX module receiving a message from the transcoder, the RCV unit of the queue TX module updates the head of queue pointer of the queue recorded by the pointer manager.

According to an eleventh agent of the second aspect of the present application, there is provided the nineteenth agent of the second aspect of the present application, wherein the second pointer manager of the queue RX module indicates the status of the queue in a register of the queue RX module in dependence on the values of the head of queue pointer and the tail of queue pointer of the queue.

According to a nineteenth agent of the second aspect of the present application, there is provided the twentieth agent of the second aspect of the present application, wherein the second RCV unit of the queue RX module receives the queue message from the decoder and obtains the queue status from the second pointer manager of the queue RX module.

According to a nineteenth or twentieth agent of the second aspect of the present application, there is provided the twenty-first agent of the second aspect of the present application, wherein when the queue status acquired by the second RCV unit of the queue RX module from the second pointer manager is not full, the memory address indicated by the queue tail pointer is acquired from the second pointer manager of the queue RX module, the content of the queue entry is acquired from the queue packet, and the queue entry is written into the memory through the second access unit.

According to one of the nineteenth to twenty-first agents of the second aspect of the present application, there is provided the twenty-second agent of the second aspect of the present application, wherein the second RCV unit of the queue RX module further populates the second reply buffer unit of the queue RX module with information of the queue entry.

According to one of the nineteenth to twentieth agents of the second aspect of the present application, there is provided the twenty-third agent of the second aspect of the present application, wherein the information to fill the second response buffer unit of the queue RX module includes a queue identifier and a queue sender agent identifier.

According to a nineteenth or twentieth agent of the second aspect of the present application, there is provided the twenty-fourth agent of the second aspect of the present application, wherein when the queue status acquired by the second RCV unit of the queue RX module from the second pointer manager is full, the second RCV unit of the queue RX module discards the queue entry received from the queue packet.

According to a twenty-fourth agent of the second aspect of the present application, there is provided the twenty-fifth agent of the second aspect of the present application, the second RCV unit of the queue RX module further populating the second answer buffer unit of the queue RX module with information of the queue entry.

According to a twenty-fourth or twenty-fifth agent of the second aspect of the present application, there is provided a twenty-sixth agent of the second aspect of the present application, the information to fill the second answer buffer unit of the queue RX module comprising a queue identifier, a queue recipient agent identifier and an indication that an entry was not received.

According to one of the nineteenth to twenty-sixth agents of the second aspect of the present application, there is provided the twenty-seventh agent of the second aspect of the present application, wherein in response to completion of adding entries of a queue to a memory by the second access unit, the TXD unit of the queue RX module acquires information of the queue entries of the queue from the second response buffer unit of the queue RX module, encapsulates the information into an access message, and sends the access message to the message bus through the arbiter, so as to indicate to the sending-side agent of the queue that the receiving-side agent of the queue has received the entries of the queue sent by the receiving-side agent of the queue.

According to one of the nineteenth to twenty-seventh agents of the second aspect of the present application, there is provided the twenty-eighth agent of the second aspect of the present application, the TXD unit of the queue RX module updates the tail pointer of the queue recorded by the second pointer manager of the queue RX module.

According to one of the nineteenth to twenty-eighth agents of the second aspect of the present application, there is provided the twenty-ninth agent of the second aspect of the present application, the TXD unit of the queue RX module checks a message of the queue entry in the reply buffer unit of the queue RX module.

According to one of the nineteenth to twenty-ninth agents of the second aspect of the present application, there is provided the thirtieth agent of the second aspect of the present application, wherein the TXD unit of the queue RX module, in response to checking a message of a queue entry in the second reply buffer unit of the queue RX module, if the message indicates that the queue entry is not received, encapsulates the message into a queue message according to the queue identifier, the queue receiver agent identifier, and an indication that the queue entry is not received, and sends the queue message to the message bus through the arbiter to indicate to the sender agent of the queue that the receiver agent of the queue has failed to receive the queue entry.

According to a third aspect of the present application, there is provided a method of adding an entry to a queue according to the third aspect of the present application, comprising the steps of: in response to the queue tail pointer of the queue leading the queue head pointer, the pointer manager obtains the queue head pointer; according to the queue head pointer and the designated queue entry size, the memory access unit acquires the queue entry from the memory; the access unit fills the queue identifier into the response cache unit; in response to the fact that the entries of the queue are obtained from the memory, the access receiving unit obtains the queue identifiers from the response cache unit, packages the queue entries, the queue identifiers and the queue receiving party agent identifiers into queue messages, and sends the queue messages to a message bus through an agent arbiter; the RCV unit updates a head-of-line pointer of the queue in response to the RCV unit receiving a message from the translator indicating that a receiving agent of the queue has received the transmitted queue entry.

According to a method of adding an entry to a queue according to a third aspect of the present application, there is provided a method of adding an entry to a queue according to a second aspect of the present application, and the response caching unit may store a queue identifier and a receiving agent identifier corresponding to each of the plurality of queue entries.

According to the third aspect of the present application, there is provided a method for adding entries to a third-way queue, wherein the information filled into the response buffer unit includes a queue identifier and a queue receiving agent identifier.

According to the method for adding the entry to the first or second queue of the third aspect of the present application, a method for adding the entry to the fourth queue of the third aspect of the present application is provided, and the access receiving unit obtains the queue receiving agent identifier corresponding to the queue identifier.

According to one of the methods of adding entries to the queues according to the first to fourth aspects of the present application, there is provided the method of adding entries to the queues according to the fifth aspect of the present application, wherein a head-of-queue pointer and a tail-of-queue pointer are recorded in the pointer manager for each queue.

According to one of the methods of adding an entry to a queue according to the first to fifth aspects of the present application, there is provided the method of adding an entry to a queue according to the sixth aspect of the present application, wherein the RCV unit acquires a status of a receiving agent of the queue according to a queue message received from a decoder of the agent.

According to a sixth method of adding entries to a queue according to the third aspect of the present application, there is provided the seventh method of adding entries to a queue according to the third aspect of the present application, the status of the receiver agent of the queue including that the queue receiver agent has received a queue entry, that the queue receiver agent temporarily fails to receive a queue entry, or that the queue receiver agent has not correctly received a queue entry.

According to the sixth or seventh method for adding entries to the queue of the third aspect of the present application, there is provided the eighth method for adding entries to the queue of the third aspect of the present application, wherein if the queue receiving agent does not correctly receive the queue entries, the head pointer of the queue is not updated, and the memory access receiving unit obtains the queue entries from the memory again according to the tail pointer of the queue, so as to send the queue entries to the receiving agent of the queue.

According to one of the methods of adding an entry to a queue according to the sixth to eighth aspects of the present application, there is provided the method of adding an entry to a queue according to the ninth aspect of the present application, wherein if the queue-receiving agent is temporarily unable to receive a queue entry, the pointer manager does not update the head pointer of the queue, and suspends the acquisition of the entry of the queue.

According to a fourth aspect of the present application, there is provided a method of obtaining an entry from a queue according to the fourth aspect of the present application, comprising the steps of: in response to receiving the queue entry, the RCV unit sends the queue entry to the memory and fills the queue identifier into the response cache unit; responding to the memory to indicate that the queue entry is written into the memory, the TXD unit acquires a queue identifier from the response buffer unit, generates a queue message indicating the state of a queue receiving party according to the queue identifier and a proxy identifier of a queue sending party, sends the queue message to a message bus, and updates a queue tail pointer of the queue; in response to the queue's tail pointer leading the head of queue pointer, the pointer manager indicates to the CPU that the queue status is non-empty.

According to a first method of obtaining an entry from a queue according to a fourth aspect of the present application, there is provided the second method of obtaining an entry from a queue according to the fourth aspect of the present application, wherein the pointer manager updates the queue head pointer in response to an access request of the CPU.

According to the third method of retrieving entries from a queue according to the fourth aspect of the present application, the response buffer unit stores a queue identifier and a queue sender agent identifier corresponding to each of the plurality of queue entries.

According to one of the first to third methods of retrieving entries from a queue of the fourth aspect of the present application, there is provided the fourth method of retrieving entries from a queue of the fourth aspect of the present application, wherein the information filled in the response buffer unit includes a queue identifier and a queue sender agent identifier.

According to one of the first to fourth methods of retrieving an entry from a queue of the fourth aspect of the present application, there is provided a fifth method of retrieving an entry from a queue of the fourth aspect of the present application, the TXD unit retrieving a queue transmission agent identifier corresponding to the queue identifier.

According to one of the methods of the fourth aspect of the present application for obtaining entries from a queue, there is provided the method of the sixth aspect of the present application for obtaining entries from a queue, wherein a head-of-queue pointer and a tail-of-queue pointer are recorded in a pointer manager for each queue.

According to one of the methods for acquiring entries from the queue in the fourth aspect of the present application, there is provided a method for acquiring entries from the queue in the seventh aspect of the present application, in which, in response to a queue being full, the RCV unit discards a received queue entry, generates a queue packet indicating that the queue receiving agent has not correctly received the queue entry, and sends the queue packet to the message bus.

According to one of the first to seventh methods of retrieving entries from a queue of the fourth aspect of the present application, there is provided a method of retrieving entries from a queue of the eighth aspect of the present application, in response to the queue being able to accommodate only one entry, the TXD unit generates a queue message indicating that the queue recipient agent is temporarily unable to receive the queue entry, and sends the queue message to the message bus.

According to a fifth aspect of the present application, there is provided a method of adding an entry to a queue according to the fifth aspect of the present application, wherein a head-of-queue pointer is obtained in response to a tail-of-queue pointer of the queue leading the head-of-queue pointer; acquiring a queue entry from a memory according to a head of queue pointer and the size of the specified queue entry; filling the queue identifier into a cache; responding to the items of the queue obtained from the memory, obtaining a queue identifier from a response cache, packaging the queue items, the queue identifier and the agent identifier of the queue receiving party into a queue message, and sending the queue message to a message bus through an agent arbiter; the head-of-line pointer of the queue is updated in response to receiving a message from the translator indicating that a receiving agent of the queue has received the transmitted queue entry.

A method of adding entries to a queue according to the fifth aspect of the present application provides a method of adding entries to a queue according to the fifth aspect of the present application, a cache may store a queue identifier and a queue recipient agent identifier corresponding to each of a plurality of queue entries.

The method for adding entries to the first or second queue according to the fifth aspect of the present application provides a method for adding entries to the third-way queue according to the fifth aspect of the present application, and the information filled into the response cache module includes a queue identifier and a queue receiver agent identifier.

The method for adding entries to the first or second queue according to the fifth aspect of the present application provides a method for adding entries to a queue according to the fourth aspect of the present application, and obtains a queue recipient agent identifier corresponding to the queue identifier.

According to one of the methods of adding entries to the queues according to the fifth aspect of the present application, there is provided a method of adding entries to a queue according to the fifth aspect of the present application, recording a head-of-queue pointer and a tail-of-queue pointer for each queue.

According to one of the methods of adding entries to a queue according to the fifth aspect of the present application, there is provided a method of adding entries to a queue according to the sixth aspect of the present application, wherein the status of a receiving agent of the queue is acquired from a queue message received from a decoder of the agent.

According to a sixth method of adding entries to a queue according to the fifth aspect of the present application, there is provided the seventh method of adding entries to a queue according to the fifth aspect of the present application, the status of the receiver agent of the queue including that the queue receiver agent has received a queue entry, that the queue receiver agent temporarily fails to receive a queue entry, or that the queue receiver agent has not correctly received a queue entry.

According to the sixth or seventh method of adding entries to a queue according to the fifth aspect of the present application, there is provided the eighth method of adding entries to a queue according to the fifth aspect of the present application, wherein if a queue receiving agent does not correctly receive a queue entry, a head pointer of the queue is not updated, and a queue entry is again obtained from the memory according to a tail pointer of the queue to be sent to the receiving agent of the queue.

According to one of the methods of adding entries to the queue according to the sixth to eighth aspects of the present application, there is provided the method of adding entries to the queue according to the ninth aspect of the present application, wherein if the queue receiver agent is temporarily unable to receive a queue entry, the queue head pointer of the queue is updated, and the acquisition of the entry of the queue is suspended.

According to a sixth aspect of the present application, there is provided a method of retrieving entries from a queue according to the sixth aspect of the present application, in response to receiving a queue entry, sending the queue entry to a memory, and populating a cache with a queue identifier; responding to the memory to indicate that the queue entries are written into the memory, acquiring a queue identifier from the response cache, generating a queue message indicating the state of a queue receiver according to the queue identifier and a proxy identifier of a queue sender, sending the queue message to a message bus, and updating a queue tail pointer of the queue; in response to the queue's tail pointer leading the head of queue pointer, indicating to the CPU that the queue status is non-empty.

According to a first method of obtaining an entry from a queue of a sixth aspect of the present application, there is provided a second method of obtaining an entry from a queue of the sixth aspect of the present application, wherein a queue head pointer is updated in response to an access request of a CPU.

A method of retrieving entries from a queue according to the third aspect of the present application is provided, the method of retrieving entries from a queue according to the sixth aspect of the present application, the cache storing a queue identifier and a queue recipient agent identifier corresponding to each of a plurality of queue entries.

According to one of the first to third methods of retrieving entries from a queue of the sixth aspect of the present application, there is provided the fourth method of retrieving entries from a queue of the sixth aspect of the present application, wherein the information filled into the buffer includes a queue identifier and a queue sender agent identifier.

According to one of the methods of the first to fourth aspects of the present application for acquiring an entry from a queue, there is provided a method of acquiring an entry from a queue according to the fifth aspect of the present application for acquiring a queue sender agent identifier corresponding to a queue identifier.

According to one of the methods of the sixth aspect of the present application for obtaining entries from a queue, there is provided the method of the sixth aspect of the present application for obtaining entries from a queue, in which a head-of-queue pointer and a tail-of-queue pointer are recorded for each queue.

According to one of the methods of the sixth aspect of the present application for obtaining an entry from a queue, there is provided a method of the seventh aspect of the present application for obtaining an entry from a queue, in which, in response to a queue being full, a received queue entry is discarded, and a queue message indicating that a queue receiving-side agent has not correctly received the queue entry is generated and sent to a message bus.

According to one of the first to seventh methods of acquiring an entry from a queue of the sixth aspect of the present application, there is provided the eighth method of acquiring an entry from a queue of the sixth aspect of the present application, wherein in response to that the queue can accommodate only one entry, a queue message indicating that the queue receiving agent cannot receive the queue entry temporarily is generated and sent to the message bus.

According to a seventh aspect of the present application, there is provided a method for filling entries into a first vector queue according to the seventh aspect of the present application, wherein a CPU accesses a register of a queue TX module of an agent to obtain a queue status; in response to the queue not being full, the CPU writes a queue entry to the tail of the queue; the CPU writes the new queue tail position into the queue TX module.

A method of filling entries in a first vector queue according to the seventh aspect of the present application provides a method of filling entries in a second vector queue according to the seventh aspect of the present application, the queue entries being stored in a tightly coupled memory.

According to the method for filling the entries in the first or second directional queue of the seventh aspect of the present application, there is provided a method for filling the entries in the third directional queue of the seventh aspect of the present application, wherein the CPU accesses the register of the TX module of the agent to obtain the position of the tail of the queue.

The method for filling the entries in the first or second directional queue according to the seventh aspect of the present application provides a method for filling the entries in the fourth directional queue according to the seventh aspect of the present application, and the CPU records the position of the tail of the queue.

According to one of the methods of filling an entry in the first to fourth directional queues according to the seventh aspect of the present application, there is provided the method of filling an entry in the fifth directional queue according to the seventh aspect of the present application, wherein the CPU writes a plurality of queue entries to the tail of the queue.

According to one of the methods of filling entries into queues in the first to fifth aspects of the present invention, there is provided the method of filling entries into a queue in the sixth aspect of the present invention, wherein the CPU writes queue entries into the tails of the plurality of queues.

According to one of the methods of filling entries into the queues from the first to the sixth of the seventh aspect of the present application, there is provided the method of filling entries into the queue from the seventh aspect of the present application, wherein the CPU accesses the head-of-queue register and the tail-of-queue register of the TX module of the agent to obtain the queue status.

According to an eighth aspect of the present application, there is provided a method of retrieving an entry from a queue according to the eighth aspect of the present application, comprising the steps of: responding to the non-empty queue, the CPU obtains a queue entry from the memory according to the position of the head of the queue; the CPU writes the new head of line position into the queue RX module.

A method of retrieving entries from a queue according to the first aspect of the present application provides a method of retrieving entries from a queue according to the second aspect of the present application, the queue entries being stored in a tightly coupled memory.

According to the method of acquiring an entry from a queue according to the first or second aspect of the present application, there is provided a method of acquiring an entry from a queue according to the third aspect of the present application, the CPU checking whether a queue status is not empty; in response to the queue not being empty, the CPU obtains the head of queue position of the queue from the queue RX module of the agent.

According to one of the methods of the first to third aspects of the present application for retrieving entries from a queue, there is provided a method of retrieving entries from a queue according to the fourth aspect of the present application, wherein the queue RX module indicates an interrupt to the CPU, informing the CPU that the queue is filled with entries.

According to one of the methods of acquiring an entry from a queue according to the first to fourth aspects of the present application, there is provided a method of acquiring an entry from a queue according to the fifth aspect of the present application, wherein the CPU accesses a register of the queue RX module to learn a queue status.

According to one of the methods for acquiring entries from the queues in the first to fifth aspects of the present application, there is provided a method for acquiring entries from the queues in the sixth aspect of the present application, wherein the CPU acquires the queue status according to a head register and a tail register of the TX module of the queue.

According to one of the methods of acquiring entries from a queue according to the first to sixth aspects of the present application, there is provided the method of acquiring entries from a queue according to the seventh aspect of the present application, wherein the CPU acquires a plurality of entries of the queue from a head-of-queue position in accordance with a head-of-queue pointer and a tail-of-queue pointer of the queue.

According to one of the methods of acquiring entries from a queue according to the eighth aspect of the present application, there is provided the method of acquiring entries from a queue according to the eighth aspect of the present application, wherein the CPU acquires one or more entries from head positions of a plurality of queues.

According to a ninth aspect of the present application, there is provided a first agent according to the ninth aspect of the present application, comprising a first arbiter, a first decoder, a second arbiter, a second decoder, a queue TX module and a queue RX module, the first arbiter coupling the queue TX module and the queue RX module to a message bus; a first translator couples a message bus to a queue TX module and a queue RX module; a second arbiter couples the queue TX module and the queue RX module to a second message bus; a second translator couples a second message bus to the queue TX module and the queue RX module.

According to a ninth aspect of the present application there is provided a second agent according to the ninth aspect of the present application, the agents communicating on a data message basis.

According to the first or second agent of the ninth aspect of the present application, there is provided the third agent of the ninth aspect of the present application, wherein the data packet carries a target agent identifier and a function identifier, the target agent identifier is used to identify a receiver agent of the data packet, and the function identifier is used to identify a type of the packet.

According to one of the first to third agents of the ninth aspect of the present application, there is provided the fourth agent of the ninth aspect of the present application, wherein the type of the data packet includes one or more of a configuration packet, a memory access packet, a queue packet, and a pointer packet.

According to one of the first to fourth agents of the ninth aspect of the present application, there is provided the fifth agent of the ninth aspect of the present application, the agent being capable of identifying one or more messages.

According to one of the first to fifth agents of the ninth aspect of the present application, there is provided the sixth agent of the ninth aspect of the present application, wherein the queue TX module and the queue RX module transmit data packets to the message bus through the first arbiter, and the queue TX module and the queue RX module receive the data packets from the message bus through the first decoder.

According to one of the first to sixth agents of the ninth aspect of the present application, there is provided the seventh agent of the ninth aspect of the present application, wherein the queue TX module and the queue RX module transmit data packets to the second message bus through the second arbiter, and the queue TX module and the queue RX module receive the data packets from the second message bus through the second decoder.

According to one of the first to seventh agents of the ninth aspect of the present application, there is provided the eighth agent of the ninth aspect of the present application, wherein the first translator receives a data packet from the message bus and forwards the data packet to one of the queue TX module or the queue RX module based on a functional identification of the data packet.

According to one of the first to eighth agents of the ninth aspect of the present application, there is provided the ninth agent of the ninth aspect of the present application, wherein the queue TX module transmits a queue entry to the queue RX modules of the other agents through a queue message, receives a response of the queue RX modules of the other agents, and updates the queue pointer.

According to one of the first to ninth agents of the ninth aspect of the present application, there is provided the tenth agent of the ninth aspect of the present application, the queue RX module obtaining the queue entry from the queue TX modules of the other agents and updating the queue pointer.

According to one of the first to tenth agents of the ninth aspect of the present application, there is provided the eleventh agent of the ninth aspect of the present application, wherein the agent further includes a memory access module, and the memory access module accesses the memory by a memory access packet.

According to one of the first to eleventh agents of the ninth aspect of the present application, there is provided the twelfth agent of the ninth aspect of the present application, the message bus and the second message bus being coupled through a cache agent, the second message bus and the memory being coupled through the cache agent.

According to one of the first to twelfth agents of the ninth aspect of the present application, there is provided the thirteenth agent of the ninth aspect of the present application, the queue TX module and the queue RX module each comprising a register for indicating a queue status.

According to one of the first to thirteenth agents of the ninth aspect of the present application, there is provided the fourteenth agent of the ninth aspect of the present application, wherein the agent further includes a configuration module, and the configuration module receives configuration messages from other agents and configures a queue TX module and a queue TX module of the agent.

According to one of the first to fourteenth agents of the ninth aspect of the present application, there is provided the fifteenth agent of the ninth aspect of the present application, the configuring of the content by the configuration module comprising setting an entry size of the queue, a read pointer of the queue and/or a queue depth.

According to one of the first to fifteenth agents of the ninth aspect of the present application, there is provided the sixteenth agent of the ninth aspect of the present application, wherein the queue RX module synchronizes the queue pointer with the queue TX module.

According to a sixteenth agent of the ninth aspect of the present application, there is provided the seventeenth agent of the ninth aspect of the present application, wherein the queue RX module synchronizes a queue tail pointer of the queue it maintains to the queue TX module; and the queue TX module synchronizes the head pointer of the queue maintained by the queue TX module to the queue RX module.

According to a sixteenth or seventeenth agent of the ninth aspect of the present application, there is provided the eighteenth agent of the ninth aspect of the present application, wherein the queue RX module acquires a queue entry from the queue TX modules of other agents, updates the queue tail pointer, and synchronizes the updated queue tail pointer to the queue TX modules of the agents, and the queue TX module of the agent takes the updated queue tail pointer as its own queue tail pointer.

According to one of the sixteenth to eighteenth agents of the ninth aspect of the present application, there is provided the nineteenth agent of the ninth aspect of the present application, wherein the queue TX module sends a queue entry to the queue RX modules of the other agents through the queue packet, receives a response of the queue RX modules of the other agents and updates the head of line pointer of the queue, and synchronizes the updated head of line pointer to the queue RX modules of the agents, and the queue RX modules of the agents use the updated head of line pointer as their own head of line pointer.

According to one of the sixteenth to nineteenth agents of the ninth aspect of the present application, there is provided the twentieth agent of the ninth aspect of the present application, the queue RX module comprising a first pointer manager and the queue TX module comprising a second pointer manager.

According to a twentieth agent of the ninth aspect of the present application, there is provided the twenty-first agent of the ninth aspect of the present application, the queue RX module, in response to receiving queue entries from the queue TX modules of the other agents, obtaining a tail-of-queue pointer from the first pointer manager; the queue RX module generates a memory access message according to the queue tail pointer and the received queue entry so as to write the queue entry into the memory through the second arbitrator; the queue RX module, in response to receiving an indication from the second decoder to write a queue entry to memory, sends a response to the agent on the sender of the queue via the first arbiter and updates the tail pointer of the first pointer manager.

According to a twentieth or twenty-first agent of the ninth aspect of the present application, there is provided the twenty-twelfth agent of the ninth aspect of the present application, wherein the first pointer manager records head-of-line pointers and tail-of-line pointers of the plurality of lines.

According to a twenty-third agent of the ninth aspect of the present application, there is provided the twenty-third agent of the ninth aspect of the present application, wherein in response to the queue being full, the queue RX module discards received queue entries from the queue TX modules of the other agents, generates a queue message indicating that the queue-receiving agent did not receive the queue entries correctly, and sends the queue message to the queue-sending agent via the first arbiter.

According to a twentieth or twenty-first agent of the ninth aspect of the present application, there is provided the twenty-fourth agent of the ninth aspect of the present application, the queue TX module acquiring a head-of-line pointer in response to a head-of-line pointer of the queue indicated by the second pointer manager leading the head-of-line pointer; the queue TX module generates a memory access message according to a queue head pointer, and a second arbitrator acquires a queue entry from the memory; the queue TX module, in response to obtaining an entry for the queue from memory via the second decoder, sends the entry to a queue recipient agent via the first arbiter; the queue TX module updates a head of line pointer of the queue in response to receiving a message via the first decoder indicating that a receiving agent of the queue has received a transmitted queue entry.

According to a twenty-fourth agent of the ninth aspect of the present application, there is provided the twenty-fifth agent of the ninth aspect of the present application, wherein the queue TX module receives, via the first decoder, a queue message indicating a status of a receiver agent of the queue, wherein the status of the receiver agent of the queue includes that the queue receiver agent has received a queue entry, that the queue receiver agent temporarily fails to receive a queue entry, or that the queue receiver agent has not correctly received a queue entry.

According to a twenty-fifth agent of the ninth aspect of the present application, there is provided the twenty-sixth agent of the ninth aspect of the present application, wherein if the queue receiver agent does not correctly receive the queue entry, the queue TX module does not update the head pointer of the queue of the second pointer manager, and acquires the queue entry from the memory again according to the tail pointer of the queue, to send to the receiver agent of the queue.

According to a twenty-fifth or twenty-sixth agent of the ninth aspect of the present application, there is provided the twenty-seventh agent of the ninth aspect of the present application, wherein if the queue receiver agent is temporarily unable to receive a queue entry, the queue TX module does not update the head pointer of the queue of the second pointer manager, and suspends the acquisition of the entry of the queue.

According to a tenth aspect of the present application, there is provided a method of adding an entry to a queue according to the tenth aspect of the present application, comprising the steps of; responding to the queue tail pointer of the queue to be ahead of the queue head pointer, and acquiring the queue head pointer; generating a memory access message according to the queue head pointer, and acquiring a queue entry from the memory through a second message bus; in response to retrieving an entry for the queue from memory, a message is received via the message bus indicating that a receiving agent of the queue has received the transmitted queue entry, updating a head of queue pointer of the queue.

A method of adding entries to a queue according to the tenth aspect of the present application provides a method of adding entries to a queue according to the tenth aspect of the present application, the queue entries being fetched from a memory via a second decoder and a second message bus.

A method of adding entries to a first or second directional queue according to a tenth aspect of the present application provides a method of adding entries to a third directional queue according to the tenth aspect of the present application, the message bus and the second message bus being coupled by a caching agent, the second message bus and the memory being coupled by a caching agent.

According to one of the methods of adding entries to the first to third direction queues according to the tenth aspect of the present application, there is provided a method of adding entries to a fourth direction queue according to the tenth aspect of the present application, and a head pointer and a tail pointer are recorded for each queue.

According to one of the methods of adding entries to the queue of the first to fourth aspects of the present application, there is provided a method of adding entries to the queue of the fifth aspect of the present application, acquiring a status of a recipient agent of the queue.

According to a fifth method of adding entries to a queue according to the tenth aspect of the present application, there is provided the sixth method of adding entries to a queue according to the tenth aspect of the present application, the status of the receiver agent of the queue including that the queue receiver agent has received a queue entry, that the queue receiver agent temporarily fails to receive a queue entry, or that the queue receiver agent has not correctly received a queue entry.

According to one of the first to sixth methods of adding entries to a queue according to the tenth aspect of the present application, there is provided the seventh method of adding entries to a queue according to the tenth aspect of the present application, wherein if a queue receiver agent does not correctly receive a queue entry, a head pointer of the queue is not updated, and the queue entry is again obtained from the memory according to a tail pointer of the queue to be sent to the receiver agent of the queue.

According to one of the methods of adding entries to a queue of the tenth aspect of the present application, there is provided the method of adding entries to a queue of the eighth aspect of the present application, wherein if the queue recipient agent temporarily fails to receive a queue entry, the head pointer of the queue is not updated, and the acquisition of the entry of the queue is suspended.

According to an eleventh aspect of the present application, there is provided a method of obtaining an entry from a queue according to the eleventh aspect of the present invention, wherein in response to receiving a queue entry, a queue tail pointer is obtained; generating a memory access message according to the queue tail pointer and the received queue entry, and writing the memory access message into a memory through a second message bus; in response to writing the memory access message to memory, a response is sent to the agent on the sender of the queue via the message bus, and the queue tail pointer is updated.

The method for obtaining an entry from a queue according to the first aspect of the present application provides the method for obtaining an entry from a queue according to the second aspect of the present invention, further comprising sending the updated queue tail pointer to a queue TX module, and the queue TX module recording the queue tail pointer of the queue.

A method of retrieving entries from a queue according to the first or second method of the eleventh aspect of the present application provides a method of retrieving entries from a queue according to the third method of the eleventh aspect of the present invention, the message bus and the second message bus being coupled by a cache agent, the second message bus and the memory being coupled by a cache agent.

According to the first or second method of retrieving entries from a queue of the eleventh aspect of the present application, there is provided the fourth method of retrieving entries from a queue of the eleventh aspect of the present invention, wherein a head-of-queue pointer and a tail-of-queue pointer are recorded for each queue.

According to a twelfth aspect of the present application, there is provided a first message system according to the twelfth aspect of the present invention, comprising a first CPU agent, a second CPU agent and a message bus, the message bus being coupled to the first CPU agent and the second CPU agent; the first CPU agent and the second CPU agent each include a queue TX module and a queue RX module.

According to a twelfth aspect of the invention there is provided a second message system according to the twelfth aspect of the invention, the first CPU agent being coupled to the first CPU and the first memory and the second CPU agent being coupled to the second CPU and the second memory.

According to the first or second message system of the twelfth aspect of the present invention, there is provided the third message system of the twelfth aspect of the present invention, the first CPU directly accesses the first memory to access the queue entries of the first memory.

According to one of the first to third message systems of the twelfth aspect of the present invention, there is provided the fourth message system of the twelfth aspect of the present invention, the second memory stores the queue entries, and the second CPU directly accesses the second memory to access the queue entries of the second memory.

According to a fifth message system of the twelfth aspect of the present invention there is provided the method of the first to fourth message system of the twelfth aspect of the present invention, the queue TX module of the first CPU agent sending a queue message to the queue RX module of the second CPU agent via the message bus to send the queue entries of the first memory to the second memory store; the queue RX module of the first CPU agent receives a queue message from the queue TX module of the second CPU agent via the message bus to receive a queue entry added to the queue of the second memory.

According to a sixth messaging system according to the twelfth aspect of the invention there is provided, in accordance with one of the first to fifth messaging systems of the twelfth aspect of the invention, the queue TX module of the second CPU agent sending a queue message to the queue RX module of the first CPU agent via the message bus to send the queue entries of the queue of the second tightly coupled memory to the first memory store; the queue RX module of the second CPU agent receives a queue message from the queue TX module of the first CPU agent via the message bus to receive a queue entry added to the queue of the second memory.

According to one of the first to sixth message systems of the twelfth aspect of the invention there is provided a seventh message system according to the twelfth aspect of the invention further comprising a message agent, a caching agent and an off-chip memory, the message agent being coupled to the message bus and the caching agent, the caching agent being coupled to the off-chip memory.

According to one of the first to seventh message systems of the twelfth aspect of the present invention, there is provided the eighth message system of the twelfth aspect of the present invention, wherein if the second CPU agent is temporarily unable to receive the queue entry, the first CPU agent sets a receiving side of the queue as a message agent, and the data packet sent from the queue TX module of the first CPU agent is forwarded to the message agent by the message bus, and stores the queue entry of the queue in the off-chip memory.

According to an eighth message system of the twelfth aspect of the present invention, there is provided the ninth message system of the twelfth aspect of the present invention, the message agent sends the queue entry stored in the off-chip memory to the second CPU agent.

According to a thirteenth aspect of the present invention, there is provided a method for queue communication by proxy according to the thirteenth aspect of the present invention, comprising the steps of: the method comprises the steps that a first CPU accesses a register of a queue TX module of a first CPU agent to obtain a queue state; in response to the queue not being full, the first CPU writes a queue entry to a tail of the queue in the first memory; the first CPU writes the new queue tail position into a queue TX module of a first CPU agent; the second CPU obtains the queue state from the queue RX module of the second CPU agent; in response to the non-empty queue, the second CPU obtains a queue entry from the second memory according to the position of the head of the queue; the second CPU writes the new head of line position into the queue RX module of the second CPU agent.

The method for queue communication by proxy according to the thirteenth aspect of the present invention provides the method for queue communication by proxy according to the second aspect of the present invention, wherein the first CPU accesses the register of the TX module of the first CPU agent to obtain the position of the tail of the queue.

The method for queue communication by proxy according to the first or second aspect of the present invention provides the method for queue communication by proxy according to the thirteenth aspect of the present invention, and the first CPU records the position of the end of queue of the queue.

According to one of the methods for performing queue communication by proxy in the first to third aspects of the present invention, there is provided a method for performing queue communication by proxy in the fourth aspect of the present invention, in which the first CPU accesses a head-of-queue register and a tail-of-queue register of a queue TX module of the first agent to acquire a queue status.

According to one of the methods of queue communication by proxy of the first to fourth aspects of the present invention, there is provided the method of queue communication by proxy according to the fifth aspect of the present invention, wherein the second CPU acquires the head position of the queue from the queue RX module of the second CPU agent.

According to one of the methods of queue communication by agent of the thirteenth aspect of the present invention, there is provided the method of queue communication by agent of the sixth aspect of the present invention, wherein the second CPU updates the head position of the queue to the queue RX module of the second CPU agent.

According to one of the methods of queue communication by proxy of the thirteenth aspect of the present invention, there is provided the method of queue communication by proxy of the seventh aspect of the present invention, wherein the queue RX module of the second CPU agent indicates an interrupt to the second CPU, informing that the second CPU queue is filled with entries.

According to one of the methods of queue communication by proxy of the first to seventh aspects of the present invention, there is provided the method of queue communication by proxy according to the eighth aspect of the present invention, the first CPU and the second CPU communicate with each other through a plurality of queues.

A method for queue communication by proxy according to an eighth aspect of the present invention provides the method for queue communication by proxy according to the ninth aspect of the present invention, the plurality of queues having different queue depths.

According to one of the methods of the first to ninth aspects of the present invention for queue communication by proxy, there is provided the method for queue communication by proxy according to the tenth aspect of the present invention, wherein the first CPU adds one or more queue entries to the queue in the first memory.

According to one of the methods of the first to tenth queue communications by proxy of the thirteenth aspect of the present invention, there is provided the method of the eleventh queue communications by proxy according to the thirteenth aspect of the present invention, wherein the queue TX module of the first CPU agent acquires a queue entry from the first memory in accordance with the head pointer of the queue in response to the tail pointer of the queue advancing the head pointer, and transmits the queue entry to the queue RX module of the second CPU agent.

According to one of the methods of queue communication by proxy of the thirteenth aspect of the present invention, there is provided the method of queue communication by proxy of the twelfth aspect of the present invention, wherein the queue RX module of the second CPU agent stores the received entry in the second memory according to the queue tail pointer maintained by itself, and updates the queue tail pointer of the queue maintained by itself.

According to one of the methods of queue communication by agent of the thirteenth aspect of the present invention, there is provided the method of queue communication by agent of the thirteenth aspect of the present invention, wherein the queue RX module of the second CPU agent recognizes that the queue is added with a queue entry in response to the queue tail pointer of the queue leading the queue head pointer, indicating to the second CPU that the queue is added with an entry.

According to one of the methods of queue communication by proxy of the thirteenth aspect of the present invention, there is provided the method of queue communication by proxy of the fourteenth aspect of the present invention, wherein the queue RX module of the second CPU agent further indicates to the queue TX module of the first CPU agent that the queue entry was successfully received in response to storing the received queue entry to the second memory.

According to one of the methods of queue communication by proxy of the thirteenth aspect of the present invention, there is provided the method of queue communication by proxy of the fifteenth aspect of the present invention, wherein the queue TX module of the first CPU agent updates the head-of-line pointer of the queue maintained by itself in response to the queue entry being successfully received by the second CPU agent.

According to one of the methods of the first to fifteenth queue communications by proxy of the thirteenth aspect of the present invention, there is provided the method of the sixteenth queue communications by proxy of the thirteenth aspect of the present invention, the queue being a circular queue.

According to one of the methods of queue communication by proxy of the thirteenth aspect of the present invention, there is provided the method of queue communication by proxy of the seventeenth aspect of the present invention, the second CPU accesses a register of a queue TX module of the second CPU agent to acquire a queue status; in response to the queue not being full, the second CPU writes a queue entry to a tail of the queue in the second memory; the second CPU writes the new queue tail position into the queue TX module of the second CPU agent.

According to one of the methods of queue communication by proxy of the thirteenth aspect of the present invention, there is provided the eighteenth method of queue communication by proxy according to the thirteenth aspect of the present invention, in response to the queue not being empty, the first CPU acquires a queue entry from the first memory in accordance with the queue head position; the first CPU writes the new head of line position into the queue RX module of the first CPU agent.

According to one of the methods of queue communication by agent of the thirteenth aspect of the present invention, there is provided the method of queue communication by agent of the nineteenth aspect of the present invention, wherein in response to receiving a queue entry from the second CPU agent, the queue RX module of the first CPU agent stores the received queue entry into the first memory, updates the queue tail pointer of the queue, and indicates to the first CPU that the queue tail pointer of the queue leads the queue head pointer.

According to one of the methods of queue communication by proxy of the thirteenth aspect of the present invention, there is provided the method of queue communication by proxy of the twentieth aspect of the present invention, wherein the first CPU acquires a queue entry written in the queue and updates a head pointer of the queue maintained by the queue RX module of the first CPU agent.

According to one of the methods of the first to twentieth by-proxy queue communications of the thirteenth aspect of the present invention, there is provided the method of the twenty-first by-proxy queue communications of the thirteenth aspect of the present invention, the queue RX module of the first CPU agent updates the head-of-queue pointer.

According to a fourteenth aspect of the present application, there is provided a first message system according to the fourteenth aspect of the present application, comprising a first CPU agent, a second CPU agent, a cache agent, a message agent, and a message bus, the message bus being coupled to the first CU agent, the second CPU agent, and the message agent, the cache agent being coupled to the message agent; the first CPU agent and the second CPU agent each include a queue TX module and a queue RX module.

According to a first message system of a fourteenth aspect of the present application there is provided a second message system of the fourteenth aspect of the present application, the first CPU agent being coupled to the first CPU and the first memory, the second CPU agent being coupled to the second CPU and the second memory, the caching agent being coupled to the off-chip memory.

According to the first or second message system of the fourteenth aspect of the present application, there is provided the third message system of the fourteenth aspect of the present application, wherein the first memory stores queue entries, and the first CPU directly accesses the queue entries of the first memory.

According to one of the first to third message systems of the fourteenth aspect of the present application, there is provided the fourth message system of the fourteenth aspect of the present application, wherein the second memory stores queue entries, and the second CPU directly accesses the queue entries of the second memory.

According to a fifth message system of the fourteenth aspect of the present application, there is provided the off-chip memory storing entries according to one of the first to fourth message systems of the fourteenth aspect of the present application.

According to one of the first to fifth messaging systems of the fourteenth aspect of the present application, there is provided the sixth messaging system of the fourteenth aspect of the present application, wherein the queue TX module of the first CPU agent transmits the queue entry in the first memory to the message agent, and the message agent stores the queue entry in the off-chip memory.

According to a sixth message system of the fourteenth aspect of the present application, there is provided the seventh message system of the fourteenth aspect of the present application, the message agent stores the queue entry to the off-chip memory via the caching agent.

According to one of the first to seventh messaging systems of the fourteenth aspect of the present application, there is provided the eighth messaging system of the fourteenth aspect of the present application, sent to the second CPU agent, the queue RX module of the second CPU agent storing the queue entry to the second memory.

According to one of the first to eighth messaging systems of the fourteenth aspect of the present application, there is provided the ninth messaging system of the fourteenth aspect of the present application, wherein the queue TX module of the first CPU agent acquires the queue status provided by the queue RX module of the message agent.

According to one of the first to ninth messaging systems of the fourteenth aspect of the present application, there is provided the tenth messaging system of the fourteenth aspect of the present application, wherein the queue TX module of the message agent acquires a status of the queue provided by the queue RX module of the second CPU agent.

According to one of the first to tenth message systems of the fourteenth aspect of the present application, there is provided the eleventh message system of the fourteenth aspect of the present application, wherein if the queue of the second memory is not full, the receiver of the queue of the first CPU agent is the second CPU agent, and the data packet sent by the queue TX module of the first CPU agent is forwarded to the queue RX module of the second CPU agent by the message bus.

According to one of the first to eleventh message systems of the fourteenth aspect of the present application, there is provided the twelfth message system of the fourteenth aspect of the present application, wherein if the queue of the second memory is full, the first CPU agent sets a receiver of the queue as a message agent, and the data packet sent by the queue TX module of the first CPU agent is forwarded to the message agent by the message bus.

According to a twelfth message system of the fourteenth aspect of the present application, there is provided the thirteenth message system of the fourteenth aspect of the present application, wherein the first CPU sets a receiver of the queue of the first CPU agent as the message agent if the queue of the second memory is full.

According to a thirteenth messaging system of the fourteenth aspect of the present application, there is provided the fourteenth messaging system of the fourteenth aspect of the present application, wherein the first CPU further sets a recipient of the queue of message agents as the second CPU agent.

According to one of the first to fourteenth messaging systems according to the fourteenth aspect of the present application, there is provided the fifteenth messaging system according to the fourteenth aspect of the present application, wherein the second CPU agent transmits the queue entry of the second memory to the message agent.

According to one of the first to fifteenth messaging systems of the fourteenth aspect of the present application, there is provided the sixteenth messaging system of the fourteenth aspect of the present application, wherein the message agent stores the queue entry received from the second CPU agent to the off-chip memory, and fetches the queue entry from the off-chip memory to send to the first CPU agent, the entry being stored to the first memory by the queue RX module of the first CPU agent.

According to one of the first to sixteenth messaging systems of the fourteenth aspect of the present application, there is provided the seventeenth messaging system of the fourteenth aspect of the present application, wherein the queue TX module of the second CPU agent acquires the queue status provided by the queue RX module of the first CPU agent.

According to one of the first to seventeenth messaging systems of the fourteenth aspect of the present application, there is provided the eighteenth messaging system of the fourteenth aspect of the present application, wherein if the queue of the first memory is not full, the receiver of the queue of the second CPU agent is the first CPU agent, and the data packet sent by the queue TX module of the second CPU agent is forwarded to the queue RX module of the first CPU agent by the message bus.

According to one of the first to eighteenth message systems of the fourteenth aspect of the present application, there is provided the nineteenth message system of the fourteenth aspect of the present application, wherein if the queue of the first memory is full, the second CPU agent sets a receiving side of the queue as a message agent, and the data packet sent by the queue TX module of the second CPU agent is forwarded to the message agent by the message bus.

According to one of the first to nineteenth messaging systems of the fourteenth aspect of the present application, there is provided the twentieth messaging system of the fourteenth aspect of the present application, wherein the second CPU sets a receiver of the queue of the second CPU agent as the message agent if the queue of the first memory is full.

According to a twentieth message system of the fourteenth aspect of the present application, there is provided the twenty-first message system according to the fourteenth aspect of the present application, wherein the second CPU further sets a receiver of the queue of message agents as the first CPU agent.

According to one of the first to twenty-first message systems of the fourteenth aspect of the present application, there is provided the twenty-second message system according to the fourteenth aspect of the present application, wherein the change of the message pathway between the agents is set by the message recipient according to the state of its own queue.

There is provided according to one of the first to twenty-second message systems of the fourteenth aspect of the present application a twenty-third message system of the fourteenth aspect of the present application, the message broker comprising a queue TX module and a queue RX module.

According to one of the first to twenty-third message systems of the fourteenth aspect of the present application, there is provided the twenty-fourth message system of the fourteenth aspect of the present application, wherein the queue RX module of the message agent receives the data packet from the queue TX module of the first CPU agent or the second CPU agent, and the queue TX module of the message agent transmits the data packet to the queue RX module of the first CPU agent or the second CPU agent.

According to a fifteenth aspect of the present application, there is provided the method for queue communication by proxy according to the fifteenth aspect of the present application, comprising the steps of: the method comprises the steps that a first CPU accesses a register of a queue TX module of a first CPU agent to obtain a queue state; in response to the queue not being full, the first CPU writes a queue entry to a tail of the queue in the first memory; the first CPU writes the new queue tail position into a queue TX module of a first CPU agent; the second CPU obtains the queue state from the queue RX module of the second CPU agent; in response to the non-empty queue, the second CPU obtains a queue entry from the second memory according to the position of the head of the queue; the second CPU writes the new head of line position into the queue RX module of the second CPU agent.

According to a first method for queue communication by proxy of a fifteenth aspect of the present application, there is provided a method for queue communication by proxy of a second aspect of the present application, wherein a first CPU and a second CPU communicate via a plurality of queues.

The method for queue communication by proxy according to the first or second aspect of the present application provides the method for queue communication by proxy according to the fifteenth aspect of the present application, the plurality of queues having different queue depths.

According to one of the methods of the first to third proxy queue communication according to the fifteenth aspect of the present application, there is provided the method of the fourth proxy queue communication according to the fifteenth aspect of the present application, wherein the first CPU sets the depth of the queue in accordance with the capacity of the first memory and the capacity of the off-chip memory.

According to one of the methods of the first to fourth proxy queue communication according to the fifteenth aspect of the present application, there is provided the method of the fifth proxy queue communication according to the fifteenth aspect of the present application, wherein the second CPU sets the depth of the queue in accordance with the number of the second memories and the capacity of the off-chip memory.

According to one of the methods of the first to fifth queue communication by proxy of the fifteenth aspect of the present application, there is provided the method of the sixth queue communication by proxy of the fifteenth aspect of the present application, the queue of the first memory or the second memory and the queue of the off-chip memory have different queue depths.

According to one of the methods of queue communication by proxy of the first to sixth aspects of the present application, there is provided the method of queue communication by proxy of the seventh aspect of the present application, wherein the first CPU sets a queue receiving side of a queue TX module of the first CPU agent as a message agent; the first CPU sets the queue receiving party of the message agent as a second CPU agent through the first CPU agent.

According to one of the methods of queue communication by proxy of the first to seventh aspects of the present application, there is provided the method of queue communication by proxy of the eighth aspect of the present application, wherein the second CPU sets a queue receiver of a queue TX module of the second CPU agent as a message agent; the second CPU sets the queue receiving party of the message agent as the first CPU agent through the second CPU agent.

According to one of the methods for queue communication by proxy in the first to eighth aspects of the present application, there is provided a method for queue communication by proxy in the ninth aspect of the present application, in which a queue TX module of a first CPU proxy receives a proxy identifier of a recipient proxy set by a first CPU, and the queue TX module of the first CPU proxy transmits a data packet to a queue RX module of a message proxy.

According to one of the methods of the first to ninth aspects of the present application for queue communication by proxy, there is provided the method of the tenth aspect of the present application for queue communication by proxy, the first CPU updating a proxy identification of a recipient of the queue TX module of the first CPU proxy and/or the queue TX module of the message proxy.

According to one of the methods of the first to tenth queue communications by proxy of the fifteenth aspect of the present application, there is provided the method of the eleventh queue communications by proxy according to the fifteenth aspect of the present application, wherein the queue TX module of the first CPU agent acquires a queue entry from the head pointer of the queue in response to the tail pointer of the queue advancing the head pointer, and transmits the queue entry to the queue RX module of the message proxy.

According to one of the methods of queue communication by proxy of the first to eleventh aspects of the present application, there is provided the method of queue communication by proxy of the twelfth aspect of the present application, wherein the queue RX module of the message proxy stores the received queue entry in an off-chip memory according to a self-maintained queue tail pointer, and increments the self-maintained queue tail pointer.

According to one of the methods of queue communication by agent of the first to twelfth aspects of the present application, there is provided the method of queue communication by agent of the thirteenth aspect of the present application, the queue RX module of the message agent indicating to the queue TX module of the first CPU agent that the queue entry was successfully received in response to storing the received queue entry to the off-chip memory.

According to one of the methods of the first to thirteenth queue communication by proxy of the fifteenth aspect of the present application, there is provided the method of the fourteenth queue communication by proxy according to the fifteenth aspect of the present application, the queue RX module of the message proxy synchronizes a queue tail pointer to the queue TX module of the message proxy.

According to one of the methods of performing queue communication by an agent of the fifteenth aspect of the present application, there is provided the method of performing queue communication by an agent of the fifteenth aspect of the present application, wherein the queue TX module of the message agent acquires a queue entry from the off-chip memory according to the head-of-queue pointer in response to the tail-of-queue pointer leading the head-of-queue pointer, and transmits the queue entry to the queue RX module of the second CPU agent through the message bus.

According to one of the methods of queue communication by proxy of the first to fifteenth aspects of the present application, there is provided the method of queue communication by proxy of the sixteenth aspect of the present application, wherein the queue RX module of the second CPU agent stores the received queue entry in the second memory according to the queue tail pointer maintained by itself, and increments the queue tail pointer of the queue maintained by the queue RX module.

According to one of the methods of queue communication by agent of the fifteenth aspect of the present application, there is provided the method of queue communication by agent of the seventeenth aspect of the present application, wherein the queue RX module of the second CPU agent indicates to the second CPU that the queue is added with an entry in response to the end of queue pointer leading the head of queue pointer.

According to one of the methods of queue communication by proxy of the fifteenth aspect of the present application, there is provided the method of queue communication by proxy of the eighteenth aspect of the present application, wherein the second CPU acquires a queue entry added to queue 0 from the second close coupled memory based on the head of queue pointer of queue 0.

According to one of the methods of queue communication by agent of the fifteenth aspect of the present application, there is provided the method of queue communication by agent of the nineteenth aspect of the present application, the queue RX module of the second CPU agent further indicates to the queue TX module of the message agent that the queue entry was successfully received in response to storing the received queue entry to the second memory.

According to one of the methods of the first to nineteenth proxy queue communications according to the fifteenth aspect of the present application, there is provided the method of the twentieth proxy queue communications according to the fifteenth aspect of the present application, wherein the queue TX module of the message proxy updates the head of queue pointer of the queue in response to the queue entry being successfully received by the second CPU proxy.

According to one of the methods of the first to twentieth proxy-based queue communications of the fifteenth aspect of the present application, there is provided the method of the twenty-first proxy-based queue communications of the fifteenth aspect of the present application, wherein in response to receiving a queue entry from the message proxy, the queue RX module of the first CPU agent stores the received queue entry in the first memory, and updates the tail pointer of the queue.

According to one of the methods of performing queue communication by proxy of the first to twenty-first aspects of the present application, there is provided the method of performing queue communication by proxy of the twentieth aspect of the present application, wherein the first CPU head pointer acquires a queue entry from the first memory, and updates the head of queue pointer of the queue RX module of the first CPU agent.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art according to the drawings.

FIG. 1 is a block diagram of a messaging system for a system on a chip according to an embodiment of the present application;

FIG. 2 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application;

FIG. 3 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application;

FIG. 4 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application;

FIG. 5 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application;

FIG. 6 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application;

FIG. 7 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application;

FIG. 8 is a schematic diagram of queue communication by an agent according to an embodiment of the present application;

FIG. 9 is a schematic diagram of queue communication through an agent according to yet another embodiment of the present application; and

FIG. 10 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application are clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

FIG. 1 is a block diagram of a messaging system for a system on a chip according to an embodiment of the application.

The system on chip includes a message system 100 and one or more components coupled to the message system 100. The components of the system on chip include, for example, a CPU, NVMe protocol processor, on-chip memory, and message bus. The on-chip Memory includes, for example, a DCCM (Data Close Coupled Memory). The CPU may be a CPU of a different instruction set architecture such as ARM, MIPS, ARC, etc., and may have one or more CPU cores. The NVMe protocol processor is used to process NVMe protocol, an example of which is provided in chinese patent application 201610505459.6, and other NVMe protocol processors available to those skilled in the art may also be applied to the present application. The system on chip may also include other components. The system on chip is also coupled to off-chip memory (FIG. 1, DDR memory 124)

The messaging system 100 according to the embodiment of fig. 1 of the present application includes a message bus 108 and a plurality of agents (CPU agents, message agents, cache agents, and NVMe agents) coupled to the message bus. The components of the system on chip (CPU102, CPU104, NVMe protocol processor 152, etc.) are coupled to the message bus through respective agents. The message bus may be, for example, a bus bridge conforming to the AXI protocol.

In FIG. 1, CPU agent 106, CPU agent 107, message agent 120, cache agent 109, NVMe agent 151 are all examples of agents of the messaging system. CPU agent 106 is coupled to CPU102, tightly coupled memory 101, and message bus 108; the CPU agent 107 is coupled to the CPU104, the tightly coupled memory 103 and the message bus 108. The NVMe subsystem 105 includes an NVMe agent 151 and an NVMe protocol processor 152. The NVMe agent 151 is coupled to the NVMe protocol processor 152 and the message bus 108. DDR memory 124 is coupled to cache agent 109 through message bus 122; the caching agent 109 is coupled to the message agent 108, the message bus 122, and the message bus 108. The message agent 120 is coupled to the message bus 108 and the cache agent 109. Optionally, the message bus 122 is the same message bus as the message bus 108.

In the messaging system 100, agents communicate through a message bus 108 for a variety of functions.

The agents communicate based on data packets. The message carries a target agent Identification (ID) and a function identification (Tag). The target agent identifier is used to identify the recipient agent of the data message, and the function identifier is used to identify the type of the message. The types of the messages comprise configuration messages, memory access messages, queue messages, pointer messages and the like, and each message type corresponds to a specific function. The configuration messages are used to configure the recipient agents, the memory access messages are used to access the memory, the queue messages are used to exchange messages between agents in a queue fashion, and the pointer messages are used to synchronize pointers (e.g., memory pointers) between agents. The agent performs the operation indicated by the message according to the function identification (Tag) of the message.

And the function is expanded for the agent by defining a new function identifier and processing the message carrying the new function identifier. The agent may identify one or more message types and provide one or more functions. The functions provided by the agent include configuration, access to memory (e.g., DDR memory), access to queues, synchronization pointers, and the like.

The message bus 108 receives the message provided by the agent, determines the receiver agent of the message according to the target agent Identification (ID) in the message, and sends the message to the receiver agent.

An agent may be coupled to one or more components. The proxy may access the component as a master device or may accept access by the component as a slave device.

For example, CPU102 (as a component) is to send a memory pointer to CPU104 (as a component), CPU102 writes a new pointer to a pointer register provided by CPU agent 106, CPU agent 106 encapsulates the pointer value as a pointer message indicating in the message that the target agent Identification (ID) is "CPU agent 107" and sends to CPU agent 107, CPU agent 107 identifies the pointer register and pointer value to be operated on by the message according to the type of the message and updates the pointer register of agent CPU agent 107, and optionally CPU agent 107 also notifies CPU104 that the pointer register has been updated.

As yet another example, the CPU102 (as a component) is to write a set of data to the DDR memory 124 (as a component). The CPU102 provides the data (or the address of the data stored in the DCCM 101) and the address of the DDR memory 124 receiving the data to the CPU agent 106, and the CPU agent 106 encapsulates the data and the address into an access message indicating that a target agent Identification (ID) is a cache agent 109 and sends the access message to the cache agent 109. The caching agent 109 identifies the message as being to write data to the DDR memory 124, the address of the DDR memory 124, and the data to be written, based on the message type, and generates a DDR memory 124 access command to write the data to the DDR memory 124.

In fig. 1, the cache agent 109 is coupled to the DDR memory 124 through a message bus 122 (e.g., an AXI bus), and the cache agent 109 generates a bus command to access the DDR memory 1012. Optionally, the caching agent 109 also generates a message to the CPU agent 106 indicating the result of the data write to the DDR memory 124.

As yet another example, CPU102 (as a component) communicates with CPU104 (as a component) via a queue. The queue is a first-in-first-out (FIFO) queue, CPU102 is the queue sender, and CPU104 is the queue receiver. The CPU agent 106 provides a write pointer to the end of the queue and a read pointer to the head of the queue of the register record queue, and the CPU agent 107 provides a write pointer to the end of the queue and a read pointer to the head of the queue of the register record queue. DCCM101 and DCCM103 provide storage for queue entries. To fill a queue entry into the queue, CPU102 writes the queue entry into DCCM101 and updates the write pointer register of CPU agent 106 with the address of the write entry to complete the operation of filling the queue entry. The CPU agent 106 identifies the written-in entries of the queue according to the values of the read pointer register and the write pointer register of itself, obtains the contents of the queue entries according to the values of the read pointer register, encapsulates the queue entries (optionally, including the queue identifiers) into a queue packet, and sends the queue packet to the CPU agent 107. And the CPU agent 106 updates its own read pointer register (meaning that the queue entry is taken out by the CPU agent 107) upon receiving the message indicating that the CPU agent 107 successfully received the queue entry. The CPU agent 107 receives the queue message, obtains the contents of the queue entry from the message, writes to the DCCM103, updates its write pointer register to indicate that the queue is filled with contents, and sends a queue message to the CPU agent 106 indicating that the queue entry is received from the CPU agent 106. And the CPU agent 107 also recognizes that the queue is written with an entry according to the values of its own read pointer register and write pointer register, and informs the CPU 104.

As yet another example, the CPU102 sets a queue address space for the NVMe agent 151. The CPU102 supplies the first address of the queue address space allocated to the NVMe agent 151 to the CPU agent 106, i.e., the setting of the queue address space is completed. The CPU agent 106 encapsulates the first address as a configuration message and sends it to the NVMe agent 151. The NVMe agent 151 receives the configuration message, extracts the first address of the queue address space, and records the first address in its own register or memory.

By way of example, in the embodiment of FIG. 1, CPU agent 106 and CPU agent 107 provide configuration, access queue and synchronization pointer functionality; NVMe agent 151 provides configuration and access queue functionality; the message broker 120 provides configuration, access, and access queue functionality. Optionally, the CPU agent 106 and the CPU agent 107 also provide memory access functionality. NVMe agent 151 also provides memory access and/or synchronization pointer functionality. The message broker 120 also provides a synchronization pointer function.

FIG. 2 is a block diagram of a messaging system 200 for a system on a chip according to yet another embodiment of the present application. As shown in fig. 2, the messaging system 200 includes a message bus 208 and a plurality of agents coupled to the message bus 208.

In fig. 2, the CPU agent 206, message agent 220, cache agent 209, NVMe agent 251 are all examples of agents of the message system. The CPU agent 206 is coupled to the CPU202, the tightly coupled memory 201, and the message bus 208. The NVMe subsystem 205 includes an NVMe agent 251 and an NVMe protocol processor 252, the NVMe agent 251 being coupled to the NVMe protocol processor 252 and the message bus 208. DDR memory 224 is coupled to caching agent 209 through message bus 222; cache agent 209 is coupled to message bus 208. Message agent 220 is coupled to message bus 208, and message agent 220 is also coupled to caching agent 209.

Each agent external to the message bus 208 is coupled to an arbiter and a decoder of a port of the message bus 208.

The message bus 208 includes a plurality of ports, each of which includes a pair of an arbiter and a decoder. CPU agent 206 is coupled to arbiter 281 and translator 282; NVMe agent 251 is coupled to arbiter 283 and decoder 284; the caching agent 209 is coupled to an arbiter 285 and a translator 286; the message broker 220 is coupled to an arbiter 287 and a decoder 288.

The agent sends a data message to the message bus 208 through an arbiter in the message bus 208; the agent receives data messages from the message bus 208 through a translator in the message bus 208.

In message bus 208, each arbiter (configurably) is coupled to one, more than one, or all of the decoders in message bus 208, for receiving data messages from coupled agents and sending data messages to coupled decoders; the arbiter in message bus 208 determines which decoder (the decoder corresponding to the target agent Identification (ID)) to send the data message to based on the target agent Identification (ID) of the received data message.

Each decoder in message bus 208 is (configurably) coupled to one, more than one, or all of the arbiters in message bus 208 for receiving data messages from the arbiters and transmitting data messages to the coupled agents.

FIG. 3 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application. As shown in fig. 3, the message system includes a CPU agent 306 and a cache agent 309 coupled to a message bus 308.

The CPU agent 306 is coupled to the CPU302, the tightly coupled memory 301(DCCM302), and the message bus 308. CPU302 is coupled to CPU agent 306 through an AXI slave interface 367, and tightly coupled memory 301 is coupled to CPU agent 306 through an AXI master interface 368. CPU302 accesses CPU agent 306 through AXI slave interface 367, while CPU agent 306 accesses DCCM301 through AXI master interface 368.

The caching agent 309 is coupled to the DDR memory 324 and the message bus 308. The cache agent 309 is coupled to the DDR memory 324 through the AXI bus 304 using an AXI master interface 398 and accesses the DDR memory 324.

Fig. 3 also shows a block diagram of the proxy. The agent is used to bridge the component and the message bus. The component instructs the agent to perform the corresponding function by accessing a register or memory provided by the agent. The agent may provide one or more functions.

The agent comprises an arbiter and a decoder; the agent's arbiter is coupled to the arbiter of the message bus 308 (arbiter 381, arbiter 383, arbiter 385, or arbiter 387) and is used to send messages to the arbiter of the message bus 308; the agent's decoder is coupled to the decoder (decoder 382, decoder 384, decoder 386, or decoder 388) of the message bus 308 and is configured to receive messages from the decoder of the message bus 308. The decoder of the agent accesses or sets the corresponding module of the agent according to the function identification (Tag) in the message, or forwards the message to the module of the agent for processing the message.

The agent may include an agent interface (e.g., AXI interface) for communicating with components (e.g., CPU, DCCM), NVMe protocol processors) served by the agent; the component accesses registers or memory provided by the agent through the agent interface of the agent. The agent may also indicate an interrupt to the component.

The agent includes a plurality of modules. Each module provides its own function by processing messages. The components served by the agent may write data to the registers of the module, via the agent interface, to instruct the module to perform the corresponding function, or read data from the registers of the module. By way of example, the registers of a module may be read-only, write-only, or read-write.

The module may also provide interrupts to the serviced components through the proxy interface. The module can generate a message, and a function corresponding to the message is indicated by a function identifier (Tag) in the message; the target agent that receives the message is indicated with a target agent Identification (ID). The module sends the generated message to the message bus 308 through the agent's arbiter and then to the recipient.

Referring to fig. 3, the CPU agent 306 includes an arbiter 361, a decoder 362, and a plurality of modules (a configuration module 363, a pointer synchronization module 364, a queue TX module 365, and a memory access module 366) for processing messages. Arbiter 361, decoder 362 are each coupled to one or more of the modules for processing messages. The arbiter 361 of the CPU agent 306 is coupled to the arbiter 381 of the message bus 308 and the decoder 362 of the CPU agent 306 is coupled to the decoder 382 of the message bus 308. The module for processing messages generates data messages and sends them to the message bus 308 via the arbiter 361 of the CPU agent 306, and the decoder 362 of the CPU agent 306 receives data messages from the decoder 382 of the message bus 308 and forwards them to the module for processing messages. The modules of the CPU agent 306 for processing messages include a configuration module 363, a pointer synchronization module 364, a queue TX module 365, and a memory access module 366.

Cache agent 309 includes arbiter 391, decoder 392, and modules for processing messages (including configuration module 393, queue RX module 395, and memory access module 396). Arbiter 391, decoder 392 and the module for processing the message are coupled. The arbiter 391 of the cache agent 309 is coupled to the arbiter 385 of the message bus 308 and the translator 392 of the cache agent 309 is coupled to the translator 386 of the message bus 308. The module for processing messages generates and sends data messages to the message bus 308 via the arbiter 391 of the cache agent 309, and the translator 392 of the cache agent 309 receives data messages from the translator 386 of the message bus 308 and forwards the data messages to the module for processing messages.

In fig. 3, the modules of the agent provide respective functions.

The CPU agent 306 includes a configuration module 363, a pointer synchronization module 364, a queue TX module 365, and a memory access module 366. The pointer synchronization module 364 is used to implement a synchronous pointer function; the configuration module 363 is configured to implement a configuration function; the queue TX module 365 is used to fill queue entries to a queue to enable queue communications; the memory access module 366 is configured to implement memory access functionality. For example, the CPU302 writes data to the configuration module 363 to indicate the agents to be configured and the contents of the configuration, and/or the configuration module 363 obtains its configuration information from other agents.

Configuration module 393 of caching agent 309 is configured to receive and process configuration messages: the configuration message from configuration module 363 of CPU agent 306 is passed to configuration module 393 of caching agent 309, and configuration module 393 of caching agent 309 configures caching agent 309 (e.g., reads/writes configuration registers) based on the data message content.

The access module 366 of the CPU agent 306 is used to enable the CPU302 to access the DCCM301 in an asynchronous (read/write) manner. Although not shown in fig. 3, the DDR memory is also optionally accessed by the memory access module 366.

The queue TX module 365 of the CPU agent 306 is configured to send queue entries to other agents, e.g., the CPU302 indicates to the queue TX module 365 of the CPU agent 306 that queue entries are to be filled, and the queue TX module 365 sends the queue entries to the recipient agent. The queue TX module 365 also maintains read and write pointers for the queue.

The pointer synchronization module 364 of the CPU agent 306 is used to synchronize pointers with the pointer synchronization modules of other agents.

FIG. 4 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application. In the embodiment of FIG. 4, CPU402 and CPU404 exchange pointers through the pointer synchronization modules of the respective CPU agents.

Referring to fig. 4, the CPU agent 406 is coupled to the CPU402 and the message bus 408, the pointer synchronization module 464 of the CPU agent 406 is coupled to the arbiter 461 and the translator 462, the arbiter 461 of the CPU agent 406 is coupled to the message bus 408, the translator 462 of the CPU agent 406 is coupled to the message bus 408, the arbiter 461 of the CPU agent 406 sends data messages to the message bus 408, and the translator 462 of the CPU agent 406 receives data messages from the message bus 408.

CPU agent 407 is coupled to CPU404 and message bus 408, pointer synchronization module 474 of CPU agent 407 is coupled to arbiter 472 and decoder 471, arbiter 472 of CPU agent 407 is coupled to message bus 408, decoder 471 of CPU agent 407 is coupled to message bus 408, arbiter 472 of CPU agent 407 sends a data message to message bus 408, and decoder 471 of CPU agent 407 receives a data message from message bus 408.

In the embodiment of FIG. 4, CPU402 synchronizes pointers with CPU 404. The CPU402 is coupled to the message bus 408 through the CPU agent 406, and the CPU404 is coupled to the message bus 408 through the CPU agent 407. The CPU agent 406 and the CPU agent 407 each include a pointer synchronization module and provide a pointer synchronization function.

The CPU accesses a pointer register in a pointer synchronization module of the agent through, for example, an AXI bus. By way of example, the CPU402 writes a pointer value to a pointer register of the pointer synchronization module 464 of the CPU agent 406. The pointer synchronization module 464 of the CPU agent 406 encapsulates the pointer value and the target agent Identification (ID) of the CPU agent 407 into a pointer message, which is sent to the message bus 408 through the arbiter 461. The message bus 408 sends the message to the decoder 471 of the CPU agent 407 based on the target agent Identification (ID). The decoder 471 of the CPU agent 407 recognizes that the message is a pointer message according to the function identifier (Tag) of the message, and delivers the message to the pointer synchronization module 474 in the CPU agent 407 for processing.

The pointer synchronization module 474 of the CPU agent 407 obtains the value of the pointer from the message and records it in the pointer register. Optionally, the decoder 471 updates the pointer register of the pointer synchronization module 474 according to the message content.

The pointer synchronization module may provide a plurality of pointer registers, and also indicate in the message an index of the updated pointer register.

The CPU404 may access the pointer register of the pointer synchronization module 474 of the CPU agent 407 through, for example, the AXI bus to obtain the latest value of the pointer. Alternatively, the pointer synchronization module 474, in response to the pointer register being updated, indicates an interrupt signal to the CPU404 to make the CPU404 aware that the pointer register is updated.

In a similar manner, the CPU404 writes a pointer value to a pointer register of the pointer synchronization module 474 of the CPU agent 407 to cause the CPU402 to obtain the pointer value.

Alternatively, the pointer synchronization circuit provided in chinese patent application No. 201610473495.9 may be used as an example of the pointer synchronization module of the present application.

FIG. 5 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application.

In the embodiment of FIG. 5, CPU502 is coupled to message bus 508 through CPU agent 506. The CPU agent 506 includes a queue TX module 565 by which the CPU502 fills entries into the queue. The CPU agent 506 also includes a memory access module 566, and the queue TX module 565 obtains the queue entries in the DCCM501 through the memory access module 566, and the queue entries in the DCCM501 are added by the CPU 502.

The CPU agent 506 is coupled to the message bus 508 through an arbiter 561 and translator 562.

The CPU502 accesses the queue TX module 565 through an agent interface (e.g., AXI bus interface) to update the write pointer to the queue TX module 565. The CPU502 is also coupled to a memory (e.g., DCCM 501), and the CPU502 may access the DCCM501 directly.

As shown in fig. 5, queue TX module 565 includes pointer manager 551, memory unit 553, reply buffer unit 554, memory receive unit 555, and RCV unit 552. RCV unit 552 is coupled to pointer manager 551 and decoder 562, pointer manager 551 is further coupled to memory access unit 553 and RCV unit 552, memory access unit 553 is further coupled to reply buffer unit 554, reply buffer unit 554 is further coupled to memory access unit 555, and memory access unit 555 is further coupled to arbiter 561. The memory access client 553 issues a request to access the DCCM501 through the memory access module 566, and the memory access receiving unit 555 receives the memory access result provided by the DCCM501 from the memory access module 566. The read pointer and the write pointer of the queue are recorded in the pointer manager 551.

As an example, the CPU502 uses the queue in a first-in-first-out manner, with the CPU502 adding a new entry to the tail of the queue as the producer of the entry. The other end of the queue (e.g., another CPU, not shown in FIG. 5) fetches the entry from the head of the queue as a consumer of the entry. In one embodiment, both ends of the queue (producer and consumer of queue entries) are specified at system-on-chip initialization or production. Between the producer and the consumer, there may be multiple queues at the same time. In another embodiment, software running in the CPU502 controls the CPU502 to operate the CPU agent 506 to add entries to the queue.

To add an entry to the queue, the CPU502 first checks whether the queue is "full". For example, for a circular queue, it is identified whether the queue is "full" by checking whether the head of the queue pointer to the head of the queue position is the same as the tail of the queue pointer to the tail of the queue position. Optionally, queue TX module 565 provides a register accessible to CPU502 to indicate whether the queue is "full". The pointer manager sets the status of the queue (whether "full" or "empty") in a register depending on the values of the read and write pointers of the queue.

If the queue is not "full," the CPU502 obtains the position of the tail of the queue. The CPU502 may obtain the position of the end of the queue from the pointer manager 551 of the queue TX module 565, or may maintain the position of the end of the queue itself.

In FIG. 5, queue entries are stored in the DCCM501 and the CPU502 writes new queue entries to the tail location in the DCCM 501.

Next, the CPU502 writes the new queue tail position (write pointer value) into the pointer manager 551 of the queue TX module 565 of the CPU agent 506. By way of example, the CPU502 adds the size of one queue entry at the current tail position as the new tail position. In another example, the CPU502 indicates to the queue TX module 565 a write pointer increment, and the queue TX module 565 updates the write pointer value of the pointer manager 551 based on the configured queue entry size.

At this point, the CPU502 has completed the operation of adding an entry to the queue according to the embodiment of the present application. Since the CPU502 only needs to operate the registers of the DCCM501 and the CPU agent 506 coupled to the CPU502, these operations are all done with low latency, high speed queue operations experienced by the CPU 502. The CPU502 does not have to be concerned about how the queue entries are transferred to another CPU at the far end of the bus, simplifying the software operation of the CPU 502. Optionally, the queue TX module 565 is also responsive to a response message provided by the CPU agent at the other end of the queue to learn that the CPU agent at the other end of the queue has successfully received the queue entry. Queue TX module 565 may also indicate to CPU502 the result of the transmission of the queue entry via a status register.

Alternatively, the CPU502 may add multiple entries of the queue at once. The write pointer is then updated to queue TX module 565. Queue operating efficiency is further improved by reducing operations to update the write pointer.

Still alternatively, the CPU502 may add one or more entries to multiple queues at once. The write pointer is then updated to queue TX module 565.

Next, how queue TX module 565 handles the operation of adding an entry to the queue is described.

Queue TX module 565 checks the queue status at any time and indicates the queue status (empty, non-empty, full, and/or non-full) in registers accessible to CPU 502.

The pointer manager 551 checks the read and write pointers of the queue to indicate the queue status.

If the queue is filled with entries (e.g., the CPU502 updates the write pointer), the pointer manager 551 retrieves the value of the write pointer and/or the read pointer to provide to the memory access unit 553. The updated write pointer value indicates the memory address of the tail of the queue in DCCM501, with the newly added queue entry in the immediate vicinity of the tail of the queue. The value of the read pointer indicates the memory address of the entry that was added to the queue but has not been taken.

The memory access unit 553 accesses the DCCM501 through the memory access module 566 depending on the value of the write pointer/read pointer and the specified queue entry size. The memory unit 553 also populates the reply cache unit 554 with information related to the queue entry. The information filled into the answer cache unit 554 includes, among other things, the queue index, the target agent Identification (ID) of the queue consumer, and the like.

The CPU agent 506 may provide multiple queues. And a read pointer and a write pointer are recorded for each queue in the pointer manager 551. The pointer manager 551 of fig. 5 records read and write pointers for each of the N +1 queues. Queue entries for each queue are stored in DCCM 501. In FIG. 5, queue 0 and queue 1 stored in DCCM501 are shown.

Queue TX module 565 may respond to simultaneous operations on multiple queues by providing reply buffer unit 554. For example, CPU502 updates the write pointer of queue 0, and queue TX module 565 retrieves queue entries from DCCM501 via access module 566 based on the write/read pointer of queue 0 and fills the reply cache unit 554 with information related to the queue entries. The CPU502 updates the write pointer of queue 1 again before the access module 566 completes its acquisition of the queue entry. Queue TX module 565 may retrieve queue entries from DCCM501 via access module 566 based on the write/read pointers of queue 1 and fill the response cache unit 554 with information related to the queue entries. Thereby processing the entry add operations of queue 0 and queue 1 in parallel. As another example, the CPU502 writes two or more entries of queue 0 into the DCCM501 and then updates the write pointer of queue 0. By comparing the read pointer and write pointer of queue 0, pointer manager 551 knows that multiple entries are written in queue 0. The pointer manager 551 instructs the memory access unit 553 to fetch entries from the DCCM501 and fill the reply buffer unit 554 with information related to queue entries, depending on the read pointer and the size of the entries.

In response to the memory access module 566 obtaining the queue entry from the DCCM501, the memory access receiving unit 555 obtains the information (queue index, target agent Identification (ID) of the queue consumer, etc.) of the queue 0 related to the queue entry from the response cache unit 554, and encapsulates the obtained entry content into a memory access message, and sends the message to the message bus 508 through the arbiter 561 of the CPU agent 506. And, RCV unit 552 receives a message from translator 562 of CPU agent 506 indicating that the consumer of queue 0 has received the sent entry for queue 0. The RCV unit 552 updates the read pointer of queue 0 recorded by the pointer manager 551. For example, the read pointer is made to point to the next entry of queue 0.

The pointer manager 551 continually checks the read and write pointers of each queue. If queue 0 is still not empty (the read pointer lags the write pointer) even though RCV unit 552 updates the read pointer of queue 0, pointer manager 551 retrieves the entry from DCCM501 and fills the response cache unit 554 with information related to the queue entry, again depending on the size of the read pointer and the entry.

In one example, as long as the pointer manager 551 finds that the queue is not empty, the queue entry pointed by the read pointer is obtained from the DCCM501 according to the read pointer of the queue, and is sent to the consumer (agent) of the queue by the access receiving unit 555. As another example, a consumer of the queue may indicate the status of the consumer to the CPU agent 506 in a queue message. For example, the queue consumer may temporarily fail to receive the queue entry, or the queue consumer may not receive the queue entry correctly. If the queue consumer is temporarily unable to receive a queue entry (e.g., a queue entry for queue 0, or a queue entry for any queue), the pointer manager 551 correspondingly suspends fetching queue entries from the DCCM 501. If the queue consumer does not receive the queue entry correctly, the pointer manager 551 does not update the read pointer and retrieves the queue entry from the DCCM501 again based on the original read pointer for sending to the queue consumer (agent).

FIG. 6 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application.

In the embodiment of FIG. 6, CPU604 is coupled to message bus 608 through CPU agent 607. The CPU agent 607 includes a queue RX module 675 through which the CPU604 retrieves entries from the queue. The CPU agent 607 also includes a memory accessing module 676 that the queue RX module 675 writes queue entries to the memory 603 via the memory accessing module 676 that the CPU604 directly couples to the memory 603 and retrieves the queue entries from the memory 603.

The CPU agent 607 is coupled to the message bus 608 through an arbiter 671 and an RCV unit 672.

CPU604 accesses queue RX module 675 through the proxy interface to update the read pointer to queue RX module 675. The CPU604 is also coupled to a memory 603 (e.g., DCCM).

As shown in fig. 6, the queue RX module 675 includes a pointer manager 651, a memory access unit (not shown in the figure), a TXD unit 653, a response buffer unit 654, and an RCV unit 652; the RCV unit 652 is further coupled to a pointer manager 651, a reply buffer unit 654 and a decoder 672, the pointer manager 651 is further coupled to a TXD unit 653, the TXD unit 653 is coupled to the reply buffer unit 654 and an arbiter 671.

By way of example, the CPU604 uses the queue in a first-in-first-out manner, with the CPU604 fetching entries from the head of the queue as consumers of the entries.

Software running in the CPU604 controls the CPU604 to operate the CPU agent 607 to fetch queue entries from the queue.

The process of the CPU fetching an entry from the queue is as follows. When an entry exists in the queue, CPU604 fetches the entry from the queue. The entries of the queue are provided by the producer of the queue (e.g., CPU 502). The queue RX module 675 of the CPU agent 607 maintains the status of the queue. For example, for a circular queue, queue RX module 675 identifies whether the queue is "empty" by checking whether the head of the queue pointer (read pointer) pointing to the head of the queue position lags behind the tail of the queue pointer (write pointer) pointing to the tail of the queue position. Alternatively, queue RX module 675 provides a register accessible to CPU604 to indicate whether the queue is "full". The pointer manager 651 sets the status of the queue ("full", "empty", "not full", or "not empty") in the registers, depending on the values of the queue's read and write pointers. When the queue is "not empty," queue RX module 675 can indicate an interrupt to CPU604, informing CPU604 that the queue is filled with entries. Alternatively, CPU604 polls the status register of queue RX module 675 for queue status.

If the queue is not empty, the CPU604 obtains the position of the head of the queue (read pointer value). The CPU604 may obtain the head of line location from the pointer manager 651 of the queue RX module 675 or may maintain the head of line location itself.

In fig. 6, queue entries are stored in the memory 603, and the CPU604 retrieves the queue entries from the memory 603 according to the read pointer.

Next, the CPU604 writes the new head of queue position (read pointer value) to the pointer manager 651 of the queue RX module 675 of the CPU agent 607. By way of example, the CPU604 increases the size of a queue entry at the current head of line position as the new head of line position. In another example, CPU604 indicates to queue RX module 675 that the read pointer is incremented, and queue RX module 675 updates the read pointer value based on the configured queue entry size.

At this point, the CPU604 has completed the operation of obtaining an entry from the queue according to the embodiment of the present application. Since the CPU604 only needs to operate on the registers of the memory 603 and CPU agent 607 coupled to the CPU604, these operations are all completed with low latency, high speed queue operations experienced by the CPU 604. The CPU604 need not be concerned with how the queue producer knows that a queue entry is being fetched by a queue consumer, simplifying the operation of the CPU604 software. Alternatively, after the CPU604 updates the read pointer, the queue RX module 675 provides a response message to the CPU agent at the other end of the queue (e.g., CPU agent 506) to inform the CPU agent 506 that the read queue entry was successfully received, and the CPU agent 506 may update its maintained read pointer accordingly. Optionally, the read pointer and/or write pointer values are synchronized between the CPU agent 506 and the CPU agent 607 through a pointer synchronization function and a pointer message. Still optionally, updated read pointer and/or write pointer values are communicated between the CPU agent and the CPU agent 607 via queue messages.

Alternatively, if there are multiple entries in the queue, CPU604 may read multiple entries of the queue at once. The read pointer is then updated to queue RX module 675. Queue operating efficiency is further improved by reducing operations to update the write pointer.

Still alternatively, CPU604 may fetch one or more entries from multiple queues at a time. The read pointer is then updated to queue RX module 675.

Next, how queue RX module 675 handles the operations of retrieving entries from the queue is described.

Queue RX module 675 checks the queue status at any time and indicates the queue status (empty, non-empty, full, and/or non-full) in registers accessible to CPU 604.

The pointer manager 651 checks the read and write pointers of the queue to indicate the queue status.

The translator 672 of the CPU agent 607, in response to receiving the queue message from the message bus 608, forwards the queue message to the RCV unit 652.

The RCV unit 652 obtains the queue status from the pointer manager 651. When the queue is not full, the memory address indicated by the queue write pointer is obtained from the pointer manager 651, the content of the queue entry is obtained from the queue packet, and the queue entry is written into the memory 603 through the memory access module 676. And the RCV unit 652 also populates the reply buffer unit 654 with information relating to the queue entry. The information filled into the response buffer unit 654 includes a queue index, a target agent Identification (ID) of a queue producer, and the like.

If the queue is full, the RCV unit 652 discards the queue entry received from the queue packet, and the RCV unit 652 also populates the response buffer unit 654 with information related to the queue entry. Information populated into the reply buffer unit 654 includes, among other things, the queue index, the target agent Identification (ID) of the queue producer, and an indication that an entry was not received (e.g., a request for retransmission).

The CPU agent 607 may provide a plurality of queues. And recording read and write pointers for each queue in the pointer manager 651. Queue entries for each queue are stored in memory 603. In fig. 6, queue 0 and queue 1 are shown stored in memory 603.

By providing acknowledgement buffering, queue RX module 675 may respond to simultaneous operations on multiple queues. For example, RCV unit 652 fills the queue entries into memory 603 via access module 676 based on the write pointer of queue 0 and fills the reply buffer unit 654 with information related to the queue entries. Before the access module 676 completes filling the queue entry, the queue RX module 675 receives the queue packet again and fills the queue entry into the queue 1. The queue TX module may write queue 1 entries to the memory 603 via the memory access module based on the write pointer of queue 1 and fill the response cache location with information associated with the queue entries. Thereby processing the entry add operations of queue 0 and queue 1 in parallel.

In response to the memory access module completing the addition of the queue 0 entry to the memory 603, the TXD unit 653 retrieves the queue 0 information (queue index, queue producer's target agent Identification (ID), etc.) from the reply buffer unit 654 associated with the queue entry, encapsulates it into a memory access message, and sends it to the message bus 608 through the arbiter 671 of the CPU agent 607 to indicate to the producer of queue 0 that the consumer of queue 0 has received the queue 0 entry it sent. The TXD unit 653 updates the write pointer of queue 0 recorded by the pointer manager 651. For example, the write pointer is made to point to the next entry of queue 0.

The TXD unit 653 also checks for messages associated with queue entries in the reply buffer unit 654. If the message indicates that an entry has not been received, it is encapsulated into a queue message, based on the queue index, the target agent Identification (ID) of the queue producer, and an indication that an entry has not been received, and sent to the message bus 608 via the arbiter 671 of CPU agent 607 to indicate to the producer of the queue that the consumer of the queue has failed to receive an entry for a queue.

The pointer manager 651 of the CPU agent 607 may update the read pointer in response to an access by the CPU 604. The CPU604 may provide the pointer manager 651 with the new value of the read pointer. Alternatively, the CPU604 instructs the pointer manager 651 to increment the read pointer, and the pointer manager 651 updates the read pointer according to the preset queue entry size and the current read pointer value.

FIG. 7 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application. As shown in FIG. 7, CPU agent 706 is coupled to CPU702, message bus 708, and DCCM 701. CPU agent 706 includes translator 762, arbiter 761, queue TX module 765, queue RX module 760, translator 712, arbiter 711, and memory access module 766. Translator 712, arbiter 761 of CPU agent 706 are coupled to message bus 708, queue TX module 765, and queue RX module 760, translator 712, arbiter 711 are coupled to memory access module 766, queue RX module 760, and queue TX module 765, and memory access module 766 is coupled to DCCM 701.

Queue TX module 765 includes pointer manager 751, memory unit 753, reply buffer unit 754, memory receive unit 755, and RCV unit 752, RCV unit 752 being coupled to pointer manager 751 and decoder 762, pointer manager 751 being further coupled to memory unit 753, RCV unit 752, and an agent interface (e.g., an AXI bus interface), memory unit 753 being further coupled to reply buffer unit 754 and arbiter 711, reply buffer unit 754 being further coupled to memory receive module 755, memory receive module 755 being further coupled to arbiter 761 and decoder 712.

In the embodiment of fig. 7, CPU agent 706 includes a queue TX module 765 and a queue RX module 760. Queue TX module 765 may be queue TX module 565 of fig. 5 and queue RX module 760 may be queue RX module 675 of fig. 6.

CPU702 may fill queue 0 with entries through queue TX module 765 of CPU agent 706 and retrieve entries from queue 1 through queue RX module 760 of CPU agent 706. The queue TX module 765 may provide the CPU702 with a plurality of queues through which the CPU702 sends queue entries to agents remote from the queues. The queue RX module 760 may provide the CPU702 with a plurality of queues through which the CPU702 receives queue entries from the far end of the queue. The remote ends of the various queues may be different agents or components.

Queue TX module 765 and queue RX module 760 each send data messages to message bus 708 via arbiter 761 and receive data messages from message bus 708 via translator 712. The queue TX module 765 has a different function identification (Tag) than the queue RX module 760.

The CPU agent 706 also includes a decoder 712 and an arbiter 711. Both the queue TX module 765 and the queue RX module 760 send memory 704 access requests to the memory access module 766 through the arbiter 711, and both the queue TX module 765 and the queue RX module 760 receive responses given by the memory 704 from the memory access module 766 through the decoder 712.

Optionally, a memory (e.g., DCCM701 or off-chip memory) is coupled to the message bus, and queue TX module 765 and queue RX module 760 send memory access messages to message bus 708 via arbiter 761 and receive memory access results from message bus 708 via translator 762. And in this case, the decoder 712 and the arbiter 711 need not be provided.

CPU702 may write queue entries to DCCM701 and read queue entries from DCCM 701. CPU702 may also update the write pointer of the queue maintained by queue TX module 765 and the read pointer of the queue maintained by queue RX module 760.

Fig. 8 is a schematic diagram of queue communication by an agent according to an embodiment of the present application. As shown in FIG. 8, the message system includes CPU agent 806, CPU agent 807, caching agent 809, message agent 820, and message bus 807, message bus 807 being coupled to CPU agent 806, CPU agent 807, caching agent 809, and message agent 820; the CPU agent 806 includes a queue TX module 865 and a queue RX module 860. CPU agent 807 includes a queue TX module 875 and a queue RX module 870.

The CPU agent 806 is coupled to the CPU802 and DCCM801, and the CPU agent 807 is coupled to the CPU804 and DCCM 803. The DCCM801 stores queue entries, and the CPU802 directly accesses the DCCM801 to access the queue entries of the DCCM 801. The DCCM803 stores a queue entry, and the CPU804 directly accesses the DCCM803 to access the queue entry of the DCCM 803. The caching agent 809 is coupled to the message broker 820 and the memory 8010.

In the embodiment of FIG. 8, CPU802 and CPU804 communicate in a queue on message bus 808 using respective agents. CPU802 sends queue entries to CPU804 through queue 0 and CPU804 receives entries from queue 0. CPU804 sends queue entries to CPU802 through queue 1, and CPU802 receives entries from queue 1.

The CPU802 and DCCM801 are coupled to a CPU agent 806. The DCCM801 stores therein a queue 0 and a queue 1, and the CPU802 directly accesses the DCCM801 to write an entry to the queue 0 or acquire an entry from the queue 1. The CPU agent 806 includes a queue TX module 865 and a queue RX module 860. The queue TX module 865 of CPU agent 806 is used to send a message to queue RX module 870 of CPU agent 807 to send the entry for queue 0 of DCCM801 to queue 0 of DCCM 803. The queue RX module 860 of the CPU agent 806 is configured to receive a message from the queue TX module 875 of the CPU agent 807 to receive an entry added to queue 1 of DCCM 801/DCCM 803.

The CPU804 and DCCM803 are coupled to a CPU agent 807. The DCCM803 stores queue 1 and queue 1, and the CPU804 directly accesses the DCCM803 to write an entry to queue 1 or to acquire an entry from queue 0. CPU agent 807 includes a queue TX module 875 and a queue RX module 870. The queue TX module 875 of CPU agent 807 is used to send a message to the queue RX module 860 of CPU agent 806 to send the entry for queue 1 of DCCM803 to queue 1 of DCCM 801. The queue RX module 870 of the CPU agent 807 is used to receive messages from the queue TX module 865 of the CPU agent 806 to receive entries added to queue 0 of DCCM 801/DCCM 803.

The queuing TX module may be queuing TX module 565 of fig. 5 and the queuing RX module may be queuing RX module 675 of fig. 6.

The following describes the operation flow of the CPU.

To establish queue 0 between CPU802 and CPU804, CPU802 maintains queue 0 in DCCM801, including maintaining the address of the queue entry storing queue 0, the read pointer (head pointer) and write pointer (tail pointer) of queue 0, the entry size of queue 0, the number of queue entries (queue depth), CPU802 indicates to queue TX module 865 of CPU agent 806 the read pointer and tail pointer (and/or address of the store queue entry) of queue 0 in DCCM801, the entry size of queue 0, and the number of queue entries. In a similar manner, multiple queues may be established between CPU802 and CPU 804.

The CPU802 also configures (e.g., by a configuration module of the CPU agent 806) a queue RX module 870 of the CPU agent 807 to indicate the read and tail pointers (and/or addresses of store queue entries) of queue 0, the entry size of queue 0, and the number of queue entries in the DCCM 803. Queue 0 of CPU agent 806 may have a different queue depth than queue 0 of CPU agent 807. The depth of the respective queues may be set according to the number of DCCMs (memory resources) owned by the CPU802 and the CPU 804.

Optionally, the CPU802 also sets the agent identification of the queue recipient to the queue TX module 865 of the CPU agent 806 (in FIG. 8, CPU agent 807). Thus, the queue TX module 865 sends messages to the proxy CPU agent 807 (and its queue RX module 870) without other specification.

Still alternatively, the above configuration may also be implemented by the CPU 804.

The following describes a process of performing queue communication.

To communicate via queue 0, the CPU802 writes a queue entry to queue 0 in the DCCM801 according to the write pointer of queue 0, updates the write pointer so that the write pointer points to the next writable entry of queue 0, and informs the queue TX module 865 of the CPU agent 806 of the new value of the write pointer. By this point, CPU802 has completed the operation of adding an entry to queue 0. In the same manner, CPU802 may add one or more entries to queue 0. The remaining work is done by CPU agent 806 in cooperation with CPU agent 807.

The queue TX module 865 of the CPU agent 806 identifies that an entry is added to queue 0 in response to the write pointer of queue 0 of the DCCM801 being updated, retrieves the entry for queue 0 from the read pointer of queue 0, and sends the entry to the queue RX module 870 of the CPU agent 807. The queue RX module 870 of the CPU agent 807 stores the received entry for queue 0 to queue 0 of the DCCM803 according to the write pointer for queue 0 maintained by itself, and increments the write pointer for queue 0 maintained by the queue RX module 870. And queue RX module 870 of CPU agent 807 identifies that queue 0 of DCCM803 has an entry added to it in response to the write pointer of queue 0 leading the read pointer, indicating to CPU804 that queue 0 has an entry added. The CPU804 acquires an entry added to queue 0 from the DCCM803 based on the read pointer of queue 0.

The queue RX module 870 of the CPU agent 807, in response to storing the received entry for queue 0 to queue 0 of the DCCM803, also indicates to the queue TX module 865 of the CPU agent 806 that the entry for queue 0 was successfully received, so that the queue TX module 865 of the CPU agent 806 knows that the entry for queue 0 was taken by the CPU agent 807, thus updating the read pointer for queue 0 of the DCCM 801.

In the embodiment of FIG. 8, CPU802 maintains queue 0 in DCCM 801. While the CPU agent 807 maintains a copy queue 0 of the DCCM801 in the DCCM803 to track changes to queue 0 maintained by the CPU 802. Thus, the CPU802 only needs to operate the queue 0 in the local memory (DCCM801) without paying attention to the remote memory (memory of the receiver of the queue 0), simplifying the operational complexity of the CPU802 and without waiting for the entry of the queue 0 to be moved from the DCCM801 to the DCCM 803. Logically, a one-way queue is thus established between CPU802 and CPU 804. Queue 0 may be a circular queue, and when the write pointer is updated after it reaches the last entry of the memory space of the queue, the write pointer will point to the first entry of the memory space.

In a similar manner, the CPU804 transmits the queue entry to queue 1 of the DCCM801 of the CPU802 through queue 1 of the DCCM 803.

In response to receiving an entry for queue 1 from the CPU agent 807, the queue RX module 860 of the CPU agent 806 stores the received entry to queue 1 of the DCCM801, updates the write pointer for queue 1, and indicates to the CPU802 that the write pointer for queue 1 leads the read pointer (the written entry in queue 1 of the DCCM 801).

The CPU802 recognizes that an entry is written in queue 1, obtains a queue entry from queue 1 of the DCCM801 based on the read pointer for queue 1 (which may be maintained by the CPU802 itself or obtained from the queue RX module 860 of the CPU agent 806), and updates the read pointer for queue 1 maintained by the CPU802 and the queue RX module 860 of the CPU agent 806.

Fig. 9 is a schematic diagram of queue communication by an agent according to yet another embodiment of the present application. As shown in fig. 9, the message system includes a CPU agent 906, a CPU agent 907, a cache agent 909, a message agent 920, and a message bus 908, the message bus 908 being coupled to the CPU agent 906, the CPU agent 907, the cache agent 909, and the message agent 920; the CPU agent 906 includes a queue TX module 965 and a queue RX module 960. CPU agent 907 includes a queue TX module 975 and a queue RX module 975.

The CPU agent 906 is coupled to the CPU902 and the DCCM901, and the CPU agent 907 is coupled to the CPU904 and the DCCM 903. The DCCM901 stores queue entries, and the CPU902 directly accesses the DCCM901 to access the queue entries of the DCCM 901. DCCM903 stores queue entries and CPU904 accesses DCCM903 directly to access the queue entries of DCCM 903. A caching agent 909 is coupled to the message agent 920 and the memory 924.

In the embodiment of fig. 8, the depth of the queue is difficult to be large, limited by the DCCM capacity. In the embodiment of FIG. 9, the use of memory 924 external to the system-on-chip to store queue entries greatly reduces the limit on queue depth. Queue entries provided by the queue producer can be cached in the memory 924 even when the queue consumer is overwhelmed with queue entries, reducing the impact on the queue producer business process.

In the embodiment of FIG. 9, CPU902 and CPU904 utilize respective agents for queue communication on message bus 908. CPU902 sends queue entries to CPU904 through queue 0 and CPU904 receives queue entries from queue 0. CPU904 sends a queue entry to CPU902 through queue 1 and CPU902 receives a queue entry from queue 1.

In the embodiment of fig. 9, rather than passing the queue entries of queue 0 directly from DCCM901 to DCCM903, queue TX module 965 of CPU agent 906 sends the queue entries of queue 0 in DCCM901 to message agent 920 (indicated by (1) in fig. 9), and message agent 920 stores the queue entries of queue 0 to memory 924 (e.g., via cache agent 909) (indicated by (2) in fig. 9). Next, the message agent 920 retrieves the queue entry of queue 0 from the memory 924 (indicated by (3) in fig. 9), sends it to the CPU agent 907 (indicated by (4) in fig. 9), stores it in queue 0 of the DCCM903 by the queue RX module 975 of the CPU agent 907, and makes the queue entry of queue 0 accessible to the CPU 904. Otherwise, the CPU agent 907 sends the queue entry of queue 1 of the DCCM903 filled with the CPU904 to the message broker 920. The message agent 920 fills the memory 924 with the queue entries for queue 1 and fetches the queue entries from the memory 924 to send to the CPU agent 906. The CPU agent 906 fills the queue entry into queue 1 of the DCCM901 so that the CPU902 can access the queue entry of queue 1.

Alternatively, taking the example of operating queue 0, queue TX module 965 of CPU agent 906 senses the status of queue 0 provided by queue RX module 975 of CPU agent 907. When queue 0 of DCCM903 is not full, CPU agent 906 sets the receiver of queue 0 as CPU agent 907, so that the data packet sent by queue TX module 965 of CPU agent 906 (the data packet of operation queue 0) is forwarded by message bus 908 to queue RX module 975 of CPU agent 907, and CPU agent 906 and CPU agent 907 communicate in the manner shown in the embodiment of fig. 8. If queue 0 of DCCM903 is full and cannot receive the data packet of queue 0 for the moment, CPU agent 906 sets the receiver of queue 0 as message agent 920, so that the data packet (data packet of operation queue 0) sent by queue TX module 965 of CPU agent 906 is forwarded to message agent 920 by message bus 908 and temporarily buffers the queue entry of queue 0 in memory 924.

Similarly, queue TX module 975 of CPU agent 907 may also select whether to send the data message associated with queue 1 to CPU agent 906 or message agent 920 based on the status of queue 1 in DCCM 901.

The change to the message path between agents may also be set by the CPU (CPU902 or CPU904) or by the message recipient depending on the status of its queue (full or not).

The message broker 920 provides visible or invisible buffering for queues between components. The ability of the queue consumer is almost unlimited to the producer of the queue, and queue entries in the queue are always taken away, reducing the occurrence of queue fullness and unavailability.

And selecting a receiving end of the data message based on the state of the queue receiving end makes a trade-off between the efficiency and the availability of queue communication. When the queue of the receiving party is not full, the data message is directly sent to the agent of the receiving party of the queue so as to improve the transmission efficiency and reduce the transmission delay, and when the queue of the receiving party is full, the data message is sent to the agent (message agent 920) of the buffer memory so that the queue communication can be continuously carried out and the availability of the queue communication is improved.

And optionally, a separate data path between message agent 920 and cache agent 909, reducing the impact on the workload of message bus 908.

A queue TX module and a queue RX module may be included in the message broker 920. The queue RX module of the message broker 920 receives data packets from the queue TX module of the CPU agent 906 or the CPU agent 907, and the queue TX module of the message broker 920 transmits data packets to the queue RX module of the CPU agent 906 or the CPU agent 907. One or more queues for message broker 920 may be maintained in CPU agent 906 in communication with CPU agent 907.

To establish queue 0 between CPU902 and CPU904, CPU902 maintains queue 0 in DCCM901, including maintaining the address of the queue entry storing queue 0, the read pointer (head pointer) and write pointer (tail pointer) of queue 0, the queue entry size of queue 0, the number of queue entries (queue depth), CPU902 indicates to queue TX module 965 of CPU agent 906 the read pointer and tail pointer (and/or address of the store queue entry) of queue 0 in DCCM901, the entry size of queue 0, and the number of queue entries. In a similar manner, multiple queues may be established between the CPU902 and the CPU 904.

The CPU902 also configures the queue RX module of the message broker 920 to indicate the read and tail pointers (and/or addresses of stored queue entries) for queue 0, the queue entry size for queue 0, and the number of queue entries in the memory 924. Queue 0 of the CPU agent 906 and queue 0 of the message agent 920 may have different queue depths. The depth of the respective queues may be set according to the number of DCCMs (memory resources) owned by the CPU902 and the capacity of the memory 924.

The CPU902 also configures the queue RX module 975 of the CPU agent 907 to indicate the read and tail pointers (and/or the addresses of the store queue entries) for queue 0 in the DCCM903, the queue entry size for queue 0, and the number of queue entries. Queue 0 of CPU agent 906 and queue 0 of CPU agent 907 may have different queue depths. Queue 0 of the CPU agent 907 and queue 0 of the message agent 920 may have different queue depths.

Optionally, the CPU902 also sets the agent identification of the recipient (in fig. 9, message agent 920) to the CPU agent 906 queue TX module 965. Thus, the queue TX module 965 sends all messages to the queue RX module in the message broker 920 without further specification. The CPU902 also sets the agent identification of the queue recipient (in fig. 9, CPU agent 907) to the queue TX module of the proxy message agent 920. Thus, the queue TX module of the message broker 920 sends all messages to the queue RX module 975 in the CPU broker 907 without further specification. It is to be appreciated that CPU902 may update the agent identification of the recipient of the queue TX module of CPU agent 906 and/or the queue TX module of message agent 920.

Still alternatively, the above configuration may also be implemented by the CPU 904.

To communicate through queue 0, CPU902 writes a queue entry to queue 0 in DCCM901 according to the write pointer of queue 0, updates the write pointer so that the write pointer points to the next writable queue entry of queue 0, and informs queue TX module 965 of CPU agent 906 of the new value of the write pointer. By this point, the CPU902 has completed the operation of adding a queue entry to queue 0. In the same manner, the CPU902 may add one or more queue entries to queue 0. The remaining work is done by CPU agent 906, message agent 920 in cooperation with CPU agent 907.

The queue TX module 965 of the CPU agent 906, in response to the write pointer of the queue 0 being updated, recognizes that a queue entry is added to the queue 0, acquires the queue entry of the queue 0 according to the read pointer of the queue 0, and sends the queue entry to the queue RX module of the message agent 920, and the queue RX module of the message agent 920 stores the received queue entry of the queue 0 into the queue 0 of the memory 924 according to the write pointer of the queue 0 maintained by itself, and increments the write pointer of the queue 0 maintained by the queue RX module of the message agent 920.

The queue RX module of the message agent 920, in response to storing the received queue entry for queue 0 to queue 0 of the memory 924, also indicates to the queue TX module 965 of the CPU agent 906 that the queue entry for queue 0 was successfully received, so that the queue TX module 965 of the CPU agent 906 knows that the queue entry for queue 0 was taken by the message agent 920, thus updating the read pointer for queue 0 that it maintains.

And the queue TX module of the message broker 920 recognizes that queue 0 has a queue entry added in response to the write pointer of queue 0 leading the read pointer. The queue TX module of message agent 920 retrieves the queue entry for queue 0 from memory 924 based on the read pointer for queue 0 and sends it to queue RX module 975 of CPU agent 907 via the message bus. The queue RX module 975 of the CPU agent 907 stores the received queue entry of queue 0 to queue 0 of the DCCM903 according to the write pointer of queue 0 maintained by itself, and increments the write pointer of queue 0 maintained by the queue RX module 975. And queue RX module 975 of CPU agent 907 recognizes that queue 0 is added a queue entry in response to the write pointer of queue 0 leading the read pointer, indicating to CPU904 that queue 0 is added a queue entry. CPU904 obtains the queue entry added to queue 0 from DCCM903 based on the read pointer of queue 0.

Queue RX module 975 of CPU agent 907, in response to storing the received queue entry for queue 0 to queue 0 of DCCM903, also indicates to queue TX module of message agent 920 that the queue entry for queue 0 was successfully received, so that queue TX module of message agent 920 knows that the queue entry for queue 0 was taken by CPU agent 907, thus updating the read pointer for queue 0 that it maintains itself.

In the embodiment of fig. 9, the message broker 920 extends the capacity of the queue. When queue entries accumulate in DCCM903 due to untimely queue receiver processing, message agent 920 buffers the queue entries in memory 924 with large storage capacity to take queue entries for the queue producer (e.g., queue 0 of DCCM901) in time.

Thus, the CPU902 only needs to operate the queue 0 in the local memory (DCCM901) without paying attention to the remote memory (memory of the receiver of the queue 0), simplifying the operational complexity of the CPU902 and without waiting for the queue entry of the queue 0 to be moved from the DCCM901 to the DCCM 903. The CPU902 does not even have to handle the situation that the local memory queue is full, further reducing the operation complexity of the CPU902 and improving the processing efficiency.

In a similar manner, CPU904 sends a queue entry to queue 1 of DCCM901 of CPU902 via queue 1 of DCCM 903.

In response to receiving the queue entry for queue 1 from the message agent 920, the queue RX module 960 of the CPU agent 906 stores the received queue entry to queue 1 of the DCCM901, updates the write pointer for queue 1, and indicates to the CPU902 that the write pointer for queue 1 leads the read pointer.

The CPU902 recognizes that a queue entry is written to queue 1, obtains the queue entry from queue 1 of DCCM901 based on the read pointer for queue 1 (which may be maintained by the CPU902 itself or from the queue RX module 960 of CPU agent 906), and updates the read pointer for queue 1 maintained by the CPU902 (and queue RX module 960 of CPU agent 906).

FIG. 10 is a block diagram of a messaging system for a system on a chip according to yet another embodiment of the present application. As shown in FIG. 10, the message broker 1020 is coupled to the message bus 1008 and a second message bus 1050. The message broker includes an arbiter 1022, a decoder 1021, a second arbiter 1025, a second decoder 1024, a queue TX module 1040, a queue RX module 1030, and a configuration module 1023.

Arbiter 1022 couples queue TX module 1040, queue RX module 1030, and configuration module 1023 to message bus 1008; translator 1021 couples message bus 1008 to queue TX module 1040, queue RX module 1030, and configuration module 1023; the second arbiter 1025 couples the queue TX module 1040 and the queue RX module 1030 to the second message bus 1050; second decoder 1024 couples second message bus 1050 to queued TX module 1040 and queued RX module 1030.

The message bus 1008 and the second message bus 1050 are coupled through a caching agent 1009, and the second message bus 1050 and the memory 1060 are coupled through the caching agent 1009.

In the embodiment of fig. 10, the message broker 1020 includes a queue TX module 1040 and a queue RX module 1030. Queued TX module 1040 may be the queued TX module of fig. 5 and queued RX module 1030 may be the queued RX module of fig. 6.

The message broker 1020 also includes a configuration module 1023. The configuration module 1023 receives configuration messages from other agents (e.g., the CPU agent 1006) and configures the queue RX module 1030 and the queue TX module 1040 of the message agent 1020, for example, to set the queue entry size, queue read pointer, queue write pointer, and/or queue depth.

In the embodiment of fig. 10, the pointer manager 1032 of the queue RX module 1030 and the pointer manager 1042 of the queue TX module 1040 of the message broker 1020 also synchronize queue pointers with each other. The queue RX module 1030 updates the queue write pointer in response to filling the queue with entries and synchronizes the updated queue write pointer to the pointer manager 1042 of the queue TX module 1040. The queue TX module 1040 updates the queue read pointer in response to providing the queue entry to the queue recipient, and synchronizes the updated queue read pointer to the pointer manager 1032 of the queue RX module 1030.

Entries of the queue maintained by the message broker 1020 are stored in a memory 1060, such as a DRAM. The queue RX module 1030 and the queue TX module 1040 of the message broker 1020 access the memory 1060 through the caching agent 1009. In the example of fig. 10, the queue RX module 1030 and the queue TX module 1040 exchange messages with the caching agent via the second translator 1024 and the second arbiter 1025. The second translator 1024 and the second arbitrator 1025 are coupled to the caching agent 1009 via a second message bus 1050 and exchange messages according to embodiments of the present application. Optionally, the second message bus 1050 is yet another example of a message bus, such that messages are exchanged over the second message bus 1050 without occupying the bandwidth of the message bus 1008. Still optionally, the second message bus 1050 is the same instance as the message bus 1008, thereby reducing system hardware resource requirements and simplifying design. Still alternatively, the second arbiter 1025 and the arbiter 1022 may be the same instance or separate instances, respectively; and second decoder 1024 and decoder 1021 may be the same instance or separate instances. Still alternatively, the second decoder 1024 and the second arbiter 1025 may be coupled directly to the cache agent 1009 with the second message bus 1050 omitted.

In the embodiment of fig. 10, the queue sender fills an entry into queue 0 of message agent 1020 through an agent (e.g., CPU agent 1006) and retrieves an entry from queue 1 through the queue RX module of CPU agent 1006.

Initially, the pointer managers of the queue RX module 1030 and the queue TX module 1040 of the message broker 1020, respectively, have the same read pointer and write pointer (as an example) for each queue, and both point to the start address of the queue to indicate that the queue is empty.

The queue RX module 1030 of the message broker 1020 receives a message from an agent (e.g., CPU agent 1006) to fill an entry into queue 0. The queue RX module 1030 obtains the write pointer of the queue 0 from the pointer manager 1032 of the queue RX module, generates a memory access message according to the write pointer and the received entry, and sends the memory access message to the cache agent, so as to write the entry of the queue 0 into the memory 1060. Queue RX module 1030 also updates the write pointer of queue 0 that it maintains to point to the location where the next entry is stored. Queue RX module 1030 also sends a response to the producer agent (CPU agent 1006) of queue 0, informing the agent CPU agent 1006 that an entry for queue 0 has been received. Queue RX module 1030 also sends the new value of the write pointer for queue 0, which it maintains, to queue TX module 1040. The queue TX module 1040 records the new value of the write pointer for queue 0 in its pointer manager 1042.

The pointer manager 1042 of the queue TX module 1040 finds that the write pointer of queue 0, which it maintains, is ahead of the read pointer, recognizing that there is an added entry in queue 0. In response to the write pointer of queue 0 leading the read pointer, queue TX module 1040 generates an access packet based on the read pointer of queue 0, reads the queue entry indicated by the read pointer from memory 1060 through cache agent 1009, and sends it to the consumer agent (e.g., CPU agent 1007) of queue 0. And in response to receiving a response to a successful receipt of the entry from the consumer agent (CPU agent 1007) of queue 0, queue TX module 1040 updates its own maintained read pointer. Queue TX module 1040 sends the updated read pointer for queue 0 to queue RX module 1030. Pointer manager 1042 of queue TX module 1040 finds that the read pointer and write pointer of queue 0 are the same, meaning that there are no entries in queue 0 to send. Optionally, in response to receiving the read pointer updated by queue TX module 1040, queue RX module 1030 also sends a response to the producer agent of queue 0 (CPU agent 1006) to inform CPU agent 1006 that the consumer of queue 0 has received an entry for queue 0.

While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application. It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

1. An agent, comprising a first arbiter, a first decoder, a second arbiter, a second decoder, a queue TX module, and a queue RX module,

a first arbiter couples the queue TX module and the queue RX module to a message bus;

a first translator couples a message bus to a queue TX module and a queue RX module;

a second arbiter couples the queue TX module and the queue RX module to a second message bus;

a second translator couples a second message bus to the queue TX module and the queue RX module;

wherein the agent is based on data message communication, the agent identifying one or more messages.

2. The agent of claim 1, wherein the queue TX module and the queue RX module send data packets to the message bus through the first arbiter, and wherein the queue TX module and the queue RX module receive data packets from the message bus through the first decoder.

3. An agent according to claim 1 or 2, wherein the message bus and the second message bus are coupled via a caching agent, and the second message bus and the memory are coupled via a caching agent.

4. The agent of claim 3, wherein the queue RX module synchronizes queue pointers with the queue TX module, wherein,

the queue TX module sends queue entries to the queue RX modules of other agents through the queue messages, receives responses of the queue RX modules of other agents, updates the head of queue pointers of the queues, synchronizes the updated head of queue pointers to the queue RX modules of the agents, and the queue RX modules of the agents take the updated head of queue pointers as the head of queue pointers of the agents.

5. The agent of any one of claims 1-4, wherein the queue RX module comprises a first pointer manager and the queue TX module comprises a second pointer manager.

6. The agent of claim 5, wherein the queue RX module, in response to receiving queue entries from the queue TX modules of other agents, obtains a tail-of-queue pointer from the first pointer manager;

the queue RX module generates a memory access message according to the queue tail pointer and the received queue entry so as to write the queue entry into the memory through the second arbitrator;

the queue RX module, in response to receiving an indication from the second decoder to write a queue entry to memory, sends a response to the agent on the sender of the queue via the first arbiter and updates the tail pointer of the first pointer manager.

7. The agent of claim 5 or 6, wherein the queue TX module obtains the head of queue pointer in response to the second pointer manager indicating that the tail pointer of the queue leads the head of queue pointer;

the queue TX module generates a memory access message according to a queue head pointer, and a second arbitrator acquires a queue entry from the memory;

the queue TX module, in response to obtaining an entry for the queue from memory via the second decoder, sends the entry to a queue recipient agent via the first arbiter;

the queue TX module updates a head of line pointer of the queue in response to receiving a message via the first decoder indicating that a receiving agent of the queue has received a transmitted queue entry.

8. A method of adding an entry to a queue, comprising:

responding to the queue tail pointer of the queue to be ahead of the queue head pointer, and acquiring the queue head pointer;

generating a memory access message according to the queue head pointer, and acquiring a queue entry from the memory through a second message bus;

in response to retrieving an entry for the queue from memory, a message is received via the message bus indicating that a receiving agent of the queue has received the transmitted queue entry, updating a head of queue pointer of the queue.

9. The method of claim 8, wherein the method further comprises:

acquiring the state of a receiver agent of the queue, wherein the state of the receiver agent of the queue comprises that the queue receiver agent already receives the queue entry, the queue receiver agent cannot receive the queue entry temporarily, or the queue receiver agent does not receive the queue entry correctly;

if the queue receiving agent does not correctly receive the queue entry, the head pointer of the queue is not updated, and the queue entry is obtained from the memory again according to the tail pointer of the queue so as to be sent to the receiving agent of the queue.

10. The method of claim 9, wherein if the queue recipient agent temporarily fails to receive a queue entry, the queue head pointer of the queue is not updated, and the obtaining of the entry for the queue is suspended.