CN111609942B - MZM intensity modulation-based femtosecond laser pulse synchronous extraction device and method - Google Patents
MZM intensity modulation-based femtosecond laser pulse synchronous extraction device and method Download PDFInfo
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Abstract
The invention discloses a femtosecond laser pulse synchronous extraction device and method based on MZM intensity modulation. Generating synchronous clocks corresponding to the femtosecond laser pulses one by one through a phase-locked loop; outputting a synchronous extraction pulse at a specific time after the rising edge of the synchronous clock is delayed, amplifying the pulse and transmitting the amplified pulse to a MZM for modulation, thereby realizing the synchronous extraction of the optical pulse; and detecting the extracted optical pulse, filtering and amplifying to obtain a low-frequency signal with the frequency of the extracted pulse frequency and a high-frequency signal with the frequency of the femtosecond laser repetition frequency, and obtaining the amplitudes of the two signals by using a phase-locked amplifier. Carrying out delay scanning until the amplitude of the low-frequency signal reaches the maximum; and performing bias scanning until the amplitude of the high-frequency signal is reduced to the minimum, and realizing the detection and inhibition of the leakage of the optical pulse. The invention solves the problems of pulse extraction failure and femtosecond laser leakage caused by asynchronism in the traditional method, improves the femtosecond laser pulse extraction stability, and can be widely applied to the technical field of optical pulse precision measurement.
Description
Technical Field
The invention belongs to a laser pulse extraction device and a method in the technical field of precision measurement, and particularly relates to a femtosecond laser pulse synchronous extraction device and a femtosecond laser pulse synchronous extraction method based on Mach-Zehnder modulator (MZM) intensity modulation.
Background
The femtosecond laser has the advantages of traceable repetition frequency, ultrahigh time resolution and the like, and is widely applied to the technical fields of laser interference precision measurement and ultrafast imaging. Limited by factors such as the cavity length of the laser, the repetition frequency of the femtosecond pulses output by the femtosecond laser is usually tens to hundreds of MHz magnitude, and in order to realize ultrafast imaging of the femtosecond magnitude, the femtosecond laser pulses with high repetition frequency are usually required to be sparsely extracted. The traditional optical pulse extraction method based on Pockels cells (Pockels) modulates the polarization state of laser by using an electro-optic phase modulation principle, when the polarization state is the same as that of a polarizer, the laser is transmitted, otherwise, the laser is reflected, and the control effect on a laser switch is realized. The driving voltage required by the pockels cell is up to kilovolt magnitude, and the requirement on electronic equipment is high; furthermore, due to the ringing effect, the switching frequency is difficult to increase, and usually only optical pulse extraction in the order of kHz can be achieved. The optical pulse extraction method based on the acousto-optic modulator (AOM) applies a sine driving signal to generate ultrasonic waves to act on a crystal, so that the refractive index of the crystal is changed periodically, and a grating is formed. When laser is incident, the propagation angle is deflected due to the diffraction effect; otherwise, when no sine drive signal exists, the grating disappears, the laser does not deflect, namely whether the laser deflects or not is controlled to realize the switch control function. During pulse extraction, the acousto-optic modulator needs a high-frequency sinusoidal driving signal with nanosecond time length, and the requirement on electronic design is extremely high. In addition, the acousto-optic modulator is easy to generate heat, and the diffraction efficiency is easily influenced by the quality of a driving signal and the environment, so that the power of an output light pulse fluctuates. Limited by the rise/fall time, acousto-optic modulators are difficult to use for femtosecond laser pulse extraction with repetition frequencies above 100 MHz.
In addition, because the driving signal of the device is not synchronous with the femtosecond laser pulse time, pulse extraction failure and leakage are easy to occur, and the traditional method does not carry out leakage detection and inhibition on the extracted pulse, which influences the subsequent ultrafast imaging or precise measurement effect.
Therefore, reducing the requirement of the driving signal, synchronizing the driving signal with the optical pulse, and performing the leakage detection and suppression on the extracted pulse are key technical problems to be solved.
Disclosure of Invention
In order to solve the problems in the background technology, the invention discloses a femtosecond laser pulse synchronous extraction method based on MZM intensity modulation, which solves the problems of pulse extraction failure and leakage caused by the asynchronism of a driving signal and a femtosecond pulse in femtosecond laser pulse extraction, improves the femtosecond laser pulse extraction stability, and can be widely applied to the technical field of optical pulse precision measurement.
The technical scheme adopted by the invention for solving the technical problems is as follows:
a femtosecond laser pulse synchronous extraction device based on MZM intensity modulation:
the device comprises a femtosecond laser, a Mach-Zehnder modulator, an optical fiber beam splitter, a photoelectric detector, a low-pass filter, a high-pass filter, a low-frequency amplifier, a high-frequency amplifier, a first analog-to-digital converter, a second analog-to-digital converter, a field programmable logic array processor, a digital-to-analog converter and an electric pulse amplifier; the output end of the femtosecond laser is connected to one input end of the Mach-Zehnder modulator, the output end of the Mach-Zehnder modulator is connected to the optical fiber beam splitter, two output ends of the optical fiber beam splitter are divided into power ratios of 90:10, the output end of the optical fiber beam splitter, which accounts for 10%, is connected to the input end of the photoelectric detector, the output end of the photoelectric detector is connected to the input ends of the low-pass filter and the high-pass filter, the low-pass filter is sequentially cascaded with the first analog-to-digital converter through the low-frequency amplifier, the high-pass filter is sequentially cascaded with the second analog-to-digital converter through the high-frequency amplifier, the output ends of the first analog-to-digital converter and the second analog-to-digital converter are connected to two input ends of the field programmable logic array processor, the output end of the field programmable logic array An input terminal.
The output end of the atomic clock is connected to the femtosecond laser and one input end of the field programmable logic array processor.
The laser output by the femtosecond laser is input into a Mach-Zehnder modulator MZM2 to perform intensity modulation and pulse synchronous extraction, the extracted femtosecond laser pulse is divided into two laser beams with the power ratio of 90:10 by an optical fiber beam splitter, one laser beam with the power ratio of 90% is not processed, one laser beam with the power ratio of 10% irradiates a photoelectric detector, a beat frequency signal output by the photoelectric detector sequentially passes through a low-pass filter and a low-frequency amplifier on one hand to obtain a low-frequency signal with the same frequency as the extracted pulse frequency, and on the other hand, the beat frequency signal sequentially passes through a high-pass filter and a high-frequency amplifier on the other hand to obtain a high-frequency signal with the same frequency as the repetition frequency of the laser; the low-frequency signal and the high-frequency signal are converted into a digital low-frequency signal S after passing through a first analog-to-digital converter and a second analog-to-digital converter respectively1And a digital high-frequency signal S2And input into the field programmable logic array processor, and the field programmable logic array processor processes and outputs the synchronous electric pulse signal EpIntensity modulation is carried out on the Mach-Zehnder modulator MZM2 after passing through the electric pulse amplifier, and the field programmable logic arrayThe processor simultaneously processes the output bias compensation signal VbAfter the voltage is subjected to digital-to-analog converter, the Mach-Zehnder modulator MZM2 is subjected to bias control.
The field programmable logic array processor comprises a synchronous electric pulse generator, a bias controller, a second phase-locked amplifier, a first phase-locked amplifier, a delay controller and a phase-locked loop; the output end of the atomic clock is connected to the input end of the synchronous electric pulse generator, the output ends of the first analog-to-digital converter and the second analog-to-digital converter are respectively connected to the input ends of the first phase-locked amplifier and the second phase-locked amplifier, the output ends of the first phase-locked amplifier and the second phase-locked amplifier are respectively connected to the input ends of the delay controller and the bias controller, the output end of the delay controller and the output end of the phase-locked loop are connected to the input end of the synchronous electric pulse generator together, the output end of the synchronous electric pulse generator and the output end of the bias controller are respectively connected to the electric pulse amplifier and the digital-to-analog converter, and the output ends of the digital.
The phase-locked loop multiplies the frequency of a reference clock input from an atomic clock to generate a clock having a frequency f corresponding to the femtosecond laser pulsepSynchronous clock and frequency of feThe high-frequency clock of (2) is transmitted to the synchronous pulse generator; the first phase-locked amplifier converts the digital low-frequency signal S input from the first A/D converter1Quadrature demodulation is carried out to obtain the amplitude A of the low-frequency signal1Amplitude of low frequency signal A1Inputting the signal into a delay controller, and performing delay scanning search by the delay controller to enable the amplitude A of the low-frequency signal1Delay control variable T for reaching maximum timedAnd transmitted to the sync pulse generator; the synchronizing pulse generator has a frequency feThe high-frequency clock is an operating clock and has a frequency fpThe rising edge of the synchronous clock is delayed by TdA high frequency clock fePeriodically re-outputs the synchronous electric pulse signal EpTo an electrical pulse amplifier, TgA high frequency clock feThe signal value in the period of (1) is 1, and the signal values in the rest of the time are 0;
the second lock-in amplifier will operate from the second modeDigital high-frequency signal S input by digital converter2Quadrature demodulation is carried out to obtain high-frequency signal amplitude A2High signal amplitude A2Inputting a bias controller, the bias controller performing bias scanning to make the amplitude A of the high-frequency signal2Output the bias control signal V after the minimumbTo a digital to analog converter.
Secondly, a femtosecond laser pulse synchronous extraction method based on MZM intensity modulation:
1) providing a reference clock for a femtosecond laser through an atomic clock, inputting laser output by the femtosecond laser into a Mach-Zehnder modulator for intensity modulation and pulse synchronous extraction, dividing the extracted femtosecond laser pulse into two laser beams with a power ratio of 90:10 through an optical fiber beam splitter, irradiating one laser beam with a power ratio of 10% to a photoelectric detector, obtaining a low-frequency signal with the same frequency as the extracted pulse frequency through a low-pass filter and a low-frequency amplifier from a beat frequency signal output by the photoelectric detector, obtaining a high-frequency signal with the same frequency as the laser repetition frequency through a high-pass filter and a high-frequency amplifier from the output beat frequency signal, and converting the low-frequency signal and the high-frequency signal into a digital low-frequency signal S through a first analog-to-digital converter and a second analog-to-digital converter respectively1And a digital high-frequency signal S2The formula is as follows:
S1＝A1sin(2πfpt)
S2＝A2sin(2πfrt)
wherein A is1And A2Respectively representing digital low-frequency signals S1And a digital high-frequency signal S2Amplitude of (f)1And f2Respectively representing digital low-frequency signals S1And a digital high-frequency signal S2The frequency of (d);
2) digital low frequency signal S1And a digital high-frequency signal S2Respectively inputting the signals into a first phase-locked amplifier and a second phase-locked amplifier of the field programmable logic array processor:
2.1) the first phase-locked amplifier will input the digital low-frequency signal S1Quadrature demodulation is carried out to obtain the amplitude A of the low-frequency signal1Amplitude of low frequency signal A1Inputting the time delay controller, the time delay controller carries out time delay scanning, and the time delay control parameter T is delayeddGradually increasing from zero to N-1 with a step value of 1, and recording the corresponding low-frequency signal amplitude A after increasing1To array { A1(0),A1(1),A1(2)……,A1(N-1) };
at the end of each time delay scanning, searching the maximum value of the amplitude from the array and recording the maximum value of the amplitude as the maximum value A of the low-frequency signal1maxAnd the corresponding delay control parameter is recorded as TmaxDelay the control parameter TdIs set to TmaxOutputting the delay control parameter TdTo the sync pulse generator, the formula is as follows:
wherein, TmaxIndicating an optimum delay control parameter, TmaxThe initial value is zero and after the delay scanning is equal to the maximum A of the low-frequency signal1maxTime corresponding delay control parameters;
after each time delay scanning is finished, the amplitude A of the low-frequency signal is detected in real time1And the maximum value A of the low frequency signal1maxWhen A is1/A1max<When 0.95, carrying out delay scanning again, or else, carrying out the next step;
2.2) the second phase-locked amplifier will input the digital low-frequency signal S2Quadrature demodulation is carried out to obtain high-frequency signal amplitude A2Amplitude of high frequency signal A2Inputting a bias controller, performing bias scan by the bias controller, and controlling the bias parameter VbGradually increasing from-1V to +1V with a step value of 0.01V, and recording the corresponding high-frequency signal amplitude A after increasing2To array { A2(0),A2(1),A2(2)……,A2(199) In (1) }; at the end of each bias scanning, searching the minimum value of the amplitude from the array and recording the minimum value of the amplitude as the minimum value A of the high-frequency signal2minThe corresponding voltage is denoted as VminControl parameter V of bias voltagebIs set as VminOutputting a bias control parameter VbThe output is sent to a digital-to-analog converter, and the formula is as follows:
wherein, VminRepresents an optimum bias control parameter, VminThe initial value is zero and after the bias sweep is equal to the minimum A of the high frequency signal2minA corresponding bias voltage value;
after each time delay scanning is finished, the amplitude A of the high-frequency signal is detected in real time2With a minimum value A2minWhen A is2/A2min>1.05, carrying out bias scanning again, or else, carrying out the next step;
3) in a field programmable logic array processor, a phase-locked loop receives a reference clock of an atomic clock, then the frequency of the input reference clock is multiplied, and the frequency f of the generated clock period corresponding to femtosecond laser pulses one by one isp(equal to the repetition frequency of the femtosecond laser) synchronous clock and frequency feIs sent to the synchronous pulse generator and the reference clock frequency f of the atomic clockrThe relationship of (a) to (b) is as follows:
fp＝N1fr
fe＝N2fr
N2＝5N1
wherein N is1And N2Representing the multiplication factor, N1And N2Respectively representing the frequency multiplication coefficients of a synchronous clock and a high-frequency clock, which are positive integers;
4) synchronizing pulse generators with high-frequency clock feFor the working clock, a discrete time k is initialized to 0, k representing the discrete time (time interval 1/f)eK is 0,1,2,3 … … at each high frequency clock feIs increased by 1 at the first synchronous clock fpK equals the initial value 0 at the rising edge of (d);
at a synchronous clock fpRising edge of (1) after delay TdA high frequency clock feAfter the period of (2), synchronizing the electric pulse signalEpJump from 0 to 1 and last for TgA high frequency clock feThen from 1 to 0, completing the generation of a single synchronous electrical pulse, as follows:
N＝fe/fp
wherein, TdHigh frequency clock f representing time delayeNumber of clock cycles of, TgHigh frequency clock f representing the duration of each electrical pulseeThe number of clock cycles of the (M) is the number of femtosecond laser pulse time intervals, M represents a femtosecond laser pulse extraction coefficient (namely, one pulse is extracted from every M pulses, and M is more than or equal to 2), and only the percentage in the formula represents the remainder extraction operation;
synchronous electric pulse signal EpEqual to 1 (corresponding to a high level) represents extraction of the femtosecond laser pulse, equal to 0 (corresponding to a low level) represents no extraction of the femtosecond laser pulse, and the default value is 0.
5) Bias control parameter VbThe voltage is converted by the D/A converter and then input to the Mach-Zehnder modulator for bias control, and an electric pulse signal E is synchronizedpThe laser is input into an electric pulse amplifier, amplified and then input into a Mach-Zehnder modulator for intensity modulation, and the feedback real-time control is carried out on the intensity modulation and pulse synchronous extraction of the laser output by the femtosecond laser.
Compared with the background art, the invention has the beneficial effects that:
(1) according to the invention, the synchronous clocks with clock periods corresponding to the femtosecond laser pulses one by one are generated through the phase-locked loop, and the pulse driving signals completely synchronous with the femtosecond pulses are generated after the synchronous clocks are subjected to delay matching for synchronous extraction, so that the problem of femtosecond laser pulse extraction failure caused by asynchronism is solved, and the femtosecond laser pulse extraction stability is improved;
(2) the invention provides a detection method of femtosecond laser pulse extraction quality, which is characterized in that the extracted laser pulse is detected, the amplitude of a low-frequency sinusoidal signal with the same frequency as the extraction pulse frequency and the amplitude of a high-frequency sinusoidal signal with the same frequency as the repetition frequency of a femtosecond laser are analyzed, whether the femtosecond laser pulse is successfully extracted and whether extraction leakage exists is judged according to the amplitude of the two amplitudes, and the femtosecond laser pulse is inhibited in a delay matching and bias control mode;
(3) the invention adopts MZM intensity modulation to realize femtosecond laser pulse extraction, and the required driving signal is an electric pulse signal with the amplitude not exceeding 5V, thereby reducing the complexity of a corresponding electronic system.
(4) The MZM intensity modulation adopted by the invention has extremely low rise/fall time, and can realize pulse sparseness and extraction of femtosecond laser pulse with repetition frequency of 100MHz or more.
Drawings
FIG. 1 is a schematic diagram of an example of an MZM intensity modulation-based femtosecond laser pulse synchronous extraction device.
Fig. 2 is a schematic diagram of the principle of femtosecond laser pulse extraction by a mach-zehnder modulator (MZM).
Fig. 3 is a schematic diagram of femtosecond laser leakage at the time of femtosecond laser pulse extraction.
Fig. 4 is a block diagram of a method of signal processing within a field programmable logic array processor (FPGA).
Fig. 5 is a schematic diagram of synchronous extraction of electrical pulse signal generation and extraction of femtosecond laser pulses.
In the figure: 1. the device comprises a femtosecond laser, a Mach-Zehnder modulator (MZM), a fiber beam splitter (3), a photodetector (4), a low-pass filter (5), a high-pass filter (6), a high-pass filter (7), a low-frequency amplifier (8), a high-frequency amplifier (9), a first analog-to-digital converter (ADC), a second analog-to-digital converter (10), a field programmable logic array processor (FPGA), a digital-to-analog converter (12), a digital-to-analog converter (13), an electric pulse amplifier (14.
1101. A synchronous electric pulse generator 1102, a bias controller 1103, a second phase-locked amplifier 1104, a first phase-locked amplifier 1105, a delay controller 1106 and a phase-locked loop.
Detailed Description
The invention is described in detail below with reference to the accompanying drawings, which are embodied as follows:
fig. 1 is a schematic diagram showing an application example of the optical pulse synchronous extraction device of the present invention, and the device includes a femtosecond laser 1, a mach-zehnder modulator 2, an optical fiber beam splitter 3, a photodetector 4, a low-pass filter 5, a high-pass filter 6, a low-frequency amplifier 7, a high-frequency amplifier 8, a first analog-to-digital converter 9, a second analog-to-digital converter 10, a field programmable logic array processor 11, a digital-to-analog converter 12, an electrical pulse amplifier 13, and an atomic clock 14;
the output end of a femtosecond laser 1 is connected to one input end of a Mach-Zehnder modulator 2, the output end of the Mach-Zehnder modulator 2 is connected to an optical fiber beam splitter 3, two output ends of the optical fiber beam splitter 3 are divided into power ratios of 90:10, the output end of the optical fiber beam splitter 3, which accounts for 10% of the power, is connected to the input end of a photoelectric detector 4, the output end of the photoelectric detector 4 is connected to the input ends of a low-pass filter 5 and a high-pass filter 6, the low-pass filter 5 is sequentially cascaded with a first analog-to-digital converter 9 through a low-frequency amplifier 7, the high-pass filter 6 is sequentially cascaded with a second analog-to-digital converter 10 through a high-frequency amplifier 8, the output ends of the first analog-to-digital converter 9 and the second analog-to-digital converter 10 are connected to two input ends, the output terminals of the electrical pulse amplifier 13 and the digital-to-analog converter 12 are connected to the other two input terminals of the mach-zehnder modulator 2.
The output of the atomic clock 14 is connected to the femtosecond laser 1 and to one input of the field programmable logic array processor 11. The atomic clock 14 provides a precise frequency f for the femtosecond laser 1 and the FPGArThe reference clock of (1).
In the example, the atomic clock 14 is referenced to a clock frequency fr10MHz, the repetition frequency of the femtosecond laser 1 is equal to 100 MHz; in the FPGA11, the frequency multiplication factor N1＝10，N250, frequency f of the synchronous clockp100MHz, frequency f of high frequency clocke500MHz, the femtosecond laser extraction coefficient M is 4, namely every 4 pulsesTaking a pulse, each electric pulse signal high level continuous high frequency clock feNumber of cycles T g2; the bandwidth of the photodetector 4 is 120MHz, the cut-off frequency of the low-pass filter 5 is 60MHz, the cut-off frequency of the high-pass filter 6 is 90MHz, and the sampling frequency of the first analog-to-digital converter 9 and the second analog-to-digital converter 10 is 500 MHz.
The laser light output from the femtosecond laser 1 is input to a Mach-Zehnder modulator (MZM)2 to perform optical pulse synchronous extraction. The extracted light pulse is divided into two laser beams with the power ratio of 90:10 by the optical fiber beam splitter 3, wherein the laser beam with the power ratio of 10% irradiates the photoelectric detector 4. The optical pulse output by the mach-zehnder modulator (MZM)2 includes an extracted optical pulse and a leaked femtosecond laser optical pulse, wherein the extracted optical pulse is a low-frequency optical pulse and generates a low-frequency signal having the same frequency as the extracted pulse frequency after being irradiated to the photodetector 4, and the leaked optical pulse is a high-frequency optical pulse of the femtosecond laser and generates a high-frequency signal having the same frequency as the repetition frequency of the femtosecond laser after being irradiated to the photodetector 4. Whether the light pulse is successfully extracted and whether leakage exists can be judged through the amplitude of the high-frequency and low-frequency signals in the signals obtained by the detector 4. Further, a low-frequency signal equal to the extraction frequency is obtained after passing through a low-pass filter 5 and a low-frequency amplifier 7, and a high-frequency signal equal to the repetition frequency of the femtosecond laser is obtained after the output beat frequency signal passes through a high-pass filter 6 and a high-frequency amplifier 8 at the same time. The low frequency signal and the high frequency signal are converted into a digital low frequency signal S through a first analog-to-digital converter 9 and a second analog-to-digital converter 10 respectively1And a digital high-frequency signal S2Into the field programmable logic array processor 11, signal S1And S2Expressed as the following equation:
S1＝A1sin(2πfpt) (1)
S2＝A2sin(2πfrt) (2)
wherein f is1＝fp25MHz and f2＝fp100MHz denotes the frequency of the low-frequency signal and the high-frequency signal, respectively, a1And A2Representing low-frequency signals and high-frequency signals, respectivelyAn amplitude value; a. the1Is used to detect the quality of the femtosecond laser pulse extraction and whether the delay of the pulse drive signal matches the femtosecond laser, A2Can be used in
Synchronous electric pulse signal E output by field programmable logic array processor 11pAfter passing through an electric pulse amplifier 13, the Mach-Zehnder modulator (MZM)2 is modulated and a bias compensation signal V is outputbAfter passing through the digital-to-analog converter 12, the Mach-Zehnder modulator (MZM)2 is subjected to bias control, and optical pulse synchronous extraction is realized.
Fig. 2 is a schematic diagram showing the principle of femtosecond laser pulse extraction by the mach-zehnder modulator (MZM) 2. Wherein VπIs the half-wave voltage of the mach-zehnder modulator (MZM) 2. The modulation transfer function of the mach-zehnder modulator (MZM)2 represents the relationship (intensity modulation) between the magnitude of the drive voltage and the degree of attenuation of the laser power. Ideally, the electrical pulse signal E is synchronizedpEqual to 1 (high level V)π) When the laser pulse passes through, the Mach-Zehnder modulator (MZM)2 does not attenuate the input femtosecond laser pulse, namely the femtosecond laser pulse is allowed to pass through; when synchronizing the electric pulse signal EpWhen the level is equal to 0 (low level 0V), the mach-zehnder modulator (MZM)2 completely attenuates the input femtosecond laser pulses, that is, completely eliminates the femtosecond laser pulses that do not need to be extracted. In the presence of a synchronous electrical pulse signal EpUnder the control, the femtosecond laser pulses are extracted periodically, one at a time. Fig. 3 is a schematic diagram showing femtosecond laser leakage in femtosecond laser pulse extraction. In practice, the modulation transfer function of the mach-zehnder modulator (MZM)2 may drift to some extent due to environmental stability and other factors. At this time, the synchronous electric pulse signal EpEqual to 1 (high level V)π) In the process, the Mach-Zehnder modulator (MZM)2 also attenuates the input femtosecond laser pulse to a certain extent, and the power of the extracted femtosecond laser pulse is reduced; when synchronizing the electric pulse signal EpWhen the value is equal to 0 (low level 0V), the mach-zehnder modulator (MZM)2 cannot completely attenuate the input femtosecond laser pulse, so that the femtosecond laser pulse which is not required to be extracted leaks into the femtosecond laser pulse which is required to be extracted. The femtosecond laser pulse extraction quality is reduced.
Fig. 4 is a further illustration of the signal processing method in the field programmable gate array signal processor (FPGA)11 in fig. 1, in which the field programmable logic array processor 11 includes a synchronous electrical pulse generator 1101, a bias controller 1102, a second lock-in amplifier 1103, a first lock-in amplifier 1104, a delay controller 1105 and a phase-locked loop 1106; the output end of the atomic clock 14 is connected to the input end of the synchronized electric pulse generator 1101, the output ends of the first analog-to-digital converter 9 and the second analog-to-digital converter 10 are respectively connected to the input ends of the first phase-locked amplifier 1104 and the second phase-locked amplifier 1103, the output ends of the first phase-locked amplifier 1104 and the second phase-locked amplifier 1103 are respectively connected to the input ends of the delay controller 1105 and the bias controller 1102, the output end of the delay controller 1105 and the output end of the phase-locked loop 1106 are connected to the input end of the synchronized electric pulse generator 1101 together, the output end of the synchronized electric pulse generator 1101 and the output end of the bias controller 1102 are respectively connected to the electric pulse amplifier 13 and the digital-to-analog converter 12, and the output ends of the electric pulse amplifier 13.
First, the phase-locked loop 1106 inputs the reference clock (f) of the atomic clock 14r) Frequency multiplication, the frequency of the generated clock period corresponding to the optical pulse of the femtosecond laser one by one is fpSynchronous clock and frequency of feThe frequency relationship of the high-frequency clock and the reference clock is as follows:
fp＝N1fr (3)
fe＝N2fr (4)
wherein N is1And N2Representing the multiplication factor (N)2＝5N1，N1Is a positive integer);
the sync pulse generator 1101 clocks at a high frequency (f)e) For the operation clock, k is 0,1,2,3 … … represents discrete time (time interval is 1/f)e) At each high frequency clock (f)e) Rising edge, k plus 1, (at the first synchronous clock (f)p) K equals the initial value 0) on the rising edge of (c); synchronous electric pulse signal EpEqual to 1 (corresponding to high)Level) represents extracting the femtosecond laser pulses, is equal to 0 (corresponding to a low level) represents not extracting the femtosecond laser pulses, and has a default value of 0; in the synchronous clock (f)p) Rising edge of (1) after delay TdA high frequency clock period (f)e) Then, the electric pulse signal E is synchronizedpJump from 0 to 1 and last for TgA high frequency clock (f)e) The cycle, then returning from 1 to 0, completes the generation of a single synchronous electrical pulse, and the formula is as follows:
wherein, TdHigh frequency clock (f) indicating time delaye) Number of clock cycles, TgA high frequency clock (f) indicating the duration of each electrical pulsee) Number of cycles, N ═ fe/fpThe number of femtosecond laser pulse time intervals, M represents a femtosecond laser extraction coefficient (namely, one pulse is extracted every M pulses, M is more than or equal to 2), and% represents remainder extraction operation.
FIG. 5 shows the generation of the synchronous electrical pulse signal E by equation 5pFurther explanation of the femtosecond laser pulse synchronous extraction process is carried out. As shown in fig. 5(a), when the electrical pulse signal is not synchronized with the femtosecond laser pulse, there is no definite time relationship between the electrical pulse and the femtosecond laser pulse, which easily causes that there is no femtosecond laser pulse in the high-level capture period of the electrical pulse, resulting in the extraction failure. As shown in FIG. 5(b), the PLL 1106 is produced at a frequency fpThe synchronous clocks correspond to the femtosecond laser pulses one by one; however, due to the delay of the line transmission, there is a delay between the rising edge of each synchronous clock and the corresponding femtosecond laser pulse, and this delay can be obtained by the delay controller 1105dTo compensate. Taking discrete time k as a reference, extracting one femtosecond laser pulse from every M femtosecond laser pulses is equivalent to extracting one femtosecond laser pulse in every MN time. Combining with the formula (5), the delay T is generated on the rising edge of the synchronous clockdThen generating a width TgCan be determined by comparing the time remainder k% (MN) per MN time with TdAnd Td+TgIs achieved by the size of (c); the remainder of time k% (MN) is just greater than TdAt that time, the electrical pulse jumps from 0 to 1 (i.e., the rising edge of the synchronization electrical pulse signal), waiting for TgAfter time, the time remainder k% (MN) is just greater than Td+TgAt this time, the electrical pulse is restored from 1 to 0 (i.e. the falling rising edge of the synchronous electrical pulse signal), and finally the synchronous electrical pulse signal E is generated by equation 5pThe waveform can be represented as fig. 5 (c). By synchronizing electrical pulse signals EpThe simultaneous extraction of femtosecond laser pulses can be represented as fig. 5(d), in which the solid portion is extracted femtosecond laser pulses and the hollow portion is removed femtosecond laser pulses.
In fig. 4, the first phase-locked amplifier 1104 inputs the digital low-frequency signal S1Quadrature demodulation is carried out to obtain the amplitude A of the low-frequency signal1The specific process includes the following steps with the frequency f1With reference to quadrature signal multiplication, low pass filtering, sum of squares, and root-opening operation, the formula can be expressed as follows:
wherein LPF [ alpha ]]Denotes a low-pass filter operation, sin (2 π f)1t) and cos (2 π f)1t) is a frequency of f1Is received from the base station.
Amplitude A of low frequency signal1Input to the delay controller 1105. The delay controller 1105 performs a delay scan, TdGradually increasing from zero to N-1 with a step value of 1, waiting for 1 second after each step, and recording the corresponding low-frequency signal amplitude A1To array { A1(0),A1(1),A1(2)……,A1(N-1) } and then for TdAn add 1 operation is performed. After the delay scanning is finished, the maximum value is searched from the array and is recorded as A1maxAnd recording the corresponding delay control parameter as Tmax. Will delay the control variable TdIs set to TmaxAnd output to the sync pulse generator 1101, as follows:
wherein, TmaxIndicating an optimum delay control parameter, TmaxThe initial value is zero and after the delay scanning is equal to the maximum A of the low-frequency signal1maxTime corresponding delay control parameters;
after each time delay scanning is finished, detecting the amplitude A of the low-frequency signal1With a maximum value A1maxWhen A is1/A1max<At 0.95, the delay scan is performed again. After the update, the delay controller 1105 outputs a new delay control variable TdTo the sync pulse generator 1101.
The second lock-in amplifier 1103 inputs the digital high-frequency signal S2Quadrature demodulation is carried out to obtain high-frequency signal amplitude A2The specific process includes the following steps with the frequency f2With reference to quadrature signal multiplication, low pass filtering, sum of squares, and root-opening operation, the formula can be expressed as follows:
wherein LPF [ alpha ]]Denotes a low-pass filter operation, sin (2 π f)2t) and cos (2 π f)2t) is a frequency of f2Is received from the base station.
Amplitude A of the high frequency signal2The bias controller 1102 is input, and the bias controller 1102 performs a bias scan, VbGradually increasing from-1V to +1V with a step value of 0.01V, and recording the amplitude A of the corresponding high-frequency signal after waiting for 0.1 second after each step2To array { A2(0),A2(1),A2(2)……,A2(199) In the method, the minimum value of the amplitude value is searched from the array and is recorded as A2minThe corresponding voltage is denoted as VminBias control signal VbIs set as VminAnd outputs to the digital-to-analog converter 12, the formula is as follows:
wherein, VminRepresents an optimum bias control parameter, VminThe initial value is zero and after the bias sweep is equal to the minimum A of the high frequency signal2minA corresponding bias voltage value;
after each time delay scanning is finished, detecting the amplitude A of the high-frequency signal2With a minimum value A2minWhen A is2/A2min>1.05, the bias scan is restarted.
In summary, the invention solves the problems of femtosecond laser pulse extraction failure and leakage caused by asynchronism in the traditional method, improves the stability of femtosecond laser pulse extraction, adopts a Mach-Zehnder modulator (MZM) to extract optical pulses, obtains the required driving signals by amplifying simple electric pulse signals, reduces the complexity of a corresponding electronic system, simultaneously has extremely low rise/fall time of the Mach-Zehnder modulator (MZM), can realize high-frequency optical pulse capture, can be used for optical pulse extraction of a femtosecond laser with repetition frequency of 100MHz or more, and can be widely applied to the technical fields of laser interference precision measurement and ultrafast imaging.
The foregoing detailed description is intended to illustrate and not limit the invention, which is intended to be within the spirit and scope of the appended claims, and any changes and modifications that fall within the true spirit and scope of the invention are intended to be covered by the following claims.
Claims (5)
1. The utility model provides a synchronous extraction element of femto second laser pulse based on MZM intensity modulation which characterized in that:
the device comprises a femtosecond laser (1), a Mach-Zehnder modulator (2), an optical fiber beam splitter (3), a photoelectric detector (4), a low-pass filter (5), a high-pass filter (6), a low-frequency amplifier (7), a high-frequency amplifier (8), a first analog-to-digital converter (9), a second analog-to-digital converter (10), a field programmable logic array processor (11), a digital-to-analog converter (12) and an electric pulse amplifier (13); the output end of a femtosecond laser (1) is connected to one input end of a Mach-Zehnder modulator (2), the output end of the Mach-Zehnder modulator (2) is connected to an optical fiber beam splitter (3), the two output ends of the optical fiber beam splitter (3) are divided into a power ratio of 90:10, the output end of the optical fiber beam splitter (3), the power ratio of which is 10%, is connected to the input end of a photoelectric detector (4), the output end of the photoelectric detector (4) is connected to the input ends of a low-pass filter (5) and a high-pass filter (6), the low-pass filter (5) is sequentially cascaded with a first analog-to-digital converter (9) through a low-frequency amplifier (7), the high-pass filter (6) is sequentially cascaded with a second analog-to-digital converter (10) through a high-frequency amplifier (8), the output ends of the first analog-to-digital converter (9) and the second analog, the output end of the field programmable logic array processor (11) is respectively connected to the input ends of the electric pulse amplifier (13) and the digital-to-analog converter (12), and the output ends of the electric pulse amplifier (13) and the digital-to-analog converter (12) are connected to the other two input ends of the Mach-Zehnder modulator (2);
the laser output by the femtosecond laser (1) is input into a Mach-Zehnder modulator (2) for intensity modulation and pulse synchronous extraction, the extracted femtosecond laser pulse is divided into two laser beams with the power ratio of 90:10 by an optical fiber beam splitter, one laser beam with the power ratio of 90% is not processed, one laser beam with the power ratio of 10% irradiates a photoelectric detector (4), a beat frequency signal output by the photoelectric detector (4) sequentially passes through a low-pass filter and a low-frequency amplifier on one hand to obtain a low-frequency signal with the same frequency as the extracted pulse frequency, and on the other hand, the beat frequency signal sequentially passes through a high-pass filter and a high-frequency amplifier on the other hand to obtain a high-frequency signal with the same frequency as the repetition frequency of the laser; the low-frequency signal and the high-frequency signal are converted into a digital low-frequency signal S after passing through a first analog-to-digital converter and a second analog-to-digital converter respectively1And a digital high-frequency signal S2And input into the field programmable logic array processor (11), the field programmable logic array processor (11) processes and outputs the synchronous electric pulse signal EpAfter passing through the electric pulse amplifier, the Mach-Zehnder modulator (2) is subjected to intensity modulation, and the field programmable logic array processor (11) simultaneously processes and outputs a bias compensation signal VbAfter the voltage is converted by a digital-to-analog converter, the Mach-Zehnder modulator (2) is subjected to bias control.
2. The device of claim 1, wherein the device is characterized in that: the device also comprises an atomic clock (14), wherein the output end of the atomic clock (14) is connected to the femtosecond laser (1) and one input end of the field programmable logic array processor (11).
3. The device of claim 1, wherein the device is characterized in that: the field programmable logic array processor (11) comprises a synchronous electric pulse generator (1101), a bias controller (1102), a second phase-locked amplifier (1103), a first phase-locked amplifier (1104), a delay controller (1105) and a phase-locked loop (1106); the output end of the atomic clock (14) is connected to the input end of the synchronous electric pulse generator (1101), the output ends of the first analog-to-digital converter (9) and the second analog-to-digital converter (10) are respectively connected to the input ends of the first phase-locked amplifier (1104) and the second phase-locked amplifier (1103), the output ends of the first phase-locked amplifier (1104) and the second phase-locked amplifier (1103) are respectively connected to the input ends of the delay controller (1105) and the bias controller (1102), the output end of the delay controller (1105) and the output end of the phase-locked loop (1106) are connected to the input end of the synchronous electric pulse generator (1101), the output end of the synchronous electric pulse generator (1101) and the output end of the bias controller (1102) are respectively connected to the electric, the output ends of the digital-to-analog converter (12) and the electrical pulse amplifier (13) are connected to the other two input ends of the Mach-Zehnder modulator (2).
4. The device of claim 3, wherein the device is characterized in that: a phase-locked loop (1106) multiplies the frequency of a reference clock input from an atomic clock (14) to generate a clock having a frequency f corresponding to a femtosecond laser pulsepSynchronous clock and frequency of feTo a sync pulse generator (1101); the first phase-locked amplifier (1104) converts the digital low-frequency signal S input from the first A/D converter (9)1Quadrature demodulation is carried out to obtain the amplitude A of the low-frequency signal1Amplitude of low frequency signal A1Input delay controller (1105)) The delay controller (1105) performs a delay sweep search to obtain the amplitude A of the low frequency signal1Delay control variable T for reaching maximum timedAnd transmitted to the sync pulse generator (1101); the sync pulse generator (1101) has a frequency feThe high-frequency clock is an operating clock and has a frequency fpThe rising edge of the synchronous clock is delayed by TdA high frequency clock fePeriodically re-outputs the synchronous electric pulse signal EpTo an electric pulse amplifier (13); the second lock-in amplifier (1103) converts the digital high-frequency signal S inputted from the second A/D converter (10)2Quadrature demodulation is carried out to obtain high-frequency signal amplitude A2High signal amplitude A2A bias controller 1102 is inputted, and the bias controller 1102 performs a bias sweep so that the amplitude A of the high frequency signal is obtained2Output the bias control signal V after the minimumbTo a digital-to-analog converter (12).
5. A femtosecond laser pulse synchronous extraction method based on MZM intensity modulation applied to the device of any one of claims 1 to 4, wherein: the method comprises the following steps:
1) a reference clock is provided for the femtosecond laser (1) through an atomic clock (14), the laser output by the femtosecond laser (1) is input into a Mach-Zehnder modulator (2) for intensity modulation and pulse synchronous extraction, the extracted femtosecond laser pulse (1) is two beams of laser with the power ratio of 90:10 through an optical fiber beam splitter (3), only one laser beam with power accounting for 10% irradiates to a photoelectric detector (4), a beat frequency signal output by the photoelectric detector (4) passes through a low-pass filter (5) and a low-frequency amplifier (7) to obtain a low-frequency signal with the same frequency as an extracted pulse frequency, the output beat frequency signal simultaneously passes through a high-pass filter (6) and a high-frequency amplifier (8) to obtain a high-frequency signal with the same frequency as the repetition frequency of the laser, and the low-frequency signal and the high-frequency signal are converted into a digital low-frequency signal S after respectively passing through a first analog-to-digital converter and a second analog-to-digital converter.1And a digital high-frequency signal S2The formula is as follows:
S1＝A1sin(2πfpt)
S2＝A2sin(2πfrt)
wherein A is1And A2Respectively representing digital low-frequency signals S1And a digital high-frequency signal S2Amplitude of (f)pAnd frRespectively representing digital low-frequency signals S1And a digital high-frequency signal S2The frequency of (d);
2) digital low frequency signal S1And a digital high-frequency signal S2The signals are respectively input into a first phase-locked amplifier (1104) and a second phase-locked amplifier (1103) of a field programmable logic array processor (11):
2.1) the first phase-locked amplifier (1104) inputs the digital low-frequency signal S1Quadrature demodulation is carried out to obtain the amplitude A of the low-frequency signal1Amplitude of low frequency signal A1Inputting the time delay controller (1105), the time delay controller (1105) carries out time delay scanning, and the time delay control parameter T isdGradually increasing from zero to N-1 with a step value of 1, and recording the corresponding low-frequency signal amplitude A after increasing1To array { A1(0),A1(1),A1(2)……,A1(N-1) };
at the end of each time delay scanning, searching the maximum value of the amplitude from the array and recording the maximum value of the amplitude as the maximum value A of the low-frequency signal1maxAnd the corresponding delay control parameter is recorded as TmaxDelay the control parameter TdIs set to TmaxOutputting the delay control parameter TdTo the sync pulse generator (1101), the formula is as follows:
wherein, TmaxIndicating an optimum delay control parameter, TmaxThe initial value is zero and after the delay scanning is equal to the maximum A of the low-frequency signal1maxTime corresponding delay control parameters;
after each time delay scanning is finished, the amplitude A of the low-frequency signal is detected in real time1And the maximum value A of the low frequency signal1maxWhen A is1/A1max<When 0.95, carrying out delay scanning again, or else, carrying out the next step;
2.2) the second phase-locked amplifier (1103) will input the digital low frequency signal S2Quadrature demodulation is carried out to obtain high-frequency signal amplitude A2Amplitude of high frequency signal A2The bias controller 1102 is inputted to the bias controller 1102, and the bias controller 1102 performs a bias scan to set the bias control parameter VbGradually increasing from-1V to +1V with a step value of 0.01V, and recording the corresponding high-frequency signal amplitude A after increasing2To array { A2(0),A2(1),A2(2)……,A2(199) In (1) }; at the end of each bias scanning, searching the minimum value of the amplitude from the array and recording the minimum value of the amplitude as the minimum value A of the high-frequency signal2minThe corresponding voltage is denoted as VminControl parameter V of bias voltagebIs set as VminOutputting a bias control parameter VbThe output is sent to a digital-to-analog converter (12), and the formula is as follows:
wherein, VminRepresents an optimum bias control parameter, VminThe initial value is zero and after the bias sweep is equal to the minimum A of the high frequency signal2minA corresponding bias voltage value;
after each time delay scanning is finished, the amplitude A of the high-frequency signal is detected in real time2With a minimum value A2minWhen A is2/A2min>1.05, carrying out bias scanning again, or else, carrying out the next step;
3) in a field programmable logic array processor (11), a phase-locked loop (1106) receives a reference clock of an atomic clock (14), and then multiplies the frequency of the input reference clock to generate a frequency f with a clock period corresponding to femtosecond laser pulses one by onepSynchronous clock and frequency of feIs sent to the synchronization pulse generator (1101) in parallel with the reference clock frequency f of the atomic clock (14)rThe relationship of (a) to (b) is as follows:
fp＝N1fr
fe＝N2fr
N2＝5N1
wherein N is1And N2Representing the multiplication factor, N1And N2Respectively representing the frequency multiplication coefficients of a synchronous clock and a high-frequency clock, which are positive integers;
4) the sync pulse generator (1101) is clocked by a high frequency feFor the working clock, a discrete time k of 0 is initialized, at each high frequency clock feIs increased by 1 at the first synchronous clock fpK equals the initial value 0 at the rising edge of (d);
at a synchronous clock fpRising edge of (1) after delay TdA high frequency clock feAfter the period of (2), synchronizing the electric pulse signal EpJump from 0 to 1 and last for TgA high frequency clock feThen from 1 to 0, completing the generation of a single synchronous electrical pulse, as follows:
N＝fe/fp
wherein, TdHigh frequency clock f representing time delayeNumber of clock cycles of, TgHigh frequency clock f representing the duration of each electrical pulseeThe number of clock cycles, the number of time intervals of N femtosecond laser pulses, M represents a femtosecond laser pulse extraction coefficient, and only% in the formula represents remainder extraction operation;
5) bias control parameter VbThe voltage is input into a digital-to-analog converter (12), converted and then input into a Mach-Zehnder modulator (2) for bias control, and an electric pulse signal E is synchronizedpAfter being input into an electric pulse amplifier (13), the mixed light is amplified and then input into a Mach-Zehnder modulator (2) for intensity modulation, and the intensity modulation and pulse synchronous extraction of the laser output by the femtosecond laser (1) are controlled in real time through feedback.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1185688A (en) * | 1996-12-19 | 1998-06-24 | 富士通株式会社 | Light time decomposition multiplex device and signal switching method and light time division multiplex transmission system thereof |
| WO2013185792A1 (en) * | 2012-06-12 | 2013-12-19 | Photon Energy Gmbh | Short pulse laser with amplifier and adjustable pulse sequence |
| US9531147B2 (en) * | 2014-11-21 | 2016-12-27 | Photonics Industries Int'l. | Pulse picking laser |
| CN106301586A (en) * | 2015-05-12 | 2017-01-04 | 北京交通大学 | A kind of optical triangulation shape pulse generator with tunable repetition rate |
| CN107612625A (en) * | 2017-08-11 | 2018-01-19 | 天津大学 | It is a kind of that the method for producing continuous high speed pulse is locked based on injection |
| CN109301686A (en) * | 2018-09-25 | 2019-02-01 | 电子科技大学 | A kind of the femto-second laser pulse generation system and method for high repetition frequency |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3861606A4 (en) * | 2018-10-05 | 2022-07-06 | Thorlabs, Inc. | Microjoule amplifier system for three photon microscopy utilizing existing femtosecond lasers |
-
2020
- 2020-05-12 CN CN202010396793.9A patent/CN111609942B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1185688A (en) * | 1996-12-19 | 1998-06-24 | 富士通株式会社 | Light time decomposition multiplex device and signal switching method and light time division multiplex transmission system thereof |
| WO2013185792A1 (en) * | 2012-06-12 | 2013-12-19 | Photon Energy Gmbh | Short pulse laser with amplifier and adjustable pulse sequence |
| US9531147B2 (en) * | 2014-11-21 | 2016-12-27 | Photonics Industries Int'l. | Pulse picking laser |
| CN106301586A (en) * | 2015-05-12 | 2017-01-04 | 北京交通大学 | A kind of optical triangulation shape pulse generator with tunable repetition rate |
| CN107612625A (en) * | 2017-08-11 | 2018-01-19 | 天津大学 | It is a kind of that the method for producing continuous high speed pulse is locked based on injection |
| CN109301686A (en) * | 2018-09-25 | 2019-02-01 | 电子科技大学 | A kind of the femto-second laser pulse generation system and method for high repetition frequency |
Non-Patent Citations (1)
| Title |
|---|
| Integrated optical ultrashort-pulse picker with high extinction ratio;J.-P. Ruske;《ELECTRONICS LETTERS》;20031031;第39卷(第20期);正文第一页第1-2栏、附图2 * |
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