CN111596135A - Method for analyzing resistance characteristics of electrodeposited gold structure - Google Patents
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Abstract
The invention discloses a resistance characteristic analysis method of an electrodeposited gold structure, which relates to the technical field of material detection, and avoids the influence on a measurement result due to different structures of the electrodeposited gold structure and different contact areas during measurement of the electrodeposited gold structure in contact measurement by detecting the impedance of a gold interdigital electrode by using an electrochemical workstation. The method for analyzing the resistance characteristic of the electrodeposited gold structure comprises the following steps: providing a plurality of gold interdigital electrodes, wherein the resistance related parameters of the gold interdigital electrodes are different; detecting the impedance of a plurality of gold interdigital electrodes under different frequency sinusoidal voltages by using an electrochemical workstation; and analyzing the resistance characteristics of the electrodeposited gold structure according to the impedance of the plurality of gold interdigital electrodes under sinusoidal voltages with different frequencies.
Description
Technical Field
The invention relates to the field of material detection, in particular to a method for analyzing the resistance characteristics of an electrodeposited gold structure.
Background
The electrodeposited gold structure has excellent electrical properties, strong corrosion resistance, chemical and optical properties, and is widely applied to the fields of integrated circuits, biosensing, electronic communication, aerospace and the like. The resistance characteristics of the electrodeposited gold structures directly affect the signal transmission efficiency, so the measurement of the electrodeposited gold structure resistance becomes especially important.
At present, the method for measuring the resistance of the electrodeposited gold structure generally adopts a probe station to carry out four-probe measurement. However, this method requires extremely high roughness of the electrodeposited gold structure, and the contact area between the probe and the electrodeposited gold structure may cause instability of the measurement result, which may affect the accuracy of the measurement result of the resistance of the electrodeposited gold structure.
Disclosure of Invention
The invention aims to provide a method for analyzing the resistance characteristics of an electrodeposited gold structure, which analyzes the resistance characteristics of the electrodeposited gold structure by using an electrochemical workstation and represents the resistance characteristics of the electrodeposited gold structure more accurately.
The invention provides a method for analyzing the resistance characteristics of an electrodeposited gold structure, which comprises the following steps:
providing a plurality of gold interdigital electrodes, wherein the resistance related parameters of the gold interdigital electrodes are different;
detecting the impedance of a plurality of electrodeposited gold structures under a medium-frequency sinusoidal voltage by using an electrochemical workstation;
and analyzing the resistance characteristics of the electrodeposited gold structures according to the impedance of the plurality of electrodeposited gold structures under the medium-frequency sinusoidal voltage.
Optionally, the resistance related parameter of each gold interdigital electrode is the height of the gold interdigital electrode and the surface roughness of the gold interdigital electrode.
Alternatively, the frequency of the sinusoidal voltage is in the range of 100Hz to 500kHz, the amplitude of the sinusoidal voltage is 5mV, and the DC bias is 0V.
Optionally, providing a plurality of gold interdigitated electrodes comprises:
providing a plurality of gold interdigitated seeds;
and processing the plurality of interdigital seeds in a one-to-one correspondence manner by utilizing an electrochemical deposition method under the control of different electrodeposition parameters to obtain a plurality of gold interdigital electrodes.
Optionally, the electrodeposition parameters include electrodeposition time, forward pulse plating current, and reverse etch current.
Optionally, the respective electrodeposition parameters include different electrodeposition times;
the forward pulse electroplating current and the pulse width of each electrodeposition parameter are the same;
the various electrodeposition parameters include different magnitudes and durations of the reverse etch current.
Optionally, providing a plurality of gold interdigitated seeds comprises:
providing a substrate;
forming a gold seed layer on a substrate;
and carrying out graphical treatment on the gold seed layer to obtain the gold interdigital seeds.
Optionally, forming a gold seed layer on the substrate comprises:
defining interdigitated areas on said substrate;
and electroplating a gold seed layer on the interdigital area by adopting an electroplating method.
Optionally, the plating solution is an inorganic salt solution of gold.
Optionally, the pH of the plating solution is 6.5-7.5 and the temperature of the plating solution is 25-55 ℃.
Compared with the prior art, the method for analyzing the resistance characteristics of the electrodeposited gold structure provided by the invention measures the impedance of a plurality of gold interdigital electrodes with different resistance related parameters under sine voltages with different frequencies, and avoids the influence on the measurement result due to different structures of the electrodeposited gold structure and different contact areas during the measurement of the electrodeposited gold structure in contact measurement. On the basis, the impedance measurement result is used for representing the impedance change of different electrodeposited gold structures under different frequencies, the resistance characteristic of the electrodeposited gold structure can be accurately analyzed, and when the resistance of the electrodeposited gold structure is measured subsequently, the resistance characteristic of the electrodeposited gold structure can be referred to, so that the accurate measurement of the resistance of the electrodeposited gold structure is realized.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic structural diagram of an interdigital electrode provided by the present invention;
FIG. 2 is a schematic view of an interdigital electrode placed in deionized water according to the present invention;
FIG. 3 is an equivalent circuit diagram of an interdigital electrode provided by the present invention;
FIG. 4 is a flow chart of the steps of a method for analyzing the resistive properties of an electrodeposited gold structure according to the present invention;
fig. 5 is a schematic structural diagram of the gold interdigital electrode resistance characteristic detection by using the electrochemical workstation according to the present invention;
FIG. 6 is an electron microscope image of gold interdigital electrodes prepared by different reverse currents provided by the present invention;
FIG. 7 is a graph of frequency versus impedance for gold finger electrodes prepared with different reverse currents and different plating times in accordance with the present invention;
fig. 8 is a frequency-impedance diagram of gold interdigital electrodes with different thicknesses provided by the present invention.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers, and relative sizes and positional relationships therebetween shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present. In addition, if a layer/element is "on" another layer/element in one orientation, then that layer/element may be "under" the other layer/element when the orientation is reversed. In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise. The meaning of "a number" is one or more unless specifically limited otherwise.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The electrodeposited gold structure has excellent electrical properties, strong corrosion resistance, chemical and optical properties, and is widely applied to the fields of integrated circuits, biosensing, electronic communication, aerospace and the like. Electrodeposited gold structures can be divided into hard gold structures and soft gold structures.
Metals such as iron, cobalt, nickel and the like are usually added to the hard gold structure to improve the mechanical property of the gold structure, and the hard gold structure is applied to the aspects of electrical interconnection, PCB (printed circuit board) and the like.
The structure of the soft gold has high purity, and the signal fidelity is high, so that the interconnection, the packaging, the MEMS, the X-ray optical element and the like of the integrated circuit are irreplaceable parts. The resistance characteristics of the soft gold structure directly affect the transmission efficiency of signals, so the measurement of the resistance of the electrodeposited gold structure becomes important. But the resistivity of the gold material is low, so that the sensitivity of the resistance characteristic of the electro-deposition gold structure is high, the influence of the measurement environment is large, and the measurement is difficult; in the scientific research field, the most commonly used method for measuring the resistance of the electrodeposited gold structure is to use a probe station to perform four-probe measurement, but the method has extremely high requirements on the roughness of the electrodeposited gold structure, and the contact area between the probe and the electrodeposited gold structure can also cause instability of the measurement result, which all seriously affect the accuracy of the measurement result, so that the reliability of the method in measuring the resistance of a small-scale device is reduced.
Based on the above, the embodiment of the invention provides an interdigital electrode commonly used in the field of biosensing to analyze the resistance characteristics of an electrodeposited gold structure. Fig. 1 shows a schematic structure of an interdigital electrode. As shown in fig. 1, the interdigital electrode is an interdigital miniature electrode commonly used in the field of biosensing, and has the advantages of good specificity, high biological fidelity, high sensitivity, high detection speed and the like. Has important function and wide application prospect in the fields of biological detection, environmental monitoring, food safety and the like. And dripping detection solutions with different concentrations on the working area of the interdigital electrode to detect the frequency-impedance change of the interdigital electrode, so as to detect the resistance of the interdigital electrode. Wherein, the detection solution can be deionized water. Fig. 2 shows a schematic diagram of a measurement of the resistance of an interdigital electrode. As shown in fig. 2, 201 is an interdigital electrode, and 202 is deionized water. After the deionized water 202 is dropped, the equivalent circuit diagram of the interdigital electrode 201 is shown in fig. 3. Wherein Rs is the equivalent resistance of the interdigital electrode, and Cdl and Cdi are the equivalent capacitance of the interdigital electrode.
Fig. 4 shows a method for analyzing the resistance characteristics of an electrodeposited gold structure according to an embodiment of the present invention, and as shown in fig. 4, the method for analyzing the resistance characteristics of an electrodeposited gold structure includes the following steps:
In the embodiment of the invention, in order to improve the accuracy of representing the resistance characteristics of different electrodeposited gold structures, a plurality of gold interdigital electrodes with different resistance related parameters are provided. In the embodiment of the invention, the gold interdigital electrode is placed into the detection solution when the resistance characteristic of the gold interdigital electrode is analyzed. Compared with the prior art, when the electrodeposited gold structure is measured, the probe needs to be in contact with the electrodeposited gold structure, the method provided by the embodiment of the invention can improve the reliability and operability of resistance detection, and the requirement on the structure of the electrodeposited gold structure is low. Illustratively, the resistance-related parameter may be a height of the gold interdigital electrode and a surface roughness of the gold interdigital electrode.
And 102, detecting the impedance of the gold interdigital electrodes under different frequency sinusoidal voltages by using an electrochemical workstation.
In the embodiment of the invention, fig. 5 shows a schematic diagram for analyzing the resistance characteristics of the gold interdigital electrode by using an electrochemical workstation. Referring to fig. 5, when analyzing the resistance characteristics of different gold interdigital electrodes, the cathode and the anode of the gold interdigital electrode are electrically connected with an electrochemical workstation, and then the gold interdigital electrode is placed in a detection solution. And then, acquiring a frequency-impedance spectrum of the plurality of gold interdigital electrodes with different resistance related parameters under sinusoidal voltages with different frequencies by using the electrochemical workstation. Illustratively, the electrochemical workstation may be the morning CHI660E electrochemical workstation.
And 103, analyzing the resistance characteristics of the electrodeposited gold structures according to the impedance of the plurality of electrodeposited gold structures under the sinusoidal voltage with different frequencies.
In the embodiment of the invention, the resistance characteristics of the electrodeposited gold structure are analyzed through a frequency-impedance spectrum of a plurality of gold interdigital electrodes with different resistance related parameters under sinusoidal voltages with different frequencies. The whole process of the method for analyzing the resistance characteristic of the electrodeposited gold structure can avoid the change of the actual result caused by the contact measurement, and the resistance characteristic of the electrodeposited gold structure can be more accurately and directly represented.
Illustratively, the providing a plurality of gold interdigitated electrodes as described above may include the steps of:
at step 1011, a plurality of gold interdigitated seeds are provided. Providing a plurality of gold interdigitated seeds may comprise: providing a substrate; forming a gold seed layer on a substrate; and carrying out graphical treatment on the gold seed layer to obtain the gold interdigital seeds. In particular, the substrate may be SiO2A substrate. Forming a gold seed layer on a substrate may be: in SiO2And preparing a gold seed layer on the substrate through electron beam evaporation. The step of performing patterning processing on the gold seed layer to obtain the gold interdigital seeds may be that the gold seed layer is subjected to photoetching to obtain an interdigital electroplating area pattern, and the interdigital electroplating area pattern is the gold interdigital seeds. It is understood that the gold seed layer may be patterned by other methods, which is not limited in the embodiment of the present invention. After obtaining the gold interdigital seeds, the embodiment of the invention further comprises etching the residual photoresist on the surface of the gold interdigital seeds.
As a specific example, the step of performing photolithography on the gold seed layer to obtain the pattern of the interdigital electroplating region may be: spin-coating a 1.5-micron-thick NR1500 photoresist on the gold seed layer, pre-baking at 120 ℃ for 2min, exposing by using a UV contact type photoetching machine, hardening at 150 ℃, and then developing for 40s to obtain a to-be-electroplated pattern of the interdigital electrode, wherein illustratively, according to actual requirements, the electroplating area of the to-be-electroplated pattern can be 0.25cm2Auxiliary plating area 2cm2。
Step 1012, the plurality of interdigital seeds are processed in a one-to-one correspondence manner by using an electrochemical deposition method under the control of a plurality of different electrodeposition parameters, so as to obtain a plurality of gold interdigital electrodes. Illustratively, the electrochemical deposition process may be an electroplating process, and the electrodeposition parameters may be an electrodeposition time, a forward pulse current, and a reverse etching current.
As a specific example, the process of processing the interdigital seeds by electroplating to obtain the gold interdigital electrode may be: a direct current source meter is adopted to provide forward pulse electroplating current and reverse etching current. The positive pulse electroplating current is used for discharging ions and depositing metal on the surface of the cathode; the reverse etching current is used for etching sharp protrusions formed on the surface during the electrodeposition process, and enables etched ions to move into the diffusion layer to supplement the concentration of gold ions, so that the microstructure of a gold structure is changed.
In the embodiment of the invention, the relevant parameters of the resistance of the gold interdigital electrode are the height of the gold interdigital electrode and the surface roughness of the gold interdigital electrode. Gold interdigital electrodes with different heights can be obtained through different electroplating time. Gold interdigital electrodes with different surface roughness can be obtained by different reverse etching currents. The same forward pulse electroplating current can be adopted when preparing gold interdigital electrodes with different resistance related parameters. For example, the forward pulse plating current is 20mA, and the pulse width is 2 ms.
As a specific example, in order to obtain gold interdigital electrodes having different heights, the plating time may be 5min, 8min, 10min, or 15 min. At this time, the plating time can be controlled by using a timer, so that the plating thickness can be controlled, and when the required plating thickness is reached, the cathode plated article is taken out.
In order to obtain gold interdigital electrodes with different surface roughness, different sizes of reverse etching current can be set. The reverse etching current can change the etching efficiency, so that the etched gold ions are replenished into the diffusion layer for redistribution. Based on the method, the filling quality of the gold structure can be improved, and therefore the surface roughness of the gold interdigital electrode is changed.
Illustratively, after the electroplated part is taken out, the photoresist on the substrate can be removed by adopting dry etching and wet cleaning, and an electroplating experiment is completed to obtain a plurality of gold interdigital electrodes.
In order to not influence the subsequent quasi-determination of measuring the resistance characteristics of different gold interdigital electrodes by using an electrochemical workstation and prevent the short circuit problem of the electric interdigital electrodes, after a plurality of gold interdigital electrodes are obtained, the excessive gold seed layer on the surfaces of the gold interdigital electrodes can be etched by adopting ion beams.
It can be understood that neutral inorganic salt solution of gold can be adopted as the electroplating solution in order to ensure that the subsequent process has good compatibility and is environment-friendly and reduce the difficulty of the production and the post-treatment of the electroplating solution. Such as a gold sulfite bath. At this time, the pH value of the electroplating solution is 6.5-7.5, and the electroplating solution is acid-base neutral. In order to improve the quality of the electroplated layer, the neutral gold sulfite electroplating solution in the electroplating tank can be heated to 40 ℃ by a constant-temperature water bath before electroplating, and the neutral gold sulfite electroplating solution is stirred at the rotating speed of 200r/min for half an hour to enable ions to be more uniformly diffused in the electroplating solution. In the electroplating process, the developed gold interdigital seeds are placed in an electroplating bath to be used as a cathode, a 20cm multiplied by 10cm titanium mesh plated with 3 micron thick rectangular platinum is adopted as an anode, and the distance between the anode and the cathode is 8 cm.
As a specific example, the embodiment of the invention utilizes different reverse etching currents to etch away the sharp nanocrystalline grain structure formed during the deposition process of the gold interdigital electrode, thereby changing the microstructure of the deposited gold interdigital electrode. Due to the change of the microstructure, the resistance of the gold interdigital electrode is also changed.
Illustratively, referring to fig. 6, an electron micrograph of different gold interdigitated electrode structures obtained at different reverse etch currents is shown. Wherein, fig. 6(a) shows an electron microscope image of the gold interdigital electrode structure obtained under a 0mA reverse etching current; FIG. 6(b) shows an electron microscope image of the gold interdigital electrode structure obtained at a reverse etching current of 0.4 mA; FIG. 6(c) shows an electron micrograph of a gold interdigital electrode structure obtained at a reverse etching current of 1.4 mA; fig. 6(d) shows an electron microscope image of the gold interdigital electrode structure obtained at a 2.0mA reverse etching current. It can be seen that the microstructure of the gold interdigitated electrodes obtained at different reverse etch currents is different.
The impedances of the 4 gold interdigitated electrodes shown in fig. 6 at different frequency sinusoidal voltages were detected using an electrochemical workstation. Wherein the frequency range of the sinusoidal voltage provided by the electrochemical workstation is 100Hz to 500kHz, the amplitude of the sinusoidal voltage is 5mV, and the direct current bias voltage is 0V.
FIG. 7 shows a frequency-impedance plot of different reverse etch currents for making gold structures. Wherein, curve 1 is a phase distribution curve chart of the gold interdigital electrode impedance under different frequencies; curve 2 is a frequency-impedance curve of the gold interdigital electrode with the height of 300nm prepared by using reverse etching current with the size of 1.4A under different frequencies; curve 3 is a frequency-impedance curve of the gold interdigital electrode with the height of 100nm prepared by using reverse etching current with the size of 2A under different frequencies; curve 4 is a frequency-impedance curve of the gold interdigital electrode with the height of 300nm prepared by using reverse etching current with the size of 0.4A under different frequencies; curve 5 is the frequency-impedance curve at different frequencies for a 300nm high gold interdigitated electrode prepared with a reverse etch current of 0A.
In fig. 7, curve 2, curve 4 and curve 5 are frequency-impedance curves of the gold interdigital electrode obtained by using different reverse etching currents, respectively. Wherein the reverse etching current in curve 5 is the smallest and the reverse etching current in curve 2 is the largest. With the change of different reverse currents and the alternate influence of etching and passivation, the microstructure of the gold interdigital electrode has a changing trend of quasi-single crystal-quasi-single crystal-polycrystal. It can be seen from fig. 7 that at reverse currents of 0 and 1.4mA, numerous defects embedded in the quasi-single crystal structure affect the electron transport, resulting in their resistance being greater than that of the gold structure prepared at 0.4mA reverse current. Although the height of the polycrystalline gold structure is low, the gold structure has high resistance because the grain boundary in the structure can seriously obstruct the transmission of electrons.
As can be seen from fig. 7, the resistance of the gold interdigital electrode represented by curve 3 is the largest in the middle frequency region. The height of the gold interdigital electrode represented by the curve 3 is 100nm, and the heights of the gold interdigital electrodes represented by other curves are all 300nm, so that it can be basically obtained that the height of the gold interdigital electrode is inversely proportional to the resistance of the gold interdigital electrode.
Fig. 8 shows a frequency-impedance plot for gold interdigitated electrodes of different thicknesses. Wherein, the curve 6 is a phase distribution curve chart of the gold interdigital electrode impedance under different frequencies; the curve 7 is a frequency-impedance curve of the gold interdigital electrode with the thickness of 300nm prepared by using reverse etching current with the size of 0.4A under different frequencies; curve 8 is the frequency-impedance curve for gold interdigitated electrodes with a thickness of 700nm prepared using a reverse etch current of 0.4A at different frequencies. As can be seen from fig. 8, the thickness change of the gold interdigital electrode at the nano scale has a negligible effect on the resistance.
Referring to fig. 7 and 8, the impedance of the interdigital electrode is largely divided into three states as the measurement frequency varies, a double layer capacitor, a structural resistance, and a dielectric capacitor, corresponding to a low frequency region of 183Hz to 1kHz, a middle frequency region of 1kHz to 50kHz, and a high frequency region of 50kHz to 500kHz, respectively. And by combining with corresponding phase curve analysis, in an intermediate frequency region, the phase angle of the corresponding phase curve is very close to 0 degree, and the capacitance characteristic can be ignored, namely the pure resistance circuit is obtained. It can be seen that the change of the impedance value of the middle frequency region of the interdigital electrode is almost equal to the change of the structure resistance.
In practical applications, using the above conclusions, the electrodeposited gold structure can be connected to an electrochemical workstation if a resistance measurement of the structure is required. And applying a sinusoidal voltage of intermediate frequency to the electrodeposited gold structure using an electrochemical workstation, and obtaining from the electrochemical workstation an impedance of the electrodeposited gold structure at the sinusoidal voltage of intermediate frequency, the impedance being a resistance of the electrodeposited gold structure.
In the above description, the technical details of patterning, etching, and the like of each layer are not described in detail. It will be appreciated by those skilled in the art that layers, regions, etc. of the desired shape may be formed by various technical means. In addition, in order to form the same structure, those skilled in the art can also design a method which is not exactly the same as the method described above. In addition, although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination.
The embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the present disclosure, and such alternatives and modifications are intended to be within the scope of the present disclosure.
Claims (10)
1. A method for analyzing the resistive properties of an electrodeposited gold structure, the method comprising the steps of:
providing a plurality of gold interdigital electrodes, wherein the resistance related parameters of the gold interdigital electrodes are different;
detecting the impedance of a plurality of gold interdigital electrodes under different frequency sinusoidal voltages by using an electrochemical workstation;
and analyzing the resistance characteristics of the electrodeposited gold structure according to the impedance of the plurality of gold interdigital electrodes under sinusoidal voltages with different frequencies.
2. The method of analyzing the resistive properties of electrodeposited gold structures as set forth in claim 1, wherein the resistance related parameters of each of the gold interdigital electrodes are the height of the gold interdigital electrode and the surface roughness of the gold interdigital electrode.
3. The method of claim 1, wherein the sinusoidal voltage has a frequency in the range of 100Hz to 500kHz, an amplitude of 5mV, and a DC bias of 0V.
4. The method of analyzing resistive properties of an electrodeposited gold structure as claimed in claim 1, wherein said providing a plurality of gold interdigitated electrodes comprises:
providing a plurality of gold interdigitated seeds;
and processing the plurality of interdigital seeds in a one-to-one correspondence manner by utilizing an electrochemical deposition method under the control of a plurality of different electrodeposition parameters to obtain a plurality of gold interdigital electrodes.
5. The method of claim 4, wherein the electrodeposition parameters comprise electrodeposition time, forward pulse plating current and reverse etching current.
6. The method of claim 5, wherein each of the electrodeposition parameters comprises different electrodeposition time;
the magnitude and the pulse width of the forward pulse electroplating current included in each electrodeposition parameter are the same;
the magnitude and duration of the reverse etching current included in each of the electrodeposition parameters are different.
7. The method of analyzing resistive properties of electrodeposited gold structures of claim 4 wherein said providing a plurality of gold interdigitated seeds comprises:
providing a substrate;
forming a gold seed layer on the substrate;
and carrying out graphical treatment on the gold seed layer to obtain the gold interdigital seeds.
8. The method of analyzing resistive properties of electrodeposited gold structures of claim 7, wherein said forming a gold seed layer on said substrate comprises:
defining interdigitated areas on said substrate;
and electroplating a gold seed layer on the interdigital area by adopting an electroplating method.
9. The method of claim 8, wherein the plating solution is an inorganic salt solution of gold.
10. The method of claim 8, wherein the pH of the plating solution is 6.5 to 7.5 and the temperature of the plating solution is 25 to 55 ℃.
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| US4425197A (en) * | 1981-08-19 | 1984-01-10 | Inoue-Japax Research Incorporated | Method of and apparatus for electrodepositing a metal on a conductive surface |
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| CN109809359A (en) * | 2019-01-10 | 2019-05-28 | 北方工业大学 | 2.5D interdigital electrode manufacturing method and interdigital electrode |
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2020
- 2020-05-29 CN CN202010482069.8A patent/CN111596135A/en not_active Withdrawn
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| US4425197A (en) * | 1981-08-19 | 1984-01-10 | Inoue-Japax Research Incorporated | Method of and apparatus for electrodepositing a metal on a conductive surface |
| CN106047678A (en) * | 2016-05-20 | 2016-10-26 | 江苏大学 | Cell activity detection method and device based on impedance spectroscopy |
| CN108922791A (en) * | 2018-06-01 | 2018-11-30 | 中国科学院上海硅酸盐研究所 | A kind of interdigital electrode and its preparation method and application with nanometer texture surface |
| CN109809359A (en) * | 2019-01-10 | 2019-05-28 | 北方工业大学 | 2.5D interdigital electrode manufacturing method and interdigital electrode |
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