CN111586531B

CN111586531B - Audio interface detection device and method

Info

Publication number: CN111586531B
Application number: CN201910115709.9A
Authority: CN
Inventors: 陈翰宁; 姜建宇; 林文琦
Original assignee: Silicon Integrated Systems Corp
Current assignee: Silicon Integrated Systems Corp
Priority date: 2019-02-15
Filing date: 2019-02-15
Publication date: 2021-11-02
Anticipated expiration: 2039-02-15
Also published as: CN111586531A

Abstract

An audio interface detection device includes a processing unit, a first audio interface transmission circuit, and a second audio interface transmission circuit. The processing unit is used for generating a pulse signal and a character selection signal. The first audio interface transmission circuit is used for generating first audio data according to the pulse signal. The second audio interface transmission circuit is used for generating second audio data according to the pulse signal and the character selection signal. When the character selection signal maintains the low level for more than a predetermined time or the character selection signal maintains the high level for more than the predetermined time, the processing unit switches to the first audio interface transmission circuit. When the level of the character selection signal changes within the predetermined time, the processing unit is switched to a second audio interface transmission circuit.

Description

Audio interface detection device and method

Technical Field

The present invention relates to an audio interface detection device and method, and more particularly, to a detection circuit and method capable of detecting and automatically switching audio interfaces.

Background

There are many audio transmission interfaces of Digital Microphones (DMICs), and the commonly used audio transmission interfaces include Pulse Density Modulation (PDM), Inter-chip audio transmission (I2S, Inter-IC Sound), Time Division Multiplexing (Time Division Multiplexing), and other DMIC audio transmission interfaces.

Referring to fig. 1, fig. 1 is a pin diagram of an I2S audio chip. I2S Audio chip 12 has a Serial Clock (SCK) pin, a Word Select (W _ S) pin, an LR (left Right) pin, a Serial Data (Serial Data) pin, and high VDD and low GND. The I2S audio transmission protocol is to divide the audio data into two groups of Left Channel and Right Channel by two chips to transmit in sequence, then to receive the Clock signal by the Bit Clock Line (Bit Clock Line) connected to the SCK pin, and then to receive the signal by the W _ S pin to distinguish the audio Channel as Left Channel or Right Channel, while the LR pin is used to select the audio data of Left Channel or Right sound processed by the chip, the LR pin is grounded GND is the Left Channel, and the LR pin is high level VDD is the Right sound. Because the W _ S pin can distinguish whether the chip transmits the left channel or the right channel sequence, the audio data can be directly transmitted to the processing unit through the chip SD (Serial data) pin without an additional audio decoder for reading the transmitted data.

Referring to fig. 2, fig. 2 is a pin diagram of a PDM audio chip. The PDM audio chip 14 has a pulse (Clock, CLK) pin, an lr (left right) pin, a Data Output (DOUT) pin, and a high level VDD and a low level GND. In the PDM audio data stream, the CLK pin is only needed to receive the pulse signal and the LR pin to select the left and right channels, and the high level VDD and the ground level GND are used as reference levels, and then the DOUT pin is used to output the audio data to the processing unit, so the PDM audio transmission protocol has the advantages of simple circuit elements and less transmission signals.

Referring to fig. 3, fig. 3 is a schematic diagram of a pin of a TDM audio chip. The TDM audio chip 16 has a Serial Clock (SCK) pin, a Word Select (W _ S) pin, a config (configure) pin, a Serial Data (Serial Data) pin, and a high level VDD and a low level GND. The TDM audio transmission protocol also requires SCK, W _ S, LR and SD pins, and in addition, since the TDM chip can be connected in series to increase the number of channels, an additional WSO bit is required to transmit the WS signal of the chip at this stage to the W _ S pin of the next chip through the WSO pin, and the TDM chip can connect in series 16 chips through Daisy Chain Topology (Daisy Chain), i.e. the TDM audio transmission protocol can simultaneously transmit audio data of 16 channels at most.

The I2S transport protocol has the advantage of not requiring an audio decoder, but only two channels of audio data can be transmitted at the same time. The PDM transmission protocol has the advantage of simple circuitry and signaling, but requires an audio decoder to interpret the transmitted audio data. The TDM transmission protocol may be serially connected with 1 to 16 chips as required, but the required pins are more. Therefore, under the condition that each transmission protocol has advantages and disadvantages, the digital microphone usually has an interface capable of simultaneously transmitting the three protocols, so that when manufacturing the audio processing chip of the digital microphone, three packages are required to be respectively manufactured and adapted to three different audio processing chips, resulting in higher production cost.

Therefore, it is necessary to provide an audio interface detecting device and method, which can automatically detect the transmitted audio data protocol and switch to the correct audio interface to transmit the audio data.

Disclosure of Invention

The invention provides an audio interface detection device, which comprises a processing unit, a first audio interface transmission circuit, a second audio interface transmission circuit and a detection unit. The processing unit is used for generating a pulse signal and a character selection signal. The first audio interface transmission circuit is used for generating first audio data according to the pulse signal and transmitting the first audio data to the processing unit by a first transmission protocol. The second audio interface transmission circuit is used for generating second audio data according to the pulse signal and the character selection signal and transmitting the second audio data to the processing unit by a second transmission protocol. The detection unit is used for generating a detection result according to the character selection signal. When the word selection signal maintains a low level for more than a predetermined time or the word selection signal maintains a high level for more than the predetermined time, the detection result is the first transmission protocol, and the processing unit is switched to the first audio interface transmission circuit. When the level of the character selection signal changes in the predetermined time, the detection result is a second transmission protocol, and the processing unit is switched to a second audio interface transmission circuit.

Preferably, the audio interface detecting device further comprises a third audio interface transmission circuit for generating third audio data according to the pulse signal and the character selection signal and transmitting the third audio data to the processing unit according to a third transmission protocol. When the rising edge interval or the falling edge interval of two adjacent word element selection signals is 64 pulses and the word element selection signals maintain 32 high-level pulses, the detection result is a third transmission protocol, and the processing unit is switched to a third audio interface transmission circuit. When the rising edge interval or the falling edge interval of two adjacent word selection signals is 64 pulses and the word selection signal does not maintain the high level for 32 pulses, the detection result is the second transmission protocol, and the processing unit is switched to the second audio interface transmission circuit. When the rising edge interval or the falling edge interval of two adjacent character selection signals is not 64 pulses, the detection result is the second transmission protocol, and the processing unit is switched to the second audio interface transmission circuit.

Preferably, the first transmission protocol is pulse density modulation, and the second transmission protocol is time division multiplexing.

Preferably, the third transmission protocol is inter-chip audio transmission.

Preferably, the predetermined time is 512 pulses.

The invention also provides an audio interface detection method, which switches the audio interface by the character selection signal generated by the detection processing unit, and comprises the steps of one to four. Step one, detecting the character selection signal. And step two, judging whether the dimension time level of the character selection signal is constant and exceeds a preset time, if so, executing step three, and otherwise, executing step four. Step three: the audio interface of the processing unit is switched to a first audio interface transmission circuit. Step four: the audio interface of the processing unit is switched to a second audio interface transmission circuit.

Preferably, the fourth step includes determining whether the rising edge interval of two adjacent word selection signals is 64 pulses or the falling edge interval of two adjacent word selection signals is 64 pulses, if yes, and the word selection signal maintains 32 high-level pulses, switching the audio interface of the processing unit to a third audio interface transmission circuit, otherwise, switching the audio interface of the processing unit to the second audio interface transmission circuit.

Preferably, the first audio interface transmission circuit is a pulse density modulation transmission circuit, and the second audio interface transmission circuit is a time division multiplexing transmission circuit.

Preferably, the third audio interface transmission circuit is used for inter-chip audio transmission.

Preferably, the predetermined time is 512 pulses.

The invention uses the detection character selection signal with different level characteristics in different audio transmission protocols to detect which audio transmission protocol the audio data received by the processing unit is transmitted through, so that the processing unit can automatically switch to the corresponding audio interface to process the received audio data. Compared with the prior art that a plurality of audio transmission protocols need different processing circuits to transmit and receive audio data, the audio interface detection device and the method of the invention can simultaneously decode the audio data transmitted by the plurality of transmission protocols by only one processing unit, thereby saving the packaging process and greatly reducing the manufacturing cost of the audio device.

Drawings

Fig. 1 is a pin diagram of an I2S audio chip;

FIG. 2 is a pin diagram of a PDM audio chip;

FIG. 3 is a schematic diagram of a pin of a TDM audio chip;

FIG. 4 is a schematic diagram of the I2S transmission circuit;

FIG. 5 is a timing diagram of signals in the I2S transmission circuit of FIG. 4;

FIG. 6 is a schematic diagram of a PDM transmission circuit;

FIG. 7 is a timing diagram of the PDM transmission circuit shown in FIG. 6;

FIG. 8 is a schematic diagram of a TDM transmission circuit;

FIG. 9 is a signal timing diagram of the TDM transmission circuit of FIG. 8;

FIG. 10 is a signal timing diagram of a TDM transmission circuit having a plurality of TDM audio chips;

FIG. 11 is a flowchart illustrating a method for detecting an audio interface according to the present invention.

Detailed Description

In order to make the aforementioned and other objects, features and advantages of the invention more comprehensible, preferred embodiments accompanied with figures are described in detail below. Furthermore, directional phrases used herein, such as, for example, upper, lower, top, bottom, front, rear, left, right, inner, outer, lateral, peripheral, central, horizontal, lateral, vertical, longitudinal, axial, radial, uppermost or lowermost, etc., refer only to the orientation of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention.

Referring to fig. 4 showing an I2S transmission circuit diagram, as shown in fig. 4, the I2S transmission circuit includes a processing unit 10 and two

I2S audio chips

42 and 44, the processing unit 10 includes a burst signal interface 104, an audio data interface 106 and a character selection interface 108, and the burst signal interface 104 transmits burst signals to the

I2S audio chips

42 and 44. In the embodiment of the present invention, the LR pin of the I2S audio chip 42 is connected to the low level, and the LR pin of the I2S audio chip 44 is connected to the high level, so that the

I2S audio chips

42 and 44 process the audio data of the left channel and the right channel, respectively.

Please refer to fig. 5, which is a timing diagram of the I2S transmission circuit of fig. 4 according to the present invention, wherein the I2S transmission circuit includes two

I2S audio chips

42 and 44 and the processing unit 10. The burst signal interface 104 and the word selection interface 108 of the processing unit 10 respectively transmit the burst signal SCK and the word selection signal WS to the

I2S audio chips

42 and 44, and the output timing data SD (LR is 0) and timing data SD (LR is 1) of the

I2S audio chips

42 and 44, respectively, wherein the start and end of the timing data are respectively the Most Significant unit (MSB) and the Least Significant unit (LSB). The word selection signal WS determines the audio data for the left channel or the right channel. As shown in FIG. 5, the word select signal WS is low during the first 32 pulses, when the LR pin is tied to the low I2S audio chip 42 outputting valid units. While the word select signal WS is high during the next 32 pulses, the LR pin is tied to the high I2S audio chip 44 to output valid units. Thus, the audio data interface 106 of the processing unit 10 receives audio data of the left channel during the first 32 bursts and audio data of the right channel during the 33 th-64 th bursts.

Fig. 6 is a schematic diagram of a PDM transmission circuit. The PDM transmission circuit has a processing unit 10 and PDM audio chips 62, 64. The pulse signal interface 104 of the processing unit 10 transmits the pulse signal SCK to the CLK pin of the

PDM audio chips

62 and 64, and the

PDM audio chips

62 and 64 output the audio data DOUT1 and DOUT2 according to the pulse signal SCK.

Please refer to fig. 7, which is a signal timing diagram of the PDM transmission circuit shown in fig. 6, because the LR pin of the PDM audio chip 62 is connected to the low level and the LR pin of the PDM audio chip 64 is connected to the high level, the PDM audio chip 62 outputs valid audio data DOUT1 when the pulse signal SCK is at the low level, and the PDM audio chip 64 outputs valid audio data DOUT2 when the pulse signal SCK is at the high level, so that it is not necessary to determine which channel to transmit valid audio data as required by the I2S audio protocol when using the PDM audio protocol for transmission.

Fig. 8 is a schematic diagram of a TDM transmission circuit. The TDM transmission circuit has a processing unit 10 and TDM audio chips 82, 84, and 88. In this embodiment, the TDM transmission circuit has 3 TDM audio chips, and it should be noted that the TDM can transmit the word selection signal WS to the W _ S pin of the next stage through the WSO pin of the present stage, so that the TDM transmission circuit can adjust the number of the TDM audio chips according to the requirement of the audio channel. In the TDM transmission circuit, the processing unit 10 also has a pulse signal interface 104, an audio data interface 106 and a character selection interface 108, the pulse signal interface 104 of the processing unit 10 transmits a pulse signal to the SCK pins of the TDM audio chips 82, 84 and 88, the processing unit 10 transmits a character selection signal WS to the W _ S pin of the TDM audio chip 82, the TDM audio chip 82 transmits the character selection signal WS to the W _ S pin of the next TDM audio chip 84 through the WSO pin, and the TDM audio chip 84 transmits the character selection signal WS to the W _ S pin of the next TDM audio chip 88 through the WSO pin. In this way, when the TDM transmission circuit has more than three TDM audio chips, the W _ S pin of the TDM audio chip receives the word selection signal WS transmitted by the WSO pin of the previous stage.

Fig. 9 is a signal timing diagram of the TDM transmission circuit shown in fig. 8, in which the processing unit 10 outputs a word selection signal WS and a pulse signal SCK, the SD pin of the TDM audio chip 82 outputs audio data SD1, the WSO pin of the TDM audio chip 82 transmits a word selection output signal WSO1 to the W _ S pin of the TDM audio chip 84, the SD pin of the TDM audio chip 84 outputs audio data SD2, the WSO pin of the TDM audio chip 84 transmits a word selection output signal WSO2 to the W _ S pin of the TDM audio chip 88, and the SD pin of the TDM audio chip 84 outputs audio data SD 3. Therefore, the signal received by the audio data interface 106 of the processing unit 10 is the audio data SD _ out.

Fig. 10 is a schematic diagram of signal timing when the TDM transmission circuit has n TDM audio chips. Here, when n is 1 or 2, the pulse period (clock cycle) is 64, and if n is 1, WS (2) does not generate a high level, so Data 02 has no signal output. When n is 3 or 4, the pulse period (clock cycle) is 128, and if n is 3, WS (4) does not generate a high level, so Data 04 has no signal output. When n is 5 to 8, the pulse cycle (clock cycle) is 256, and when n is not equal to 8, WS (n +1) does not generate a high level, and thus Data (n +1) does not output a signal. Similarly, when n is between 9 and 16, the pulse period (clock cycle) is 512, and no high level is generated in WS (n +1) in the remaining pulse period, so that Data (n +1) has no signal output. Therefore, the signal timing diagram of the TDM transmission circuit shown in fig. 10 is only a range, and any TDM transmission circuit having different numbers of TDM audio chips formed by the TDM transmission principle is within the scope of the present invention.

FIG. 11 is a flowchart illustrating a method for detecting an audio interface according to the present invention. In step S100, when the processing unit 10 receives the audio data, the audio protocol detection starts. Step 102, detect the word selection signal WS. Step S104 detects whether the word selection signal WS exceeds 512 pulses without level change, i.e. whether the word selection signal WS maintains high level or maintains low level for more than 512 pulses, if yes, it means that the audio data uses the audio data without the word selection signal WS to select the audio channel, so the audio data transmitted through the PDM audio transmission protocol is received by the processing unit 10. Therefore, if the word selection signal WS has no level change for more than 512 pulses, step S202 is executed. If the word selection signal WS changes in level within a predetermined time (e.g., a specific pulse length period such as 64, 128, 256 or 512), step S106 is executed. According to the circuit design requirement, when the PDM protocol is used to transmit the audio data, the W _ S of the processing unit 10 can be set to a continuously high level or a continuously low level. It is an embodiment of the present invention that the step S104 detects whether the word select signal WS maintains a level exceeding 512 pulses, but not to limit the present invention, and it can be detected whether WS maintains a level for a certain time according to the circuit design requirement, so as to know the pulse length transmitted by the PDM audio transmission protocol of the audio data received by the processing unit 10.

When it is determined in step S104 that the audio data received by the processing unit 10 is not transmitted by the PDM audio transmission protocol, step S106 is continuously performed. In step S106, it is detected whether the pulse period is 64 pulses, specifically, the difference between the I2S audio transmission protocol and the TDM transmission protocol is that the I2S audio transmission protocol can only transmit audio data of two channels, and the left and right channels respectively occupy 32 pulses, so the pulse period of the I2S audio transmission protocol is 64 pulses. The TDM audio transmission protocol can be connected in series with 16 TDM audio chips, i.e. the TDM audio transmission protocol can simultaneously transmit audio data of 16 channels. When the audio transmission protocol transmits audio data of 1 to 2 channels, the pulse period is 64 pulses. When the audio transport protocol transmits audio data of 3 to 4 channels, the pulse period is 128 pulses. When the audio transport protocol transmits audio data of 5 to 8 channels, the pulse period is 256 pulses. When the audio transmission protocol transmits audio data of 9 to 16 channels, the pulse period is 512 pulses. Therefore, step S106 detects whether the received audio data burst period is 64 bursts, if so, the audio data may be transmitted through one of I2S or TDM audio transmission protocols, at this time, step S108 is executed to further determine a transmission interface of the audio data, if not, the audio data is transmitted through TDM audio transmission protocols, at this time, step S206 is executed.

In step S108, it is detected whether the word select signal WS is high for 32 pulses. Since in the I2S audio transmission protocol, the word selection signal WS maintains 32 high pulses, then 32 low pulses, and then 32 high pulses, the high level alternately maintains 32 high pulses and the audio data transmission is terminated. However, in the TDM audio transmission protocol, the word selection signal WS is only a short pulse, and only outputs a few pulses with high level, which is not as long as 32 pulses with high level as the word selection signal WS in the I2S audio transmission protocol. Therefore, when step S108 detects whether the level of the word select signal WS maintains the high level for 32 pulses, if so, the audio data is transmitted through the I2S audio transmission protocol, at this time, step S204 is executed, if not, the audio data is transmitted through the TDM audio transmission protocol, at this time, step S206 is executed.

Step S202 is to switch the audio transmission interface to PDM audio transmission interface. Step S204 is to switch the audio transmission interface to I2S audio transmission interface. Step S206 is to switch the audio transmission interface to TDM audio transmission interface.

The chip with different audio interfaces needs different circuit packaging processes, and the audio interface detection device and the method can judge the transmission protocol of the received audio data through the signal level change of the character selection signal (or W _ S pin), so that the processing unit can process the audio data transmitted through PDM, I2S or TDM audio transmission protocol at the same time, and the packaging circuit with three audio interfaces can be produced in the packaging process of a single circuit, thereby reducing the packaging process of the chip, greatly reducing the production cost of the electronic microphone, reducing the wiring area required by the chip, enabling the product to be more small and being more suitable for various light and thin portable electronic devices.

Although the present invention has been described with respect to the preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention, and it is intended that the invention be limited only by the appended claims.

Claims

1. An audio interface detection device, comprising:

a processing unit for generating a pulse signal and a character selection signal;

the first audio interface transmission circuit is used for generating first audio data according to the pulse signal and transmitting the first audio data to the processing unit by a first transmission protocol;

a second audio interface transmission circuit for generating second audio data according to the pulse signal and the character selection signal and transmitting the second audio data to the processing unit by a second transmission protocol;

a third audio interface transmission circuit for generating third audio data according to the pulse signal and the character selection signal and transmitting the third audio data to the processing unit by a third transmission protocol;

a detecting unit for generating a detecting result according to the character selecting signal;

when the word selection signal maintains a low level for more than a predetermined time or the word selection signal maintains a high level for more than the predetermined time, the detection result is the first transmission protocol, and the processing unit is switched to the first audio interface transmission circuit;

when the level of the character selection signal changes within the predetermined time and the detection result is the second transmission protocol, the processing unit switches to the second audio interface transmission circuit;

when the rising edge interval or the falling edge interval of two adjacent word selection signals is 64 pulses and the word selection signal maintains 32 high-level pulses, the detection result is the third transmission protocol, and the processing unit is switched to the third audio interface transmission circuit;

when the rising edge interval or the falling edge interval of two adjacent word selection signals is 64 pulses and the word selection signal does not maintain the high level for 32 pulses, the detection result is the second transmission protocol, and the processing unit is switched to the second audio interface transmission circuit;

when the rising edge interval or the falling edge interval of two adjacent word selection signals is not 64 pulses, the detection result is the second transmission protocol, and the processing unit is switched to the second audio interface transmission circuit.

2. The audio interface detection device of claim 1, wherein the first transmission protocol is pulse density modulation and the second transmission protocol is time division multiplexing.

3. The audio interface detection device of claim 1, wherein the third transmission protocol is inter-chip audio transmission.

4. The audio interface detection device of claim 1, wherein the predetermined time is 512 pulses.

5. A method for detecting an audio interface, wherein the audio interface is switched by a character selection signal generated by a detection processing unit, comprises:

the method comprises the following steps: detecting the character selection signal;

step two: judging whether the dimension of the character selection signal is constant and exceeds a preset time, if so, executing a third step, and otherwise, executing a fourth step;

step three: switching the audio interface of the processing unit to a first audio interface transmission circuit;

step four: and switching the audio interface of the processing unit to a second audio interface transmission circuit, judging whether the rising edge interval of two adjacent character selection signals is 64 pulses or the falling edge interval of two adjacent character selection signals is 64 pulses, if so, switching the audio interface of the processing unit to a third audio interface transmission circuit, otherwise, switching the audio interface of the processing unit to the second audio interface transmission circuit.

6. The method of claim 5, wherein the first audio interface transmission circuit is a pulse density modulation transmission circuit and the second audio interface transmission circuit is a time division multiplexing transmission circuit.

7. The audio interface detection method of claim 5, wherein the third audio interface transmission circuit is an inter-chip audio transmission.

8. The method of claim 5, wherein the predetermined time is 512 pulses.