CN111584374B - Packaging method of semiconductor device - Google Patents
Packaging method of semiconductor device Download PDFInfo
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- CN111584374B CN111584374B CN202010437592.9A CN202010437592A CN111584374B CN 111584374 B CN111584374 B CN 111584374B CN 202010437592 A CN202010437592 A CN 202010437592A CN 111584374 B CN111584374 B CN 111584374B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 123
- 238000000034 method Methods 0.000 title claims abstract description 54
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 23
- 239000002070 nanowire Substances 0.000 claims abstract description 131
- 229910052751 metal Inorganic materials 0.000 claims abstract description 127
- 239000002184 metal Substances 0.000 claims abstract description 127
- 239000011347 resin Substances 0.000 claims abstract description 58
- 229920005989 resin Polymers 0.000 claims abstract description 58
- 238000005538 encapsulation Methods 0.000 claims abstract description 13
- 239000000725 suspension Substances 0.000 claims description 46
- 239000000463 material Substances 0.000 claims description 41
- 238000004528 spin coating Methods 0.000 claims description 21
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- 238000001035 drying Methods 0.000 claims description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 12
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 12
- 229910052802 copper Inorganic materials 0.000 claims description 12
- 239000010949 copper Substances 0.000 claims description 12
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 11
- 239000007769 metal material Substances 0.000 claims description 10
- 238000000151 deposition Methods 0.000 claims description 9
- 239000003822 epoxy resin Substances 0.000 claims description 9
- 229920000647 polyepoxide Polymers 0.000 claims description 9
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 8
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 8
- 239000002042 Silver nanowire Substances 0.000 claims description 8
- VDGMIGHRDCJLMN-UHFFFAOYSA-N [Cu].[Co].[Ni] Chemical compound [Cu].[Co].[Ni] VDGMIGHRDCJLMN-UHFFFAOYSA-N 0.000 claims description 8
- RYTYSMSQNNBZDP-UHFFFAOYSA-N cobalt copper Chemical compound [Co].[Cu] RYTYSMSQNNBZDP-UHFFFAOYSA-N 0.000 claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- 239000004925 Acrylic resin Substances 0.000 claims description 5
- 229920000178 Acrylic resin Polymers 0.000 claims description 5
- 239000004793 Polystyrene Substances 0.000 claims description 5
- 239000004372 Polyvinyl alcohol Substances 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- 230000003647 oxidation Effects 0.000 claims description 5
- 238000007254 oxidation reaction Methods 0.000 claims description 5
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 5
- 239000012994 photoredox catalyst Substances 0.000 claims description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 5
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 5
- 239000004417 polycarbonate Substances 0.000 claims description 5
- 229920000139 polyethylene terephthalate Polymers 0.000 claims description 5
- 239000005020 polyethylene terephthalate Substances 0.000 claims description 5
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 5
- 229920002223 polystyrene Polymers 0.000 claims description 5
- 229920002451 polyvinyl alcohol Polymers 0.000 claims description 5
- 229910002027 silica gel Inorganic materials 0.000 claims description 5
- 239000000741 silica gel Substances 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910017052 cobalt Inorganic materials 0.000 claims description 4
- 239000010941 cobalt Substances 0.000 claims description 4
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 4
- 238000007772 electroless plating Methods 0.000 claims description 4
- 238000005566 electron beam evaporation Methods 0.000 claims description 4
- 238000009713 electroplating Methods 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 4
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 4
- 229910052742 iron Inorganic materials 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 238000000465 moulding Methods 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 4
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims description 4
- 229910052763 palladium Inorganic materials 0.000 claims description 4
- 238000005240 physical vapour deposition Methods 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- 229910001936 tantalum oxide Inorganic materials 0.000 claims description 4
- 238000002207 thermal evaporation Methods 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
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- 229910001928 zirconium oxide Inorganic materials 0.000 claims description 4
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Health & Medical Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The invention relates to a packaging method of a semiconductor device, which comprises the following steps: disposing a first semiconductor device, a second semiconductor device, and a third semiconductor device on a carrier; forming a first dielectric thin layer and a first resin layer on the carrier, forming a first metal shielding layer covering the first semiconductor device and the second semiconductor device by using a first mask, forming a first metal nanowire shielding layer covering the first semiconductor device by using a second mask, then forming a second resin layer, then forming a second metal nanowire shielding layer by using a third mask, wherein the second metal nanowire shielding layer covers only the third semiconductor device, and then forming a resin encapsulation layer on the carrier.
Description
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a packaging method of a semiconductor device.
Background
With the vigorous development of the electronic industry, electronic products are gradually entering the research and development directions of multiple functions and high performance. In order to meet the requirements of high Integration (Integration) and Miniaturization (Miniaturization) of semiconductor devices, various requirements of electromagnetic shielding are also increasing. Along with the miniaturization requirement, the reliability of the whole electromagnetic shielding is required to be improved. In order to solve the above problems, the related art has been developed with little effort. It is also an urgent need in the related art to provide a method for packaging a semiconductor device with high reliability, which is one of the important research and development issues.
Disclosure of Invention
The present invention is directed to overcoming the above-mentioned drawbacks of the prior art and providing a method for packaging a semiconductor device.
In order to achieve the above purpose, the invention adopts the following technical scheme:
a method of packaging a semiconductor device, comprising the steps of:
1) A carrier is provided on which a first semiconductor device, a second semiconductor device, and a third semiconductor device are disposed.
2) A first thin layer of dielectric is deposited over the carrier, the first thin layer of dielectric conformally covering the carrier, the first semiconductor device, the second semiconductor device, and the third semiconductor device.
3) And spin-coating a first solution containing a resin material on the carrier, wherein the concentration of the resin material in the first solution containing the resin material is 30-60mg/ml, and then performing a drying treatment to form a first resin layer which conformally covers the carrier, the first semiconductor device, the second semiconductor device and the third semiconductor device.
4) Next, a first mask is provided on the carrier, the first mask exposing only the upper and side surfaces of the first semiconductor device and the upper and side surfaces of the second semiconductor device, then a metal material is deposited to form a first metal shielding layer, the first metal shielding layer covers the upper and side surfaces of the first semiconductor device and the upper and side surfaces of the second semiconductor device, and then the first mask is removed.
5) A second mask is then provided over the carrier, the second mask exposing only the upper and side surfaces of the first semiconductor device, followed by spin-coating a first suspension containing metal nanowires, followed by a bake-out process to form a first metal nanowire shielding layer, the first metal nanowire shielding layer covering only the upper and side surfaces of the first semiconductor device, followed by removing the second mask.
6) And spin-coating a second solution containing a resin material on the carrier, wherein the concentration of the resin material in the second solution containing the resin material is 50-100mg/ml, and then performing a drying treatment to form a second resin layer which conformally covers the carrier, the first semiconductor device, the second semiconductor device and the third semiconductor device.
7) And then providing a third mask on the carrier, wherein the third mask exposes only the area where the third semiconductor device is located, then spin-coating a second suspension containing metal nanowires, then performing drying treatment to form a second metal nanowire shielding layer, and then removing the third mask, wherein the second metal nanowire shielding layer only covers the upper surface and the side surface of the third semiconductor device.
8) A resin encapsulation layer is then formed over the carrier.
Preferably, in the step 2), the first dielectric thin layer is formed by a PECVD method, an ALD method, a thermal oxidation method or a PVD method, the material of the first dielectric thin layer is one of silicon oxide, zirconium oxide, hafnium oxide, silicon nitride, silicon oxynitride, tantalum oxide and aluminum oxide, and the thickness of the first dielectric thin layer is 20-50 nm.
Preferably, in the steps 3) and 6), the resin material in the first solution and the second solution each includes one of epoxy resin, acrylic resin, silica gel, BCB, polyvinyl alcohol, polystyrene, PMMA, PET, PC.
Preferably, in the step 4), the metal material includes one or more of gold, copper, aluminum, nickel, cobalt, iron, silver, palladium, and titanium, and the deposition method of the first metal shielding layer is one or more of thermal evaporation, magnetron sputtering, electron beam evaporation, electroplating, and electroless plating.
Preferably, in the step 5), the metal nanowire in the first suspension containing metal nanowire is one of gold nanowire, silver nanowire, copper nanowire, nickel nanowire, copper cobalt nickel nanowire, and the concentration of the metal nanowire in the first suspension containing metal nanowire is 10-30mg/ml.
Preferably, in the step 7), the metal nanowire in the second suspension containing metal nanowires is one of gold nanowire, silver nanowire, copper nanowire, nickel nanowire, copper cobalt nickel nanowire, the concentration of the metal nanowire in the second suspension containing metal nanowire is 5-20mg/ml, and the concentration of the metal nanowire in the second suspension containing metal nanowire is smaller than the concentration of the metal nanowire in the first suspension containing metal nanowire.
Preferably, in the step 8), the material of the resin encapsulation layer includes epoxy resin, and the resin encapsulation layer is formed by a molding process.
Compared with the prior art, the invention has the following advantages:
in the packaging method of the semiconductor device, a first mask is used for depositing a metal material on the first semiconductor device and the second semiconductor device to form a first metal shielding layer, then a second mask is used for spin-coating a suspension containing metal nanowires on the first semiconductor device to form a first metal nanowire shielding layer, and finally a third mask is used for spin-coating a suspension containing metal nanowires on the third semiconductor device to form a second metal nanowire shielding layer, so that different shielding layers are formed for different semiconductor devices. The use amount of the metal nanowires is reduced while ensuring the electromagnetic shielding effect of each semiconductor device. The packaging method is simple and feasible, reduces the application of large-scale equipment, can form the packaging structure with the metal nanowire shielding layer through a low-temperature spin coating method, and reduces the manufacturing cost.
Drawings
Fig. 1 to 6 are schematic structural views of steps in the formation of a semiconductor device according to the present invention.
Detailed Description
Various exemplary embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present disclosure unless it is specifically stated otherwise. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. That is, the structures and methods herein are shown by way of example to illustrate different embodiments of the structures and methods in this disclosure. However, those skilled in the art will appreciate that they are merely illustrative of the exemplary ways in which the disclosure may be practiced, and not exhaustive. Moreover, the figures are not necessarily to scale, some features may be exaggerated to show details of particular components. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, or can be communicated inside the two components, or can be connected wirelessly or in a wired way. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but should be considered part of the specification where appropriate. In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of the exemplary embodiments may have different values.
A method of packaging a semiconductor device, comprising the steps of:
1) A carrier is provided on which a first semiconductor device, a second semiconductor device, and a third semiconductor device are disposed.
2) A first thin layer of dielectric is deposited over the carrier, the first thin layer of dielectric conformally covering the carrier, the first semiconductor device, the second semiconductor device, and the third semiconductor device.
3) And spin-coating a first solution containing a resin material on the carrier, wherein the concentration of the resin material in the first solution containing the resin material is 30-60mg/ml, and then performing a drying treatment to form a first resin layer which conformally covers the carrier, the first semiconductor device, the second semiconductor device and the third semiconductor device.
4) Next, a first mask is provided on the carrier, the first mask exposing only the upper and side surfaces of the first semiconductor device and the upper and side surfaces of the second semiconductor device, then a metal material is deposited to form a first metal shielding layer, the first metal shielding layer covers the upper and side surfaces of the first semiconductor device and the upper and side surfaces of the second semiconductor device, and then the first mask is removed.
5) A second mask is then provided over the carrier, the second mask exposing only the upper and side surfaces of the first semiconductor device, followed by spin-coating a first suspension containing metal nanowires, followed by a bake-out process to form a first metal nanowire shielding layer, the first metal nanowire shielding layer covering only the upper and side surfaces of the first semiconductor device, followed by removing the second mask.
6) And spin-coating a second solution containing a resin material on the carrier, wherein the concentration of the resin material in the second solution containing the resin material is 50-100mg/ml, and then performing a drying treatment to form a second resin layer which conformally covers the carrier, the first semiconductor device, the second semiconductor device and the third semiconductor device.
7) And then providing a third mask on the carrier, wherein the third mask exposes only the area where the third semiconductor device is located, then spin-coating a second suspension containing metal nanowires, then performing drying treatment to form a second metal nanowire shielding layer, and then removing the third mask, wherein the second metal nanowire shielding layer only covers the upper surface and the side surface of the third semiconductor device.
8) A resin encapsulation layer is then formed over the carrier.
Further, in the step 2), the first dielectric thin layer is formed by a PECVD method, an ALD method, a thermal oxidation method or a PVD method, the material of the first dielectric thin layer is one of silicon oxide, zirconium oxide, hafnium oxide, silicon nitride, silicon oxynitride, tantalum oxide and aluminum oxide, and the thickness of the first dielectric thin layer is 20-50 nm.
Further, in the steps 3) and 6), the resin material in the first solution and the second solution each includes one of epoxy resin, acrylic resin, silica gel, BCB, polyvinyl alcohol, polystyrene, PMMA, PET, PC.
Further, in the step 4), the metal material includes one or more of gold, copper, aluminum, nickel, cobalt, iron, silver, palladium, and titanium, and the deposition method of the first metal shielding layer is one or more of thermal evaporation, magnetron sputtering, electron beam evaporation, electroplating, and electroless plating.
Further, in the step 5), the metal nanowire in the suspension containing the metal nanowire is one of a gold nanowire, a silver nanowire, a copper nanowire, a nickel nanowire, a copper cobalt nanowire and a copper cobalt nickel nanowire, and the concentration of the metal nanowire in the suspension containing the metal nanowire is 10-30mg/ml.
Further, in the step 7), the metal nanowire in the second suspension containing the metal nanowire is one of a gold nanowire, a silver nanowire, a copper nanowire, a nickel nanowire, a copper cobalt nanowire, and a copper cobalt nickel nanowire, the concentration of the metal nanowire in the second suspension containing the metal nanowire is 5-20mg/ml, and the concentration of the metal nanowire in the second suspension containing the metal nanowire is smaller than the concentration of the metal nanowire in the first suspension containing the metal nanowire.
Further, in the step 8), the material of the resin encapsulation layer includes epoxy resin, and the resin encapsulation layer is formed through a molding process.
Please refer to fig. 1-6. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings rather than the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
A method of packaging a semiconductor device according to an exemplary embodiment of the present disclosure is described below with reference to fig. 1 to 6.
As shown in fig. 1, in step 1), a carrier 1 is provided, on which carrier 1 a first semiconductor device 21, a second semiconductor device 22 and a third semiconductor device 23 are arranged.
The carrier 1 may be a temporary carrier, a package substrate, or a printed wiring board, the temporary carrier may be a glass carrier, a plastic board carrier, a ceramic carrier, or a metal carrier, and the package substrate may include an insulating carrier and a circuit wiring layer on the carrier substrate. The first semiconductor device 21, the second semiconductor device 22, and the third semiconductor device 23 are different kinds of electronic devices.
In step 2), a first thin layer of dielectric 3 is deposited on the carrier 1, the first thin layer of dielectric 3 conformally covering the carrier 1, the first semiconductor device 21, the second semiconductor device 22 and the third semiconductor device 23.
In the step 2), the first dielectric thin layer 3 is formed by a PECVD method, an ALD method, a thermal oxidation method or a PVD method, the material of the first dielectric thin layer 3 is one of silicon oxide, zirconium oxide, hafnium oxide, silicon nitride, silicon oxynitride, tantalum oxide and aluminum oxide, and the thickness of the first dielectric thin layer is 20-50 nm. In specific embodiments, the first dielectric thin layer has a thickness of 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, or 50 nm, by depositing silicon nitride or silicon oxide by PECVD, depositing aluminum oxide by ALD, or depositing silicon oxide by thermal oxidation.
In step 3), a first solution containing a resin material is spin-coated on the carrier 1, wherein the concentration of the resin material in the first solution containing a resin material is 30-60mg/ml, followed by a baking treatment to form a first resin layer 4, the first resin layer 4 conformally covering the carrier, the first semiconductor device, the second semiconductor device, and the third semiconductor device.
Wherein in the step 3), the resin material in the first solution includes one of epoxy resin, acrylic resin, silica gel, BCB, polyvinyl alcohol, polystyrene, and PMMA, PET, PC, and in a specific embodiment, the concentration of the resin material in the first solution containing the resin material is 30mg/ml, 35mg/ml, 40mg/ml, 45mg/ml, 50mg/ml, 55mg/ml, or 60mg/ml. Spin coating is carried out at a rotational speed of 2000-5000 rpm, specifically 2500 rpm, 3000 rpm, 3500 rpm, 4000 rpm, 4500 rpm, for 60 seconds, 100 seconds or 200 seconds, followed by heat treatment at 90 ℃, 100 ℃ or 110 ℃ for 10 minutes, 20 minutes or 30 minutes.
As shown in fig. 2, in step 4), a first mask 5 is then provided on the carrier 1, the first mask 5 exposing only the upper and side surfaces of the first semiconductor device 21 and the upper and side surfaces of the second semiconductor device 22, then a metal material is deposited to form a first metal shielding layer 6, the first metal shielding layer 6 covering the upper and side surfaces of the first semiconductor device 21 and the upper and side surfaces of the second semiconductor device 22, and then the first mask 5 is removed.
Wherein, a pre-prepared metal frame may be used as the first mask 5, or a photoresist may be coated on the carrier 1, and then the first mask 5 may be formed through an exposure and development process, and then one or more metal materials including gold, copper, aluminum, nickel, cobalt, iron, silver, palladium, and titanium may be deposited through one or more of thermal evaporation, magnetron sputtering, electron beam evaporation, electroplating, and electroless plating to form the first metal shielding layer 6.
As shown in fig. 3, in step 5), a second mask 7 is provided on the carrier 1, the second mask 7 exposing only the upper and side surfaces of the first semiconductor device 21, followed by spin-coating a first metal nanowire-containing suspension, followed by a baking process to form a first metal nanowire shielding layer 8, the first metal nanowire shielding layer 8 covering only the upper and side surfaces of the first semiconductor device 21, followed by removing the second mask 7.
Wherein, a pre-prepared metal frame can be used as the second mask 7, or photoresist can be coated on the carrier 1, and then the second mask 7 can be formed through an exposure and development process.
Wherein in the step 5), the metal nanowire in the first suspension containing the metal nanowire is one of a gold nanowire, a silver nanowire, a copper nanowire, a nickel nanowire, a copper cobalt nanowire and a copper cobalt nickel nanowire, and the concentration of the metal nanowire in the first suspension containing the metal nanowire is 10-30mg/ml. Preferably, the diameter of the metal nanowire in the first suspension containing the metal nanowire is 20-50 nanometers, the length of the metal nanowire is 1-3 micrometers, the rotating speed of the first suspension containing the metal nanowire is 3000-5000 revolutions per minute, the rotating time is 50-200 seconds, and the specific steps of the drying treatment are as follows: heating at 90-110 ℃ for 10-20 minutes to form the first metal nanowire shielding layer 8. More preferably, the concentration of the metal nanowires in the first suspension comprising metal nanowires is 10mg/ml, 15mg/ml, 20mg/ml, 25mg/ml or 30mg/ml. The diameter of the metal nanowire in the first suspension containing the metal nanowire is 20-40 nanometers or 30-50 nanometers, the length of the metal nanowire is 1-3 micrometers, the rotating speed of the first suspension containing the metal nanowire is 3000 revolutions per minute, 4000 revolutions per minute or 5000 revolutions per minute, the rotating time is 80-150 seconds, and the specific steps of drying treatment are as follows: heating at 100-110deg.C for 15-20 min.
As shown in fig. 4, in step 6), a second solution containing a resin material is spin-coated on the carrier 1, wherein the concentration of the resin material in the second solution containing a resin material is 50-100mg/ml, followed by a baking treatment to form a second resin layer 9, the second resin layer 9 conformally covering the carrier 1, the first semiconductor device 21, the second semiconductor device 22, and the third semiconductor device 23.
Wherein in the step 6), the resin material in the second solution includes one of epoxy resin, acrylic resin, silica gel, BCB, polyvinyl alcohol, polystyrene, and PMMA, PET, PC, and in a specific embodiment, the concentration of the resin material in the second solution containing the resin material is 50mg/ml, 60mg/ml, 70mg/ml, 80mg/ml, 90mg/ml, or 100mg/ml. Spin coating is carried out at a rotational speed of 2000-5000 rpm, specifically 2500 rpm, 3000 rpm, 3500 rpm, 4000 rpm, 4500 rpm, for 60 seconds, 100 seconds or 200 seconds, followed by heat treatment at 90 ℃, 100 ℃ or 110 ℃ for 10 minutes, 20 minutes or 30 minutes.
As shown in fig. 5, in step 7), a third mask 10 is provided on the carrier 1, the third mask 10 exposing only the region where the third semiconductor device 23 is located, followed by spin-coating a second metal nanowire-containing suspension, followed by a baking process to form a second metal nanowire shielding layer 11, the second metal nanowire shielding layer 11 covering only the upper surface and the side surfaces of the third semiconductor device, followed by removing the third mask 10.
In the step 7), the metal nanowire in the second suspension containing the metal nanowire is one of a gold nanowire, a silver nanowire, a copper nanowire, a nickel nanowire, a copper cobalt nanowire and a copper cobalt nickel nanowire, the concentration of the metal nanowire in the second suspension containing the metal nanowire is 5-20mg/ml, and the concentration of the metal nanowire in the second suspension containing the metal nanowire is smaller than the concentration of the metal nanowire in the first suspension containing the metal nanowire. Preferably, the diameter of the metal nanowire in the second suspension containing the metal nanowire is 60-90 nanometers, the length of the metal nanowire is 4-8 micrometers, the rotating speed of the second suspension containing the metal nanowire is 3000-5000 revolutions per minute, the rotating time is 50-200 seconds, and the specific steps of the drying treatment are as follows: heating at 90-110 ℃ for 10-20 minutes to form the second metal nanowire shielding layer 11. More preferably, the concentration of the metal nanowires in the second suspension comprising metal nanowires is 5mg/ml, 7mg/ml, 9mg/ml, 12mg/ml or 18mg/ml. The diameter of the metal nanowire in the second suspension containing the metal nanowire is 60-80 nanometers or 70-90 nanometers, the length of the metal nanowire is 5-7 micrometers, the rotating speed of the suspension containing the metal nanowire is 3000 rpm, 4000 rpm or 5000 rpm, the rotating time is 80-150 seconds, and the specific steps of the drying treatment are as follows: heating at 100-110deg.C for 15-20 min.
As shown in fig. 6, in step 8), a resin encapsulation layer 12 is then formed on the carrier 1, the material of the resin encapsulation layer 12 including an epoxy resin, and the resin encapsulation layer 12 is formed by a molding process.
In the packaging method of the semiconductor device, a first mask is used for depositing a metal material on the first semiconductor device and the second semiconductor device to form a first metal shielding layer, then a second mask is used for spin-coating a suspension containing metal nanowires on the first semiconductor device to form a first metal nanowire shielding layer, and finally a third mask is used for spin-coating a suspension containing metal nanowires on the third semiconductor device to form a second metal nanowire shielding layer, so that different shielding layers are formed for different semiconductor devices. The use amount of the metal nanowires is reduced while ensuring the electromagnetic shielding effect of each semiconductor device. The packaging method is simple and feasible, reduces the application of large-scale equipment, can form the packaging structure with the metal nanowire shielding layer through a low-temperature spin coating method, and reduces the manufacturing cost.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that changes and modifications may be made without departing from the principles of the invention, such changes and modifications are also intended to be within the scope of the invention.
Claims (7)
1. A method of packaging a semiconductor device, characterized by: the method comprises the following steps:
1) Providing a carrier, and arranging a first semiconductor device, a second semiconductor device and a third semiconductor device on the carrier;
2) Depositing a first thin layer of dielectric on the carrier, the first thin layer of dielectric conformally covering the carrier, the first semiconductor device, the second semiconductor device, and the third semiconductor device;
3) Spin-coating a first solution containing a resin material on the carrier, wherein the concentration of the resin material in the first solution containing the resin material is 30-60mg/ml, and then performing a drying treatment to form a first resin layer which conformally covers the carrier, the first semiconductor device, the second semiconductor device and the third semiconductor device;
4) Next, a first mask is arranged on the carrier, the first mask exposes only the upper surface and the side surface of the first semiconductor device and the upper surface and the side surface of the second semiconductor device, then a metal material is deposited to form a first metal shielding layer, the first metal shielding layer covers the upper surface and the side surface of the first semiconductor device and the upper surface and the side surface of the second semiconductor device, and then the first mask is removed;
5) Next, disposing a second mask on the carrier, the second mask exposing only the upper and side surfaces of the first semiconductor device, then spin-coating a first suspension containing metal nanowires, then performing a baking process to form a first metal nanowire shielding layer, the first metal nanowire shielding layer covering only the upper and side surfaces of the first semiconductor device, then removing the second mask;
6) Spin-coating a second solution containing a resin material on the carrier, wherein the concentration of the resin material in the second solution containing the resin material is 50-100mg/ml, and then performing a drying treatment to form a second resin layer conformally covering the carrier, the first semiconductor device, the second semiconductor device and the third semiconductor device;
7) Then, a third mask is arranged on the carrier, the third mask exposes only the area where the third semiconductor device is located, then, a second suspension containing metal nanowires is spin-coated, then, drying treatment is carried out, so that a second metal nanowire shielding layer is formed, the second metal nanowire shielding layer only covers the upper surface and the side surface of the third semiconductor device, and then, the third mask is removed;
8) A resin encapsulation layer is then formed over the carrier.
2. The packaging method of a semiconductor device according to claim 1, wherein: in the step 2), the first dielectric thin layer is formed by a PECVD method, an ALD method, a thermal oxidation method or a PVD method, the material of the first dielectric thin layer is one of silicon oxide, zirconium oxide, hafnium oxide, silicon nitride, silicon oxynitride, tantalum oxide and aluminum oxide, and the thickness of the first dielectric thin layer is 20-50 nanometers.
3. The packaging method of a semiconductor device according to claim 1, wherein: in the steps 3) and 6), the resin materials in the first solution and the second solution each include one of epoxy resin, acrylic resin, silica gel, BCB, polyvinyl alcohol, polystyrene, PMMA, PET, PC.
4. The packaging method of a semiconductor device according to claim 1, wherein: in the step 4), the metal material includes one or more of gold, copper, aluminum, nickel, cobalt, iron, silver, palladium and titanium, and the deposition method of the first metal shielding layer is one or more of thermal evaporation, magnetron sputtering, electron beam evaporation, electroplating and electroless plating.
5. The packaging method of a semiconductor device according to claim 1, wherein: in the step 5), the metal nanowire in the first suspension containing the metal nanowire is one of a gold nanowire, a silver nanowire, a copper nanowire, a nickel nanowire, a copper cobalt nanowire and a copper cobalt nickel nanowire, and the concentration of the metal nanowire in the first suspension containing the metal nanowire is 10-30mg/ml.
6. The packaging method of a semiconductor device according to claim 1, wherein: in the step 7), the metal nanowire in the second suspension containing the metal nanowire is one of a gold nanowire, a silver nanowire, a copper nanowire, a nickel nanowire, a copper cobalt nanowire and a copper cobalt nickel nanowire, the concentration of the metal nanowire in the second suspension containing the metal nanowire is 5-20mg/ml, and the concentration of the metal nanowire in the second suspension containing the metal nanowire is smaller than the concentration of the metal nanowire in the first suspension containing the metal nanowire.
7. The packaging method of a semiconductor device according to claim 1, wherein: in the step 8), the material of the resin encapsulation layer includes an epoxy resin, and the resin encapsulation layer is formed through a molding process.
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| CN102610590A (en) * | 2011-01-24 | 2012-07-25 | 群成科技股份有限公司 | EMI shielding in a package module |
| TW201606977A (en) * | 2014-08-08 | 2016-02-16 | 日月光半導體製造股份有限公司 | Method of manufacturing electronic package module and structure of electronic package module |
| CN107431048A (en) * | 2015-04-07 | 2017-12-01 | 天津威盛电子有限公司 | Semiconductor package assembly and a manufacturing method thereof |
| CN108074887A (en) * | 2016-11-14 | 2018-05-25 | 艾马克科技公司 | Semiconductor device and its manufacturing method |
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| US20090091907A1 (en) * | 2007-10-09 | 2009-04-09 | Huang Chung-Er | Shielding structure for electronic components |
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| CN102610590A (en) * | 2011-01-24 | 2012-07-25 | 群成科技股份有限公司 | EMI shielding in a package module |
| TW201606977A (en) * | 2014-08-08 | 2016-02-16 | 日月光半導體製造股份有限公司 | Method of manufacturing electronic package module and structure of electronic package module |
| CN107431048A (en) * | 2015-04-07 | 2017-12-01 | 天津威盛电子有限公司 | Semiconductor package assembly and a manufacturing method thereof |
| CN108074887A (en) * | 2016-11-14 | 2018-05-25 | 艾马克科技公司 | Semiconductor device and its manufacturing method |
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