CN111579220B - Resolution ratio board - Google Patents
Resolution ratio board Download PDFInfo
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- CN111579220B CN111579220B CN202010475489.3A CN202010475489A CN111579220B CN 111579220 B CN111579220 B CN 111579220B CN 202010475489 A CN202010475489 A CN 202010475489A CN 111579220 B CN111579220 B CN 111579220B
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- line pair
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- pair pattern
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01M—TESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES; TESTING OF STRUCTURES OR APPARATUS, NOT OTHERWISE PROVIDED FOR
- G01M11/00—Testing of optical apparatus; Testing structures by optical methods not otherwise provided for
- G01M11/02—Testing optical properties
- G01M11/0207—Details of measuring devices
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01M—TESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES; TESTING OF STRUCTURES OR APPARATUS, NOT OTHERWISE PROVIDED FOR
- G01M11/00—Testing of optical apparatus; Testing structures by optical methods not otherwise provided for
- G01M11/02—Testing optical properties
- G01M11/0242—Testing optical properties by measuring geometrical properties or aberrations
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- Chemical & Material Sciences (AREA)
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- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
Abstract
The invention discloses a resolution board, which comprises a substrate and at least one resolution test pattern arranged on the substrate and used for testing the resolution of an imaging system, wherein each resolution test pattern comprises a central visual field line pair pattern, a full visual field line pair pattern and a plurality of edge marked lines used for marking the boundary position of the resolution test pattern, and in the plurality of edge marked lines, the intersection point of two intersected edge marked lines is provided with a coordinate used for marking the intersection point position. The invention can test the resolution capability of the imaging system and other optical parameters of the imaging system, such as distortion, and has wider application range.
Description
Technical Field
The invention relates to the field of imaging system testing, in particular to a resolution board for testing optical parameters of an imaging system.
Background
Resolution boards are commonly used in determining or confirming the performance of an optical system or camera resolution. As shown in fig. 1, a prior art resolution board for detecting the resolution of an imaging system includes only line pairs disposed at a central field of view, and the sizes of the line pairs are relatively fixed. The resolution plate can only test an imaging system with fixed resolution, namely the resolution plate is only suitable for testing the imaging system with one resolution and cannot be suitable for testing the imaging systems with other resolutions, so that the compatibility of the resolution plate is poor, the resolution plate can only test the resolution capability of the imaging system, and other optical parameters, such as distortion, magnification and the like, cannot be tested. Meanwhile, the resolution board can only test the central field of view, and cannot test the imaging quality of the edge field of view.
Therefore, a need exists for a resolution board that can test other optical parameters of the imaging system, and can test the quality of the fringe field imaging.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a resolution board capable of testing the optical parameters of an imaging system and the imaging quality of an edge field.
In order to achieve the purpose, the invention provides the following technical scheme: a resolution ratio board comprises a substrate, wherein at least one resolution ratio test pattern used for testing the resolution ratio of an imaging system is arranged on the substrate, each resolution ratio test pattern comprises a central visual field line pair pattern, a full visual field line pair pattern and a plurality of edge marked lines used for marking the boundary position of the resolution ratio test pattern, and in the edge marked lines, the intersection point of two intersected edge marked lines is provided with a coordinate used for marking the intersection point position.
Preferably, two resolution test patterns for testing different resolutions of the imaging system are arranged on the substrate, and the two resolution test patterns share a central view field line pair pattern.
Preferably, there is an overlapping area of the two resolution test patterns for testing different resolutions of the imaging system.
Preferably, the area formed by the boundary marked by the margin mark line in the resolution test pattern is a rectangular area, a central view field line pair pattern is arranged at the center of the rectangular area, and a full view field line pair pattern is arranged near the top corner.
Preferably, the full field of view line pair pattern is the same as the central field of view line pair pattern.
Preferably, the resolution test pattern further comprises a 0.707 field-of-view line pair pattern for testing the resolution of the imaging system at 0.707 field of view, the 0.707 field-of-view line pair pattern is disposed between the central field-of-view line pair pattern and the full field-of-view line pair pattern, and the 0.707 field-of-view line pair pattern is the same as the central field-of-view line pair pattern.
Preferably, the central field-of-view line pair pattern and the full field-of-view line pair pattern each include a 5um line pair pattern, a 10um line pair pattern, a 15um line pair pattern, and a 20um line pair pattern arranged in two rows and two columns.
Preferably, the first row and the first column are 20um line pair patterns, the first row and the second column are 10um line pair patterns, the second row and the first column are 15um line pair patterns, and the second row and the second column are 5um line pair patterns.
Preferably, the line pair pattern includes a first line pair group arranged in a transverse direction and a second line pair group arranged in a longitudinal direction perpendicular to the transverse direction, and the first line pair group and the second line pair group each include a plurality of line pairs arranged at intervals.
Preferably, the imaging system comprises a DMD chip, and an area formed by the boundary marked by the edge marking in the resolution test pattern is consistent or approximately consistent with the size of the DMD.
Preferably, the imaging system further comprises an optical axis, and the center of the area formed by the boundary marked by the margin mark line in the resolution test pattern is consistent with the center of the optical axis.
The beneficial effects of the invention are:
(1) By setting the edge marked lines and the coordinates, the distortion and the multiplying power of the imaging system can be tested.
(2) By setting the 0.707 view field line pair pattern and the full view field line pair pattern, the test from the local part to the whole part of the imaging system can be realized, the optical parameters of the imaging system under different view fields can be tested, and the whole performance of the imaging system is ensured. Meanwhile, the imaging quality of the imaging system in the marginal field of view can be tested by using the full-field line pair pattern.
(3) The plurality of resolution test patterns are arranged on the substrate, so that the method can be used for testing various resolutions, and the compatibility of a resolution board is improved.
Drawings
FIG. 1 is a schematic diagram of a prior art resolution board;
FIG. 2 is a schematic front view of the present invention;
FIG. 3 is a schematic diagram of the center field-of-view line pair pattern, full field-of-view line pair pattern, and 0.707 field-of-view line pair pattern of FIG. 1.
Reference numerals: 10. substrate, 20, resolution test pattern, 30, center field line pair pattern, 40, full field line pair pattern, 50, fringe reticle, 60, intersection, 70, 0.707 field line pair pattern 70, a, 5um line pair pattern, b, 10um line pair pattern, c, 15um line pair pattern, d, 20um line pair pattern, e, first line pair group, f, second line pair group.
Detailed Description
The technical solution of the embodiment of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention.
The resolution board disclosed by the invention is used for testing the resolution of an imaging system, the imaging system comprises but is not limited to a DMD chip and an optical axis, the resolution board not only can test the resolution capability of the imaging system, but also can test other optical parameters of the imaging system, such as distortion and the like, and the application range is wider.
Referring to fig. 2, a resolution board disclosed in the present invention includes a substrate 10, at least one resolution test pattern 20 for testing a resolution of an imaging system is disposed on the substrate 10, each resolution test pattern 20 includes a central field-of-view line pair pattern 30, a full-field line pair pattern 40, and a plurality of edge markings 50, wherein the central field-of-view line pair pattern 30 is used for testing a resolution of the imaging system at a central field of view, the full-field line pair pattern 40 is used for testing a resolution of the imaging system at a full field of view, and the edge markings 50 are used for marking a boundary position of the resolution test pattern 20. In the plurality of edge markings 50, the intersection point 60 of two intersecting edge markings 50 is provided with corresponding coordinates indicating the position of the intersection point 60. Through setting up marginal graticule 50 and coordinate, can make the resolution ratio board satisfy the test of distortion, multiplying power, simultaneously through setting up the full field of view line to pattern 40, can realize that imaging system is by local to holistic test.
In this embodiment, two resolution test patterns 20 for testing different resolutions of an imaging system are provided on a substrate 10, and a resolution board will be described in detail.
As shown in fig. 2, two resolution test patterns 20 are disposed on the substrate 10, the two resolution test patterns 20 share the central field-of-view line pair pattern 30, and there is an overlapping area of the two resolution test patterns 20. In this embodiment, one of the two resolution test patterns 20 is used for testing XGA resolution and the other is used for testing 1080P resolution. Of course, in other embodiments, the plurality of resolution test patterns 20 may be arranged on the substrate 10 by adjusting the positions of the layout resolution test patterns 20 according to actual requirements to test imaging systems with different resolutions, the plurality of resolution test patterns 20 may share the central field-of-view line pair pattern 30 or may not share the central field-of-view line pair pattern 30, and the plurality of resolution test patterns 20 may or may not have an overlapping region, and may specifically be arranged according to actual requirements.
Further, in the resolution test pattern 20, the area formed by the boundary indicated by the margin mark 50 is a rectangular area, the center of the rectangular area is provided with the central field-of-view line pair pattern 30, and each vertex of the rectangular area and located in the rectangular area is provided with the all-field-of-view line pair pattern 40. Meanwhile, the size of the rectangular area is consistent or approximately consistent with that of the DMD chip, so that the object height can be guaranteed to be consistent with the size of the actual DMD chip, in addition, the center of the rectangular area is kept consistent with the center of the optical axis, the center of the object is guaranteed to be on the optical axis, and the consistency of test conditions is guaranteed.
As shown in FIG. 2, the full field line pair pattern 40 is the same as the central field line pair pattern 30. Specifically, the central field-of-view line pair pattern 30 and the full field-of-view line pair pattern 40 each include 5um line pair patterns a, 10um line pair patterns b, 15um line pair patterns c, and 20um line pair patterns d arranged in two rows and two columns, where the first row and the first column is 20um line pair pattern d, the first row and the second column is 10um line pair pattern b, the second row and the first column is 15um line pair pattern c, and the second row and the second column is 5um line pair pattern a. When the imaging system is tested to be in the central field of view or the full field of view, a user can select the line pair patterns with proper sizes according to the requirements of the imaging system to test the imaging system and test the resolution capability of the imaging system, namely, the line pair patterns which can be finally distinguished are different due to different resolutions of the imaging system, so that the imaging systems with different resolutions can be tested by setting the line pair patterns with different sizes.
Certainly, in other embodiments, the size and the number of the line pair patterns and the arrangement mode of the multiple line pair patterns may also be set according to actual requirements, for example, six line pair patterns arranged in three rows and two columns are set, which are respectively 6um line pair patterns, 8um line pair patterns, 10um line pair patterns, 12um line pair patterns, 14um line pair patterns, 16um line pair patterns, wherein, 6um line pair patterns are set in the first row and the first column, 8um line pair patterns are set in the second row and the first column, 10um line pair patterns are set in the second row and the second column, 12um line pair patterns are set in the second row and the first column, 14um line pair patterns are set in the third row and the second column, and 16um line pair patterns are set in the third row and the second column.
Further, as shown in fig. 3, each line pair pattern includes a first line pair group e and a second line pair group f, wherein the first line pair group e is disposed in a transverse direction, and the second line pair group f is disposed in a longitudinal direction perpendicular to the transverse direction. The first line pair group e and the second line pair group f each include a plurality of line pairs arranged at intervals. In this embodiment, each pair group includes 5 pairs arranged at intervals, and of course, in other embodiments, the number of pairs may be set according to actual requirements. In the above-mentioned 5um line pair pattern, 5um refers to the width of the line pair in the line pair group, and similarly, the other line pair patterns all refer to the width of the line pair in the line pair group in the line pair pattern.
As shown in connection with fig. 2 and 3, in order to enable the resolution board to perform a local-to-global test of the imaging system, each resolution test pattern 20 further includes a 0.707 line-of-view pair pattern 70, and the 0.707 line-of-view pair pattern 70 is used to test the resolution of the imaging system at 0.707 field of view. The test from the local part to the whole part of the imaging system can be realized by setting the 0.707 view field line pair pattern, and the whole performance of the imaging system is ensured. Specifically, 0.707 field line pair pattern 70 is provided between the central field line pair pattern 30 and any one of the full field line pair patterns 40. As shown, the 0.707 field-of-view line pair pattern 70 is the same as the center field-of-view line pair pattern 30 and the full field-of-view line pair pattern 40, and thus is not described in detail.
The resolution board can test the distortion and the multiplying power of an imaging system by setting the edge marked line 50 and the coordinate of the intersection point 60 of the edge marked line 50. Meanwhile, by setting the 0.707 field line pair pattern 70 and the full field line pair pattern 40, the test of the imaging system from the local part to the whole part can be realized, the optical parameters of the imaging system under different fields can be tested, and the integral performance of the imaging system is ensured.
In addition, by providing a plurality of resolution test patterns 20 on the substrate 10, it is possible to test a plurality of resolutions, and to improve the compatibility of the resolution board.
Therefore, the scope of the invention should not be limited to the disclosure of the embodiments, but includes various alternatives and modifications that do not depart from the spirit of the invention and are intended to be covered by the claims of this patent application.
Claims (7)
1. A resolution board is characterized in that the resolution board comprises a substrate, at least one resolution test pattern used for testing the resolution of an imaging system is arranged on the substrate, each resolution test pattern comprises a central visual field line pair pattern, a full visual field line pair pattern and a plurality of edge mark lines used for marking the boundary positions of the resolution test patterns, coordinates used for marking the intersection positions are arranged at the intersection points of two intersected edge mark lines in the edge mark lines, the imaging system comprises a DMD chip and an optical axis, the size of a region formed by the boundaries marked by the edge mark lines in the resolution test patterns is consistent with that of a DMD, the center of the region formed by the boundaries marked by the edges in the resolution test patterns is consistent with that of the optical axis, two resolution test patterns used for testing different resolutions of the imaging system are arranged on the substrate, the two resolution test patterns share the central visual field line pair pattern, and the two resolution test patterns used for testing different resolutions of the imaging system have overlapped regions.
2. The resolution board according to claim 1, wherein the area formed by the boundary of the border marker in the resolution test pattern is a rectangular area, a central field-of-view line pair pattern is disposed at the center of the rectangular area, and a full field-of-view line pair pattern is disposed near the top corners.
3. The resolution board of claim 1, wherein the full field of view line pair pattern is the same as the center field of view line pair pattern.
4. The resolution board of claim 3, wherein the resolution test pattern further comprises a 0.707 field-of-view line pair pattern for testing the resolution of the imaging system at 0.707 field of view, the 0.707 field-of-view line pair pattern is disposed between the center field-of-view line pair pattern and the full field-of-view line pair pattern, and the 0.707 field-of-view line pair pattern is the same as the center field-of-view line pair pattern.
5. The resolution board of claim 3, wherein the central field-of-view line pair pattern and the full field-of-view line pair pattern each comprise a 5um line pair pattern, a 10um line pair pattern, a 15um line pair pattern, and a 20um line pair pattern arranged in two rows and two columns.
6. The resolution board of claim 5, wherein the first row and first column are a 20um line pair pattern, the first row and second column are a 10um line pair pattern, the second row and first column are a 15um line pair pattern, and the second row and second column are a 5um line pair pattern.
7. The resolution board of claim 5, wherein the line pair pattern comprises a first line pair group arranged in a transverse direction and a second line pair group arranged in a longitudinal direction perpendicular to the transverse direction, the first and second line pair groups each comprising a plurality of spaced apart line pairs.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010475489.3A CN111579220B (en) | 2020-05-29 | 2020-05-29 | Resolution ratio board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010475489.3A CN111579220B (en) | 2020-05-29 | 2020-05-29 | Resolution ratio board |
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| Publication Number | Publication Date |
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| CN111579220A CN111579220A (en) | 2020-08-25 |
| CN111579220B true CN111579220B (en) | 2023-02-10 |
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| CN202010475489.3A Active CN111579220B (en) | 2020-05-29 | 2020-05-29 | Resolution ratio board |
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| CN102119326A (en) * | 2008-08-13 | 2011-07-06 | 皇家飞利浦电子股份有限公司 | Measuring and correcting lens distortion in a multispot scanning device |
| CN102798346A (en) * | 2012-07-13 | 2012-11-28 | 天津大学 | Device and method used for on-line optical measurement of two-dimensional large size of roof battenwall material |
| CN103530880A (en) * | 2013-10-16 | 2014-01-22 | 大连理工大学 | Camera calibration method based on projected Gaussian grid pattern |
| CN103731665A (en) * | 2013-12-25 | 2014-04-16 | 广州计量检测技术研究院 | Digital camera image quality comprehensive detection device and method |
| CN104048815A (en) * | 2014-06-27 | 2014-09-17 | 青岛歌尔声学科技有限公司 | Method and system for measuring distortion of lens |
| CN109978959A (en) * | 2019-03-29 | 2019-07-05 | 北京经纬恒润科技有限公司 | A kind of camera radial distortion corrected parameter scaling method, apparatus and system |
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2020
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Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101038713A (en) * | 2006-03-13 | 2007-09-19 | 神基科技股份有限公司 | Pattern generation system process and storage medium for display apparatus test |
| CN102119326A (en) * | 2008-08-13 | 2011-07-06 | 皇家飞利浦电子股份有限公司 | Measuring and correcting lens distortion in a multispot scanning device |
| CN201364235Y (en) * | 2008-12-30 | 2009-12-16 | 上海徕木电子股份有限公司 | Television line chart board for testing resolving power of photoelectric imaging system |
| CN102798346A (en) * | 2012-07-13 | 2012-11-28 | 天津大学 | Device and method used for on-line optical measurement of two-dimensional large size of roof battenwall material |
| CN103530880A (en) * | 2013-10-16 | 2014-01-22 | 大连理工大学 | Camera calibration method based on projected Gaussian grid pattern |
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| CN111579220A (en) | 2020-08-25 |
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