CN111555254B - DC charging pile harmonic compensation control method based on PWM rectification circuit - Google Patents
DC charging pile harmonic compensation control method based on PWM rectification circuit Download PDFInfo
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- CN111555254B CN111555254B CN202010332753.8A CN202010332753A CN111555254B CN 111555254 B CN111555254 B CN 111555254B CN 202010332753 A CN202010332753 A CN 202010332753A CN 111555254 B CN111555254 B CN 111555254B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J1/00—Circuit arrangements for dc mains or dc distribution networks
- H02J1/02—Arrangements for reducing harmonics or ripples
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
Abstract
The invention provides a harmonic compensation control method of a direct current charging pile based on a PWM (pulse-width modulation) rectification circuit, which is characterized by detecting the input current of a nonlinear load and judging whether the nonlinear load has harmonic according to the detected input current, and if the nonlinear load has the harmonic, controlling the direct current charging pile based on the PWM rectification circuit to operate in an APF (active power filter) mode to compensate the harmonic for the nonlinear load. The invention utilizes the hardware resource of the PWM rectification circuit and realizes the functions of compensating harmonic waves, reactive power and unbalanced current by APF in a way of adding software codes. The PWM rectification circuit only needs to meet the requirements of the APF on a hardware circuit structure, is not limited to specific circuit topologies of two levels, three bridge arms, four bridge arms and the like, is not limited to specific control algorithms of the APF, and increases the application range of the APF.
Description
Technical Field
The invention belongs to the technical field of charging circuits, and particularly relates to a direct current charging pile harmonic compensation control method based on a PWM (pulse width modulation) rectification circuit.
Background
The direct current charging pile usually adopts rectifying equipment, and the operation of the large-scale direct current charging pile can generate a large amount of harmonic waves to influence the operation of a power grid, such as increasing the electric energy loss of a power transmission line, reducing a power factor, reducing the reliability of relay protection, and interfering the stable operation of a control system. Therefore, harmonic wave governing problems need to be considered in the construction of the direct current charging pile, and common governing modes comprise twelve-pulse-wave rectification, installation of an independent Active Power Filter (APF) or PWM (pulse-width modulation) rectification.
However, the existing rectification mode has different defects, for example, six-pulse rectification is improved to twelve-pulse rectification, so that low-order harmonics are eliminated, and still more 11-order and 13-order harmonics exist; the installation of the APF meets the requirement of harmonic compensation, but the cost is high; the PWM rectification has the best effect, but has the highest cost and less application.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, provides a direct current charging pile harmonic compensation control method based on a PWM (pulse width modulation) rectification circuit, and can at least solve the problems of incomplete harmonic elimination, high cost and the like in the prior art.
In order to achieve the above purpose, the invention provides the following technical scheme:
a harmonic compensation control method for a direct current charging pile based on a PWM rectification circuit comprises the following steps: detecting the input current of a nonlinear load, judging whether harmonic waves exist in the nonlinear load according to the input current, and if the harmonic waves exist, controlling the direct current charging pile based on the PWM rectifier circuit to operate in an APF mode to compensate the harmonic waves for the nonlinear load.
Further, when the direct current charging pile based on the PWM rectifying circuit is normally charged, the residual capacity which is not used for charging is operated in an APF mode; when the direct current charging pile based on the PWM rectifying circuit is not charged, the capacity of the direct current charging pile based on the PWM rectifying circuit is completely used for an APF mode.
Further, the nonlinear load is a direct current charging pile without harmonic compensation, and the input current is a current on an alternating current side of the direct current charging pile without harmonic compensation.
Furthermore, the direct current side of the direct current charging pile based on the PWM rectification circuit is connected with an inversion and high-frequency rectification circuit.
Furthermore, when the input current of the nonlinear load is detected, harmonic current detection based on dq conversion is adopted, current tracking adopts dead-beat control of an embedded repetitive controller, and modulation adopts space voltage vector pulse width modulation.
Further, the dq conversion-based harmonic current detection includes: and collecting the current of the nonlinear load, and sequentially carrying out dq conversion, low-pass filtering and dq inverse conversion on the collected current to obtain the harmonic current.
Compared with the closest prior art, the technical scheme provided by the invention has the following excellent effects:
the invention provides a harmonic compensation control method of a direct current charging pile based on a PWM (pulse-width modulation) rectification circuit, wherein the PWM rectification of the direct current charging pile with the harmonic compensation function can ensure that the current waveform of the direct current charging pile is sinusoidal and has few harmonics, and on the basis, the direct current charging pile acquires current data of other nonlinear loads on an alternating current side and compensates the harmonic current of the nonlinear loads by utilizing a built-in APF (active power filter) function. When the direct current charging pile with the harmonic compensation function is normally charged, the residual capacity can be used as APF, and if charging is not needed, the direct current charging pile with the harmonic compensation function is completely equivalent to 1 independent APF.
The invention fully utilizes the hardware resources of the PWM rectification circuit and realizes the functions of compensating harmonic waves, reactive power and unbalanced current by APF in a way of adding software codes. The PWM rectification circuit only needs to meet the requirements of the APF on a hardware circuit structure, is not limited to specific circuit topologies of two levels, three bridge arms, four bridge arms and the like, is not limited to specific control algorithms of the APF, and greatly increases the application range of the APF.
Drawings
Fig. 1 is a schematic diagram illustrating connection between a dc charging pile with a harmonic compensation function and a power supply and a nonlinear load according to an embodiment of the present invention;
FIG. 2 is a two-level topology of an embodiment of the present invention;
FIG. 3 is a three-level topology of an embodiment of the present invention;
FIG. 4 is a topology diagram of a four leg bridge of an embodiment of the present invention;
FIG. 5 is a control block diagram of a three-phase software phase-locked loop based on dq transformation according to an embodiment of the present invention;
FIG. 6 is a block diagram of a dq transformation based harmonic extraction algorithm control in an embodiment of the present invention;
FIG. 7 is a control block diagram of a deadbeat control algorithm with an embedded repetitive controller in accordance with an embodiment of the present invention;
fig. 8 is a schematic diagram of a three-level space vector modulation algorithm according to an embodiment of the present invention.
In the figure: 1. a power source; 2. a non-linear load; 3. a direct current charging pile with a specific harmonic compensation function; 4. a current transformer.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived from the embodiments of the present invention by a person skilled in the art, are within the scope of the present invention.
The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings. It should be noted that the embodiments and features of the embodiments of the present invention may be combined with each other without conflict.
In the description of the present invention, the directions or positional relationships indicated are based on those shown in the drawings, and are only for convenience of describing the present invention but do not require the present invention to be necessarily constructed and operated in a specific direction, and thus, should not be construed as limiting the present invention. The terms "connected" and "connected" used herein should be interpreted broadly, and may include, for example, a fixed connection or a detachable connection; they may be directly connected or indirectly connected through intermediate members, and specific meanings of the above terms will be understood by those skilled in the art as appropriate.
As shown in fig. 1, in this embodiment, the dc charging pile 3 with the specific harmonic compensation function detects an input current of the nonlinear load 2, and determines whether a harmonic exists in the nonlinear load 2 according to the input current, if so, the dc charging pile 3 based on the PWM rectification circuit operates in an APF mode to compensate the harmonic for the nonlinear load 2, and the power supply 1 in fig. 1 supplies power to the nonlinear load 2 and the dc charging pile 3 with the harmonic compensation function.
When the direct current charging pile 3 based on the PWM rectification circuit is in normal charging, the residual capacity which is not used for charging is operated in an APF mode; when the direct current charging pile 3 based on the PWM rectification circuit is not charged, the capacity of the direct current charging pile 3 based on the PWM rectification circuit is completely used for the APF mode. When the charging pile is normally charged, the calculation mode of the residual capacity is as follows: the maximum current peak value which can flow through the rectification circuit is set as I max The normal charging current of the charging pile is i p The harmonic current compensated by APF is i c . Only i needs to be guaranteed p +i c Current peak value of less than I max Maximum i that can be actually issued c I.e. the remaining capacity. Charging current of charging pile during operation is fundamental wave active current, APF compensation current is harmonic current, and two parts of current are directly superposed, namelyIt is possible, but desirable, to ensure that the total current peak does not exceed I max 。
The nonlinear load in this embodiment is the direct current that does not have the harmonic compensation function and fills electric pile, and the input current is the direct current that does not have the harmonic compensation function and fills electric pile alternating current side's electric current, and the direct current that fills electric pile direct current side based on PWM rectifier circuit simultaneously is connected with contravariant, high frequency rectifier circuit. When the input current of the nonlinear load 2 is detected, harmonic, reactive and unbalanced current detection based on dq conversion is adopted, current tracking adopts dead-beat control of an embedded repetitive controller, and modulation adopts space voltage vector pulse width modulation. In other embodiments, the nonlinear load may also be other loads with harmonic or reactive or unbalanced current, such as a computer, an ac charging pile, a variable frequency governor, and other electric devices, which is not limited in this embodiment.
The embodiment fully utilizes hardware resources of the PWM rectification circuit and realizes the functions of compensating harmonic waves, reactive power and unbalanced current by the APF in a mode of adding software codes. The PWM rectifier circuit is not limited to the two-level, three-level and four-leg topology structure shown in fig. 2 to 4, nor to the specific control algorithm of the APF, as long as it meets the APF requirement.
In this embodiment, the three-phase four-wire three-level three-bridge arm neutral-line direct-connection topology structure in fig. 3 is selected as the hardware topology of the PWM rectifier circuit, and other structures may be selected in other embodiments. In the software algorithm, a software phase-locked loop based on dq conversion is adopted for phase locking, harmonic, reactive and unbalanced current detection based on dq conversion is adopted for current detection, dead-beat control of an embedded repetitive controller is adopted for current tracking, and space voltage vector pulse width modulation (SVPWM) is adopted for modulation.
Specifically, the three-phase three-level three-bridge arm in fig. 3 is an a-phase three-level three-bridge arm, a B-phase three-level three-bridge arm and a C-phase three-level three-bridge arm, and includes three T-type three-level bridge arms connected in parallel, and the central points of the three T-type three-level bridge arms are a, B and C, respectively; the ac terminals (i.e., the center points a, B, and C) of the three-phase three-level three-bridge arm are used to connect an output filter, in this embodiment, an LCL filter is used, a, B, C, and N of the LCL filter are directly connected to the power distribution network, and the dc terminals of the three-phase three-level three-bridge arm are connected to the output terminal of the dc unit. When the circuit structure in fig. 3 is used for performing APF compensation, the points a, B, C, and N4 are connected to a power distribution network as output terminals to implement harmonic compensation for nonlinear loads.
The direct current unit comprises two capacitors C1 and C2 which are connected in series, the series point (point 0 in figure 3) of the two capacitors is connected with an N line, and two ends of the two capacitors after being connected in series are used as output ends of the direct current unit.
One end of the N line is connected with a series point of two capacitors in the direct current unit, and the other end of the N line is used for connecting a three-phase alternating current power supply; meanwhile, the central points a, b and c are respectively connected with the series point of the two capacitors in the dc unit through the bidirectional conduction switch tube, as shown in fig. 3, the central point a is connected with the point 0 through the bidirectional conduction switch tube T7, the central point b is connected with the point 0 through the bidirectional conduction switch tube T8, and the central point c is connected with the point 0 through the bidirectional conduction switch tube T9.
In this embodiment, the ac terminals, i.e., the center points a, b, and c, of the three-phase three-level three-bridge arm are respectively connected to the three-phase ac power supply through two inductors connected in series, as shown in fig. 3, the center point a is connected to the inductors L1 and L2, the center point b is connected to the inductors L3 and L4, and the center point c is connected to the inductors L5 and L6; the series point of the two inductors corresponding to each bridge arm is connected with the N line through the capacitor and the resistor which are arranged in series, as shown in fig. 3, the connection point of the inductor L1 and the inductor L2 is connected with the N line through the capacitor C3 and the resistor R1, the connection point of the inductor L3 and the inductor L4 is connected with the N line through the capacitor C4 and the resistor R2, and the connection point of the inductor L5 and the inductor L6 is connected with the N line through the capacitor C5 and the resistor R3.
The PWM rectification of the direct current charging pile with the harmonic compensation function can ensure that the charging current waveform of the direct current charging pile is sinusoidal, the harmonic is few, on the basis, the direct current charging pile collects current data on the alternating current side of other conventional charging piles, and the harmonic current of other conventional charging piles is compensated by utilizing the built-in APF function. When the direct current charging pile with the harmonic compensation function is normally charged, the residual capacity can be used as APF, and if charging is not needed, the direct current charging pile with the harmonic compensation function is completely equivalent to 1 independent APF.
The embodiment relates to a phase-locked loop and harmonic detection algorithm, a dead beat and repetitive control algorithm and an SVPWM algorithm. The phase-locked loop provides a phase, the harmonic detection provides a target current, the dead beat is responsible for converting the target current into a three-phase target voltage, the three-phase target voltage is used as an SVPWM control algorithm input, and the SVPWM control algorithm output can be directly used for driving the IGBT in the graph 3.
The APF usually uses a software phase-locked loop based on fourier transform or dq transform, and the embodiment adopts a three-phase software phase-locked loop based on dq transform. The basic operation principle of a three-phase-locked loop based on dq conversion is shown in FIG. 5, u a ,u b ,u c Respectively representing the collected three-phase voltage of the system, pll pi Represents u d The PI regulation result of (1); 2 pi f c Representing the nominal angular frequency, f, of the grid c Typically 50Hz; w is a c Representing the angular frequency of the phase lock; f represents the actual grid frequency of the phase lock; t is s Representing a switching period, with a 10kHz switching frequency corresponding to 100 mus; phi represents the real-time phase angle of the phase lock and is fed back to the dq transformation formula. If the dq transformation matrix is completely consistent with the angular frequency and the initial phase angle of the fundamental positive sequence voltage, u d Is 0, i.e. u d Representing the actual phase-locked error signal, and hence for u d And the phase locking of the fundamental wave positive sequence voltage can be realized by performing PI regulation.
Accurate harmonic component detection is one of the preconditions of APF compensation, and the embodiment adopts a harmonic detection method based on dq transformation. The detection method of dq transformation is essentially to convert the alternating current quantity of a certain specific frequency in the abc coordinate system into the direct current quantity in the dq coordinate system, while the alternating current quantities of other frequencies in the abc coordinate system are still the alternating current quantities in the dq coordinate system, and a low-pass filter can be used for realizing the detection of a certain harmonic component. Taking the 5 th negative sequence harmonic as an example, as shown in FIG. 6, i la 、i lb 、i lc Representing the collected nonlinear load current, and the dq transformation and the dq inverse transformation use phase information detected by a phase-locked loop; i.e. i dp And i qp Represents the result of 5 negative-sequence dq transformations; i all right angle dp1 And i qp1 Means to filter most of the non-5 negative sequence harmonic correspondencesDq transformation results of the stream components; i.e. i ra 、i rb 、i rc The result of the inverse 5-th negative-sequence dq transformation, i.e. the detected 5-th negative-sequence harmonic current, is shown.
The current tracking control strategy determines parameters such as compensation accuracy, tracking capability and response speed of the APF, so that the design of a proper control strategy is very important. In the embodiment, a dead-beat control algorithm is selected in the current execution link, and the actual steady-state performance is not ideal due to poor disturbance resistance of dead-beat control, so that the current execution link is combined with a repetitive controller to improve the steady-state performance. When dead-beat control of an embedded repetitive controller is adopted, after APF output current is stable, the amplitude value is closer to a target value, the waveform is more ideal, but the peak caused by the repetitive controller is more serious when the current suddenly increases, namely the steady-state performance is better, and the dynamic performance is poorer. The deadbeat control algorithm control block diagram of the embedded repetitive controller is shown in fig. 7.
Space voltage vector pulse width modulation (SVPWM) and Sinusoidal Pulse Width Modulation (SPWM) are two common three-level modulation methods, SVPWM synthesizes target output voltages of a three-phase inverter into space voltage vectors in an alpha beta 0 coordinate system, different switching vector combinations are utilized to approximate the target space voltage vectors, and compared with the traditional SPWM, the harmonic compensation effect is relatively good. SVPWM is adopted in the embodiment. As shown in fig. 8, the method includes sector selection, vector time slice calculation, and midpoint potential control. The midpoint potential control is realized by selecting a vector combination mode most favorable for midpoint potential balance.
Other embodiments of the present technology will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the technology following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the technology pertains and as may be applied to the essential features hereinbefore set forth. The specification and examples are to be considered as exemplary only, and the technical scope of the present invention is not limited to the content of the specification, and must be determined in accordance with the scope of the present application.
It will be understood that the present application is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the application is only limited by the content of the appended representative protection scope.
Claims (5)
1. A direct current charging pile harmonic compensation control method based on a PWM rectification circuit is characterized by comprising the following steps: detecting input current of a nonlinear load, judging whether harmonic waves exist in the nonlinear load according to the input current, and if the harmonic waves exist in the nonlinear load, controlling the direct current charging pile based on the PWM rectifier circuit to operate in an APF mode to compensate the harmonic waves for the nonlinear load;
when the direct current charging pile based on the PWM rectifying circuit is normally charged, the residual capacity which is not used for charging is operated in an APF mode; when the direct current charging pile based on the PWM rectifying circuit is not charged, the capacity of the direct current charging pile based on the PWM rectifying circuit is completely used for an APF mode.
2. The PWM rectifier circuit-based DC charging post harmonic compensation control method according to claim 1, wherein the nonlinear load is a DC charging post without harmonic compensation, and the input current is a current on an AC side of the DC charging post without harmonic compensation.
3. The PWM rectifier circuit-based DC charging post harmonic compensation control method according to claim 1, wherein an inverter and high-frequency rectifier circuit is connected to the DC side of the DC charging post of the PWM rectifier circuit.
4. The PWM rectifier circuit-based DC charging pile harmonic compensation control method as claimed in claim 1, wherein when detecting the input current of the nonlinear load, the harmonic current detection based on dq conversion is adopted, the current tracking adopts dead-beat control of an embedded repetitive controller, and the modulation adopts space voltage vector pulse width modulation.
5. The PWM rectifier circuit-based DC charging pile harmonic compensation control method according to claim 4, wherein the dq conversion-based harmonic current detection comprises: and collecting the current of the nonlinear load, and sequentially carrying out dq conversion, low-pass filtering and dq inverse conversion on the collected current to obtain the harmonic current.
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CN106300581A (en) * | 2016-07-01 | 2017-01-04 | 李红彪 | A kind of monitoring method of the charging pile detecting and filtering harmonic wave |
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CN110912131A (en) * | 2019-11-21 | 2020-03-24 | 武汉纺织大学 | Harmonic current control method for electric vehicle charging equipment |
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