CN110912130A - Circuit structure of double-alternating-current bus grid-connected converter and harmonic compensation method thereof - Google Patents

Circuit structure of double-alternating-current bus grid-connected converter and harmonic compensation method thereof Download PDF

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CN110912130A
CN110912130A CN201911070588.7A CN201911070588A CN110912130A CN 110912130 A CN110912130 A CN 110912130A CN 201911070588 A CN201911070588 A CN 201911070588A CN 110912130 A CN110912130 A CN 110912130A
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voltage
current
power unit
grid
filter
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姬忠凯
何晋伟
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Tianjin University
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Tianjin University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01—Arrangements for reducing harmonics or ripples
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/18—Arrangements for adjusting, eliminating or compensating reactive power in networks
    • H02J3/1821—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators
    • H02J3/1835—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators with stepless control
    • H02J3/1842—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators with stepless control wherein at least one reactive element is actively controlled by a bridge converter, e.g. active filters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30—Reactive power compensation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40—Arrangements for reducing harmonics

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Abstract

The invention discloses a circuit structure of a double-alternating-current bus grid-connected converter and a harmonic compensation method thereof, wherein the circuit structure comprises an upper layer power unit, a lower layer power unit and respective filters thereof; wherein the upper layer power unit and the lower layer power unit comprise a cascade H bridge and a distributed power supply; the filter comprises an LCL or LC filter; each filter is provided with a detection device for detecting the current of an inductor and the voltage of a capacitor in the LCL or LC filter; also relates to a harmonic compensation method of the circuit, which comprises the following steps: the lower tier power cell converter at the lower voltage level operates in a Voltage Control Mode (VCM) to supply a critical load to the local to reduce voltage harmonic content. Meanwhile, an upper layer power unit converter at a higher voltage level is arranged between a main power grid and a lower layer unit, and works in a Current Control Mode (CCM) to suppress harmonic current in a local nonlinear load.

Description

Circuit structure of double-alternating-current bus grid-connected converter and harmonic compensation method thereof
Technical Field
The invention relates to the technical field of harmonic compensation electric energy quality, in particular to a circuit and a method for harmonic compensation of power supply voltage and power grid current by adopting an improved cascade H-bridge as a grid-connected converter in a low-voltage and medium-voltage double-alternating-current bus, which are used for improving the electric energy quality.
Background
Today, the extensive use of distributed energy resources has been integrated into modern power distribution systems. To better operate multiple distributed energy sources, techniques for controlling a microgrid through the regulation of an interface converter system have been rapidly developed. In recent years, a plurality of distributed energy sources are integrated by using a multi-port converter through adjustment of a grid-connected interface converter, so that the flexibility of a system is further exerted, and the cost is reduced.
However, with the large number of accesses of distributed power generation units, the power quality problem becomes more severe. Multi-function power converters in past Distributed Generation (DG) have focused primarily on local load harmonic current compensation, similar to the operation of conventional active power filters. But the extraction of the load harmonic current increases the computational burden on the controller. In addition, for the problem of voltage harmonics in power supply, a voltage control parallel connection DG unit is usually adopted to directly reduce the power supply voltage harmonics. However, when the grid voltage is distorted, more grid current harmonics are generated. The use of a specific Unified Power Quality Conditioner (UPQC) for simultaneous harmonic voltage and current compensation has been an effective solution in the past. However, the functionality of the UPQC is difficult to integrate into parallel DG units. Also for conventional UPQC, both grid voltage and load current harmonic components must be extracted, which is undoubtedly a burden for low cost controllers with limited computing power.
Multi-port converter applications are being extensively studied in connection with power supplies that are more widely interconnected. A plurality of low-voltage photovoltaic arrays are interconnected by a Cascade H Bridge (CHB), and the maximum power point of each power supply unit is independently tracked by a centralized controller. If the DC bus voltage of the power supply unit is high enough, a higher voltage device or a large number of series-connected cascade power supply units, namely CHB converters, can be directly integrated into a medium-voltage distribution system of 6kV or 10 kV. Previous research on the application of three-phase cascaded converters to distributed power supplies has mainly focused on power control, and few have discussed the use of such converters as an active power regulating device to solve both voltage and current harmonics problems.
Disclosure of Invention
The invention aims to overcome the defects in the prior art, provides a circuit topology which is applied to a medium-low voltage network and is used for improving a cascade H bridge as a grid-connected converter, and provides a synchronous compensation harmonic voltage and current control method. The lower power cells in the proposed converter system are provided with LC output filters which are used to provide an improvement of the local load supply voltage quality in the low voltage network. The upper power unit is connected with a higher power grid voltage by an LCL filter, and the upper power unit is used as a harmonic current compensator, so that the current quality of the power grid can be effectively improved.
The purpose of the invention is realized by the following technical scheme:
a circuit structure of a double-alternating-current bus grid-connected converter is composed of an upper layer power unit, a lower layer power unit and respective filters of the upper layer power unit and the lower layer power unit; wherein, the upper layer power unit is arranged between the high-voltage alternating current bus and the low-voltage alternating current bus, one side of the upper layer power unit is connected with the input side of the upper layer power unit filter, and the other side is connected with the output side of the lower layer power unit filter; the lower layer power unit is connected with the input side of the lower layer power unit filter; the output side of the upper power unit filter is connected with a 6kV/10kV power grid; the output side of the lower power unit filter is used as a low-voltage alternating current bus, and the low-voltage alternating current bus is provided with a local load; each filter is provided with a detection device for detecting the current of an inductor in the filter and the voltage of a capacitor;
furthermore, the upper layer power unit and the lower layer power unit are both composed of cascaded H bridges; the direct current bus of each H-bridge is connected to a distributed power supply or a load, and the output sides of two adjacent H-bridge units are connected in series.
Furthermore, the lower layer power unit filter is an LC filter, and the inductance and the capacitance of the LC filter are L1And C1。
Furthermore, the upper layer power unit filter is an LCL filter, and a series inductor of the LCL filter is L2And L3The capacitance of the filter capacitor is C2。
The invention provides another technical scheme as follows:
a harmonic compensation method for a circuit structure of a double-alternating-current bus grid-connected converter comprises the following steps:
step 1: measuring the current of an inductor and the voltage of a capacitor in the upper layer power unit filter and the lower layer power unit filter, and sending the detected values to a controller;
step 2: the controller collects the information of the direct current power supply of each battery, including the available power of the battery and the SOC of the battery; determining, by the power management unit, reference values for active and reactive power transfer from the interface converter system to the main grid; on the basis, obtaining a reference grid current, and enabling the reference grid current and a high-voltage alternating-current bus phase angle thetapccThe synchronization is as follows:
Figure BDA0002260817210000021
Figure BDA0002260817210000022
wherein I3，ref，αAnd I3，ref，βIs the reference grid current in the two-axis stationary coordinate system; thetapccThe phase angle of the grid voltage is obtained by a phase-locked loop based on a second-order generalized integrator; ePCCIs the measured PCC voltage amplitude, PrefAnd QrefIs the output active and reactive power reference values of the high voltage network;
reference voltage V for supplying power to AC bus of lower-layer unitref1And upper cell PCC voltage VPCCSynchronizing; giving instantaneous reference voltage V in a two-axis stationary coordinate systemref1，αAnd Vref1，β：
Vref1，α＝ELower·cos(θpcc) (3)
Figure BDA0002260817210000031
Wherein ELowerIs the magnitude of the lower level cell reference voltage;
and step 3: when determining the reference current and the reference voltage, tracking the current and the voltage by adopting a double-loop current and voltage controller;
the output of the outer ring voltage ring of the Voltage Controller (VCM) of the lower cell is:
Figure BDA0002260817210000032
wherein Vref1，αβIs a reference voltage in a stationary reference frame; k is a radical ofp1Is the proportional gain, ki1，hIs a quasi-proportional resonant controller gain of order h, omegacIs the cut-off frequency, omega, of a quasi-proportional resonant controller0Is the fundamental frequency (in radians), s denotes the Laplacian, Vc1，αβRepresenting the voltage value of the low-voltage AC busbar in a stationary reference frame, I1，ref，αβIs the reference current of the outer control loop;
then, for the internal current I1，αβAnd tracking adopts proportional control:
Figure BDA0002260817210000033
wherein k isp2To proportional gain, I1，ref，αβIs a reference current of an external control loop, I1，αβIs the internal current of the lower power unit, Vout1，αβThe output voltage of the lower layer unit is referred to PWM modulation;
similarly, for an upper-layer power unit, three-phase reference grid current needs to be calculated, and double-loop Current Control (CCM) is performed, wherein the outputs of an outer loop and an inner loop are respectively as follows:
Figure BDA0002260817210000034
Figure BDA0002260817210000035
wherein k isp3Is the upper layer unit grid current I3，αβProportional gain, k, of the controlled outer control loopi2，hIs a quasi-proportional resonant controller gain of order h, I3，ref，αβA reference value representing the grid current in a stationary reference frame, s represents the Laplace operator, ωcIs the cut-off frequency, omega, of a quasi-proportional resonant controller0Is a groupFrequency (in radians), kp4Is an internal current I2，αβProportional gain, V, of the control loopout2，αβIs the output voltage reference of the upper unit PWM modulation2，ref，αβA reference current for an upper power unit output current in a static reference coordinate system;
and 4, step 4: converting the voltage in the formula (6) in the two-axis static reference system into a three-phase reference system, and adding the zero-sequence voltage into the inter-phase power flow control between the lower-layer power units:
Figure BDA0002260817210000041
wherein Vout1，a，Vout1，bAnd Vout1，cIs the reference voltage of the lower layer power unit PWM modulation; v0，lowerIs the zero sequence voltage of the inter-phase power flow between the lower power units;
similar to the inter-phase power flow of the lower unit, the reference voltage of the upper unit is also converted into a three-phase reference system and zero sequence voltage of the inter-phase power is injected as follows:
Figure BDA0002260817210000042
wherein Vout2，a，Vout2，b，and Vout2，cIs a reference voltage for PWM modulation of the upper power unit; likewise, V0，upperIs the zero sequence voltage of the inter-phase power flow of the upper layer unit;
and 5: after the reference voltage of the double-loop current and voltage controller is obtained, the reference voltage is compared with the triangular wave according to Sinusoidal Pulse Width Modulation (SPWM) or Space Vector Pulse Width Modulation (SVPWM) to obtain a duty ratio signal of the switching tube, so that the switching-on and switching-off of the switching tube of the converter are controlled.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
1. through the double closed-loop control of the upper power unit and the lower power unit, the converter can simultaneously provide active voltage harmonic suppression and grid current harmonic compensation without using any harmonic component extraction.
2. The dc bus voltage does not need the same voltage while maintaining good ac network power flow and power quality control. In this case, the photovoltaic array and the cells, even with different characteristics, can be integrated directly to the dc side of the converter.
3. The method can save a harmonic current extraction link and a phase-locked loop link, greatly reduces the calculated amount of a digital control system, finally realizes the simultaneous compensation of low-voltage harmonic waves and high-power grid current harmonic waves, and is a novel control method which is worthy of popularization and is used for simultaneously compensating the voltage and the current on the double-alternating-current bus.
4. The cascade H-bridge is applied to the power units of the upper layer and the lower layer, not only can be used for voltage harmonic compensation of a low-voltage alternating-current bus, but also can be used for current harmonic compensation of a medium-voltage alternating-current bus, and the circuit expands the application range from a low-voltage range to a medium-voltage range.
Drawings
FIG. 1 is a schematic diagram of a circuit structure of the invention in a medium voltage distribution system such as a three-phase 6kV/10kV power grid.
FIG. 2 shows a circuit structure and a harmonic compensation method thereof according to the present invention.
Fig. 3 is an unbalanced and distorted grid voltage at a high voltage ac bus.
Fig. 4 is an unbalanced and distorted load current at a low voltage ac bus.
Fig. 5(a) and (b) show three-phase output power of the upper and lower power cells before and after zero-sequence voltage injection, respectively.
Fig. 6(a) and (b) are the three-phase grid current waveform and its FFT analysis, respectively.
Fig. 7(a) and (b) are the line voltage waveform of the low voltage ac bus and its FFT analysis, respectively.
Detailed Description
The invention is described in further detail below with reference to the figures and specific examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
When the circuit structure is integrated into a medium-voltage distribution system such as a three-phase 6kV/10kV power grid, the circuit structure shown in figure 1 is adopted. It can be seen that the upper and lower units both adopt a cascaded H-bridge approach to withstand high voltages.
As shown in fig. 2, a circuit structure of a dual ac bus grid-connected converter is composed of an upper layer power unit, a lower layer power unit, and their respective filters and sampling circuits. Wherein, the upper layer power unit is arranged between the high-voltage alternating current bus and the low-voltage alternating current bus, one side of the upper layer power unit is connected with the input side of the upper layer power unit filter, and the other side is connected with the output side of the lower layer power unit filter; the lower layer power unit is connected with the input side of the lower layer power unit filter; the output side of the upper power unit filter is connected with a 6kV/10kV power grid; the output side of the lower power unit filter is used as a low-voltage alternating current bus, and the low-voltage alternating current bus is provided with a local load; the sampling circuit consists of a detection circuit on each filter and is used for detecting the current of an inductor in the LCL or the LC filter and the voltage on a capacitor; the upper layer power unit and the lower layer power unit are composed of cascaded H bridges. The direct current bus of each H bridge is connected to a distributed power supply or a load, such as a battery or a photovoltaic array, and the output sides of two adjacent H bridge units are connected in series;
the lower layer power unit filter is an LC filter, and the inductance and the capacitance of the LC filter are L1And C1The filter is provided with a detection circuit for detecting the current of the inductor and the voltage of the capacitor;
the upper layer power unit filter is an LCL filter, and a series inductor of the LCL filter is L2And L3The capacitance of the filter capacitor is C2The filter is provided with a detection circuit for detecting the current of the inductor and the voltage of the capacitor.
As shown in the control scheme shown at the bottom of fig. 2, the harmonic compensation method for the double-ac bus grid-connected converter of the invention comprises the following steps:
step 1: firstly, measuring the current of an inductor and the voltage of a capacitor in an upper layer power unit filter and a lower layer power unit filter, and sending the detected values to a controller;
step 2: the controller collects the DC of each batteryInformation of the power source includes available power of the battery and SOC of the battery. Reference values for active and reactive power transfer from the interface converter system to the main grid are determined by the power management unit. On the basis, a reference grid current is obtained and is subjected to phase angle theta with a high-voltage alternating-current buspccThe synchronization is as follows:
Figure BDA0002260817210000061
Figure BDA0002260817210000062
wherein I3，ref，αAnd I3，ref，βIs the reference grid current in a two-axis stationary coordinate system. ThetapccIs the grid voltage phase angle obtained by a second-order generalized integrator based phase-locked loop. EPCCIs the measured PCC voltage amplitude, PrefAnd QrefAre output active and reactive power reference values of the high-voltage power grid.
Reference voltage V for supplying power to AC bus of lower-layer unitref1And upper cell PCC voltage VPCCAnd (6) synchronizing. Gives the instantaneous reference voltage V in the two-axis static coordinate systemref1，αAnd Vref1，β：
Vref1，α＝ELower·cos(θpcc) (3)
Figure BDA0002260817210000063
Wherein ELowerIs the magnitude of the lower level cell reference voltage.
And step 3: in determining the reference current and voltage, a dual loop current and voltage controller is used for accurate current and voltage tracking.
The output of the outer ring voltage ring of the Voltage Controller (VCM) of the lower cell is:
Figure BDA0002260817210000064
wherein Vref1，αβIs a reference voltage in a stationary reference frame; k is a radical ofp1Is the proportional gain, ki1，hIs a quasi-proportional resonant controller gain of order h, omegacIs the cut-off frequency, omega, of a quasi-proportional resonant controller0Is the fundamental frequency (in radians), s denotes the Laplacian, Vc1，αβRepresenting the voltage value of the low-voltage AC busbar in a stationary reference frame, I1，ref，αβIs the reference current of the outer control loop;
then, for the internal current I1，αβAnd tracking adopts proportional control:
Figure BDA0002260817210000065
wherein k isp2Is proportional gain, I1，ref，αβIs a reference current of an external control loop, I1，αβIs the internal current of the lower power unit, Vout1，αβThe output voltage of the lower layer unit is referred to PWM modulation;
similarly, for an upper-layer power unit, three-phase reference grid current needs to be calculated, and double-loop Current Control (CCM) is performed, wherein the outputs of an outer loop and an inner loop are respectively as follows:
Figure BDA0002260817210000071
Figure BDA0002260817210000072
wherein k isp3Is the upper layer unit grid current I3，αβProportional gain, k, of the controlled outer control loopi2，hIs a quasi-proportional resonant controller gain of order h, I3，ref，αβA reference value representing the grid current in a stationary reference frame, s represents the Laplace operator, ωcIs the cut-off frequency, omega, of a quasi-proportional resonant controller0Is the fundamental frequency (in radians), kp4Is an internal current I2，αβProportional gain, V, of the control loopout2，αβIs the output voltage reference of the upper unit PWM modulation2，ref，αβA reference current for an upper power unit output current in a static reference coordinate system;
and 4, step 4: converting the voltage in the formula (6) in the two-axis static reference system into a three-phase reference system, and adding the zero-sequence voltage into the inter-phase power flow control between the lower-layer power units:
Figure BDA0002260817210000073
wherein Vout1，a，Vout1，bAnd Vout1，cIs the reference voltage for the lower power cell PWM modulation. V0，lowerIs the zero sequence voltage of the inter-phase power flow between the lower power units.
Similar to the inter-phase power flow of the lower unit, the reference voltage of the upper unit is also converted into a three-phase reference system and zero sequence voltage of the inter-phase power is injected as follows:
Figure BDA0002260817210000074
wherein Vout2，a，Vout2，b，and Vout2，cIs a reference voltage for PWM modulation of the upper power unit. Likewise, V0，upperIs the zero sequence voltage of the inter-phase power flow of the upper layer unit.
And 5: after the reference voltage of the double-loop current and voltage controller is obtained, the reference voltage is compared with the triangular wave according to Sinusoidal Pulse Width Modulation (SPWM) or Space Vector Pulse Width Modulation (SVPWM) to obtain a duty ratio signal of the switching tube, so that the switching-on and switching-off of the switching tube of the converter are controlled.
Step 6: and (3) building a simulation model shown in figure 2 by Matlab/Simulink, and verifying the inverter control method provided by the invention. The following conditions were established: the three-phase high-voltage bus is unbalanced, and the a-phase voltage is 25% lower than the other two-phase voltage, as shown in fig. 3. Furthermore, the three phase local load currents are distorted and unbalanced, as shown in fig. 4, verifying the performance of the model in bad conditions.
The power response of the power unit is obtained through simulation and is shown in fig. 5(a) and 5(b), and the fig. 5(a) and 5(b) are the output power of the upper layer power unit and the lower layer power unit respectively. The output power at the three phases is obviously different in the first phase due to the unbalance of the grid voltage and the influence of the local load. And in the second stage, zero sequence voltage is injected at the moment of 0.5s, and the output power of the three-phase unit is equal.
Fig. 6(a) and 7(a) show the three-phase grid current and the supply line voltage over the load, respectively. It can be seen that the three-phase grid current and the supply voltage are balanced and sinusoidal. The corresponding harmonic spectra in fig. 6(b) and fig. 7(b) show that the THD of the grid current and the supply voltage are 2.38% and 1.38%, respectively.
In conclusion, the circuit and the method for compensating the harmonic waves of the power supply voltage and the power grid current of the grid-connected converter in the double alternating current buses are feasible, and the power quality is improved. Even if the power grid voltage at the upper layer and the local load at the lower layer are highly distorted, the detection of any harmonic component is not needed through the double-loop voltage and current control, the harmonic current extraction link and the phase-locked loop link can be omitted, the calculation amount of a digital control system is greatly reduced, the simultaneous compensation of low-voltage harmonic waves and high-power grid current harmonic waves is finally realized, and the method is a novel control method for simultaneously compensating the voltage and the current on the double-alternating-current bus, which is worthy of popularization. Furthermore, the proposed harmonic compensation strategy can be used simultaneously with a zero sequence voltage injection control strategy that changes the inter-phase power flow of cascaded H-bridges. Therefore, the circuit structure and the harmonic compensation method provided by the invention can be simultaneously applied to occasions of power control and power quality control.
The present invention is not limited to the above-described embodiments. The foregoing description of the specific embodiments is intended to describe and illustrate the technical solutions of the present invention, and the above specific embodiments are merely illustrative and not restrictive. Those skilled in the art can make many changes and modifications to the invention without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (5)

1. A circuit structure of a double-alternating-current bus grid-connected converter is characterized by comprising an upper layer power unit, a lower layer power unit and respective filters thereof; wherein, the upper layer power unit is arranged between the high-voltage alternating current bus and the low-voltage alternating current bus, one side of the upper layer power unit is connected with the input side of the upper layer power unit filter, and the other side is connected with the output side of the lower layer power unit filter; the lower layer power unit is connected with the input side of the lower layer power unit filter; the output side of the upper power unit filter is connected with a 6kV/10kV power grid; the output side of the lower power unit filter is used as a low-voltage alternating current bus, and the low-voltage alternating current bus is provided with a local load; each filter is provided with a detection device for detecting the current of an inductor in the filter and the voltage of a capacitor;
2. the circuit structure of the double-alternating-current bus grid-connected converter according to claim 1, wherein the upper layer power unit and the lower layer power unit are both composed of cascaded H bridges; the direct current bus of each H-bridge is connected to a distributed power supply or a load, and the output sides of two adjacent H-bridge units are connected in series.
3. The circuit structure of a double ac bus bar grid-connected inverter as claimed in claim 1, wherein the lower power unit filter is an LC filter, and the inductance and capacitance of the LC filter are L1And C1。
4. The circuit structure of the double AC bus grid-connected converter according to claim 1, wherein the upper power unit filter is an LCL filter, and a series inductor of the LCL filter is L2And L3The capacitance of the filter capacitor is C2。
5. A harmonic compensation method of a double-alternating-current bus grid-connected converter circuit structure is based on the circuit structure of the double-alternating-current bus grid-connected converter of claim 1, and is characterized by comprising the following steps:
step 1: measuring the current of an inductor and the voltage of a capacitor in the upper layer power unit filter and the lower layer power unit filter, and sending the detected values to a controller;
step 2: the controller collects the information of the direct current power supply of each battery, including the available power of the battery and the SOC of the battery; determining, by the power management unit, reference values for active and reactive power transfer from the interface converter system to the main grid; on the basis, obtaining a reference grid current, and enabling the reference grid current and a high-voltage alternating-current bus phase angle thetapccThe synchronization is as follows:
Figure FDA0002260817200000011
Figure FDA0002260817200000012
wherein I3,ref,αAnd I3,ref,βIs the reference grid current in the two-axis stationary coordinate system; thetapccThe phase angle of the grid voltage is obtained by a phase-locked loop based on a second-order generalized integrator; ePCCIs the measured PCC voltage amplitude, PrefAnd QrefIs the output active and reactive power reference values of the high voltage network;
reference voltage V for supplying power to AC bus of lower-layer unitref1And upper cell PCC voltage VPCCSynchronizing; giving instantaneous reference voltage V in a two-axis stationary coordinate systemref1,αAnd Vref1,β：
Vref1,α＝ELower·cos(θpcc) (3)
Figure FDA0002260817200000021
Wherein eLowerIs the magnitude of the lower level cell reference voltage;
and step 3: when determining the reference current and the reference voltage, tracking the current and the voltage by adopting a double-loop current and voltage controller;
the output of the outer ring voltage ring of the Voltage Controller (VCM) of the lower cell is:
Figure FDA0002260817200000022
wherein Vref1,αβIs a reference voltage in a stationary reference frame; k is a radical ofp1Is the proportional gain, ki1,hIs a quasi-proportional resonant controller gain of order h, omegacIs the cut-off frequency, omega, of a quasi-proportional resonant controller0Is the fundamental frequency (in radians), s denotes the Laplacian, Vc1,αβRepresenting the voltage value of the low-voltage AC busbar in a stationary reference frame, I1,ref,αβIs the reference current of the outer control loop;
then, for the internal current I1,αβAnd tracking adopts proportional control:
Figure FDA0002260817200000023
wherein k isp2To proportional gain, I1,ref,αβIs a reference current of an external control loop, I1,αβIs the internal current of the lower power unit, Vout1,αβThe output voltage of the lower layer unit is referred to PWM modulation;
similarly, for an upper-layer power unit, three-phase reference grid current needs to be calculated, and double-loop Current Control (CCM) is performed, wherein the outputs of an outer loop and an inner loop are respectively as follows:
Figure FDA0002260817200000024
Figure FDA0002260817200000025
wherein k isp3Is the upper layer unit grid current I3,αβProportional gain, k, of the controlled outer control loopi2,hIs a quasi-proportional resonant controller gain of order h, I3,ref,αβTo representReference value of the grid current in a stationary reference frame, s denotes the laplace operator, ωcIs the cut-off frequency, omega, of a quasi-proportional resonant controller0Is the fundamental frequency (in radians), kp4Is an internal current I2,αβProportional gain, V, of the control loopout2,αβIs the output voltage reference of the upper unit PWM modulation2,ref,αβA reference current for an upper power unit output current in a static reference coordinate system;
and 4, step 4: converting the voltage in the formula (6) in the two-axis static reference system into a three-phase reference system, and adding the zero-sequence voltage into the inter-phase power flow control between the lower-layer power units:
Figure FDA0002260817200000031
wherein Vout1,a,Vout1,bAnd Vout1,cIs the reference voltage of the lower layer power unit PWM modulation; v0,lowerIs the zero sequence voltage of the inter-phase power flow between the lower power units;
similar to the inter-phase power flow of the lower unit, the reference voltage of the upper unit is also converted into a three-phase reference system and zero sequence voltage of the inter-phase power is injected as follows:
Figure FDA0002260817200000032
wherein Vout2,a,Vout2,b,andVout2,cIs a reference voltage for PWM modulation of the upper power unit; likewise, V0,upperIs the zero sequence voltage of the inter-phase power flow of the upper layer unit;
and 5: after the reference voltage of the double-loop current and voltage controller is obtained, the reference voltage is compared with the triangular wave according to Sinusoidal Pulse Width Modulation (SPWM) or Space Vector Pulse Width Modulation (SVPWM) to obtain a duty ratio signal of the switching tube, so that the switching-on and switching-off of the switching tube of the converter are controlled.
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