CN102694385A - Phase current balancing and amplitude-limiting method for asymmetrical compensation of line current of distribution static compensator (D-STATCOM) - Google Patents
Phase current balancing and amplitude-limiting method for asymmetrical compensation of line current of distribution static compensator (D-STATCOM) Download PDFInfo
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- CN102694385A CN102694385A CN2012101722557A CN201210172255A CN102694385A CN 102694385 A CN102694385 A CN 102694385A CN 2012101722557 A CN2012101722557 A CN 2012101722557A CN 201210172255 A CN201210172255 A CN 201210172255A CN 102694385 A CN102694385 A CN 102694385A
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Abstract
The invention relates to a phase current balancing and amplitude-limiting method for the asymmetrical compensation of a line current of a distribution static compensator (D-STATCOM). The method comprises the following steps of: calculating a group of phase current vectors; balancing the absolute value of a three-phase current instantaneous value in the group of phase current vectors as possible when the group of phase current vectors is in accordance with the conditions that the phase current of the D-STATCOM does not exceed a compensation limit, and the phase current and the line current are in accordance with the Kirchhoff current law; performing amplitude-limiting processing on the group of phase current vectors to obtain a vector; after obtaining a deviation value between the obtained vector and the compensation phase current vector actually output by the D-STATCOM, adjusting the deviation value by using a proportional-integral (PI) adjustor and outputting a modulation wave signal; processing the modulation wave signal by adopting a carrier phase-shifting pulse width modulation algorithm to generate a corresponding multi-level pulse-width modulation (PWM) pulse; and controlling a cascaded converter in the D-STATCOM to obtain a corresponding balanced and amplitude-limited phase current.
Description
Technical field
The present invention relates to the technical field of three-phase fully-controlled rectification, specifically a kind of D-STATCOM(Power distribution network static reacance synchronizing generator)Line current asymmetry compensation phase current balance amplitude limiting method.
Background technology
The cascade connection type D-STATCOM of three-phase triangle connection grid connected structure includes CPU element, main part and simultaneously mesh portions;Main part is made up of cascade converter and connection reactance, and mesh portions include power network and load.The each phase of cascade converter hasnIndividual power cell, i.e. a1~an, b1~bn, c1~cn, with phasenAgain each with being connected reactance series winding, i.e. a1~a after individual power unit cascadenWith, b1~bnWith, c1~cnWithSeries connection;AndBe connected with c1,Be connected with a1,It is connected with b1, forms three-phase triangle head and the tail and connect.The three-phase of the D-STATCOM is provided with measurement phase currentThe first current transformer group, grid-connected place sets measurement line currentThe second current transformer group, load-side provided with measurement load currentThe 3rd current transformer group, grid side be provided with measuring system electric currentThe 4th current transformer group, and measurement power network a phase voltageVoltage transformer.
D-STATCOM is so that grid side electric current to the purpose that out-of-balance load is compensatedThree-phase symmetrical, and power factor is 1.The three-phase compensation line current of now device outputThe absolute value of three-phase component may differ by very big, the three-phase phase current of corresponding device outputMay also it differ greatly, and a certain phase or a few phase components can exceed that the phase current limit of compensation of device, and to ensure equipment safety operation and can make full use of its compensation capacity, it exports three-phase phase currentNeed to carry out optimizing balance amplitude limiting control.
A kind of balance method of D-STATCOM asymmetry compensations electric current is disclosed in Chinese invention patent specification CN102222925.A, but the phase current limit of compensation of device can still be can exceed that by passing through optimization balanced algorithm acquisition three-phase phase current, how amplitude limiting processing is carried out to phase current, and three-phase phase current and line current still need to meet the constraint of Kirchhoff's current law (KCL), i.e.,
To make full use of the compensation capacity of device and ensure that equipment safety is run, wherein,The constraint matrix of phase voltage vector and line voltage vector after amplitude limiting processing,Value is relevant with specific slicing algorithm;、、、A, b, c three-phase line current and line current vector respectively after amplitude limiting processing.How to solve the balance amplitude limiting process problem of phase current, be D-STATCOM line current asymmetry compensation in technical barrier.
In addition, CPS-SPWM Technical References《Concrete methods of realizing of the CPS-SPWM technologies on cascade h-bridge converter》(《Power technology application》, 2 months 2006, the 2nd phase of volume 9), and《Carrier phase-shifted PWM Cascade H type current transformer and its application in Active Power Filter-APF》(《Proceedings of the CSEE》, in May, 2006, the 10th phase of volume 26).
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of when the cascade connection type D-STATCOM that three-phase triangle is connected carries out line current asymmetry compensation, a kind of optimal balance amplitude limit method is provided for the three-phase phase current of the D-STATCOM, to make full use of the compensation capacity of the device and ensure that equipment safety is run.
In order to solve the above technical problems, the technical scheme that the present invention is provided is as follows:
A kind of phase current balance amplitude limiting method of the line current asymmetry compensation of D-STATCOM, comprises the following steps:
Step one:Ask for the balance phase current corresponding to one group of line current;
Respectively with vectorWithRepresent D-STATCOM one group of line currentWith corresponding balance phase current, thenIt is represented by:
Formula (1)
Wherein,,,,The maximum of the absolute value of triple line current instantaneous value is taken, i.e.,
Ask for amplitude limit scale factork:kIt is represented by
Wherein,For D-STATCOM phase current limit of compensation,The maximum of the absolute value of a certain group of balance phase current instantaneous value is taken, i.e.,
Formula (4)
Ask for the vector of the balance phase current after amplitude limiting processing:It is represented by
Step 3:The generation of pwm pulse is controlled with device;
Obtain vector obtained by step 2With the compensation phase current vector of D-STATCOM reality outputsDeviationAfterwards, by the deviationModulation wave signal is exported after being adjusted through proportion integral control device, then to the modulation wave signalHandled using phase-shifting carrier wave pulse width modulation algorithm and produce corresponding many level PWM pulses, many level PWM pulses are controlled to the cascade converter in D-STATCOM, to produce corresponding balance amplitude limiting phase current.
In a kind of phase current balance amplitude limiting method of D-STATCOM line current asymmetry compensation of the present invention, phase current is carried out after amplitude limiting processing, three-phase phase current and line current should meet the constraint of Kirchhoff's current law (KCL), the constraints of equation (7) should be met, in this, it was demonstrated that as follows:
Equation (1) is substituted into equation (5), obtained
I.e. in equation (7),Take,WithBetween still conform to shown in Fig. 1 Kirchhoff's current law (KCL) constraint.
To sum up, phase current is carried out after amplitude limiting processing, three-phase phase current and line current are still met
Constraints, i.e., still meet the constraint of Kirchhoff's current law (KCL).
A kind of phase current balance amplitude limiting method of D-STATCOM line current asymmetry compensation of the present invention, solve D-STATCOM to asymmetrical three-phase load compensate when, compensation device three-phase phase current be likely to occur deviation it is larger and very likely exceed device limit of compensation the problem of.The D-STATCOM reactive power compensators of the present invention are when using the connection of three-phase triangle, one group of three-phase line current can have infinite multigroup corresponding feature of three-phase phase current, using optimization balanced algorithm, one group of optimization balance three-phase phase current can be obtained, its maximum is the minimum value in the combination that is made up of the maximum in all phase current groups for meeting equation (6).Above-mentioned optimization balances adjustment of the phase current by amplitude limit scale factor, balanced as far as possible and not out-of-limit phase current with obtaining one group of three-phase, so as to fully utilize existing apparatus capacity, and foundation is provided for D-STATCOM devices design components selection particularly used, and then ensure equipment safety operation.
Brief description of the drawings
Fig. 1 is the asymmetry compensation schematic diagram for the cascade connection type D-STATCOM that three-phase triangle is connected;
Fig. 2 is the structural representation of the power cell of single-phase bridge current transformer.
Fig. 4 occurs and device control schematic diagram for the pwm pulse of D-STATCOM compensation phase current.
Fig. 5 is the circuit topological structure figure of a phase in Cascade H type current transformer.
Fig. 6 is the structural representation of single-phase full bridge module.
Fig. 7 is the control signal oscillogram of single-phase full bridge module.
Fig. 8 is that half period phase shift emulates schematic diagram.
Fig. 9 emulates schematic diagram for the output of single-phase full bridge module;
Figure 10 is the output emulation schematic diagram after the three logical signals superposition of single-phase full bridge module;
Figure 11 is the emulation schematic diagram of threephase load electric current;
Figure 12 is three-phase system electric current and the emulation schematic diagram of a phase voltages;
Amplitude limit line current outputs and the emulation schematic diagram of non-amplitude limit line current of the Figure 13 for D-STATCOM;
Amplitude limit phase current outputs and the emulation schematic diagram of non-amplitude limit phase current of the Figure 14 for D-STATCOM;
Wherein, the symbol in Fig. 3 is represented respectively:- a phase voltages, PLL-phaselocked loop, LPF-low pass filter,、、- a, b, c threephase load electric current,- load current α axle components,- load current beta -axis component,、、- a, b, c three-phase compensation line current,- compensation electric current α axle components,- compensation electric current beta -axis component,- Clarke transformation matrixs,- Clarke reverse transform matrix,- Park transformation matrixs,- Park reverse transform matrix, and、、WithRespectively
Embodiment
As shown in figure 1, the cascade connection type D-STATCOM of three-phase triangle connection grid connected structure includes CPU element, main part and simultaneously mesh portions;Main part is made up of cascade converter 1 and connection reactance 2, and mesh portions include power network 3 and load 4.A kind of reactive power compensator D-STATCOM of the present embodiment includes cascade converter 1, connection reactance 2 and CPU element.The each phase of the cascade converter 1 hasnIndividual power cell, i.e. a1~an, b1~bn, c1~cn, with phasenEach contacted again with being connected reactance 2 after individual power unit cascade, i.e. a1~anWith, b1~bnWith, c1~cnWithSeries connection;AndBe connected with c1,Be connected with a1,It is connected with b1, forms three-phase triangle head and the tail and connect.CPU element is connected with each power cell control end of cascade converter 1;D-STATCOM three-phase is provided with measurement phase currentThe first current transformer group, grid-connected place sets measurement line currentThe second current transformer group, load 4 sides provided with measurement load currentThe 3rd current transformer group, the side of power network 3 be provided with measuring system electric currentThe 4th current transformer group, and measurement power network a phase voltageVoltage transformer.
As shown in Fig. 2 each power cell of the cascade converter 1 includes two groups of IGBT units and DC filter capacitor C;Each group IGBT units include two IGBT modules of upper IGBT module and lower IGBT module;The upper IGBT module and lower IGBT module include:IGBT and fly-wheel diode, the anode of the fly-wheel diode connect IGBT emitter stage, and the negative electrode of the fly-wheel diode connects IGBT colelctor electrode, and each IGBT grid is the rectification control end of the three-phase full-controlled rectifier bridge A;IGBT emitter stage connects the colelctor electrode of IGBT in lower IGBT module in the upper IGBT module;IGBT colelctor electrode connects the emitter stage of IGBT in the positive pole of the DC filter capacitor C, each lower IGBT module and connects the negative pole of the DC filter capacitor C in each upper IGBT module;Contact Xs of the contact Y of lower IGBT module with the upper IGBT module of latter power cell is connected in every group of IGBT unit, i.e., contact Ys of the contact X of upper IGBT module with the lower IGBT module of previous power cell is connected in every group IGBT unit.
A kind of phase current balance amplitude limiting method of D-STATCOM of the present embodiment line current asymmetry compensation, CPU element detects threephase load transient current by the load-side current transformer.As shown in figure 3, according toAlgorithm, by threephase load electric currentThe three-phase line current of compensation needed for obtaining D-STATCOM。
Step one:Ask for three-phase line currentCorresponding optimal balance phase current.Respectively with vectorWithRepresent D-STATCOM one group of line currentWith corresponding balance phase current, thenIt is represented by:
Wherein,,,,The maximum of the absolute value of triple line current instantaneous value is taken, i.e.,
In the required compensation triple line current instantaneous value of above-mentioned acquisitionIn,
Step 2:To balance phase current obtained by step oneAmplitude limiting processing is carried out, balance amplitude limiting phase current is drawn;
Ask for amplitude limit scale factork,
That is, whenMore than device phase current limit of compensationWhen, then amplitude limit scale factorkTake;WhenLess than or equal to device phase current limit of compensationWhen, then amplitude limit scale factorkTake 1.
By above-mentioned gained optimal balance phase current instantaneous valueWith amplitude limit scale factorkMake product, ask for balance amplitude limiting phase current vector,
Obtain the optimal balance phase current instantaneous value after amplitude limiting processing, i.e.,
Formula (11)
Step 3:The generation of pwm pulse is controlled with device;
Obtain vector obtained by step 2With the compensation phase current vector of D-STATCOM reality outputsDeviationAfterwards, by the deviationModulation wave signal is exported after being adjusted through proportion integral control device, then to the modulation wave signalHandled using phase-shifting carrier wave pulse width modulation algorithm and produce corresponding many level PWM pulses, many level PWM pulses are controlled to the cascade converter in D-STATCOM, to produce corresponding balance amplitude limiting phase current.
As shown in figure 4, the pwm pulse of D-STATCOM compensation phase current occurs and device control schematic diagram.CPS-SPWM technologies are the combinations of multiple technology and SPWM technologies.The technology can realize the effect of higher equivalent switching frequency under relatively low devices switch frequency, with good harmonic characterisitic.CPS-SPWM modulation techniques are applied to cascade h-bridge converter.The circuit topological structure of a phase is as shown in Figure 5 in Cascade H type current transformer.
CPS-SPWM modulation algorithms are specially:In the single-phase full bridge module of structure as shown in Figure 6, frequency is, the cycle isTriangular waveIt is with frequencyThe intersection point of modulating wave be used as switch、Switching point, and、Gate signal it is complementary such as g in Fig. 71、g4It is shown.Triangular waveWithAmplitude is equal, opposite in phase.In be used as switch with the intersection point of modulating wave、Switching point, g in such as Fig. 72、g3It is shown.nWhen individual single-phase full bridge module uses identical modulating wave, triangular wave、、…、Phase differ successively, i.e., " half period phase shift ".WithnExemplified by 4, its half period phase shift emulation schematic diagram is as shown in Figure 8;The output emulation schematic diagram of each module is as shown in Figure 9;The output of each module is the superposition that two triangular waves intersect the pwm signal produced with modulating wave, is three logical signals, exports as shown in Figure 10 after superposition.
Simulation result as shown in Figure 11,12,13,14 is carried out in following precondition:D-STATCOM is per 5 power unit cascades of phase, often be in series a 50mH inductance, DC capacitor C voltage is controlled in 600V, load (10+j50) kVA inductive loads by a three-phase symmetrical, one DC loop seals in three phased rectifier bridges of the resistance inductive load of (12 Ω+10mH), is put into operation respectively in 0.04s and 0.1s.The emulation schematic diagram of threephase load electric current is as shown in figure 11, three-phase system electric current and the emulation schematic diagram of a phase voltages are as shown in figure 12, as shown in figure 13, D-STATCOM amplitude limit phase current output and the emulation schematic diagram of non-amplitude limit phase current are as shown in figure 14 for D-STATCOM amplitude limit line current output and the emulation schematic diagram of non-amplitude limit line current.
Above-described embodiment is only intended to clearly illustrate example of the present invention, and is not the restriction to embodiments of the present invention.For those of ordinary skill in the field, it can also make other changes in different forms on the basis of the above description.There is no necessity and possibility to exhaust all the enbodiments.And among the obvious change or variation that these spirit for belonging to the present invention are extended out are still in protection scope of the present invention.
Claims (1)
1. the phase current balance amplitude limiting method of a kind of D-STATCOM line current asymmetry compensation, it is characterised in that comprise the following steps:
Step one:Ask for the balance phase current corresponding to one group of line current;
Respectively with vectorWithRepresent D-STATCOM one group of line currentWith corresponding balance phase current, thenIt is represented by:
Wherein,,,,The maximum of the absolute value of triple line current instantaneous value is taken, i.e.,
Step 2:To balance phase current obtained by step oneCarry out amplitude limiting processing;
Ask for amplitude limit scale factork:kIt is represented by
Wherein,For D-STATCOM phase current limit of compensation,The maximum of the absolute value of a certain group of balance phase current instantaneous value is taken, i.e.,
Ask for the vector of the balance phase current after amplitude limiting processing:It is represented by
Step 3:The generation of pwm pulse is controlled with device;
Obtain vector obtained by step 2With the compensation phase current vector of D-STATCOM reality outputsDeviationAfterwards, by the deviationModulation wave signal is exported after being adjusted through proportion integral control device, then to the modulation wave signalHandled using phase-shifting carrier wave pulse width modulation algorithm and produce corresponding many level PWM pulses, many level PWM pulses are controlled to the cascade converter in D-STATCOM, to produce corresponding balance amplitude limiting phase current.
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CN112688339A (en) * | 2020-12-17 | 2021-04-20 | 合肥工业大学 | Compensation current amplitude limiting method and device of three-phase unbalance regulator |
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CN112688339A (en) * | 2020-12-17 | 2021-04-20 | 合肥工业大学 | Compensation current amplitude limiting method and device of three-phase unbalance regulator |
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