CN111552930A - 集成电路和具有这样的集成电路的嵌入式系统 - Google Patents
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Abstract
一种集成电路（10），其特征在于以下特征：‑所述电路（10）包括用于支持安全的引导过程（23）的电子保险装置（11），其中所述保险装置（11）被查询；‑所述电路（10）具有防止电磁故障注入的保护和‑所述电路（10）这样配置，使得所述保护延伸到所述引导过程（23）。
Description
技术领域
本发明涉及一种集成电路。本发明此外涉及一种具有这样的集成电路的嵌入式系统。
背景技术
在数据处理的上下文中，术语“eFuse”、“E-Fuse（电子熔丝）”或简称“Fuse（熔丝）”表示以其原型由IBM所开发的电子保险装置，该电子保险装置实现计算机芯片的动态实时编程。US4962294A公开作为可一次性编程的非易失性存储元件而对该方案的实施。
US 2006/0136858 A1示出一种用于就地（insitu）改变集成电路的系统参数的方法。该集成电路具有被构造为半导体元件的E-Fuse，其能够在硅上的芯片制造情况下利用在芯片中的金属连接来构成，其中基于被存储在E-Fuse中的信息来编码该电路的接入可能性或运行方式。通过集成接口或者通过集成的E-Fuse控制模块来选择性地毁坏用于编码的E-Fuse。
在接下来的讲述的范畴内，术语“电子保险装置（elektronische Sicherung）”应始终以广义来解释，其明确包括每种非易失性的存储器、例如闪存或PCM在内。
发明内容
本发明根据独立权利要求提供一种集成电路、尤其是FPGA或微控制器，以及一种具有这样的电路的嵌入式系统，例如单芯片系统（即system on a chip（片上系统），SoC）。
根据本发明的方案在此情况下基于如下认识：保护IT系统免受对其固件的逆向工程（reverse engineering）或操纵是非常重要的。在嵌入式系统的情况下，攻击者可能获得对相应的系统之内的集成电路的接入，从而必须保证在所述电路之内的安全性。通过在执行、固件加密或者保护调试接口之前检验固件的真实性所确保的引导（Urladen）（securebootstrap（安全引导程序）, secure boot（安全引导））表示用于如下安全性措施的示例，其中所述安全性措施在集成电路中实施。这些安全性机制必须被保护免遭物理攻击、例如激光攻击、通过电磁故障进行的注入攻击（electromagnetical fault injection（电磁故障注入），EM-FI）以及侧信道攻击。
所建议的解决方案还基于如下了解：像是例如对安全系统启动的激活所涉及的安全性信息显然必须被存储在非易失性存储器中。为此目的，通常利用已经提及的电子保险装置。在此情况下，所述电子保险装置能够典型地被设置（为1），但是并不能够被重置（为0）。在这样的保险装置中存储常常安全相关的信息，其涉及对引导的确保、对调试接口的去激活或者针对于固件加密的根密钥。然而，保险装置的读出有时是复杂的和缓慢的，从而在开始启动过程时将所述保险装置加载到用作硬件缓存的易失性存储器中，例如处理器寄存器中。因为保险装置包含针对启动过程自身的重要信息，所述保险装置在开始该过程时利用硬件式实施的有限自动机（endlichen Automaten）来被加载（图1）。在此时间点，并不执行软件。注意到：也能够使用闪存存储器或者电池缓冲的直接存取存储器（battery-buffered random access memory（电池缓冲的随机存取存储器）, BBRAM），以用于存储这种安全性信息。
根据本发明的电路还考虑已经已知的针对于故障注入、尤其是电磁故障注入的应对措施。为此列举：关键操作的空间上或时间上冗余的实施，例如借助于三重模块冗余（triple modular redundancy, TMR），或者关键操作的随机变化的运行时行为（jitter（抖动）），使得攻击者并不能够确定出用于故障攻击的正确时间点。
此外有意义的是磁场探测器的实施方案：针对攻击所使用的磁场是相对强的并且能够以高可靠性来被检测。如果发现攻击，则将相应装备的设备转换成安全的锁定模式（Sperrmodus）。这样的探测器例如在以下出版物中被描述：J.Breier,S.Bhasin和W.He. Anelectromagnetic fault injection sensor using hogge phase-detector. 在18thInternational Symposium on Quality Electronic Design (ISQED)中，第307-312页，2017年3月。
接下来所描述的方案认识到：这种措施被实施在多个集成电路中，然而通常并不检测保险装置的缓存存储器（Zwischenspeicher）（技术语言：“Cachen（缓存）”）。这种薄弱点使得攻击者能够突破有关措施。
按照本发明的解决方案的优点因此在于经改善地抵御（Abwehr）EM-FI攻击。
通过在从属权利要求所列举的措施，使得在独立权利要求中所说明的基本思想的有利的扩展方案和改善方案是可能的。因此可以规定：这样构型本发明的实施方式，使得电子保险装置的查询（Abfragen）具有随机变化的运行时行为。这种变型方案能够附加地使可能的攻击困难化。
附图说明
在附图中示出并且在接下来的描述中进一步阐述本发明的实施例。其中：
图1 示出设备的引导过程。
图2示例性地示出保险装置的读过程的冗余实施。
具体实施方式
根据本发明，磁场探测器或EM-FI探测器能够在集成电路中被实施并且在保险装置（附图标记22，图1）的缓存存储之前被激活。如图2图解的那样，这种保险装置缓存过程（22）的冗余实施同样是能够设想的。因为磁场注入由于共同的起因而可能导致失效（例如考虑到采样干扰）（common cause failure（共因失效）, CCF），建议的是鉴于时间和空间方面冗余的实施。
Claims (10)
1.一种集成电路（10），
其特征在于以下特征：
- 所述电路（10）包括用于支持安全的引导过程（23）的电子保险装置（11），其中所述保险装置（11）被查询（22）；
- 所述电路（10）具有防止电磁故障注入的保护和
- 所述电路（10）这样配置，使得所述保护延伸到所述引导过程（23）。
2.根据权利要求1所述的集成电路（10），
其特征在于以下特征：
- 所述电路（10）包括硬件缓存（12、13、14）和
- 所述电路（10）被设立用于，在查询（22）所述保险装置（11）时将查询结果存储在所述硬件缓存（12、13、14）中。
3.根据权利要求2所述的集成电路（10），
其特征在于以下特征：
- 所述硬件缓存（12、13、14）是处理器寄存器（12、13、14）或RAM缓存。
4.根据权利要求2或3所述的集成电路（10），
其特征在于以下特征：
- 所述硬件缓存（12、13、14）是冗余地设计的并且
- 所述电路（10）被设立用于，多次地相继将所述查询结果读入到所述硬件缓存（12、13、14）中。
5.根据权利要求4所述的集成电路（10），
其特征在于以下特征：
- 所述电路（10）包括比较器（15），用于进行在所述处理器寄存器（12、13、14）之间的比较并且
-所述电路（10）被设立用于，如果所述比较失败，用信号传递警报（16）。
6.根据权利要求4或5所述的集成电路（10），
其特征在于以下特征：
- 所述处理器寄存器（12、13、14）是三重冗余地设计的并且
- 所述处理器寄存器（12、13、14）在空间上彼此偏移。
7.根据权利要求1至6其中任意一项所述的集成电路（10），
其特征在于以下特征：
- 所述电路（10）包括磁场探测器或电磁故障注入探测器和
- 所述电路（10）被设立用于，在所述引导过程（23）之前激活所述磁场探测器。
8.根据权利要求1至7其中任意一项所述的集成电路（10），
其特征在于以下特征：
- 所述电路（10）这样被设立，使得在接通（21）所述电路（10）之后首先查询（22）所述保险装置（11），然后继续所述引导过程（23）并且最后实施固件（24）。
9.根据权利要求1至8其中任意一项所述的集成电路（10），
其特征在于以下特征：
- 所述电路（10）这样被设立，使得所述保险装置（11）的所述查询（22）具有随机变化的运行时行为。
10.具有根据权利要求1至9其中任意一项所述的电路（10）的嵌入式系统。
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| DE102019201096.2 | 2019-01-29 | ||
| DE102019201096.2A DE102019201096A1 (de) | 2019-01-29 | 2019-01-29 | Integrierter Schaltkreis und eingebettetes System mit einem solchen integrierten Schaltkreis |
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| US20220181275A1 (en) * | 2020-12-08 | 2022-06-09 | International Business Machines Corporation | Integrated circuit security using programmable switches |
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| JPS6130428A (ja) * | 1984-07-20 | 1986-02-12 | Nissan Motor Co Ltd | 車両走行制御装置 |
| US4962294A (en) | 1989-03-14 | 1990-10-09 | International Business Machines Corporation | Method and apparatus for causing an open circuit in a conductive line |
| US5109273A (en) * | 1990-05-11 | 1992-04-28 | Eastman Kodak Company | Signal processing circuit for performing a pipelined matrix multiplication upon signals from several linear sensors |
| US20060136858A1 (en) | 2004-12-17 | 2006-06-22 | International Business Machines Corporation | Utilizing fuses to store control parameters for external system components |
| JP2010507227A (ja) * | 2006-10-16 | 2010-03-04 | トムソン ライセンシング | フィールド・プログラマブル・ゲート・アレイ（ｆｐｇａ）のトレラントなシステム内プログラミング |
| WO2012122994A1 (en) * | 2011-03-11 | 2012-09-20 | Kreft Heinz | Off-line transfer of electronic tokens between peer-devices |
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| US9740798B2 (en) * | 2013-03-15 | 2017-08-22 | Micron Technology, Inc. | Inexact search acceleration |
| US11556396B2 (en) * | 2015-05-08 | 2023-01-17 | Seth Lytle | Structure linked native query database management system and methods |
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