CN111540323A - Liquid crystal display device having a plurality of pixel electrodes - Google Patents
Liquid crystal display device having a plurality of pixel electrodes Download PDFInfo
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- CN111540323A CN111540323A CN202010427608.8A CN202010427608A CN111540323A CN 111540323 A CN111540323 A CN 111540323A CN 202010427608 A CN202010427608 A CN 202010427608A CN 111540323 A CN111540323 A CN 111540323A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
Abstract
A liquid crystal display device comprises a sub-pixel array, a plurality of data lines and a plurality of scanning lines, wherein when scanning signals are input to the plurality of scanning lines in a first scanning sequence and gray scale voltages with opposite polarities are respectively input to the plurality of data lines according to the first scanning sequence, sub-pixels arranged at two sides of each data line are mutually opposite in polarity, and row inversion is realized; when the plurality of scanning lines input scanning signals in a second scanning sequence and the plurality of data lines input gray scale voltages with opposite polarities respectively according to the second scanning sequence, the polarity of each sub-pixel is opposite to that of the sub-pixel adjacent to the sub-pixel, and dot inversion is achieved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a liquid crystal display device for reducing the power consumption of an integrated circuit for providing gray scale voltage.
Background
In a liquid crystal display device, when liquid crystal molecules are operated for a long time in an electric field of the same polarity, the liquid crystal molecules are liable to deteriorate, influence liquid crystal characteristics, and cause problems such as image sticking (sticking) and flicker (flicker), and therefore, the polarity of a voltage applied to the liquid crystal molecules must be inverted at regular intervals.
With the improvement of the integration of the liquid crystal display device, most of the current low temperature polysilicon liquid crystal display devices adopt a 2-to-6 multiplexer (demux) and a column inversion (column inversion) manner to drive the liquid crystal display device, that is, 2 data lines in the liquid crystal display device can provide gray scale voltages with different polarities to corresponding 6 rows of sub-pixels in time division through the multiplexer, so that the sub-pixels in two adjacent rows form column inversion with opposite polarities. Since the polarity inversion frequency of the grayscale voltage adopting the multiplexer structure is low-frequency inversion, the integrated circuit for supplying the grayscale voltage is not burdened.
The amorphous silicon liquid crystal display device has the advantage of low cost, but cannot be driven by using the multiplexer structure, because the electron mobility of the amorphous silicon is several orders lower than that of the low-temperature polysilicon, and if the multiplexer structure is used for driving, the charging efficiency of each sub-pixel is affected, so that the phenomenon of uneven brightness of a display screen may occur. Therefore, most of the conventional amorphous silicon liquid crystal display devices drive the liquid crystal display device by using a dual gate (dual gate) structure in which the column inversion is performed, but the polarity inversion frequency of the gray scale voltage using the dual gate structure in the prior art is high frequency inversion, which causes a great burden and power consumption on the integrated circuit for supplying the gray scale voltage.
Therefore, it is necessary to provide a liquid crystal display device for reducing power consumption of an integrated circuit for supplying gray scale voltages to solve the problems of the prior art.
Disclosure of Invention
The invention aims to provide a liquid crystal display device to reduce the polarity inversion frequency, thereby reducing the power consumption of an integrated circuit.
To achieve the above object, a first aspect of the present invention provides a liquid crystal display device comprising:
the display device comprises a sub-pixel array, a display panel and a display control circuit, wherein the sub-pixel array comprises a plurality of sub-pixels, and each sub-pixel is internally provided with a thin film transistor for controlling the light emitting display of the sub-pixel;
the data lines extend along the row direction, are arranged between two adjacent rows of sub-pixels at intervals, and are used for transmitting gray scale voltages with data signals to the thin film transistors in the sub-pixels at two sides of each data line; and
a plurality of scanning lines extending along the row direction, two scanning lines are correspondingly arranged on each row of sub-pixels and are respectively used for transmitting scanning signals to the thin film transistors in the odd sub-pixels and the even sub-pixels in the same row of sub-pixels,
when the plurality of scanning lines input scanning signals in a first scanning sequence and the plurality of data lines respectively input gray scale voltages with opposite polarities according to the first scanning sequence, sub-pixels arranged at two sides of each data line are opposite in polarity; and
in any frame period, the first scanning sequence is that firstly, scanning signals with high level are input to scanning lines connected with odd-numbered sub-pixels in each row of sub-pixels, and then, scanning signals with high level are input to scanning lines electrically connected with even-numbered sub-pixels in each row of sub-pixels
Further, the polarity inversion frequency of the gray scale voltage is in units of one frame.
Further, the plurality of data lines input a gray scale voltage having a first polarity when a scan signal having a high level is input to the scan lines connected to the odd-numbered subpixels in each row of subpixels, and the plurality of data lines input a gray scale voltage having a second polarity opposite to the first polarity when a scan signal having a high level is input to the scan lines connected to the even-numbered subpixels in each row of subpixels.
Further, when a scan signal having a high level is input to the scan lines connected to the even-numbered sub-pixels in each row of sub-pixels, a scan signal having a low level is input to the scan lines connected to the odd-numbered sub-pixels in each row of sub-pixels.
Further, the positive polarity gray scale voltage is up to 5.3 volts, and the negative polarity gray scale voltage is up to 5.3 volts.
A second aspect of the present invention provides a liquid crystal display device comprising:
the display device comprises a sub-pixel array, a display panel and a display control circuit, wherein the sub-pixel array comprises a plurality of sub-pixels, and each sub-pixel is internally provided with a thin film transistor for controlling the light emitting display of the sub-pixel;
the data lines extend along the row direction, are arranged between two adjacent rows of sub-pixels at intervals, and are used for transmitting gray scale voltages with data signals to the thin film transistors in the sub-pixels at two sides of each data line; and
the scanning lines extend along the row direction, two scanning lines are correspondingly arranged on each row of sub-pixels, and the two scanning lines are respectively used for transmitting scanning signals to the thin film transistors in the odd number of sub-pixels and the even number of sub-pixels in the same row of sub-pixels;
when the plurality of scanning lines input scanning signals in a second scanning sequence and the plurality of data lines input gray scale voltages with opposite polarities respectively according to the second scanning sequence, the polarity of each sub-pixel is opposite to that of the sub-pixel adjacent to the sub-pixel; and
in any frame period, the second scanning sequence is that scanning signals with high level are input to scanning lines connected with odd number sub-pixels in each column of sub-pixels on one side of each data line and scanning lines connected with even number sub-pixels in each column of sub-pixels on the other side of each data line, and then scanning signals with high level are input to scanning lines connected with even number sub-pixels in each column of sub-pixels on one side of each data line and scanning lines connected with odd number sub-pixels in each column of sub-pixels on the other side of each data line.
Further, the polarity inversion frequency of the gray scale voltage is in units of one frame.
Further, when a scan signal having a high level is input to a scan line connected to an odd number of sub-pixels in each column of sub-pixels located at one side of each data line and a scan line connected to an even number of sub-pixels in each column of sub-pixels located at the other side of each data line, the plurality of data lines input a gray scale voltage having a first polarity, and when a scan signal is input to a scan line connected to an even number of sub-pixels in each column of sub-pixels located at one side of each data line and a scan line connected to an odd number of sub-pixels in each column of sub-pixels located at the other side of each data line, the plurality of data lines input a gray scale voltage having a second polarity opposite to the first polarity.
Further, when a scan signal is input to a scan line connected to an even number of sub-pixels in each column of sub-pixels located at one side of each data line and a scan line connected to an odd number of sub-pixels in each column of sub-pixels located at the other side of each data line, a scan line connected to an odd number of sub-pixels in each column of sub-pixels located at one side of each data line and a scan line connected to an even number of sub-pixels in each column of sub-pixels located at the other side of each data line input a scan signal having a low level.
Further, the positive polarity gray scale voltage is up to 5.3 volts, and the negative polarity gray scale voltage is up to 5.3 volts.
Each data line provided by the invention can timely transmit gray scale voltage to the sub-pixels positioned at the two sides of the data line, and is suitable for an amorphous silicon liquid crystal display device. The row inversion and the dot inversion provided by the invention belong to low-frequency polarity inversion, and compared with the high-frequency polarity inversion adopted in the prior art, the invention can greatly reduce the load of a source electrode driving unit or an integrated circuit for providing gray scale voltage.
Drawings
Fig. 1 is a schematic diagram of a liquid crystal display device using column inversion according to a first embodiment of the invention.
FIG. 2 is a schematic diagram showing gray scale voltage polarity change of the LCD device shown in FIG. 1.
Fig. 3 is a schematic diagram of a liquid crystal display device using dot inversion according to a second embodiment of the invention.
FIG. 4 is a schematic diagram showing the polarity change of the gray scale voltage of the LCD device shown in FIG. 3.
Detailed Description
In order to make the objects, technical solutions and effects of the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The following description of the various embodiments refers to the accompanying drawings, which illustrate embodiments of the invention and which are set forth in part in the description. The directional terms used herein are used in a generic and descriptive sense only and not for purposes of limitation.
Referring to fig. 1, fig. 1 is a schematic diagram of a liquid crystal display device using column inversion according to a first embodiment of the invention. The liquid crystal display device includes a sub-pixel array 11 for emitting light, a plurality of data lines 12 for transmitting gray scale voltages, and a plurality of scan lines 13 for transmitting scan signals. It is understood that the embodiment of the invention only shows a part of the lcd device for illustration, and particularly shows 3 data lines (D1, D2, and D3), 8 scan lines (G1 to G8), and a sub-pixel array having 4 × 6 sub-pixels, which should not be construed as limiting the invention.
Specifically, the sub-pixel array 11 may include a plurality of red sub-pixels R, a plurality of green sub-pixels G, and a plurality of blue sub-pixels B, and a thin film transistor 14 for controlling light emission display thereof is provided in each sub-pixel. The red sub-pixels R, the green sub-pixels G, and the blue sub-pixels B shown in fig. 1 are respectively located in the first and fourth columns, the second and fifth columns, and the third and sixth columns, which should be understood as an arrangement for convenience of description only and should not be construed as a limitation to the present invention.
Specifically, the lcd device further includes an active electrode driving unit (not shown) electrically connected to the data lines 12 for providing gray scale voltages with data signals to the data lines 12. The data lines 12 extend in a column direction and are disposed at intervals between two adjacent columns of sub-pixels. In the present embodiment, D1, D2 and D3 are respectively disposed between the first column and the second column of sub-pixels, between the third column and the fourth column of sub-pixels and between the fifth column and the sixth column of sub-pixels, and no data line is disposed between the second column and the third column of sub-pixels and between the fourth column and the fifth column of sub-pixels. Furthermore, the source terminals of the tfts in the sub-pixels on both sides of each data line are electrically connected to the same data line, so that each data line can transmit gray scale voltages to the tfts in the sub-pixels on both sides of the data line. In the present embodiment, the source terminals of the thin film transistors in the red sub-pixel on the left side of D1 and the green sub-pixel on the right side of D1 are electrically connected to D1, respectively, so that D1 can transmit gray scale voltages to the red sub-pixel on the left side of D1 and the green sub-pixel on the right side of D1, which are not illustrated herein since the other data lines can be explained in the same way.
Specifically, the liquid crystal display device further includes a gate driving unit (not shown) electrically connected to the plurality of scanning lines 13 for providing scanning signals to the plurality of scanning lines 13. The plurality of scanning lines 13 extend along the row direction, and two scanning lines are correspondingly disposed on each row of sub-pixels, that is, the two scanning lines may be respectively located at two sides of each row of sub-pixels, or located at one side of each row of sub-pixels. In this embodiment, G1 and G2 are respectively disposed on the upper side and the lower side of the first row of sub-pixels, G3 and G4 are respectively disposed on the upper side and the lower side of the second row of sub-pixels, G5 and G6 are respectively disposed on the upper side and the lower side of the third row of sub-pixels, and G7 and G8 are respectively disposed on the upper side and the lower side of the fourth row of sub-pixels. Furthermore, the gate terminals of the thin film transistors in the odd-numbered sub-pixels and the even-numbered sub-pixels in each row of sub-pixels are respectively electrically connected with the two scanning lines arranged corresponding to the sub-pixels in each row, so that the two scanning lines arranged corresponding to the sub-pixels in each row can respectively transmit scanning signals to the thin film transistors in the odd-numbered sub-pixels and the even-numbered sub-pixels in the same row. In this embodiment, the gate terminals of the tfts in the odd-numbered sub-pixels of the first row of sub-pixels are connected to G1 on the upper side of the first row of sub-pixels, and the gate terminals of the tfts in the even-numbered sub-pixels of the first row of sub-pixels are connected to G2 on the lower side of the first row of sub-pixels, so that G1 and G2 on the upper side and the lower side of the first row of sub-pixels can respectively transmit scan signals to the tfts in the odd-numbered sub-pixels and the even-numbered sub-pixels of the first row of sub-pixels. Further, when the scan signal is at a high level, the thin film transistor in the corresponding sub-pixel is turned on, and then the gray scale voltage with the data signal is input into the corresponding sub-pixel, for example, when the scan signal at a high level is applied to G1, the thin film transistor in the odd number sub-pixel in the first row of sub-pixels is turned on, and then the gray scale voltage with the data signal is input into the odd number sub-pixel in the first row of sub-pixels; when a high scan signal is applied to G2, the tfts in the even-numbered subpixels of the first row of subpixels are turned on, and a gray scale voltage with a data signal is input to the even-numbered subpixels of the first row of subpixels.
Referring to fig. 2, fig. 2 is a schematic diagram illustrating polarity change of gray scale voltages of the liquid crystal display device shown in fig. 1. When the scan lines 13 input scan signals in a first scan order and the data lines 13 input gray scale voltages with opposite polarities according to the first scan order, the sub-pixels disposed at both sides of each data line have opposite polarities to each other, thereby realizing row inversion. Specifically, in the first scanning sequence, in a period of any frame (frame), after the scanning signals of high level are input to the scanning lines (in this embodiment, odd-numbered scanning lines, i.e., G1, G3, G5, and G7) connected to the odd-numbered sub-pixels in each row of sub-pixels, and the thin film transistors in the corresponding sub-pixels (e.g., red sub-pixels on the left side of D1 in fig. 1) are turned on, the gray scale voltages having the first polarity (e.g., positive polarity) are input to the data lines 13, and then the scanning signals of high level are input to the scanning lines (in this embodiment, even-numbered scanning lines, i.e., G2, G4, G362, and G8) electrically connected to the even-numbered sub-pixels in each row of sub-pixels, and the corresponding sub-pixels (e.g., thin film transistors 493 in the green sub-pixels on the right side of D354 in fig. 1) are turned on, the data lines 13 receive a gray scale voltage of a second polarity (e.g., negative polarity) opposite to the first polarity, and the sub-pixels (e.g., the green sub-pixels on the right side of D1) on the other side of each data line are negative polarity, and at the same time, the scan lines in the odd-numbered rows stop receiving the high-level scan signals, or the scan lines in the odd-numbered rows receive the low-level scan signals. For convenience of description, the first polarity and the second polarity in the embodiment of the present invention represent a positive polarity and a negative polarity, respectively.
For convenience of illustration and simplified illustration, the first embodiment of the present invention will be exemplarily described with a red sub-pixel R of a first column and a green sub-pixel G of a second column. It is to be understood that such description can be used to explain the overall behavior, and therefore "Row 1-R, Row2-R, Row3-R and Row 4-R" described below can be used to represent "sub-pixels located on one side of each data line", and "Row 1-G, Row2-G, Row3-G and Row 4-G" can be used to represent "sub-pixels located on the other side of each data line", wherein "Row 1-R" is used to represent the first red sub-pixel in the first Row of sub-pixels (or the first sub-pixel in the first Row of sub-pixels), and "Row 3-G" is used to represent the first green sub-pixel in the third Row of sub-pixels (or the second sub-pixel in the third Row of sub-pixels), and so on, will not be described herein. Based on the foregoing, this should not be construed as limiting the invention.
Further, as shown in fig. 1, the scan signals of high level input to the scan lines of the odd-numbered rows or the scan signals of high level input to the scan lines of the even-numbered rows may sequentially turn on the corresponding tfts in the sub-pixels and sequentially input the corresponding gray scale voltages, for example, applying positive gray scale voltages to Row1-R, Row2-R, Row3-R and Row4-R, and then applying negative gray scale voltages to Row1-G, Row2-G, Row3-G and Row4-G (as shown by arrows in fig. 1).
Further, as shown in FIG. 2, in any frame period (or the Nth frame in FIG. 2), Row1-R, Row2-R, Row3-R and Row4-R are positive gray scale voltages (preferably up to 5.3 volts), Row1-G, Row2-G, Row3-G and Row4-G are negative gray scale voltages (preferably up to-5.3 volts). When the frame is refreshed to the next frame (or the N +1 frame as shown in FIG. 2), the gray scale voltages with negative polarity applied to Row1-R, Row2-R, Row3-R and Row4-R are applied, so the gray scale voltages with negative polarity applied to Row1-R, Row2-R, Row3-R and Row4-R are applied, and the gray scale voltages with positive polarity applied to Row1-G, Row2-G, Row3-G and Row4-G are applied, so the gray scale voltages with positive polarity applied to Row1-G, Row2-G, Row3-G and Row4-G are applied. It can be seen that the polarity inversion frequency of the gray scale voltage in the first embodiment of the invention is based on one frame unit, and compared with the prior art liquid crystal display device adopting column inversion and high frequency polarity inversion, the invention can greatly reduce the load of the source driving unit or the integrated circuit for providing the gray scale voltage.
Referring to fig. 3 and 4, fig. 3 is a schematic diagram of a liquid crystal display device using dot inversion according to a second embodiment of the invention, and fig. 4 is a schematic diagram of polarity change of gray scale voltages of the liquid crystal display device shown in fig. 3. The liquid crystal display device includes a structure similar to that of the first embodiment of the present invention, and details thereof are omitted here. The difference is that when the plurality of scan lines 13 input scan signals in a second scan order and the plurality of data lines 12 input gray scale voltages having opposite polarities according to the second scan order, respectively, the polarity of each sub-pixel is opposite to the polarity of its neighboring sub-pixel, and dot inversion is achieved. Specifically, the second scanning order is to input a high-level scanning signal to the scanning lines (G1 and G5) connected to odd-numbered sub-pixels (e.g., Row1-R and Row3-R on the left side of D1 in fig. 3) in each column of sub-pixels on one side of each data line and to the scanning lines (G4 and G8) connected to even-numbered sub-pixels (e.g., Row2-G and Row4-G on the right side of D1 in fig. 3) in each column of sub-pixels on the other side of each data line, and to turn on the thin film transistors in the corresponding sub-pixels (e.g., Row1-R, Row2-G, Row3-R and Row4-G) in a period of any one frame, and the gray scale voltages having the first polarity are input to the plurality of data lines 13, where the odd-numbered sub-pixels in each column on one side of each data line and the even-numbered sub-pixels in each column of each data line are positive-numbered sub-pixels, then, after inputting high-level scan signals to the scan lines (G3 and G7) connected to the even-numbered subpixels (e.g., Row2-R and Row4-R on the left side of D1 in fig. 3) in each column of subpixels on one side of each data line and to the scan lines (G4 and G6) connected to the odd-numbered subpixels (e.g., Row1-G and Row3-R on the right side of D1 in fig. 3) in each column of subpixels on the other side of each data line, and turning on the thin film transistors in the corresponding subpixels (e.g., Row1-G, Row2-R, Row3-G and Row4-R), the data 13 lines are inputted with second-polarity gray scale voltages while the even-numbered subpixels in each column of subpixels on one side of each data line and the odd-numbered subpixels in each column of subpixels on the other side of each data line are negative-polarity, and simultaneously connected to the odd-numbered subpixels in each column of each data line And the scanning lines connected with the even number of the sub-pixels in each column on the other side of each data line stop inputting the scanning signals with high level, or the scanning lines connected with the odd number of the sub-pixels in each column on one side of each data line and the scanning lines connected with the even number of the sub-pixels in each column on the other side of each data line input the scanning signals with low level.
For convenience of illustration and simplified illustration, the second embodiment of the present invention will be exemplarily described with a red sub-pixel R of a first column and a green sub-pixel G of a second column. It is to be understood that such description can be used to explain the overall behavior, and thus "Row 1-R, Row2-G, Row3-R, and Row 4-G" described below can be used to indicate "odd number of sub-pixels in each column of sub-pixels on one side of each data line, and even number of sub-pixels in each column of sub-pixels on the other side of each data line", and "Row 1-G, Row2-R, Row3-G, and Row 4-R" can be used to indicate "even number of sub-pixels in each column of sub-pixels on one side of each data line, and odd number of sub-pixels in each column of sub-pixels on the other side of each data line", where, for example, "Row 1-R" and "Row 3-G" have the same explanation as above, and will not be repeated herein. Based on the foregoing, this should not be construed as limiting the invention.
Further, as shown in fig. 3, inputting high-level scan signals to the scan lines connected to the odd-numbered sub-pixels in each Row of sub-pixels on one side of each data line and the scan lines connected to the even-numbered sub-pixels in each Row of sub-pixels on the other side of each data line, or inputting high-level scan signals to the scan lines connected to the even-numbered sub-pixels in each Row of sub-pixels on one side of each data line and the scan lines connected to the odd-numbered sub-pixels in each Row of sub-pixels on the other side of each data line may sequentially turn on the thin film transistors in the corresponding sub-pixels and sequentially input corresponding gray scale voltages, such as sequentially applying positive gray scale voltages to Row1-R, Row2-G, Row3-R and Row4-G, and sequentially applying positive gray scale voltages to Row4-R, Row3-G, Row2-R and Row1-G apply negative polarity grayscale voltages (as indicated by the arrows in FIG. 3).
Further, as shown in FIG. 4, in any frame period (or the Nth frame in FIG. 4), Row1-R, Row2-G, Row3-R and Row4-G are positive gray scale voltages (preferably up to 5.3 volts), Row1-G, Row2-R, Row3-G and Row4-R are negative gray scale voltages (preferably up to-5.3 volts). When the frame is refreshed to the next frame (or the N +1 frame as shown in FIG. 4), the gray scale voltages with negative polarity applied to Row1-R, Row2-G, Row3-R and Row4-G are applied, so the gray scale voltages with negative polarity applied to Row1-R, Row2-G, Row3-R and Row4-G are applied, and the gray scale voltages with positive polarity applied to Row1-G, Row2-R, Row3-G and Row4-R are applied, so the gray scale voltages with positive polarity applied to Row1-G, Row2-R, Row3-G and Row4-R are applied. It can be seen that the polarity inversion frequency of the gray scale voltage in the second embodiment of the invention is based on one frame unit, which is an inversion of the low frequency, so that the load of the source driving unit or the integrated circuit providing the gray scale voltage can be greatly reduced.
Based on the above, each data line provided by the present invention can transmit gray scale voltage to the sub-pixels located at both sides thereof in time, and is suitable for an amorphous silicon liquid crystal display device, for example. The row inversion and the dot inversion provided by the invention belong to low-frequency polarity inversion, and compared with the high-frequency polarity inversion adopted in the prior art, the invention can greatly reduce the load of a source electrode driving unit or an integrated circuit for providing gray scale voltage.
Although the present invention has been described with reference to the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope of the invention as defined by the appended claims.
Claims (10)
1. A liquid crystal display device, characterized in that the liquid crystal display device comprises:
the display device comprises a sub-pixel array, a display panel and a display control circuit, wherein the sub-pixel array comprises a plurality of sub-pixels, and each sub-pixel is internally provided with a thin film transistor for controlling the light emitting display of the sub-pixel;
the data lines extend along the row direction, are arranged between two adjacent rows of sub-pixels at intervals, and are used for transmitting gray scale voltages with data signals to the thin film transistors in the sub-pixels at two sides of each data line; and
a plurality of scanning lines extending along the row direction, two scanning lines are correspondingly arranged on each row of sub-pixels and are respectively used for transmitting scanning signals to the thin film transistors in the odd sub-pixels and the even sub-pixels in the same row of sub-pixels,
when the plurality of scanning lines input scanning signals in a first scanning sequence and the plurality of data lines respectively input gray scale voltages with opposite polarities according to the first scanning sequence, sub-pixels arranged at two sides of each data line are opposite in polarity; and
in any frame period, the first scanning sequence is to input a scanning signal with a high level to a scanning line connected to odd-numbered sub-pixels in each row of sub-pixels, and then to input a scanning signal with a high level to a scanning line electrically connected to even-numbered sub-pixels in each row of sub-pixels.
2. The liquid crystal display device according to claim 1, wherein: the polarity inversion frequency of the gray scale voltage is in units of one frame.
3. The liquid crystal display device according to claim 1, wherein: the plurality of data lines input a gray scale voltage having a first polarity when a scan signal having a high level is input to scan lines connected to odd-numbered subpixels of each row of subpixels, and input a gray scale voltage having a second polarity opposite to the first polarity when a scan signal having a high level is input to scan lines connected to even-numbered subpixels of each row of subpixels.
4. The liquid crystal display device according to claim 3, wherein: when a scan signal having a high level is input to a scan line connected to an even number of sub-pixels in each row of sub-pixels, a scan signal having a low level is input to a scan line connected to an odd number of sub-pixels in each row of sub-pixels.
5. The liquid crystal display device according to claim 1, wherein: the positive polarity gray scale voltage is up to 5.3 volts, and the negative polarity gray scale voltage is up to 5.3 volts.
6. A liquid crystal display device, characterized in that the liquid crystal display device comprises:
the display device comprises a sub-pixel array, a display panel and a display control circuit, wherein the sub-pixel array comprises a plurality of sub-pixels, and each sub-pixel is internally provided with a thin film transistor for controlling the light emitting display of the sub-pixel;
the data lines extend along the row direction, are arranged between two adjacent rows of sub-pixels at intervals, and are used for transmitting gray scale voltages with data signals to the thin film transistors in the sub-pixels at two sides of each data line; and
the scanning lines extend along the row direction, two scanning lines are correspondingly arranged on each row of sub-pixels, and the two scanning lines are respectively used for transmitting scanning signals to the thin film transistors in the odd number of sub-pixels and the even number of sub-pixels in the same row of sub-pixels;
when the plurality of scanning lines input scanning signals in a second scanning sequence and the plurality of data lines input gray scale voltages with opposite polarities respectively according to the second scanning sequence, the polarity of each sub-pixel is opposite to that of the sub-pixel adjacent to the sub-pixel; and
in any frame period, the second scanning sequence is that scanning signals with high level are input to scanning lines connected with odd number sub-pixels in each column of sub-pixels on one side of each data line and scanning lines connected with even number sub-pixels in each column of sub-pixels on the other side of each data line, and then scanning signals with high level are input to scanning lines connected with even number sub-pixels in each column of sub-pixels on one side of each data line and scanning lines connected with odd number sub-pixels in each column of sub-pixels on the other side of each data line.
7. The liquid crystal display device according to claim 6, wherein: the polarity inversion frequency of the gray scale voltage is in units of one frame.
8. The liquid crystal display device according to claim 6, wherein: the plurality of data lines input a gray scale voltage having a first polarity when a scan signal having a high level is input to a scan line connected to an odd number of sub-pixels in each column of sub-pixels at one side of each data line and a scan line connected to an even number of sub-pixels in each column of sub-pixels at the other side of each data line, and the plurality of data lines input a gray scale voltage having a second polarity opposite to the first polarity when a scan signal is input to a scan line connected to an even number of sub-pixels in each column of sub-pixels at one side of each data line and a scan line connected to an odd number of sub-pixels in each column of sub-pixels at the other side of each data line.
9. The liquid crystal display device according to claim 8, wherein: when a scan signal is input to a scan line connected to an even number of sub-pixels in each column of sub-pixels located at one side of each data line and a scan line connected to an odd number of sub-pixels in each column of sub-pixels located at the other side of each data line, a scan signal having a low level is input to a scan line connected to an odd number of sub-pixels in each column of sub-pixels located at one side of each data line and a scan line connected to an even number of sub-pixels in each column of sub-pixels located at the other side of each data line.
10. The liquid crystal display device according to claim 6, wherein: the positive polarity gray scale voltage is up to 5.3 volts, and the negative polarity gray scale voltage is up to 5.3 volts.
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| CN202010427608.8A CN111540323A (en) | 2020-05-20 | 2020-05-20 | Liquid crystal display device having a plurality of pixel electrodes |
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