CN111538690A - Bidirectional signal transmission system and transmission method thereof - Google Patents

Bidirectional signal transmission system and transmission method thereof Download PDF

Info

Publication number
CN111538690A
CN111538690A CN202010654920.0A CN202010654920A CN111538690A CN 111538690 A CN111538690 A CN 111538690A CN 202010654920 A CN202010654920 A CN 202010654920A CN 111538690 A CN111538690 A CN 111538690A
Authority
CN
China
Prior art keywords
transmission path
data
data stream
chip
transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010654920.0A
Other languages
Chinese (zh)
Inventor
姚瑞琨
纪静文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Genesis Systech Co ltd
Original Assignee
Genesis Systech Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Genesis Systech Co ltd filed Critical Genesis Systech Co ltd
Priority to CN202010654920.0A priority Critical patent/CN111538690A/en
Publication of CN111538690A publication Critical patent/CN111538690A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187Voting techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Dc Digital Transmission (AREA)

Abstract

The invention discloses a bidirectional signal transmission system and a transmission method thereof, wherein the bidirectional signal transmission system comprises a controller, a first transmission path and a second transmission path; a plurality of driving chips connected in series are arranged in the first transmission path and the second transmission path; the drive chip at the head end in the first transmission path and the drive chip at the head end in the second transmission path are both connected with the controller, and the drive chip at the tail end in the first transmission path is connected with the drive chip at the tail end in the second transmission path; the controller outputs a first data stream to the first transmission path and outputs a second data stream to the second transmission path; each driving chip acquires corresponding data in the first data stream or corresponding data in the second data stream, and by arranging two opposite transmission paths, when any one or more continuous driving chips are disconnected so that one transmission path is disconnected, the subsequent other chips can normally receive data from the other transmission path, so that the reliability of data transmission is improved.

Description

Bidirectional signal transmission system and transmission method thereof
Technical Field
The present invention relates to the field of signal processing technologies, and in particular, to a bidirectional signal transmission system and a transmission method thereof.
Background
The existing signal transmission mostly adopts a serial data transmission mode, and the serial data transmission mode is specifically one-chip-one-chip cascade connection of driving chips. The chips do not store address information, and each chip receives own data from the data stream according to the arrangement sequence of the chip and forwards the rest data backwards. A first chip receives a first packet, a second chip receives a second packet, and so on.
In the serial data transmission scheme, if a certain chip is damaged or a signal line at a certain position fails, the subsequent chips cannot normally receive and work from the failure point, so that the reliability of data transmission is poor.
Thus, the prior art has yet to be improved and enhanced.
Disclosure of Invention
In view of the foregoing disadvantages of the prior art, an object of the present invention is to provide a bidirectional signal transmission system and a transmission method thereof, in which two opposite transmission paths are provided, so that when any one or more consecutive chips are disconnected so that one of the transmission paths is disconnected, the subsequent other chips can receive data from the other transmission path, thereby improving the reliability of data transmission.
In order to achieve the purpose, the invention adopts the following technical scheme:
a bidirectional signal transmission system includes a controller, a first transmission path and a second transmission path; a plurality of driving chips connected in series are arranged in the first transmission path and the second transmission path; the drive chip at the head end in the first transmission path and the drive chip at the head end in the second transmission path are both connected with the controller, and the drive chip at the tail end in the first transmission path is connected with the drive chip at the tail end in the second transmission path; the controller is configured to output a first data stream to the first transmission path and output a second data stream to the second transmission path; each driving chip is used for acquiring corresponding data in the first data stream or corresponding data in the second data stream.
In the bidirectional signal transmission system, each driving chip comprises a first data interface and a second data interface;
the second data interface of the upper-stage driving chip in the first transmission path is connected with the first data interface of the lower-stage driving chip, and the first data interface of the head-end driving chip is connected with the controller; a first data interface of a previous-stage driving chip in the second transmission path is connected with a second data interface of a next-stage driving chip, the second data interface of a head-end driving chip is connected with the controller, and the first data interface of a tail-end driving chip is connected with the second data interface of the tail-end driving chip in the first transmission path;
the first data interface of each driver chip in the first transmission path is configured to receive the first data stream, and the second data interface is configured to send the first data stream;
the first data interface of each driver chip in the second transmission path is configured to send the second data stream, and the second data interface is configured to receive the second data stream.
In the bidirectional signal transmission system, the controller comprises a first control port and a second control port; the first control port is connected with the first data interface of the drive chip at the head end in the first transmission path, and the second control port is connected with the second data interface of the drive chip at the head end in the second transmission path;
the first control port is configured to output the first data stream to the first transmission path, the second control port is configured to output the second data stream to the second transmission path, and the first data stream is different from the second data stream.
In the bidirectional signal transmission system, the controller includes a first control port, and the first control port is connected to the first data interface of the head-end driver chip in the first transmission path and the second data interface of the head-end driver chip in the second transmission path;
the first control port is configured to output the first data stream to the first transmission path and output the second data stream to the second transmission path, where the first data stream is the same as the second data stream.
A transmission method based on the bidirectional signal transmission system as described above, comprising the steps of:
the controller outputs a first data stream to the first transmission path and outputs a second data stream to the second transmission path;
and after the upper-level driving chip in the second transmission path acquires the corresponding data in the second data stream, the second data stream is sent to the lower-level driving chip, and the sending is stopped until any driving chip is disconnected or the first data stream and the second data stream are received simultaneously.
In the transmission method of the bidirectional signal transmission system, after the upper-level driver chip in the first transmission path acquires corresponding data in the first data stream, the step of sending the first data stream to the lower-level driver chip includes:
and the upper-level driving chip in the first transmission path receives the first data stream through the first data interface, and after acquiring corresponding data in the first data stream, sends the first data stream to the first data interface in the lower-level driving chip through the second data interface.
In the transmission method of the bidirectional signal transmission system, after the previous driving chip in the second transmission path acquires the corresponding data in the second data stream, the step of sending the second data stream to the next driving chip includes:
and the upper-level driving chip in the second transmission path receives the second data stream through the second data interface, and after acquiring corresponding data in the second data stream, sends the second data stream to the second data interface in the lower-level driving chip through the first data interface.
In the transmission method of the bidirectional signal transmission system, the step of outputting a first data stream to the first transmission path and outputting a second data stream to the second transmission path by the controller includes:
the controller outputs a first data stream to the first transmission path through the first control port and outputs a second data stream to the second transmission path through the second control port.
In the transmission method of the bidirectional signal transmission system, the step of outputting a first data stream to the first transmission path and outputting a second data stream to the second transmission path by the controller includes:
the controller outputs a first data stream to the first transmission path through the first control port and outputs the second data stream to the second transmission path.
Compared with the prior art, the bidirectional signal transmission system and the transmission method thereof provided by the invention have the advantages that the bidirectional signal transmission system comprises the controller, the first transmission path and the second transmission path; a plurality of driving chips connected in series are arranged in the first transmission path and the second transmission path; the drive chip at the head end in the first transmission path and the drive chip at the head end in the second transmission path are both connected with the controller, and the drive chip at the tail end in the first transmission path is connected with the drive chip at the tail end in the second transmission path; the controller is configured to output a first data stream to the first transmission path and output a second data stream to the second transmission path; each driving chip is used for acquiring corresponding data in the first data stream or corresponding data in the second data stream, and by arranging two opposite transmission paths, when any one or more continuous chips are disconnected so that one transmission path is disconnected, the subsequent other chips can normally receive data from the other transmission path, so that the reliability of data transmission is improved.
Drawings
Fig. 1 is a block diagram of a bidirectional signal transmission system provided in the present invention;
FIG. 2 is a diagram illustrating signal transmission in a first embodiment of a bi-directional signal transmission system according to the present invention;
FIG. 3 is a schematic diagram of signal transmission in the presence of a fault in a first embodiment of a bi-directional signal transmission system provided by the present invention;
FIG. 4 is a schematic diagram of a first data stream and a second data stream in a first embodiment of a bi-directional signal transmission system provided by the present invention;
FIG. 5 is a diagram illustrating signal transmission in a second embodiment of a bi-directional signal transmission system according to the present invention;
FIG. 6 is a schematic diagram of a first data stream and a second data stream in a second embodiment of a bi-directional signal transmission system provided by the present invention;
FIG. 7 is a diagram illustrating data acquisition in a second embodiment of a bi-directional signal transmission system according to the present invention;
FIG. 8 is a schematic diagram of data acquisition in the presence of a fault in a second embodiment of a bidirectional signal transmission system provided by the present invention;
fig. 9 is a flowchart of a transmission method of a bidirectional signal transmission system according to the present invention.
Detailed Description
According to the bidirectional signal transmission system and the transmission method thereof, the two opposite transmission paths are arranged, so that when any one or more continuous driving chips are disconnected to disconnect one transmission path, the subsequent other chips can normally receive data from the other transmission path, and the reliability of data transmission is improved.
In order to make the objects, technical solutions and effects of the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, a bidirectional signal transmission system according to the present invention includes a controller 100, a first transmission path 200 and a second transmission path 300; a plurality of driving chips connected in series are arranged in each of the first transmission path 200 and the second transmission path 300; the first-end driver chip in the first transmission path 200 and the first-end driver chip in the second transmission path 300 are both connected to the controller 100, and the last driver chip in the first transmission path 200 is connected to the last driver chip in the second transmission path 300.
In specific implementation, the controller 100 is configured to output a first data stream to the first transmission path 200 and output a second data stream to the second transmission path 300; each driving chip is used for acquiring corresponding data in the first data stream or corresponding data in the second data stream; in this embodiment, eight driving chips are taken as an example for illustration, and of course, the number of the driving chips may be selected according to actual needs in other embodiments, which is not limited in the present invention; as shown in fig. 2, the eight driver chips are respectively a first driver chip, a second driver chip, a third driver chip, a fourth driver chip, a fifth driver chip, a sixth driver chip, a seventh driver chip and an eighth driver chip, the first driver chip, the second driver chip, the third driver chip, the fourth driver chip, the fifth driver chip, the sixth driver chip, the seventh driver chip and the eighth driver chip are sequentially connected in series, and the first driver chip and the eighth driver chip are connected to the controller 100.
Wherein, a path through which the data stream flows from the first driver chip to be transmitted backward is the first transmission path 200, and a path through which the data stream is input from the eighth driver chip to be transmitted backward is the second transmission path 300, and it should be noted herein that the controller 100 can independently output the first data stream to the first transmission path 200, and also can independently output the second data stream to the second transmission path 300, which also means that no fault exists in the entire transmission path and normal transmission can be performed, specifically, when the controller outputs only the first data stream or only the second data stream, all driver chips only receive the data stream in one transmission path to obtain corresponding data, and no matter which transmission path is the last driver chip that receives the data stream to obtain corresponding data, send the data stream to the next driver chip, and so on, and (4) until all the driving chips acquire the data required by the driving chips, thereby completing the transmission of the signals.
The controller may also output the first data stream and the second data stream from the two transmission paths, where any one of the driver chips may receive corresponding data from the two transmission paths, and similarly, the driver chip in each transmission path acquires the corresponding data when receiving the data stream and then transmits the data stream backward until one of the driver chips stops transmitting backward when receiving the two data streams, and thus by setting the two opposite transmission paths, it may be ensured that when any one or more of the consecutive driver chips is disconnected so that one of the transmission paths is disconnected, subsequent other chips may normally receive data from the other transmission path, thereby improving reliability of data transmission.
With reference to fig. 2, the eight driver chips are connected in series, which means that two transmission data are transmitted from two directions to each other, so as to implement bidirectional signal transmission, and the data transmission method in the present invention belongs to a simplex signal transmission method, and after confirming the data transmission direction, data will not be transmitted in reverse during normal operation, then one driver chip, for example, the seventh driver chip, among the eight driver chips receives the first data stream and the second data stream, the seventh driver chip receives the first data stream in the first transmission path 200, which is equivalent to the seventh driver chip, and receives the second data stream in the second transmission path 300, which is equivalent to the second driver chip, at this time, the seventh driver chip selects one of the data streams to obtain corresponding data, and then the first driver chip to the sixth driver chip receive corresponding data in the first data stream, the eighth driving chip receives corresponding data in the second data stream; because eight driver chips form a closed loop, the disconnection of one of the driver chips does not affect the overall signal transmission, and here, the disconnection of the driver chip may be that the driver chip fails to work and disconnects the line, or that the line connected to the driver chip fails to cause the driver chip to open, as shown in fig. 3, if the third driver chip fails to work normally, the second driver chip receives the first data stream from the first transmission path 200 to obtain the corresponding data, the fourth driver chip receives the second data stream from the second transmission path 300 to obtain the corresponding data, and all the driver chips except the third driver chip can receive the data and work normally, thereby effectively improving the reliability of data transmission through bidirectional signal transmission.
Further, with reference to fig. 2, each driving chip includes a first data interface a and a second data interface B; the second data interface B of the upper stage driver chip in the first transmission path 200 is connected to the first data interface a of the lower stage driver chip, and the first data interface a of the head-end driver chip is connected to the controller 100; the first data interface a of the upper driving chip in the second transmission path 300 is connected to the second data interface B of the lower driving chip, the second data interface B of the first driving chip is connected to the controller 100, and the first data interface a of the last driving chip is connected to the second data interface B of the last driving chip in the first transmission path 200.
The first data interface a of each driver chip in the first transmission path 200 is configured to receive the first data stream, and the second data interface B is configured to send the first data stream; the first data interface a of each driver chip in the second transmission path 300 is configured to transmit the second data stream, the second data interface B is configured to receive the second data stream, that is, each driver chip includes two data interfaces, and both the two data interfaces can receive and transmit data, the first data interface a of each driver chip in the first transmission path 200 is configured to receive data, the second data interface B of each driver chip is configured to transmit data, the first data interface a of each driver chip in the second transmission path 300 is configured to transmit data, and the second data interface B of each driver chip is configured to receive data.
Further, with continued reference to fig. 2, the controller 100 according to the first embodiment of the present invention includes a first control port C and a second control port D; the first control port C is connected to the first data interface a of the head-end driver chip in the first transmission path 200, and the second control port D is connected to the second data interface B of the head-end driver chip in the second transmission path 300; the first control port C is configured to output the first data stream to the first transmission path 200, the second control port D is configured to output the second data stream to the second transmission path 300, and the first data stream is different from the second data stream; each driving chip is used for sequentially acquiring corresponding data from the starting point to the end point of the first data stream, or sequentially acquiring corresponding data from the starting point to the end point of the second data stream.
In this embodiment, an arrangement sequence of a first data stream output by a first control port C of the controller 100 is opposite to an arrangement sequence of a second data stream output by a second control port D, as shown in fig. 4, specifically, in this embodiment, each driver chip needs to acquire data at a corresponding position in the data stream, and in the present invention, each driver chip acquires corresponding data in the data stream, which means acquiring a corresponding data packet in the data stream, so that the first data stream and the second data stream both include eight data packets, thereby ensuring that any transmission path can independently complete transmission of a whole signal, and enabling each driver chip to acquire corresponding data.
Eight data packets of the two data streams are respectively data D1, D2, D3, D4, D5, D6, D7, and D8, wherein eight bits of data of a first data stream are arranged from lower bits to higher bits, in other words, a first data stream sent by a first control port C of the controller 100 is sent according to an order of sending data D1 (data required by a first driver chip) and then sending data D8 (data required by an eighth driver chip), at this time, a starting point in the first data stream is data D1, and an end point is data D8; the first driver chip receives the first data stream from the first data interface a, acquires data D1, and sends the first data stream to the first data interface a of the second driver chip through the second data interface B, the second driver chip receives the first data stream through the first data interface a, acquires data D2, and sends the first data stream to the first data interface a of the third driver chip through the second data interface B, and so on, thereby completing transmission of the first data stream in the first transmission path 200; the data in the second data stream is arranged in the reverse order to the first data stream, that is, the second data stream sent by the second control port D is sent according to the order of sending data D8 (data required by the eighth driver chip) and then sending data D1 (data required by the first driver chip), where the start point of the second data stream is data D8 and the end point is data D1; the eighth driver chip obtains data D8 after receiving the second data stream from the second data interface B, and sends the second data stream to the second data interface B of the seventh driver chip through the first data interface a, the seventh driver chip obtains data D7 after receiving the second data stream through the second data interface B, and sends the second data stream to the second data interface B of the sixth driver chip through the first data interface a, and so on, thereby completing transmission of the second data stream in the second transmission path 300. When a first data interface A and a second data interface B of a certain driving chip respectively receive a first data stream and a second data stream, the corresponding driving chip selects one path of data to select data corresponding to a position, and does not forward the data. As shown in fig. 2, when the first data interface a and the second data interface B of the seventh driver chip receive data simultaneously, and the seventh driver chip receives data from the first data interface a, the seventh driver chip will rank seventh, and when receiving data from the second data interface B, the seventh driver chip ranks second, and at this time, the seventh driver chip will select corresponding data in one of the data streams.
The controller 100 is connected with a first driving chip from the first control port C, and after the first driving chip to the eighth driving chip are sequentially connected in series, the first driving chip is connected back to the second control port D of the controller 100 through the eighth driving chip to form a closed loop, so that the damage of any one driving chip or the open circuit or short circuit of any one section of connecting line cannot affect the overall signal transmission; as shown in fig. 3, when the third driver chip is damaged and cannot normally operate, the second driver chip receives the first data stream through the first data interface a to obtain data, and the fourth driver chip receives the second data stream through the second data interface B to obtain data, so that the overall signal transmission is not affected, and the reliability of signal transmission is high.
Further, referring to fig. 5, in a second embodiment of the present invention, the controller 100 includes a first control port C, where the first control port C is connected to the first data interface a of the head-end driver chip in the first transmission path 200 and the second data interface B of the head-end driver chip in the second transmission path 300; the first control port C is configured to output the first data stream to the first transmission path 200 and output the second data stream to the second transmission path 300, and the first data stream is the same as the second data stream; each driver chip is configured to sequentially obtain corresponding data from a start point to an end point of the first data stream, or sequentially obtain corresponding data from an end point to a start point of the second data stream, that is, in this embodiment, the first data interface a of the first driver chip and the second data interface B of the eighth driver chip are connected together to form a closed loop, and then are connected to the first control port C of the controller 100, that is, the first transmission path 200 and the second transmission path 300 share a control port, and the data streams received by the two transmission paths are the same, so that ports of the controller 100 can be saved, and the structure of the dual signal transmission system can be simplified.
In this embodiment, the first data stream and the second data stream sent by the first control port C of the controller 100 are both sent according to the sequence of sending the data D1 first and then sending the data D8, and the data streams received by each driver chip are the same, as shown in fig. 6, at this time, each driver chip must determine the start point and the end point of the data by itself, at this time, data are obtained according to the sequence from the high order of the data stream received by the first data interface a, that is, from the start point to the end point of the data stream, and if data are obtained according to the sequence from the low order of the data stream received by the second data interface B, that is, from the end point to the start point of the data stream.
Specifically, as shown in fig. 7, the first driver chip receives corresponding data D1 from the beginning of the data stream, and the eighth driver chip receives corresponding data D8 from the end of the data stream; when each driver chip works normally, the sixth driver chip obtains corresponding data from the data stream in the second transmission path 300 according to the principle of proximity, and similarly, the fifth driver chip also obtains corresponding data from the data stream in the second transmission path 300, and the first to fourth driver chips all obtain corresponding data from the data stream in the first transmission path 200; however, when the seventh driver chip fails, as shown in fig. 8, the data stream in the second transmission path 300 is received by the eighth driver chip and then forwarded to the seventh driver chip, and because the seventh driver chip fails and is no longer sent back through the first data interface a, the sixth driver chip cannot receive the data stream in the second transmission path 300 at this time; the data stream in the first transmission path 200 is transmitted to the fifth driver chip after passing through the first driver chip, the second driver chip, the third driver chip to the fourth driver chip, received through the first data interface a of the fifth driver chip, and sent to the first data interface a of the sixth driver chip through the second data interface B of the fifth driver chip, and the sixth driver chip finally obtains corresponding data through the data stream in the first transmission path 200, so that the bidirectional signal transmission system can still work when one driver chip is damaged or one data transmission is abnormal, and the reliability of system signal transmission is improved.
The present invention further provides a transmission method of a bidirectional signal transmission system, which is suitable for the bidirectional signal transmission system, and since the bidirectional signal transmission system is described in detail above, it is not described herein again, and as shown in fig. 9, the decoding method includes the following steps:
s100, the controller outputs a first data stream to the first transmission path and outputs a second data stream to the second transmission path;
s200, after the upper driving chip in the first transmission path acquires the corresponding data in the first data stream, the first data stream is sent to the lower driving chip, and after the upper driving chip in the second transmission path acquires the corresponding data in the second data stream, the second data stream is sent to the lower driving chip until any driving chip is disconnected or the first data stream and the second data stream are received simultaneously, the sending is stopped.
Further, after the previous driving chip in the first transmission path obtains the corresponding data in the first data stream, the step of sending the first data stream to the next driving chip includes:
s210, the upper-level driving chip in the first transmission path receives the first data stream through the first data interface, and after corresponding data in the first data stream are obtained, the first data stream is sent to the first data interface in the lower-level driving chip through the second data interface.
Further, after the previous driving chip in the second transmission path obtains the corresponding data in the second data stream, the step of sending the second data stream to the next driving chip includes:
s220, the upper-level driving chip in the second transmission path receives the second data stream through the second data interface, and after corresponding data in the second data stream are obtained, the second data stream is sent to the second data interface in the lower-level driving chip through the first data interface.
Further, the step of outputting a first data stream to the first transmission path and outputting a second data stream to the second transmission path by the controller comprises:
s110, the controller outputs a first data stream to the first transmission path through the first control port, and outputs a second data stream to the second transmission path through the second control port.
Or the step of outputting a first data stream to the first transmission path and outputting a second data stream to the second transmission path by the controller comprises:
s120, the controller outputs a first data stream to the first transmission path through the first control port, and outputs the second data stream to the second transmission path.
In summary, the present invention provides a bidirectional signal transmission system and a transmission method thereof, wherein the bidirectional signal transmission system includes a controller, a first transmission path and a second transmission path; a plurality of driving chips connected in series are arranged in the first transmission path and the second transmission path; the drive chip at the head end in the first transmission path and the drive chip at the head end in the second transmission path are both connected with the controller, and the drive chip at the tail end in the first transmission path is connected with the drive chip at the tail end in the second transmission path; the controller is configured to output a first data stream to the first transmission path and output a second data stream to the second transmission path; the driving chips are used for acquiring corresponding data in the first data stream or corresponding data in the second data stream, and the two opposite transmission paths are arranged, so that when any one or more continuous chips are disconnected to disconnect one transmission path, the subsequent other chips can normally receive data from the other transmission path, and the reliability of data transmission is improved.
It should be understood that equivalents and modifications of the technical solution and inventive concept thereof may occur to those skilled in the art, and all such modifications and alterations should fall within the scope of the appended claims.

Claims (9)

1. A bidirectional signal transmission system is characterized by comprising a controller, a first transmission path and a second transmission path; a plurality of driving chips connected in series are arranged in the first transmission path and the second transmission path; the drive chip at the head end in the first transmission path and the drive chip at the head end in the second transmission path are both connected with the controller, and the drive chip at the tail end in the first transmission path is connected with the drive chip at the tail end in the second transmission path; the controller is configured to output a first data stream to the first transmission path and output a second data stream to the second transmission path; each driving chip is used for acquiring corresponding data in the first data stream or corresponding data in the second data stream.
2. The bidirectional signal transmission system of claim 1, wherein each driver chip includes a first data interface and a second data interface;
the second data interface of the upper-stage driving chip in the first transmission path is connected with the first data interface of the lower-stage driving chip, and the first data interface of the head-end driving chip is connected with the controller; a first data interface of a previous-stage driving chip in the second transmission path is connected with a second data interface of a next-stage driving chip, the second data interface of a head-end driving chip is connected with the controller, and the first data interface of a tail-end driving chip is connected with the second data interface of the tail-end driving chip in the first transmission path;
the first data interface of each driver chip in the first transmission path is configured to receive the first data stream, and the second data interface is configured to send the first data stream;
the first data interface of each driver chip in the second transmission path is configured to send the second data stream, and the second data interface is configured to receive the second data stream.
3. The bi-directional signal transmission system of claim 2, wherein the controller includes a first control port and a second control port; the first control port is connected with the first data interface of the drive chip at the head end in the first transmission path, and the second control port is connected with the second data interface of the drive chip at the head end in the second transmission path;
the first control port is configured to output the first data stream to the first transmission path, the second control port is configured to output the second data stream to the second transmission path, and the first data stream is different from the second data stream.
4. The bidirectional signal transmission system of claim 2, wherein the controller includes a first control port, the first control port being connected to the first data interface of the head-end driver chip in the first transmission path and the second data interface of the head-end driver chip in the second transmission path;
the first control port is configured to output the first data stream to the first transmission path and output the second data stream to the second transmission path, where the first data stream is the same as the second data stream.
5. A transmission method based on the bidirectional signal transmission system according to any of claims 1 to 4, comprising the steps of:
the controller outputs a first data stream to the first transmission path and outputs a second data stream to the second transmission path;
and after the upper-level driving chip in the second transmission path acquires the corresponding data in the second data stream, the second data stream is sent to the lower-level driving chip, and the sending is stopped until any driving chip is disconnected or the first data stream and the second data stream are received simultaneously.
6. The transmission method of the bidirectional signal transmission system according to claim 5, wherein the step of sending the first data stream to the next driver chip after the previous driver chip in the first transmission path obtains the corresponding data in the first data stream includes:
and the upper-level driving chip in the first transmission path receives the first data stream through the first data interface, and after acquiring corresponding data in the first data stream, sends the first data stream to the first data interface in the lower-level driving chip through the second data interface.
7. The transmission method of the bidirectional signal transmission system according to claim 5, wherein the step of sending the second data stream to a next driver chip after the previous driver chip in the second transmission path acquires corresponding data in the second data stream includes:
and the upper-level driving chip in the second transmission path receives the second data stream through the second data interface, and after acquiring corresponding data in the second data stream, sends the second data stream to the second data interface in the lower-level driving chip through the first data interface.
8. The transmission method of a bidirectional signal transmission system as recited in claim 5, wherein the step of the controller outputting a first data stream to the first transmission path and outputting a second data stream to the second transmission path comprises:
the controller outputs a first data stream to the first transmission path through the first control port and outputs a second data stream to the second transmission path through the second control port.
9. The transmission method of a bidirectional signal transmission system as recited in claim 5, wherein the step of the controller outputting a first data stream to the first transmission path and outputting a second data stream to the second transmission path comprises:
the controller outputs a first data stream to the first transmission path through the first control port and outputs the second data stream to the second transmission path.
CN202010654920.0A 2020-07-09 2020-07-09 Bidirectional signal transmission system and transmission method thereof Pending CN111538690A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010654920.0A CN111538690A (en) 2020-07-09 2020-07-09 Bidirectional signal transmission system and transmission method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010654920.0A CN111538690A (en) 2020-07-09 2020-07-09 Bidirectional signal transmission system and transmission method thereof

Publications (1)

Publication Number Publication Date
CN111538690A true CN111538690A (en) 2020-08-14

Family

ID=71974713

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010654920.0A Pending CN111538690A (en) 2020-07-09 2020-07-09 Bidirectional signal transmission system and transmission method thereof

Country Status (1)

Country Link
CN (1) CN111538690A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117093523A (en) * 2023-10-20 2023-11-21 合肥为国半导体有限公司 Chip array, fault positioning method thereof and electronic equipment
CN117373377A (en) * 2023-12-06 2024-01-09 深圳市绿源半导体技术有限公司 Signal transmission system and signal transmission control method thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101577086A (en) * 2008-05-09 2009-11-11 联阳半导体股份有限公司 Automatic addressing method of series circuit and automatic detection method of series quantity
CN101587680A (en) * 2008-05-20 2009-11-25 北京巨数数字技术开发有限公司 A kind of LED display of integrating with redundancy fault-tolerance drive control chip
CN103455464A (en) * 2012-05-28 2013-12-18 富士通株式会社 Relay device, connection management method, and information communication system
CN105072756A (en) * 2015-08-03 2015-11-18 深圳市明微电子股份有限公司 Light-emitting diode (LED) constant current driving circuit, driving chip and control method of driving chip
WO2016074151A1 (en) * 2014-11-11 2016-05-19 华为技术有限公司 Sas system, traversal method and device thereof
CN105898934A (en) * 2016-06-08 2016-08-24 深圳市聚智德科技有限公司 LED lamp bead with integrated lamp core and lamp bead control system
CN109144908A (en) * 2018-08-27 2019-01-04 郑州云海信息技术有限公司 A kind of data-storage system and method based on cascade Expander

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101577086A (en) * 2008-05-09 2009-11-11 联阳半导体股份有限公司 Automatic addressing method of series circuit and automatic detection method of series quantity
CN101587680A (en) * 2008-05-20 2009-11-25 北京巨数数字技术开发有限公司 A kind of LED display of integrating with redundancy fault-tolerance drive control chip
CN103455464A (en) * 2012-05-28 2013-12-18 富士通株式会社 Relay device, connection management method, and information communication system
WO2016074151A1 (en) * 2014-11-11 2016-05-19 华为技术有限公司 Sas system, traversal method and device thereof
CN105072756A (en) * 2015-08-03 2015-11-18 深圳市明微电子股份有限公司 Light-emitting diode (LED) constant current driving circuit, driving chip and control method of driving chip
CN105898934A (en) * 2016-06-08 2016-08-24 深圳市聚智德科技有限公司 LED lamp bead with integrated lamp core and lamp bead control system
CN109144908A (en) * 2018-08-27 2019-01-04 郑州云海信息技术有限公司 A kind of data-storage system and method based on cascade Expander

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117093523A (en) * 2023-10-20 2023-11-21 合肥为国半导体有限公司 Chip array, fault positioning method thereof and electronic equipment
CN117093523B (en) * 2023-10-20 2024-01-26 合肥为国半导体有限公司 Chip array, fault positioning method thereof and electronic equipment
CN117373377A (en) * 2023-12-06 2024-01-09 深圳市绿源半导体技术有限公司 Signal transmission system and signal transmission control method thereof
CN117373377B (en) * 2023-12-06 2024-02-09 深圳市绿源半导体技术有限公司 Signal transmission system and signal transmission control method thereof

Similar Documents

Publication Publication Date Title
US8385374B1 (en) Multilane communication device
CN111538690A (en) Bidirectional signal transmission system and transmission method thereof
US20020194371A1 (en) Loop network and method for operating the same
CN101599812B (en) Data transferring apparatus
JP5131029B2 (en) Communication apparatus and path switching method
CN101656041A (en) LED screen control system featuring diplonema redundancy fault-tolerance and application method thereof
US20020087763A1 (en) Communication sytem with a communication bus
JP3417369B2 (en) Bus switch adapter, bus switch bridge, bus switch, and bus switch system
JP2002094538A (en) Packet processing method utilizing anti-multiple fault network structure
CN102394734B (en) RS 485 communication system with nonpolarized connection and control method thereof
KR102033112B1 (en) Peripheral Component Interconnect Express switch apparatus and method for controlling connection using the same
CN112751719B (en) Multi-stage series data communication method, system, terminal and storage medium
JP4577157B2 (en) Repeater and optical communication system
JPH03217141A (en) Data processing and transmission network
US6317429B1 (en) Communication apparatus, network system using communication apparatus and control method used in network system
CN105721181A (en) Method of message transmission, backbone switch and access switch
CN112882978B (en) Serial data transmission device, method and data processing equipment
US8923111B2 (en) Wireless transmission method and wireless transmission device
CN117373377B (en) Signal transmission system and signal transmission control method thereof
JP4612640B2 (en) Data communication system and data communication method
CN107800639B (en) Switching device, switching device group, data transmission method and computer system
CN111090606A (en) System of topological type circuit architecture and bus switching method
US8576704B2 (en) Communication system, communication device, integrated circuit, and communication method
CN115277299B (en) Synchronous loop communication system suitable for cascading converter topology
CN114553797B (en) Multi-chip system with command forwarding mechanism and address generation method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20200814