CN111522590B - Method for improving starting speed of VxWorks operating system and application thereof - Google Patents

Method for improving starting speed of VxWorks operating system and application thereof Download PDF

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CN111522590B
CN111522590B CN202010331057.5A CN202010331057A CN111522590B CN 111522590 B CN111522590 B CN 111522590B CN 202010331057 A CN202010331057 A CN 202010331057A CN 111522590 B CN111522590 B CN 111522590B
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vxworks operating
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CN111522590A (en
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李加超
赵羚钧
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CETC Avionics Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4406Loading of operating system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformation of program code
    • G06F8/41Compilation
    • G06F8/44Encoding
    • G06F8/447Target code generation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention discloses a method for improving the starting speed of a VxWorks operating system and application thereof, wherein the method for improving the starting speed of the VxWorks operating system is characterized in that a DDR SDRAM control register with a full-space initial value function in a CPU chip is configured to realize automatic zero clearing of a bypass section of hardware, a default software zero clearing mode is removed, a large number of instructions are not required to be generated to inform the hardware of completion, CPU resources are not occupied, zero clearing operation of the bypass section is not influenced no matter the size of a program, and the starting speed of the VxWorks operating system is greatly improved.

Description

Method for improving starting speed of VxWorks operating system and application thereof
Technical Field
The invention relates to the technical field of communication, in particular to a method for improving the starting speed of a VxWorks operating system and application thereof.
Background
VxWorks is an embedded real-time operating system developed by the united states wind river company (Wind River System, WRS), which is a key component of the embedded development environment. The good sustainable development capability, the high-performance kernel and the friendly user development environment make the kernel occupy an important position in the field of embedded real-time operation systems. VxWorks is widely used in the fields of high-precision technologies such as communication, military, aviation, aerospace and the like and fields with extremely high real-time requirements, such as satellite communication, military exercises, ballistic guidance, aircraft navigation and the like, with good reliability and excellent real-time performance.
With the rapid development of civil aviation industry in China, airlines have put higher demands on performances of various aspects of airborne equipment. The starting time of the onboard equipment based on the VxWorks system is an important index for describing the function of the equipment, and is one of the core performance indexes of the system, wherein the usability of the whole system function is related.
After the VxWorks system is powered on, some necessary initialization operations of the system itself are performed before the useppinit function is executed to enter the user application, such as initializing a system clock, an I/O system, a kernel and a memory, setting machine state words and other hardware related registers, clearing a bss segment, closing interrupts, disabling programs and data caches, setting stack pointers, initializing peripheral devices, and the like. The bss segment Block Started by Symbol Segment refers to a block of memory used to store global variables in a program that are not initialized or have an initial value of 0. The characteristics of the bss segment are readable and writable, and the bss segment belongs to static memory allocation and needs to be cleared when initialized.
In most cases, the global variable in the data segment (data segment) is 0 (or no initial value), then storing so many 0's into the destination file (or executable file) is virtually unnecessary. Therefore, in order to save space, when the target file is generated, variables in the data section without an initial value or with an initial value of 0 are placed in the bss section, the bss section is cut off, only the starting address and the ending address of the bss section are needed to be stored, and when the target file is loaded (operated), zero clearing initialization of the bss section is carried out according to the two data. Thus, the target file does not need to be large, so that the purpose of saving space is achieved, and meanwhile, the loading speed is improved. Without the zero-out operation of the bss segment, the inside would be all random values, so that the value of the uninitialized global variable would also be unknown, which would have unexpected consequences at program run-time, so the zero-out operation of the bss segment is indispensable.
As shown in a diagram of fig. 1, a conventional starting method of VxWorks is to execute a romInit function after a system is powered on and execute a usrInit function after a memory DDR (Double Data Rate Synchronous Dynamic Random Access Memory, DDR SDRAM) is initialized, and the bsss section is cleared by software after the usrInit function is called in the execution process of the function, which requires a great amount of resources to be called to notify specific hardware to execute through instructions, and affects the starting speed of VxWorks while consuming resources of a central processing unit (Central Processing Unit, CPU).
In the traditional software starting method, the zero clearing mode of the bss section needs to be realized by calling software to execute a bzero function, and the bzero function is as follows:
Figure BDA0002464971890000021
where s represents the start address of the bss segment and n represents the length of the bss segment. Thus, as the program gets larger, the bss segment gets longer and longer, which will take a lot of time when the VxWorks system starts up.
Disclosure of Invention
In order to solve the technical problems that the traditional starting method (namely software zero clearing bss section) of the VxWorks operating system occupies and consumes resources of a central processing unit and affects the starting speed of the system, the invention provides a method for improving the starting speed of the VxWorks operating system, which removes the default software zero clearing method of the original system, and for DDR SDRAM, a corresponding DDR controller is arranged in a CPU chip, the DDR controller is generally used for automatically controlling the operations such as refreshing and row and column access time delay of the DDR chip, and certain DDR controllers have the function of carrying out full-space initialization value during DDR initialization configuration. The full-space initialization function of DDR controller hardware is utilized, CPU resources are not occupied, and the starting speed of a VxWorks operating system can be improved.
The invention is realized by the following technical scheme:
the method for improving the starting speed of the VxWorks operating system comprises the following steps of configuring a DDR SDRAM control register with a full space initialization function in a CPU chip to realize automatic hardware zero clearing of a bss section, wherein the configuration process is specifically as follows:
step S1, compiling an application program target file: setting reasonable compiling options to put variables in the data section without initial values or with initial values of 0 into the bss section;
step S2, linking the application program target file generated in the step S1 with the system file of VxWorks to generate a target file;
step S3, converting the target file generated in the step S2 into an executable file: ensuring that the bss segment is cut off by setting reasonable compiling options;
and step S4, before loading the VxWorks operating system, the DDR full space initialization is realized to be zero by configuring a controller of the DDR SDRAM.
Preferably, setting a reasonable compiling option in step S1 of the present invention places variables in the data segment without an initial value or with an initial value of 0 into the bss segment, specifically: in the GCC (GNU Compiler Collection, GNU compiler suite) compiler environment, control is exercised with no added compilation option-fno-zero-initialized-in-bss to place variables in the data segment that have no initial value or an initial value of 0 into the bss segment.
Preferably, setting a reasonable compiling option in step S3 of the present invention ensures that the bss segment is cut out specifically as follows: in the GCC compiler environment, the control is performed to cut out the bss segment by adding a compiling option set-section-flags (reference command: obj copy-O binary-S myboot. If-set-section-flags. Bss=contents, alloy, load, data myboot. O).
When the DDR initialization flow enters the final stage after the equipment is powered on, the invention ensures that the full space of the DDR SDRAM is initialized to zero by configuring a proper DDR SDRAM control register, removes the operation of clearing the bss section of default software of the VxWorks operating system in the original usrInit function initialization after the VxWorks operating system is loaded, and then executes the usrAppInit function to enter the user application.
Compared with the prior art, the invention has the following advantages and beneficial effects:
in the traditional software zero clearing process, a great amount of resources are required to be called for realizing the realization of function calling jump, field context protection, parameter entering push stack processing, specific execution of functions and the like, and specific hardware is notified to complete the realization through instructions, so that the starting speed of VxWorks is influenced while CPU resources are consumed in the mode. And as the program gets larger, the bss segment gets longer and longer, which will take a lot of time when the VxWorks system starts up. Compared with the prior art, the method for improving the starting speed of the VxWorks operating system provided by the invention has the advantages that the DDR SDRAM control register is arranged, so that the hardware automatically clears the bss section, the default software clearing mode is eliminated, a large number of instructions are not required to be generated to inform the hardware to complete, CPU resources are not occupied, the clearing operation of the bss section is not influenced no matter the size of the program, and the starting speed of the VxWorks operating system is greatly improved.
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The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention. In the drawings:
fig. 1 is a schematic diagram comparing a conventional VxWorks operating system start-up with the VxWorks operating system start-up procedure of the present invention.
In the figure: a is a traditional VxWorks operating system starting method, and b is an improved VxWorks operating system starting method.
Detailed Description
For the purpose of making apparent the objects, technical solutions and advantages of the present invention, the present invention will be further described in detail with reference to the following examples and the accompanying drawings, wherein the exemplary embodiments of the present invention and the descriptions thereof are for illustrating the present invention only and are not to be construed as limiting the present invention.
Example 1
The embodiment provides a method for improving the starting speed of a VxWorks operating system.
For DDR SDRAM, a corresponding DDR controller is arranged in a CPU chip, the DDR controller is generally used for automatically controlling operations such as refreshing and row access time delay of a DDR chip, and some DDR controllers have the function of performing full space initialization when DDR initialization is configured. Therefore, the method provided by the embodiment uses the function of full-space initialization of DDR SDRAM control register, and makes hardware clear the bss automatically, eliminates the mode of clearing default software, does not need to generate a large number of instructions to inform the hardware to complete, does not occupy CPU resources, and does not influence clearing operation of the bss regardless of the size of the program, thereby greatly improving the starting speed of the VxWorks operating system.
Specifically, in this embodiment, as shown in b diagram of fig. 1, after a series of necessary internal initialization operations, when the DDR initialization flow enters the final stage, the VxWorks operating system of this embodiment loads the operation configured by the DDR SDRAM control register, so that the full space of the DDR SDRAM is initialized to zero, and the hardware automatic clear bss segment is implemented, and in the original usrInit function initialization, the default software clear bss segment operation of the VxWorks operating system is removed, and then the usrAppInit function is executed to enter the user application. In other words, through the improved starting mode, the VxWorks operating system can complete the initialization starting process more quickly.
Specifically, the DDR SDRAM control register configuration procedure in the method of the present embodiment is specifically as follows:
step S1, compiling an application program target file: setting reasonable compiling options to put variables in the data section without initial values or with initial values of 0 into the bss section; as in the GCC compiler environment, control can be exercised by not adding the compilation option-fno-zero-initialized-in-bss to place variables in the data segment that have no initial value or an initial value of 0 into the bss segment.
And step S2, linking the application program target file generated in the step S1 with the system file of VxWorks to generate a target file.
Step S3, converting the target file generated in the step S2 into an executable file: by setting reasonable compiling options, the bss segment is ensured to be cut off. The control of clipping out the bss segment may be performed, for example, in the GCC compiler environment, by adding a compilation option set-section-flags (reference command: obj copy-O binary-S myboot. If-set-section-flags. Bss=contents, alloy, load, data myboot. O).
And step S4, before loading the VxWorks operating system, the DDR full space initialization is realized to be zero by configuring a controller of the DDR SDRAM.
The computer program product of the embodiment can be loaded and executed in the power-on of the equipment, and the bypass segment zero clearing is automatically realized by hardware through the configuration of a proper DDR SDRAM control register, so that the default software zero clearing in the VxWorks operating system is replaced, and the starting speed of the VxWorks operating system is greatly improved.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The foregoing description of the embodiments has been provided for the purpose of illustrating the general principles of the invention, and is not meant to limit the scope of the invention, but to limit the invention to the particular embodiments, and any modifications, equivalents, improvements, etc. that fall within the spirit and principles of the invention are intended to be included within the scope of the invention.

Claims (5)

1. The method for improving the starting speed of the VxWorks operating system is characterized by comprising the following steps of configuring a DDR SDRAM control register with a full space initial value function in a CPU chip to realize automatic hardware zero clearing of a bypass section, wherein the configuration process comprises the following steps:
step S1, compiling an application program target file: setting reasonable compiling options to put variables in the data section without initial values or with initial values of 0 into the bss section;
step S2, linking the application program target file generated in the step S1 with the system file of VxWorks to generate a target file;
step S3, converting the target file generated in the step S2 into an executable file: ensuring that the bss segment is cut off by setting reasonable compiling options;
and step S4, before loading the VxWorks operating system, realizing DDR full space initialization to zero by configuring a control register of the DDR SDRAM.
2. The method for increasing the start-up speed of the VxWorks operating system according to claim 1, wherein the step S1 of setting a reasonable compiling option to put variables in the data segment without an initial value or with an initial value of 0 into the bss segment is specifically: as in the GCC compiler environment, the control is performed by using the non-added compilation option-fno-zero-initialized-in-bss to put variables in the data segment that have no initial value or an initial value of 0 into the bss segment.
3. The method for increasing the start-up speed of the VxWorks operating system according to claim 1 or 2, wherein the setting of a reasonable compiling option in step S3 ensures that the bss segment is cut out specifically: the control is performed to cut out the bss segment, e.g. in GCC compiler environment, with the addition of a compilation option set-section-flags.
4. Computer device, characterized in that it is configured to run the method steps of any of the preceding claims 1-3.
5. The VxWorks operating system for improving the starting speed is characterized by comprising the computer equipment of claim 4, when the DDR initialization flow enters the final stage after the computer equipment is powered on, the full space of the current DDR SDRAM is initialized to zero by hardware by running the method steps of any one of claims 1 to 3, the automatic zero clearing bypass section is realized, the default software zero clearing bypass section of the VxWorks operating system is removed in the original usrInit function initialization, and then the usrAppInit function is executed to enter the user application.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1959636A (en) * 2006-11-17 2007-05-09 迈普(四川)通信技术有限公司 Method for booting embedded type device
CN101751273A (en) * 2008-12-15 2010-06-23 中国科学院声学研究所 Safety guide device and method for embedded system
CN101950281A (en) * 2010-07-06 2011-01-19 北京中星微电子有限公司 Method and device for controlling coprocessor
CN103942069A (en) * 2014-04-01 2014-07-23 西安睿控创合电子科技有限公司 Quick starting optimizing method based on X86 platform Vxworks operation system
CN110221870A (en) * 2019-06-11 2019-09-10 北京无线电测量研究所 The quick start method of VxWorks

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1959636A (en) * 2006-11-17 2007-05-09 迈普(四川)通信技术有限公司 Method for booting embedded type device
CN101751273A (en) * 2008-12-15 2010-06-23 中国科学院声学研究所 Safety guide device and method for embedded system
CN101950281A (en) * 2010-07-06 2011-01-19 北京中星微电子有限公司 Method and device for controlling coprocessor
CN103942069A (en) * 2014-04-01 2014-07-23 西安睿控创合电子科技有限公司 Quick starting optimizing method based on X86 platform Vxworks operation system
CN110221870A (en) * 2019-06-11 2019-09-10 北京无线电测量研究所 The quick start method of VxWorks

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
"VME模块VxWorks驱动程序设计";邵宇航;《中国优秀硕士学位论文全文数据库 信息科技辑 (月刊)》;I138-874 *
U-Boot启动流程分析与S3C2410上的移植;董晨等;《电脑开发与应用》(第08期);53-54 *
基于ARM-Linux嵌入式移动POS机系统中启动程序的研究与设计;徐晨辉等;《电子测量技术》(第01期);77-81 *
嵌入式实时操作系统VxWorks下BSP分析及VxWorks裁减;褚哲等;《天津工程师范学院学报》(第02期);27-30 *
张丹 等."嵌入式系统引导加载程序分析".《软件》.2012,(第7期),27-29. *

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