CN111510235A - Audio clock synchronization method, device, system, computer device and storage medium - Google Patents

Audio clock synchronization method, device, system, computer device and storage medium Download PDF

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Publication number
CN111510235A
CN111510235A CN202010177289.XA CN202010177289A CN111510235A CN 111510235 A CN111510235 A CN 111510235A CN 202010177289 A CN202010177289 A CN 202010177289A CN 111510235 A CN111510235 A CN 111510235A
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clock
audio
network chip
module
synchronous
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童友连
曺亚曦
王克彦
杨国全
贾天婕
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Zhejiang Huachuang Video Signal Technology Co Ltd
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Zhejiang Huachuang Video Signal Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0685Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0697Synchronisation in a packet node

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The invention discloses an audio clock synchronization method, an audio clock synchronization device, an audio clock synchronization system, a computer device and a storage medium, wherein a first clock module and a second clock module are started, the first clock module provides a first working clock for a first network chip, the second clock module provides a second working clock for a second network chip, according to a Precise Time Protocol (PTP), the first network chip outputs a synchronous clock to the first clock module, the first network chip outputs the synchronous clock to the second network chip, and the synchronous clocks replace the first working clock and the second working clock respectively.

Description

Audio clock synchronization method, device, system, computer device and storage medium
Technical Field
The present application relates to the field of circuit technologies, and in particular, to an audio clock synchronization method, device, system, computer device, and storage medium.
Background
In the use of digital audio circuits, the circuit characterizes the audio signal by sampling, the number of samples per second is called the sampling rate, the higher the sampling rate is, the more audio signals are collected, professional audio equipment in the related art provides a sampling rate with a frequency higher than 44.1kHz, and an attempt is made to obtain better audio effects by a high sampling rate. In the case of an audio device operating at a set sampling rate, a digital clock in the digital audio circuit provides pulses at the selected sampling rate that determine the precise location of each sample on the time axis. However, the digital clock may fluctuate, and fig. 1 is a schematic diagram of the fluctuation of the digital clock according to the related art, and as shown in fig. 1, an audio device with a sampling rate set to 44.1kHz is likely to operate at 44.12kHz at a certain time and then operate with the sampling rate shifted to 44.09kHz, and these fluctuations that are disruptive to the audio effect are referred to as time base errors, also referred to as Jitter (Jitter). Under the condition that the playing and the collection of the audio frequency do not belong to the same audio frequency processor, the audio frequency collection device and the audio frequency playing device are independent bodies and have respective audio frequency processors, and clock jitter generated among the plurality of audio frequency processors is in an uncontrollable range.
In the related art, a method of stamping digital audio with timestamp information is adopted, and the timestamp information is utilized to perform time alignment, so as to realize clock synchronization, however, as time increases, the amount of audio data to be aligned becomes more and more, the demand on memory resources becomes greater and more, and the efficiency of an audio algorithm also decreases.
In the related art, as time increases, the amount of audio data to be aligned is more and more, which leads to the problem of reduced efficiency of the audio algorithm, and no effective solution is proposed at present.
Disclosure of Invention
In order to solve the problem that the efficiency of an audio algorithm is reduced due to the fact that the audio data needing to be aligned is more and more along with the increase of time in the related art, the invention provides an audio clock synchronization method, an audio clock synchronization device, an audio clock synchronization system, a computer device and a storage medium, and at least solves the problem.
According to an aspect of the present invention, there is provided a method of audio clock synchronization, the method comprising:
starting a first clock module and a second clock module, wherein the first clock module provides a first working clock for a first network chip, and the second clock module provides a second working clock for a second network chip;
according to a Precision Time Protocol (PTP), the first network chip outputs a synchronous clock to the first clock module, the first network chip outputs the synchronous clock to the second network chip, and the synchronous clocks respectively replace the first working clock and the second working clock.
In one embodiment, after the first network chip outputs the synchronized clock to the first clock module according to the PTP, the method further includes:
and the first clock module outputs the synchronous clock to a first audio processor, and the first audio processor plays audio according to the synchronous clock.
In one embodiment, after the first network chip outputs the synchronized clock to the second network chip, the method further comprises:
the second network chip outputs the synchronous clock to the second clock module;
and the second clock module outputs the synchronous clock to a second audio processor, and the second audio processor performs audio acquisition according to the synchronous clock.
In one embodiment, the audio acquisition by the second audio processor according to the synchronous clock comprises:
and in a preset time period, the second audio processor collects the audio played by the first audio processor according to the synchronous clock.
In one embodiment, after the first clock module outputs the synchronized clock to a first audio processor, the method comprises:
the first audio processor outputs audio to a first processor, which transmits the audio to the first network chip;
the first network chip transmits the audio to the second network chip, and the second network chip transmits the audio to a second processor for processing.
According to another aspect of the present invention, there is provided an audio clock synchronization apparatus including a first clock module and a first network chip:
the audio clock synchronization equipment starts the first clock module, and the first clock module is used for providing a first working clock for the first network chip;
according to a precision time protocol PTP, the first network chip is configured to output a synchronous clock to the first clock module, and the first network chip is further configured to output the synchronous clock to a second network chip, where the synchronous clock respectively replaces the first working clock and the second working clock, and the second working clock is a working clock provided by the second clock module to the second network chip.
According to another aspect of the present invention, there is provided an audio clock synchronization apparatus including a second clock module and a second network chip:
the audio clock synchronization equipment starts the second clock module, and the second clock module is used for providing a second working clock for the second network chip;
according to a precision time protocol PTP, the second network chip is configured to receive a synchronous clock output by the first network chip, and the synchronous clock respectively replaces the first working clock and the second working clock, where the first working clock is a working clock provided by the first clock module to the first network chip.
According to another aspect of the present invention, there is provided a system for audio clock synchronization, the system comprising a first audio device and a second audio device, the first audio device comprising a first clock module and a first network chip, the second audio device comprising a second clock module and a second network chip:
the first audio equipment starts the first clock module, the second audio equipment starts the second clock module, the first network chip adopts a first working clock provided by the first clock module, and the second network chip adopts a second working clock provided by the second clock module;
according to a Precision Time Protocol (PTP), the first network chip outputs a synchronous clock to the first clock module, the first network chip outputs the synchronous clock to the second network chip, and the synchronous clock replaces the first working clock and the second working clock.
According to another aspect of the present invention, there is provided a computer device comprising a memory storing a computer program and a processor implementing any of the methods described above when the processor executes the computer program.
According to another aspect of the invention, there is provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements any of the methods described above.
According to the invention, the first clock module and the second clock module are started, the first clock module provides a first working clock for the first network chip, the second clock module provides a second working clock for the second network chip, according to the precision time protocol PTP, the first network chip outputs the synchronous clock to the first clock module, the first network chip outputs the synchronous clock to the second network chip, and the synchronous clocks respectively replace the first working clock and the second working clock, so that the problem of the reduction of the efficiency of the audio algorithm caused by the more and more audio data needing to be aligned along with the increase of time is solved, and the efficiency of the audio algorithm is improved while the clock synchronization among different devices is realized.
Drawings
Fig. 1 is a schematic diagram of digital clock fluctuations in accordance with the related art;
FIG. 2 is a schematic diagram of an application environment of a method for audio clock synchronization according to an embodiment of the present invention;
FIG. 3 is a first flowchart of a method of audio clock synchronization according to an embodiment of the present invention;
FIG. 4 is a flow chart two of a method of audio clock synchronization according to an embodiment of the present invention;
FIG. 5 is a flow chart three of a method of audio clock synchronization according to an embodiment of the present invention;
FIG. 6 is a fourth flowchart of a method of audio clock synchronization according to an embodiment of the present invention;
FIG. 7 is a fifth flowchart of a method of audio clock synchronization according to an embodiment of the present invention;
FIG. 8 is a block diagram of the first embodiment of the audio clock synchronization apparatus according to the present invention;
FIG. 9 is a block diagram of the structure of an audio clock synchronization apparatus according to an embodiment of the present invention;
fig. 10 is a block diagram of the structure of an audio clock synchronization system according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The method for audio clock synchronization provided by the present application can be applied to the application environment shown in fig. 2, and fig. 2 is an application environment schematic diagram of the method for audio clock synchronization according to the embodiment of the present invention, as shown in fig. 2, the master device 21 includes a master chip 211 and a master clock 212, the slave device 22 includes a slave chip 221 and a slave clock 222, after the master device 21 and the slave device 22 are started, the master clock 212 provides a first working clock for the master device 21, the slave clock 222 provides a second working clock for the slave device 22, the master chip 211 obtains a synchronization clock according to a Precision Time Protocol (PTP), and transmits the synchronization clock to the slave chip 221, and the slave chip 221 transmits the synchronization clock to the slave clock 222, thereby implementing clock synchronization between the master device 21 and the slave device 22. The transmission of the clock between the master device 21 and the slave device 22 may be implemented by a network cable, or may be implemented by a wireless network, bluetooth, or a mobile network.
In one embodiment, a method for audio clock synchronization is provided, and fig. 3 is a flowchart illustrating a method for audio clock synchronization according to an embodiment of the present invention, as shown in fig. 3, the method includes the following steps:
step S302, starting a first clock module and a second clock module, where the first clock module provides a first operating clock for the first network chip, and the second clock module provides a second operating clock for the second network chip, where the first clock module and the second clock module may be Phase locked loops (Phase L keyed L oop, abbreviated as P LL), the first network chip and the second network chip may be Port Physical layers (Port Physical L layer, abbreviated as PHY), and the PHY chip supports PTP protocol, and in a synchronous circuit, a clock is usually used as a timer to ensure that related electronic circuits are operated synchronously.
Step S304, according to the PTP protocol, the first network chip outputs a synchronous clock to the first clock module, the first network chip outputs a synchronous clock to the second network chip, and the synchronous clocks respectively replace the first working clock and the second working clock. According to the PTP protocol, the first network chip obtains a clock signal as a synchronous clock of the device and outputs the synchronous clock to the first clock module and the second network chip, the PTP protocol is a high-precision time synchronization protocol and can reach sub-microsecond precision, the first network chip can transmit the synchronous clock through network wiring, for example, the network wiring may be register jack 45 (abbreviated as RJ45), the RJ45 is one of information socket connectors in a wiring system, the connector is composed of a plug and a socket, and the plug has 8 grooves and 8 contacts.
Through the steps S302 and S304, the first network chip obtains the synchronous clock according to the PTP protocol, and transmits the synchronous clock to the second network chip, so as to implement clock synchronization between different devices, solve the problem that the audio algorithm efficiency is reduced as the amount of audio data to be aligned increases with the increase of time, and improve the efficiency of the audio algorithm while implementing clock synchronization between different devices.
In one embodiment, fig. 4 is a flowchart ii of a method for audio clock synchronization according to an embodiment of the present invention, and as shown in fig. 4, the method may further include the following steps:
step S402, the first Clock module outputs the synchronous Clock to the first Audio processor, and the first Audio processor plays Audio according to the synchronous Clock, wherein the Audio processor (Audio Codec) is configured to perform encoding and decoding processing on Audio and output Audio outwards, a working Clock (Media Clock, abbreviated as MC L K) of the first Audio processor is also the synchronous Clock, and through the step S402, the first Audio processor obtains the synchronous Clock, thereby maintaining the synchronization of the clocks in the digital Audio circuit and improving the quality of the output Audio.
In one embodiment, fig. 5 is a flowchart three of a method for audio clock synchronization according to an embodiment of the present invention, as shown in fig. 5, the method may further include the following steps:
step S502, the second network chip outputs a synchronous clock to the second clock module.
Step S504, the second clock module outputs the synchronous clock to the second audio processor, and the second audio processor performs audio acquisition according to the synchronous clock. After obtaining the synchronous clock, the second clock module locks and aligns the synchronous clock, and the second audio processor receives the synchronous clock output by the second clock module as a working clock and acquires audio through a Microphone (Microphone for short).
Through the steps S502 and S504, the second audio device obtains the synchronous clock and runs with the same working clock as the first audio device, so that audio jitter between different devices is reduced, and the quality of audio acquisition is improved.
In one embodiment, fig. 6 is a flowchart four of a method for audio clock synchronization according to an embodiment of the present invention, as shown in fig. 6, the method may further include the following steps:
step S602, in a preset time period, the second audio processor collects the audio played by the first audio processor according to the synchronous clock. The preset time period may be 10ms or other time value, for example, in the case that the preset time period is 10ms, the second audio device may capture the audio output by the first audio device within 10 ms. Through the step S602, the second audio device collects the audio signal of the first audio device in time, so that the audio data to be processed accumulated along with the increase of time is reduced, and the efficiency of the audio algorithm is further improved.
In one embodiment, fig. 7 is a flowchart five of a method for audio clock synchronization according to an embodiment of the present invention, as shown in fig. 7, the method may further include the following steps:
in step S702, the first audio processor outputs the audio to the first processor, and the first processor transmits the audio to the first network chip. The first audio processor may deliver the audio data to the first processor through an Integrated Interface of Sound (IIS).
Step S704, the first network chip transmits the audio to the second network chip, and the second network chip transmits the audio to the second processor for processing.
By the above-described steps S702 and S704, the audio data is transferred from the first audio processor to the second audio processor through the IIS and the network wiring, improving the transmission efficiency of the audio data.
In one embodiment, the synchronous clock is corrected according to the PTP protocol. In the process of realizing synchronization by using the PTP, jitter also occurs, but the PTP performs clock correction according to time deviation and network delay, so as to realize clock synchronization.
It should be understood that, although the respective steps in the flowcharts of fig. 3 to 7 are sequentially shown as indicated by arrows, the steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 3-7 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performing the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.
Corresponding to the method for audio clock synchronization, in this embodiment, an audio clock synchronization device is further provided, and the audio clock synchronization device is used to implement the foregoing embodiment and the preferred embodiment, which have already been described and are not described again. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementations in hardware or a combination of software and hardware are also possible and contemplated.
In an embodiment, an audio clock synchronization apparatus is provided, fig. 8 is a block diagram of a first structure of the audio clock synchronization apparatus according to the embodiment of the present invention, as shown in fig. 8, the audio clock synchronization apparatus in the embodiment includes a first clock module 81 and a first network chip 82, where:
the audio clock synchronization device starts a first clock module 81, and the first clock module 81 is configured to provide a first operating clock for the first network chip 82.
According to the precision time protocol PTP, the first network chip 82 is configured to output a synchronous clock to the first clock module 81, and the first network chip 82 is further configured to output a synchronous clock to the second network chip, where the synchronous clock replaces a first operating clock and a second operating clock respectively, and the second operating clock is an operating clock provided by the second clock module to the second network chip.
Through the audio clock synchronization device, the first network chip 82 sends the synchronization clock to the second network chip, so that clock synchronization between the device where the first network chip 82 is located and the device where the second network chip is located is achieved, the problem that the efficiency of an audio algorithm is reduced due to the fact that more and more audio data needing to be aligned are increased along with the increase of time is solved, and the efficiency of the audio algorithm is improved while clock synchronization between different devices is achieved.
In an embodiment, an audio clock synchronization apparatus is provided, fig. 9 is a block diagram of a structure of the audio clock synchronization apparatus according to an embodiment of the present invention, and as shown in fig. 9, the audio clock synchronization apparatus in this embodiment includes a second clock module 91 and a second network chip 92, where:
the audio clock synchronization device starts the second clock module 91, and the second clock module 91 is configured to provide the second network chip 92 with the second operating clock.
According to the precision time protocol PTP, the second network chip 92 is configured to receive a synchronous clock output by the first network chip 82, and the synchronous clock respectively replaces a first operating clock and a second operating clock, where the first operating clock is an operating clock provided by the first clock module to the first network chip 82.
Through the audio clock synchronization device, the second network chip 92 receives the synchronization clock sent by the first network chip, so that clock synchronization between the device where the second network chip 92 is located and the device where the first network chip 82 is located is realized, the problem that the audio algorithm efficiency is reduced due to the fact that more and more audio data needing to be aligned are increased along with the increase of time is solved, and the efficiency of the audio algorithm is improved while clock synchronization between different devices is realized.
In one embodiment, a system for audio clock synchronization is provided, and fig. 10 is a block diagram of an audio clock synchronization system according to an embodiment of the present invention, as shown in fig. 10, the audio clock synchronization system includes a first audio device 1002 and a second audio device 1004, the first audio device 1002 includes a first clock module 81 and a first network chip 82, the second audio device 1004 includes a second clock module 91 and a second network chip 92:
the first audio device 1002 starts the first clock module 81, the second audio device 1004 starts the second clock module 91, the first network chip 82 adopts a first working clock provided by the first clock module 81, and the second network chip 92 adopts a second working clock provided by the second clock module 91; according to the precision time protocol PTP protocol, the first network chip 82 outputs a synchronous clock to the first clock module 81, and the first network chip 82 outputs a synchronous clock to the second network chip 92, the synchronous clock replacing the first operating clock and the second operating clock.
Through the audio clock synchronization system, the first network chip 82 sends the synchronization clock to the second network chip 92, so that clock synchronization between the first audio device 1002 and the second audio device 1004 is realized, the problem that the efficiency of an audio algorithm is reduced due to the fact that more and more audio data needing to be aligned are increased along with the increase of time is solved, and the efficiency of the audio algorithm is improved while the clock synchronization between different devices is realized.
In one embodiment, a computer device is provided. The computer device may be a server. The computer device includes a processor, a memory, a network interface, and a database connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The database of the computer device is used for storing clock data. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a method of audio clock synchronization.
In one embodiment, a computer device is provided, which includes a memory, a processor, and a computer program stored on the memory and executable on the processor, and the processor executes the computer program to implement the steps of the method for audio clock synchronization provided by the above embodiments.
In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, implements the steps in the method of audio clock synchronization provided by the various embodiments described above.
It will be understood by those of ordinary skill in the art that all or a portion of the processes of the methods of the embodiments described above may be implemented by a computer program that may be stored on a non-volatile computer-readable storage medium, which when executed, may include the processes of the embodiments of the methods described above, wherein any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A method of audio clock synchronization, the method comprising:
starting a first clock module and a second clock module, wherein the first clock module provides a first working clock for a first network chip, and the second clock module provides a second working clock for a second network chip;
according to a Precision Time Protocol (PTP), the first network chip outputs a synchronous clock to the first clock module, the first network chip outputs the synchronous clock to the second network chip, and the synchronous clocks respectively replace the first working clock and the second working clock.
2. The method for audio clock synchronization according to claim 1, wherein after the first network chip outputs a synchronized clock to the first clock module according to Precision Time Protocol (PTP), the method further comprises:
and the first clock module outputs the synchronous clock to a first audio processor, and the first audio processor plays audio according to the synchronous clock.
3. The method of audio clock synchronization of claim 2, wherein after the first network chip outputs the synchronized clock to the second network chip, the method further comprises:
the second network chip outputs the synchronous clock to the second clock module;
and the second clock module outputs the synchronous clock to a second audio processor, and the second audio processor performs audio acquisition according to the synchronous clock.
4. The method of audio clock synchronization of claim 3, wherein the audio capture by the second audio processor from the synchronized clock comprises:
and in a preset time period, the second audio processor collects the audio played by the first audio processor according to the synchronous clock.
5. The method of audio clock synchronization of claim 2, wherein after the first clock module outputs the synchronized clock to a first audio processor, the method comprises:
the first audio processor outputs audio to a first processor, which transmits the audio to the first network chip;
the first network chip transmits the audio to the second network chip, and the second network chip transmits the audio to a second processor for processing.
6. An audio clock synchronization apparatus, comprising a first clock module and a first network chip:
the audio clock synchronization equipment starts the first clock module, and the first clock module is used for providing a first working clock for the first network chip;
according to a precision time protocol PTP, the first network chip is configured to output a synchronous clock to the first clock module, and the first network chip is further configured to output the synchronous clock to a second network chip, where the synchronous clock respectively replaces the first working clock and the second working clock, and the second working clock is a working clock provided by the second clock module to the second network chip.
7. An audio clock synchronization apparatus, comprising a second clock module and a second network chip:
the audio clock synchronization equipment starts the second clock module, and the second clock module is used for providing a second working clock for the second network chip;
according to a precision time protocol PTP, the second network chip is configured to receive a synchronous clock output by the first network chip, and the synchronous clock respectively replaces the first working clock and the second working clock, where the first working clock is a working clock provided by the first clock module to the first network chip.
8. A system for audio clock synchronization, the system comprising a first audio device and a second audio device, the first audio device comprising a first clock module and a first network chip, the second audio device comprising a second clock module and a second network chip:
the first audio equipment starts the first clock module, the second audio equipment starts the second clock module, the first network chip adopts a first working clock provided by the first clock module, and the second network chip adopts a second working clock provided by the second clock module;
according to a Precision Time Protocol (PTP), the first network chip outputs a synchronous clock to the first clock module, the first network chip outputs the synchronous clock to the second network chip, and the synchronous clock replaces the first working clock and the second working clock.
9. A computer device comprising a memory and a processor, the memory storing a computer program, wherein the processor implements the steps of the method of any one of claims 1 to 5 when executing the computer program.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 5.
CN202010177289.XA 2020-03-13 2020-03-13 Audio clock synchronization method, device, system, computer device and storage medium Pending CN111510235A (en)

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WO2022037654A1 (en) * 2020-08-20 2022-02-24 华为技术有限公司 Time synchronization failure processing method, apparatus and system, and storage medium
CN117353858A (en) * 2023-12-01 2024-01-05 深圳市维海德技术股份有限公司 Audio clock synchronization method, system, equipment and readable storage medium

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Application publication date: 20200807