CN111505389A - Differential capacitance detection circuit based on sampling holder demodulation - Google Patents
Differential capacitance detection circuit based on sampling holder demodulation Download PDFInfo
- Publication number
- CN111505389A CN111505389A CN202010365307.7A CN202010365307A CN111505389A CN 111505389 A CN111505389 A CN 111505389A CN 202010365307 A CN202010365307 A CN 202010365307A CN 111505389 A CN111505389 A CN 111505389A
- Authority
- CN
- China
- Prior art keywords
- demodulation
- circuit
- pass filter
- low
- capacitance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2605—Measuring capacitance
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
- G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
- G01D5/14—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
- G01D5/24—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Amplifiers (AREA)
Abstract
The invention relates to a differential capacitance detection circuit based on sampling holder demodulation, which comprises a capacitance reading front-end circuit, a demodulation and low-pass filter circuit, an A/D conversion circuit and a digital signal processor 4 for controlling carrier frequency and analog switch driving signals. The demodulation and low-pass filter circuit adopts the sampling holder as a phase-sensitive demodulation scheme, so that the effective value of a demodulation output signal is close to the amplitude of an envelope, high-frequency carriers are effectively inhibited and capacitance detection noise is reduced while demodulation is carried out; the invention reduces the power supply voltage of the device under the same capacitance detection gain, thereby reducing the static power consumption of the chip; the buffer amplifier demodulation circuit of the sampling holder is combined with the post-stage low-pass filter, so that an operational amplifier is saved, the structure is simple, and the design of a sensor miniaturization product is facilitated.
Description
Technical Field
The invention relates to the technical field of capacitance detection, in particular to a differential capacitance detection circuit based on sampling and holding device demodulation.
Background
At present, in a high-precision sensor with sensitive capacitance change caused by physical quantity change such as a displacement sensor, an acceleration sensor, a gyroscope and the like, a weak capacitance signal can be converted into a voltage, current or frequency form convenient for measurement and transmission by means of various signal conditioning circuits, so that the capacitance detection circuit has the requirements of low noise, low power consumption, simple structure and the like.
A conventional modulation and demodulation type capacitance detection scheme for a differential capacitance sensor is known, and specifically includes: firstly, converting the variable quantity of a capacitor to be measured into the voltage variable quantity of a double-sideband suppressed carrier amplitude modulation envelope through a modulation circuit; then, phase-sensitive demodulation is carried out through an analog multiplier or an electronic switch; and finally, filtering the high-frequency carrier wave through a low-pass filter to recover the capacitance change information. Finally, the conditioning process of converting the capacitance signal into the voltage signal is realized.
In the traditional modulation and demodulation type capacitance detection circuit, the envelope of the phase-sensitive demodulation output signal is a capacitance change signal, but the envelope contains abundant high-frequency carrier information, so that the effective value is only 0.707 times of the peak value, namely, the amplitude gain amplified in the modulation process has certain loss in the demodulation process. If the effective value of the demodulated output signal can reach the amplitude of the envelope as much as possible, the supply voltage of the device in the circuit can be reduced by 30% under the same modulation gain, the static power consumption is reduced, and the high-frequency carrier suppression and the capacitance detection noise reduction are facilitated.
Disclosure of Invention
The invention aims to provide a differential capacitance detection circuit based on sample-and-hold demodulation, aiming at the defects of the prior art. The invention reduces the noise and power consumption of the capacitance detection circuit by improving the phase-sensitive demodulation scheme.
The purpose of the invention is realized by the following technical scheme: a differential capacitance detection circuit based on sampling holder demodulation comprises a capacitance reading front-end circuit, a demodulation and low-pass filter circuit, an A/D conversion circuit and a digital signal processor; the output end of the capacitance reading front-end circuit is connected with the input end of the demodulation and low-pass filter circuit; the input end of the A/D conversion circuit is connected with the output end of the demodulation and low-pass filter circuit; the capacitance reading front-end circuit is used for completing the functions of modulating and subtracting a pair of differential capacitance variable quantities, converting the differential capacitance variable quantities into voltage variable quantities of double-sideband suppressed carrier amplitude modulation wave envelopes and outputting double-sideband suppressed carrier amplitude modulation waves; the A/D conversion circuit is used for converting the voltage signal output by the demodulation and low-pass filter circuit into a digital signal and inputting the digital signal into the digital signal processor; the digital signal processor is used for controlling the carrier frequency of the capacitance reading front-end circuit and the analog switch driving signal in the demodulation and low-pass filter circuit; the analog switch driving signal is a periodic pulse signal with the same frequency as the carrier wave.
Furthermore, the demodulation and low-pass filter circuit discriminates the phase of a double-sideband suppressed carrier amplitude modulation wave input by the capacitance reading front-end circuit through the sampling retainer, and the buffer amplifier is designed into a second-order voltage-controlled voltage source type low-pass filter to filter out a carrier signal.
Further, the demodulation and low-pass filter circuit comprises an analog switch, a sampling capacitor, a first resistor, a second resistor, an operational amplifier, a first capacitor and a second capacitor through a sampling retainer; the input end of the analog switch S is the output end of the capacitance reading front-end circuit, the input signal of the analog switch S is a double-sideband suppressed carrier amplitude modulation wave, and the sampling time is the peak value of the amplitude modulation wave; sampling capacitor CHOne end is grounded, and the other end is connected with the output end of the analog switch S; a first resistor R1One end is connected with the output end of the analog switch S, and the other end is connected with the second resistor R2(ii) a A second resistor R2The other end is connected with the non-inverting input end of the operational amplifier; a first capacitor C1One end of the operational amplifier is connected with the non-inverting input end of the operational amplifier, and the other end of the operational amplifier is grounded; second capacitor C2One end is connected with a first resistor R1And a second resistor R2The other end of the connection is connected with the output end of the operational amplifier.
The invention has the beneficial effects that: the invention relates to a differential capacitance detection circuit based on sampling holder demodulation.A demodulation and low-pass filter circuit in the circuit adopts a sampling holder as a phase-sensitive demodulation scheme, so that the effective value of a demodulation output signal is close to the amplitude of an envelope, high-frequency carriers are effectively inhibited and capacitance detection noise is reduced while demodulation is carried out; the invention reduces the power supply voltage of the device under the same capacitance detection gain, thereby reducing the static power consumption of the chip; the buffer amplifier demodulation circuit of the sampling holder is combined with the post-stage low-pass filter, so that an operational amplifier is saved, the structure is simple, and the design of a sensor miniaturization product is facilitated.
Drawings
FIG. 1 is a schematic diagram of a differential capacitance detection circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a capacitive read front-end circuit according to one embodiment of the present invention;
fig. 3 is a schematic diagram of a demodulation waveform according to an embodiment of the present invention.
Detailed description of the preferred embodiments
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention. It is to be understood that the embodiments described are only some of the embodiments of the present invention, and not all of them. Other embodiments, which can be derived by one of ordinary skill in the art from the embodiments of the present invention without creative efforts, are also within the scope of the present invention.
The invention relates to a differential capacitor detection circuit based on sampling holder demodulation, which detects the variable quantity of a pair of differential capacitors by a modulation and demodulation method, wherein a phase-sensitive demodulation circuit adopts a sampling holder and is used for locking the modulated double-sideband to inhibit the peak voltage of a carrier amplitude modulation wave and identifying the phase, and a buffer amplifier of the sampling holder and a post-stage low-pass filter are combined to design, so that the low-pass filtering function is completed while demodulation is carried out.
As shown in fig. 1, a specific embodiment of the present invention is a modulation and demodulation type capacitance detection circuit including: a capacitance reading front-end circuit 1, a demodulation and low-pass filter circuit 2, an A/D conversion circuit 3, and a digital signal processor 4 for controlling the carrier frequency and the analog switch driving signal. The output end of the capacitance reading front-end circuit is connected with the input end of the demodulation and low-pass filter circuit; the input end of the A/D conversion circuit is connected with the output end of the demodulation and low-pass filter circuit.
The capacitance reading front-end circuit 1 completes the modulation and subtraction functions of a pair of differential capacitance variation, and can convert the capacitance variation to be measured into the voltage variation of double-sideband suppressed carrier amplitude modulation envelope. For the differential capacitive sensor, the capacitive read front-end circuit can be classified into a dual-carrier modulation type and a single-carrier modulation type according to the high-frequency carrier excitation method, and the capacitive read front-end circuit of the present embodiment is exemplified by the single-carrier modulation type, as shown in fig. 2. A high-frequency sine carrier 5 is added to a differential capacitor 6Cx0+ Δ C and differential capacitor 7Cx0On the common terminal of- Δ C, a differential capacitance 6Cx0+ Δ C another terminal connected to operational amplifier A1The differential capacitor 7Cx0Δ C to operational amplifier A2Of the inverting input terminal, operational amplifier A1、A2The non-inverting input terminal of the transformer is grounded; in an operational amplifier A1、A2A feedback capacitor C is connected in parallel between the inverting input end and the output endf(ii) a Feedback resistor RfConnected in parallel to a feedback capacitor CfTwo ends; operational amplifier A1A feedback capacitor CfA feedback resistor RfConstituting a first charge amplifier, an operational amplifier A2A feedback capacitor CfA feedback resistor RfForming a second charge amplifier; the output terminal of the first charge amplifier is connected to a differential amplifier A3The output end of the second charge amplifier is connected to the differential amplifier A3The inverting input terminal of (1). The capacitance of the differential capacitor pair is modulated to the amplitude of the high-frequency carrier through the charge amplifier, and the two paths of amplitude modulation signals with the phase difference of 180 degrees remove signals of a common mode part after passing through the differential amplifier, so that only the capacitance variation is amplified.
The demodulation and low-pass filter circuit 2 identifies the phase of the double-sideband suppressed carrier amplitude modulation wave through the sampling retainer, and designs the buffer amplifier into a second-order voltage-controlled voltage source type low-pass filter to filter out carrier signals. The input end of the analog switch S is a capacitance reading front-end circuit (differential amplifier A)3) At the output end, the input signal of the analog switch S is a double-sideband suppressed carrier amplitude modulation wave, the analog switch driving signal is a periodic pulse signal with the same frequency as the carrier wave, and the sampling timeIs the peak value of amplitude modulated wave; sampling capacitor CHOne end is grounded, and the other end is connected with the output end of the analog switch S; a first resistor R1One end is connected with the output end of the analog switch S, and the other end is connected with the second resistor R2(ii) a A second resistor R2The other end is connected with the non-inverting input end of the operational amplifier; a first capacitor C1One end of the operational amplifier is connected with the non-inverting input end of the operational amplifier, and the other end of the operational amplifier is grounded; second capacitor C2One end is connected with a first resistor R1And a second resistor R2The other end of the connection is connected with the output end of the operational amplifier.
A schematic diagram of the demodulation waveform is shown in fig. 3. The double-sideband suppressed carrier amplitude modulation wave output by the capacitance reading front-end circuit 1 is VX(t) the analog switch drive signal is VY(t) the sample and hold unit output signal is VZ(t) of (d). It can be seen that the effective value of the demodulated signal obtained by the sample-and-hold demodulation scheme is close to the envelope magnitude.
The a/D conversion circuit 3 is used to convert the voltage signal output from the demodulation and low-pass filter circuit 2 into a digital signal, and may be any integrated circuit or discrete component circuit.
The digital signal processor 4 is used for generating a carrier generation circuit control signal and an analog switch driving signal, collecting a capacitance detection digital signal, and can be any digital signal processing chip meeting the requirement.
One skilled in the art can, using the teachings of the present invention, readily make various changes and modifications to the invention without departing from the spirit and scope of the invention as defined by the appended claims. Any modifications and equivalent variations of the above-described embodiments, which are made in accordance with the technical spirit and substance of the present invention, fall within the scope of protection of the present invention as defined in the claims.
Claims (3)
1. A differential capacitance detection circuit based on sampling holder demodulation is characterized by comprising a capacitance reading front-end circuit, a demodulation and low-pass filter circuit, an A/D conversion circuit, a digital signal processor and the like. The output end of the capacitance reading front-end circuit is connected with the input end of the demodulation and low-pass filter circuit; the input end of the A/D conversion circuit is connected with the output end of the demodulation and low-pass filter circuit. The capacitance reading front-end circuit is used for completing the functions of modulating and subtracting a pair of differential capacitance variable quantities, converting the differential capacitance variable quantities into voltage variable quantities of double-sideband suppressed carrier amplitude modulation wave envelopes and outputting double-sideband suppressed carrier amplitude modulation waves; the A/D conversion circuit is used for converting the voltage signal output by the demodulation and low-pass filter circuit into a digital signal and inputting the digital signal into the digital signal processor; the digital signal processor is used for controlling the carrier frequency of the capacitance reading front-end circuit and the analog switch driving signal in the demodulation and low-pass filter circuit. The analog switch driving signal is a periodic pulse signal with the same frequency as the carrier wave.
2. The differential capacitance detection circuit based on sampling holder demodulation as claimed in claim 1, wherein the demodulation and low pass filter circuit identifies the phase of the double-sideband suppressed carrier amplitude modulation wave inputted from the capacitance read front end circuit through the sampling holder, and designs the buffer amplifier as a second-order voltage-controlled voltage source type low pass filter to filter the carrier signal.
3. The sample-holder demodulation-based differential capacitance detection circuit according to claim 2, wherein the demodulation and low-pass filtering circuit comprises an analog switch, a sampling capacitor, a first resistor, a second resistor, an operational amplifier, a first capacitor, and a second capacitor through a sample-holder; the input end of the analog switch S is the output end of the capacitance reading front-end circuit, the input signal of the analog switch S is a double-sideband suppressed carrier amplitude modulation wave, and the sampling time is the peak value of the amplitude modulation wave; sampling capacitor CHOne end is grounded, and the other end is connected with the output end of the analog switch S; a first resistor R1One end is connected with the output end of the analog switch S, and the other end is connected with the second resistor R2(ii) a A second resistor R2The other end is connected with the non-inverting input end of the operational amplifier; a first capacitor C1One end of the operational amplifier is connected with the non-inverting input end of the operational amplifier, and the other end of the operational amplifier is grounded; second capacitor C2One end is connected with a first resistor R1And a second resistor R2At the other end of the jointConnected to the output of the operational amplifier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010365307.7A CN111505389A (en) | 2020-04-30 | 2020-04-30 | Differential capacitance detection circuit based on sampling holder demodulation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010365307.7A CN111505389A (en) | 2020-04-30 | 2020-04-30 | Differential capacitance detection circuit based on sampling holder demodulation |
Publications (1)
Publication Number | Publication Date |
---|---|
CN111505389A true CN111505389A (en) | 2020-08-07 |
Family
ID=71869891
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010365307.7A Pending CN111505389A (en) | 2020-04-30 | 2020-04-30 | Differential capacitance detection circuit based on sampling holder demodulation |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN111505389A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112325919A (en) * | 2020-10-21 | 2021-02-05 | 中国科学院地质与地球物理研究所 | Self-adaptive adjustment sensor system and use method thereof |
CN113833757A (en) * | 2021-09-23 | 2021-12-24 | 北京航空航天大学 | Five-degree-of-freedom rotor axial displacement self-sensing magnetic suspension bearing |
WO2022227113A1 (en) * | 2021-04-30 | 2022-11-03 | 深圳市谷粒科技有限公司 | Dynamic sampling method and device for analog sensor |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102109556A (en) * | 2010-11-29 | 2011-06-29 | 北京航空航天大学 | Circuit for detecting dynamic weak capacitance of MEMS device |
CN106291120A (en) * | 2015-05-25 | 2017-01-04 | 国家电网公司 | A kind of capacitive apparatus medium loss measuring device with electricity |
CN110058087A (en) * | 2019-05-20 | 2019-07-26 | 武汉众行聚谷科技有限公司 | A kind of fully differential structure small capacitance detection chip of strong anti-interference super low-power consumption |
CN110879313A (en) * | 2019-11-20 | 2020-03-13 | 广州钰芯传感科技有限公司 | Micro-capacitance measuring circuit and measuring method of capacitance sensor |
-
2020
- 2020-04-30 CN CN202010365307.7A patent/CN111505389A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102109556A (en) * | 2010-11-29 | 2011-06-29 | 北京航空航天大学 | Circuit for detecting dynamic weak capacitance of MEMS device |
CN106291120A (en) * | 2015-05-25 | 2017-01-04 | 国家电网公司 | A kind of capacitive apparatus medium loss measuring device with electricity |
CN110058087A (en) * | 2019-05-20 | 2019-07-26 | 武汉众行聚谷科技有限公司 | A kind of fully differential structure small capacitance detection chip of strong anti-interference super low-power consumption |
CN110879313A (en) * | 2019-11-20 | 2020-03-13 | 广州钰芯传感科技有限公司 | Micro-capacitance measuring circuit and measuring method of capacitance sensor |
Non-Patent Citations (3)
Title |
---|
尤富生 等: "生物电阻抗模拟解调技术的研究", 《北京生物医学工程》 * |
田广泉: "特殊的相敏解调器", 《火力与指挥控制》 * |
闵永智: "《高等学校仪器科学与技术"十三五"规划教材 电气测试技术》", 31 October 2017, 西安电子科技大学出版社 * |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112325919A (en) * | 2020-10-21 | 2021-02-05 | 中国科学院地质与地球物理研究所 | Self-adaptive adjustment sensor system and use method thereof |
CN112325919B (en) * | 2020-10-21 | 2021-08-31 | 中国科学院地质与地球物理研究所 | Self-adaptive adjustment sensor system and use method thereof |
WO2022227113A1 (en) * | 2021-04-30 | 2022-11-03 | 深圳市谷粒科技有限公司 | Dynamic sampling method and device for analog sensor |
CN113833757A (en) * | 2021-09-23 | 2021-12-24 | 北京航空航天大学 | Five-degree-of-freedom rotor axial displacement self-sensing magnetic suspension bearing |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN111505389A (en) | Differential capacitance detection circuit based on sampling holder demodulation | |
US8339148B2 (en) | Multi-channel capacitive sensing circuit | |
US7995679B2 (en) | Method and system for charge sensing with variable gain, offset compensation, and demodulation | |
US6529015B2 (en) | Signal processing apparatus | |
CN106959160B (en) | Faint optical signal processing unit and Feebleness Light Signal Examining system | |
CN101551420B (en) | A weak capacitive detection circuit of MEMS device | |
US7456731B2 (en) | Capacitive-type physical quantity sensor | |
US5172065A (en) | Evaluation circuit for a capacitive sensor | |
CN101424533B (en) | Detuning capacitor compensation process and circuit in MEMS gyroscope capacitor read-out circuit | |
US20050260965A1 (en) | Method and system for DC offset cancellation from a modulated signal | |
US20050243893A1 (en) | Method and system for single ended to differential ended demodulation | |
CN100368773C (en) | Method for extracting one-way harmonic wave of condenser type micro-gyroscope responsive signals and extraction apparatus therefor | |
CN114779132A (en) | Digital GMI sensor and signal processing method thereof | |
CN107830851A (en) | The digital driving control integrated circuit of angular-rate sensor | |
CN212723101U (en) | High-precision capacitance measuring circuit and equipment | |
CN116626562A (en) | Small digital GMI sensor for weak alternating magnetic field measurement | |
US12085423B2 (en) | Sensor interface circuit, sensor system, and method of signal measurement | |
US11119138B1 (en) | Capacitive sensor including compensation for phase shift | |
CN1750384A (en) | Signal demodulation circuit having operational amplifier with disable function | |
CN117978190B (en) | Electronic detonator communication circuit | |
CN100523835C (en) | Current-voltage conversion circuit | |
CN115987220A (en) | Low-noise dual-output synchronous demodulation circuit and synchronous demodulation method | |
RU2189046C1 (en) | Device measuring acceleration | |
CN117439550A (en) | Detuning and filtering circuit suitable for sensor chip | |
SU1620947A1 (en) | Digital meter of displacements |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200807 |