CN111491385A - Method and device for reducing synchronous signal block interference - Google Patents
Method and device for reducing synchronous signal block interference Download PDFInfo
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- CN111491385A CN111491385A CN201910082622.6A CN201910082622A CN111491385A CN 111491385 A CN111491385 A CN 111491385A CN 201910082622 A CN201910082622 A CN 201910082622A CN 111491385 A CN111491385 A CN 111491385A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W72/00—Local resource management
- H04W72/50—Allocation or scheduling criteria for wireless resources
- H04W72/54—Allocation or scheduling criteria for wireless resources based on quality criteria
- H04W72/541—Allocation or scheduling criteria for wireless resources based on quality criteria using the level of interference
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/003—Arrangements for allocating sub-channels of the transmission path
- H04L5/0048—Allocation of pilot signals, i.e. of signals known to the receiver
Abstract
The invention provides a method and a device for reducing synchronous signal block interference, belonging to the technical field of wireless communication. A method of reducing synchronization signal block interference, comprising: generating configuration information of a reference signal; and sending configuration information of the reference signals to the terminal, wherein the configuration information of the reference signals indicates that the time-frequency domain configurations of the reference signals of all the base stations are the same and/or indicates that the density of the reference signals is reduced. By the technical scheme of the invention, the interference of the reference signal of the PBCH can be reduced.
Description
Technical Field
The present invention relates to the field of wireless communication technologies, and in particular, to a method and an apparatus for reducing interference of a synchronization signal block.
Background
The configuration of SSBs (synchronization signal blocks) is defined in 3GPP protocol TS 38.211 section 7.4.3, including the configuration of the location of PSS (primary synchronization signal)/SSS (secondary synchronization signal)/DMRS (demodulation reference signal) in SSBs, as shown in the table below, where
Is a cell identity.
Table 1: resources with in-an SS (synchronization Signal)/PBCH (physical broadcast channel) block for PSS, SSS, PBCH, and DMRS for PBCH
The specific configuration of the SSB is shown in fig. 1, where 1 represents idle resources, 2 represents a primary synchronization signal, 3 represents a secondary synchronization signal, 4 represents a physical broadcast channel, and 5 represents a demodulation reference signal, and when the configuration shown in fig. 1 is adopted, when a demodulation reference signal of a local area is sent, a PBCH data signal of a neighboring area is also sent, which has a large interference on a DMRS, and is easy to cause demodulation failure of the DMRS of the local area, and demodulation failure of the SSB, so that a terminal cannot access to a network.
If the DMRS power is increased, the power of the PBCH RE (resource element) in the same timeslot is decreased, which results in an increase in the demodulation success rate of the DMRS reference signal, but a decrease in the demodulation performance of the PBCH.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a method and an apparatus for reducing interference of a synchronization signal block, which can reduce interference of a reference signal of a PBCH.
To solve the above technical problem, embodiments of the present invention provide the following technical solutions:
the embodiment of the invention provides a method for reducing synchronous signal block interference, which comprises the following steps:
generating configuration information of a reference signal;
and sending configuration information of the reference signals to the terminal, wherein the configuration information of the reference signals indicates that the time-frequency domain configurations of the reference signals of all the base stations are the same and/or indicates that the density of the reference signals is reduced.
Further, when the configuration information of the reference signal indicates that the reference signal time-frequency domain configurations of all base stations are the same, the method further includes:
the reference signal is scrambled with a cell identity before being transmitted.
Further, the configuration information of the reference signal indicates that the frequency domain granularity of the reference signal is greater than a threshold.
Further, the threshold value is 12.
Further, the reference signal is a DMRS.
The embodiment of the invention provides a method for reducing synchronous signal block interference, which is applied to a terminal and comprises the following steps:
receiving configuration information of a reference signal, wherein the configuration information of the reference signal indicates that the time-frequency domain configurations of the reference signals of all base stations are the same and/or indicates that the density of the reference signals is reduced;
and receiving the reference signal according to the configuration information of the reference signal.
Further, the configuration information of the reference signal indicates that the frequency domain granularity of the reference signal is greater than a threshold.
Further, the threshold value is 12.
Further, the reference signal is a DMRS.
The embodiment of the invention provides a device for reducing synchronous signal block interference, which is applied to network side equipment and comprises a processor and a transceiver,
the processor is used for generating configuration information of the reference signal;
the transceiver is used for sending configuration information of the reference signals to the terminal, wherein the configuration information of the reference signals indicates that the time-frequency domain configurations of the reference signals of all the base stations are the same and/or indicates that the density of the reference signals is reduced.
Further, the processor is configured to scramble the reference signal with the cell identity before transmitting the reference signal.
Further, the configuration information of the reference signal indicates that the frequency domain granularity of the reference signal is greater than a threshold.
Further, the threshold value is 12.
Further, the reference signal is a DMRS.
The embodiment of the invention provides a device for reducing synchronous signal block interference, which is applied to a terminal and comprises a processor and a transceiver,
the transceiver is used for receiving configuration information of a reference signal, wherein the configuration information of the reference signal indicates that the time-frequency domain configurations of the reference signals of all base stations are the same and/or indicates that the density of the reference signals is reduced; and receiving the reference signal according to the configuration information of the reference signal.
Further, the configuration information of the reference signal indicates that the frequency domain granularity of the reference signal is greater than a threshold.
Further, the threshold value is 12.
Further, the reference signal is a DMRS.
An embodiment of the present invention further provides a communication device, including: memory, processor and computer program stored on the memory and executable on the processor, which when executed by the processor implements the steps in the method of reducing synchronization signal block interference as described above.
An embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the computer program implements the steps in the method for reducing the block interference of the synchronization signal as described above.
The embodiment of the invention has the following beneficial effects:
in the above scheme, the same time-frequency domain resources are configured for the reference signals of all the base stations, or the density of the reference signals is reduced, so that the interference of other signals to the reference signals can be reduced, the demodulation performance of the reference signals is improved, and further the demodulation performance of the SSB is improved.
Drawings
FIG. 1 is a schematic diagram of a specific configuration of an SSB;
FIG. 2 is a flowchart illustrating a method for reducing synchronization signal block interference according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating a method for reducing synchronization signal block interference according to another embodiment of the present invention;
fig. 4 is a schematic diagram of a configuration location of a DMRS according to an embodiment of the present invention;
FIG. 5 is a block diagram of an apparatus for reducing synchronization block interference according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an apparatus for reducing synchronization signal block interference according to another embodiment of the present invention.
Detailed Description
In order to make the technical problems, technical solutions and advantages to be solved by the embodiments of the present invention clearer, the following detailed description will be given with reference to the accompanying drawings and specific embodiments.
The names and abbreviations of the terms related to the present invention may be changed correspondingly, and the technical solution of the present invention is still applicable when the abbreviations are changed.
Embodiments of the present invention provide a method and an apparatus for reducing block interference of a synchronization signal, which can reduce interference of a reference signal of a PBCH.
An embodiment of the present invention provides a method for reducing block interference of a synchronization signal, as shown in fig. 2, including:
step 101: generating configuration information of a reference signal;
step 102: and sending configuration information of the reference signals to the terminal, wherein the configuration information of the reference signals indicates that the time-frequency domain configurations of the reference signals of all the base stations are the same and/or indicates that the density of the reference signals is reduced.
In this embodiment, the same time-frequency domain resources are configured for the reference signals of all the base stations, or the density of the reference signals is reduced, so that the interference of other signals to the reference signals can be reduced, the demodulation performance of the reference signals is improved, and further the SSB demodulation performance is improved.
The technical scheme of the embodiment is applied to network side equipment.
Further, when the configuration information of the reference signal indicates that the reference signal time-frequency domain configurations of all base stations are the same, the method further includes:
the reference signal is scrambled with a cell identity before being transmitted.
Further, the configuration information of the reference signal indicates that the frequency domain granularity of the reference signal is greater than a threshold.
Further, the threshold value is 12.
Further, the reference signal is a DMRS.
An embodiment of the present invention further provides a method for reducing interference of a synchronization signal block, as shown in fig. 3, including:
step 201: receiving configuration information of a reference signal, wherein the configuration information of the reference signal indicates that the time-frequency domain configurations of the reference signals of all base stations are the same and/or indicates that the density of the reference signals is reduced;
step 202: and receiving the reference signal according to the configuration information of the reference signal.
In this embodiment, the same time-frequency domain resources are configured for the reference signals of all the base stations, or the density of the reference signals is reduced, so that the interference of other signals to the reference signals can be reduced, the demodulation performance of the reference signals is improved, and further the SSB demodulation performance is improved.
The technical scheme of the embodiment is applied to the terminal.
Further, the configuration information of the reference signal indicates that the frequency domain granularity of the reference signal is greater than a threshold.
Further, the threshold value is 12.
Further, the reference signal is a DMRS.
The technical solution of the present invention is further described with reference to the accompanying drawings and specific embodiments, which are all intended to reduce interference of DMRS of a reference signal of PBCH.
The first embodiment is as follows:
in this embodiment, the time domain and frequency domain configurations of DMRSs of all cells are the same.
The reference signal DMRS is scrambled by CE LLL-ID, and orthogonality is met, so that SSB (signal to interference) receiving of each cell can avoid interference through the orthogonality of the reference signal on the premise of ensuring the orthogonality of the reference signal.
In this embodiment, under the condition of improving the power of the DMRS, an SINR (Signal to interference plus Noise Ratio) is not improved, because the power of the DMRS in the neighboring cell is also improved.
In this embodiment, the modified protocol parameters are shown in table 1:
TABLE 1
Where v is 0/1/2/3/4, which is the same for each cell.
In the embodiment, the orthogonality designed by the DMRS is adopted, the SSB DMRS interference of each cell is reduced,
the second embodiment is as follows:
in this embodiment, the reference signal arrangement is shifted in position.
As shown in fig. 5, the reference PSS employs modulo three interference, where 6, 7, and 8 are DMRS positions of the corresponding cells in the three sector directions, respectively, so that DMRS interference in the same direction can be reduced.
The advantage of this embodiment is that the effect of DMRS reference signal power boosting can be embodied. In this embodiment, the density of DMRS is reduced because, if a cell uses the DMRS at position 6, DMRSs at positions 7 and 8 need to be vacant, that is, the density of DMRS is increased to improve the demodulation performance of PBCH, but interference in a networking environment is increased. And considering the reliability of the PBCH, the DMRS density is reduced, the interference is reduced, and the performance is not reduced.
In this embodiment, the modified protocol parameters are shown in table 2:
TABLE 2
Wherein the content of the first and second substances,
is a cell identity, n is a natural number, and v is a frequency domain position of a reference signal.
In this embodiment, the DMRS density is reduced, the DMRS interference is reduced, the DMRS demodulation performance is improved, and the SSB demodulation performance is improved
An apparatus for reducing block interference of a synchronization signal is also provided in an embodiment of the present invention, as shown in fig. 5, including a processor 31 and a transceiver 32,
the processor 31 is configured to generate configuration information of a reference signal;
the transceiver 32 is configured to send configuration information of the reference signal to the terminal, where the configuration information of the reference signal indicates that the reference signal time-frequency domain configurations of all base stations are the same and/or indicates to reduce the density of the reference signal.
In this embodiment, the same time-frequency domain resources are configured for the reference signals of all the base stations, or the density of the reference signals is reduced, so that the interference of other signals to the reference signals can be reduced, the demodulation performance of the reference signals is improved, and further the SSB demodulation performance is improved.
The technical scheme of the embodiment is applied to network side equipment.
Further, the processor 31 is further configured to scramble the reference signal with the cell identifier before transmitting the reference signal.
Further, the configuration information of the reference signal indicates that the frequency domain granularity of the reference signal is greater than a threshold.
Further, the threshold value is 12.
Further, the reference signal is a DMRS.
An apparatus for reducing block interference of a synchronization signal is also provided in an embodiment of the present invention, as shown in fig. 6, including a processor 41 and a transceiver 42,
the transceiver 42 is configured to receive configuration information of a reference signal, where the configuration information of the reference signal indicates that reference signal time-frequency domain configurations of all base stations are the same and/or indicates to reduce a density of the reference signal; and receiving the reference signal according to the configuration information of the reference signal.
In this embodiment, the same time-frequency domain resources are configured for the reference signals of all the base stations, or the density of the reference signals is reduced, so that the interference of other signals to the reference signals can be reduced, the demodulation performance of the reference signals is improved, and further the SSB demodulation performance is improved.
The technical scheme of the embodiment is applied to the terminal.
Further, the configuration information of the reference signal indicates that the frequency domain granularity of the reference signal is greater than a threshold.
Further, the threshold value is 12.
Further, the reference signal is a DMRS.
An embodiment of the present invention further provides a communication device, including: memory, processor and computer program stored on the memory and executable on the processor, which when executed by the processor implements the steps in the method of reducing synchronization signal block interference as described above.
The communication device may be a network side device or a terminal.
An embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the computer program implements the steps in the method for reducing the block interference of the synchronization signal as described above.
For a hardware implementation, the Processing units may be implemented within one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable logic devices (P L D), Field-Programmable Gate arrays (FPGAs), general purpose processors, controllers, microcontrollers, microprocessors, other electronic units configured to perform the functions described herein, or a combination thereof.
For a software implementation, the techniques described herein may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described herein. The software codes may be stored in a memory and executed by a processor. The memory may be implemented within the processor or external to the processor.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, user equipment (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or user equipment that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or user equipment. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or user equipment that comprises the element.
While the preferred embodiments of the present invention have been described, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims.
Claims (20)
1. A method for reducing synchronous signal block interference is applied to a network side device, and comprises the following steps:
generating configuration information of a reference signal;
and sending configuration information of the reference signals to the terminal, wherein the configuration information of the reference signals indicates that the time-frequency domain configurations of the reference signals of all the base stations are the same and/or indicates that the density of the reference signals is reduced.
2. The method of claim 1, wherein when the configuration information of the reference signal indicates that the reference signal time-frequency domain configurations of all base stations are the same, the method further comprises:
the reference signal is scrambled with a cell identity before being transmitted.
3. The method of claim 1, wherein the configuration information of the reference signal indicates that a frequency domain granularity of the reference signal is greater than a threshold.
4. The method of claim 3, wherein the threshold is 12.
5. The method of reducing synchronization signal block interference of claim 1, wherein the reference signal is a DMRS.
6. A method for reducing block interference of a synchronization Signal (SYNC) is applied to a terminal, and comprises the following steps:
receiving configuration information of a reference signal, wherein the configuration information of the reference signal indicates that the time-frequency domain configurations of the reference signals of all base stations are the same and/or indicates that the density of the reference signals is reduced;
and receiving the reference signal according to the configuration information of the reference signal.
7. The method of claim 6, wherein the configuration information of the reference signal indicates that a frequency domain granularity of the reference signal is greater than a threshold.
8. The method of claim 7, wherein the threshold is 12.
9. The method of reducing synchronization signal block interference of claim 6, wherein the reference signal is a DMRS.
10. The device for reducing the synchronous signal block interference is characterized by being applied to network side equipment and comprising a processor and a transceiver,
the processor is used for generating configuration information of the reference signal;
the transceiver is used for sending configuration information of the reference signals to the terminal, wherein the configuration information of the reference signals indicates that the time-frequency domain configurations of the reference signals of all the base stations are the same and/or indicates that the density of the reference signals is reduced.
11. The apparatus of claim 10, wherein the processor is further configured to scramble a reference signal with a cell identity prior to transmitting the reference signal.
12. The apparatus of claim 10, wherein the configuration information of the reference signal indicates that a frequency domain granularity of the reference signal is greater than a threshold.
13. The apparatus of claim 12, wherein the threshold is 12.
14. The apparatus of claim 10, wherein the reference signal is a DMRS.
15. An apparatus for reducing synchronization signal block interference, applied to a terminal, comprises a processor and a transceiver,
the transceiver is used for receiving configuration information of a reference signal, wherein the configuration information of the reference signal indicates that the time-frequency domain configurations of the reference signals of all base stations are the same and/or indicates that the density of the reference signals is reduced; and receiving the reference signal according to the configuration information of the reference signal.
16. The apparatus of claim 15, wherein the configuration information of the reference signal indicates that a frequency domain granularity of the reference signal is greater than a threshold.
17. The apparatus of claim 16, wherein the threshold is 12.
18. The apparatus of claim 15, in which the reference signal is a DMRS.
19. A communication device, comprising: memory, processor and computer program stored on the memory and executable on the processor, which when executed by the processor performs the steps in the method of reducing synchronization signal block interference according to any one of claims 1 to 5 or the steps in the method of reducing synchronization signal block interference according to any one of claims 6 to 9.
20. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of the method for reducing synchronization signal block interference according to any one of claims 1 to 5 or the steps of the method for reducing synchronization signal block interference according to any one of claims 6 to 9.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107864494A (en) * | 2016-09-22 | 2018-03-30 | 中国移动通信有限公司研究院 | A kind of sending method of synchronous reference signal, method of reseptance, base station and terminal |
| US20180368054A1 (en) * | 2017-06-15 | 2018-12-20 | Sharp Kabushiki Kaisha | Method and apparatus for generating and using reference signal for broadcast channel for radio system |
| CN109150462A (en) * | 2017-06-16 | 2019-01-04 | 电信科学技术研究院 | A kind of exclusive demodulated reference signal transmissions method and device of PBCH |
| WO2019010632A1 (en) * | 2017-07-11 | 2019-01-17 | 北京小米移动软件有限公司 | Inter-cell signal interference control method and apparatus, user equipment, and base station |
-
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107864494A (en) * | 2016-09-22 | 2018-03-30 | 中国移动通信有限公司研究院 | A kind of sending method of synchronous reference signal, method of reseptance, base station and terminal |
| US20180368054A1 (en) * | 2017-06-15 | 2018-12-20 | Sharp Kabushiki Kaisha | Method and apparatus for generating and using reference signal for broadcast channel for radio system |
| CN109150462A (en) * | 2017-06-16 | 2019-01-04 | 电信科学技术研究院 | A kind of exclusive demodulated reference signal transmissions method and device of PBCH |
| WO2019010632A1 (en) * | 2017-07-11 | 2019-01-17 | 北京小米移动软件有限公司 | Inter-cell signal interference control method and apparatus, user equipment, and base station |
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