CN111490680B - Continuous conduction mode single-input multi-output device - Google Patents
Continuous conduction mode single-input multi-output device Download PDFInfo
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- CN111490680B CN111490680B CN201911372223.XA CN201911372223A CN111490680B CN 111490680 B CN111490680 B CN 111490680B CN 201911372223 A CN201911372223 A CN 201911372223A CN 111490680 B CN111490680 B CN 111490680B
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- 230000007704 transition Effects 0.000 claims abstract description 6
- 239000003990 capacitor Substances 0.000 description 19
- 238000010586 diagram Methods 0.000 description 7
- 238000004590 computer program Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000012913 prioritisation Methods 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- ZLIBICFPKPWGIZ-UHFFFAOYSA-N pyrimethanil Chemical compound CC1=CC(C)=NC(NC=2C=CC=CC=2)=N1 ZLIBICFPKPWGIZ-UHFFFAOYSA-N 0.000 description 1
- 239000010979 ruby Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1582—Buck-boost converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0083—Converters characterised by their input or output configuration
- H02M1/009—Converters characterised by their input or output configuration having two or more independently controlled outputs
Abstract
A power converter is disclosed. The power converter includes a Single Input Multiple Output (SIMO) device including: a first transistor connected to the input and to a first end of the inductor; a second transistor connected to the second end of the inductor and the first output; and a third transistor connected to the second end of the inductor and the second output. The power converter also includes a controller connected to the SIMO device and configured to: a minimum inductor current through the inductor is maintained between charging cycles and is caused to transition to a charging inductor current during the charging cycles. The charge inductor current is based on a difference between the output voltage signal and the target voltage signal.
Description
Cross Reference to Related Applications
The present application claims the benefit of U.S. provisional application No. 62/798,129 filed on day 29 of 1.2019. The entire disclosure of the above-mentioned U.S. provisional application is incorporated herein by reference.
Technical Field
The present disclosure relates to power converters, and more particularly to single-inductor multiple-output (SIMO) devices that provide power to powered devices.
Background
The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Typically, battery powered consumer devices require more than one power supply voltage level to operate. For example, the processor may operate at a first voltage level, while the one or more peripheral devices may operate at a second voltage level. Thus, these devices incorporate a power converter to convert electrical energy from one form to another. For example, a power converter may be used to convert a Direct Current (DC) or rectified Alternating Current (AC) input signal to one or more DC output signals at the same or different power levels. The power converter may include Single Input Multiple Output (SIMO) devices that store current in a single inductor based on an input signal and selectively discharge the stored current to a plurality of loads connected to selected outputs of the SIMO devices. SIMO devices may also be referred to as single-inductor multiple-output devices.
Disclosure of Invention
A power converter is disclosed. The power converter includes a Single Input Multiple Output (SIMO) device including: a first transistor connected to the input and to a first end of the inductor; a second transistor connected to the second end of the inductor and the first output; and a third transistor connected to the second end of the inductor and the second output. The power converter also includes a controller connected to the SIMO device and configured to: a minimum inductor current through the inductor is maintained between charging cycles and is caused to transition to a charging inductor current during the charging cycles. The charge inductor current is based on a difference between the output voltage signal and the target voltage signal.
In other features, the controller includes an integrator configured to generate a minimum inductor current signal based on a difference between (1) the output voltage signal provided by at least one of the first output and the second output and (2) the target voltage signal.
In other features, the controller is configured to generate a charging inductor current signal based on the minimum inductor current signal and a target current peak signal.
In other features, the charging inductor current signal includes a Root Mean Square (RMS) of the minimum inductor current and the target current peak signal.
In other features, the controller further comprises: a squaring device configured to generate a squared minimum inductor current signal and a squared target current peak signal; a summer connected to the output of the squaring device and configured to generate a summed signal based on the squared minimum inductor current signal and the squared target current peak signal; and a square root device connected to the output of the summer and configured to generate the target current peak signal based on the summed signal.
In other features, the squaring device includes at least one of a mixer and a multiplier.
In other features, the square root device includes at least one of a transconductance linear amplifier and a look-up table.
In other features, the controller further includes an analog-to-digital converter connected to an output of the integrator and configured to generate a digital representation of the minimum inductor current, and the squaring device is connected to an output of the analog-to-digital converter. The controller also includes a digital-to-analog converter coupled to the output of the square root device and configured to generate an analog representation of the target current peak signal.
In other features, the target current peak signal includes a programmable Direct Current (DC) signal that represents a target current peak setting for at least one of the first output and the second output.
A power converter is disclosed. The power converter includes a Single Input Multiple Output (SIMO) device including: a first transistor connected to the input and to a first end of the inductor; a second transistor connected to the second end of the inductor and the first output; and a third transistor connected to the second end of the inductor and the second output. The power converter also includes a controller connected to the SIMO device and configured to: a minimum inductor current through the inductor is maintained between charging cycles, and such that the minimum inductor current (1) transitions to a first charging inductor current corresponding to the first output during a first charging cycle and (2) transitions to a second charging inductor current corresponding to the second output during a second charging cycle. The first charge inductor current is based on a difference between a first output voltage signal at the first output and a first target voltage signal at the first output, and the second charge inductor current is based on a difference between a second output voltage signal at the second output and a second target voltage signal at the second output.
In other features, the controller includes an integrator configured to generate a minimum inductor current signal based on the difference between (1) the output voltage signal provided by at least one of the first output and the second output and (2) the target voltage signal of at least one of the first output and the second output.
In other features, the controller is configured to generate a first charging inductor current signal based on the minimum inductor current signal and the target current peak signal of the first output.
In other features, the first charge inductor current signal includes a Root Mean Square (RMS) of the minimum inductor current and the target current peak signal of the first output.
In other features, the controller further comprises: a squaring device configured to generate a squared minimum inductor current signal and a squared target current peak signal corresponding to the first output; a summer connected to the output of the squaring device and configured to generate a summed signal based on the squared minimum inductor current signal and the squared target current peak signal; and a square root device connected to the output of the summer and configured to generate the target current peak signal of the first output based on the summed signal.
In other features, the squaring device includes at least one of a mixer and a multiplier.
In other features, the square root device includes at least one of a transconductance linear amplifier and a look-up table.
In other features, the controller further includes an analog-to-digital converter connected to an output of the integrator and configured to generate a digital representation of the minimum inductor current, and the squaring device is connected to an output of the analog-to-digital converter. The controller also includes a digital-to-analog converter coupled to the output of the square root device and configured to generate an analog representation of the target current peak signal.
In other features, wherein the squaring device is connected to an output of the integrator.
In other features, the target current peak signal includes a programmable Direct Current (DC) signal that represents a target current peak setting for at least one of the first output and the second output.
In other features, the controller is configured to generate a second charging inductor current signal based on the minimum inductor current signal and the target current peak signal of the second output.
Further areas of applicability of the present disclosure will become apparent from the detailed description, claims, and drawings. The detailed description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.
Drawings
The present disclosure will become more fully understood from the detailed description and the accompanying drawings, wherein:
FIG. 1 is a schematic diagram illustrating a SIMO according to an example embodiment of the present disclosure;
FIG. 2 is a schematic diagram illustrating a Continuous Conduction Mode (CCM) SIMO device according to an example embodiment of the present disclosure;
FIG. 3A is a graph illustrating an example inductor current waveform when a SIMO device is operating in Discontinuous Conduction Mode (DCM);
FIG. 3B is a graph illustrating an example inductor current waveform when the SIMO device is operating in CCM;
FIG. 4 is a schematic diagram illustrating a CCM apparatus according to an example embodiment of the present disclosure;
FIG. 5 is a schematic diagram illustrating another CCM device according to an example embodiment of the present disclosure;
FIG. 6 is a schematic diagram illustrating another CCM device according to an example embodiment of the present disclosure; and is also provided with
Fig. 7 is a schematic diagram illustrating a up-down counter and a comparison device according to an example embodiment of the present disclosure.
In the drawings, reference numbers may be repeated to indicate similar and/or identical elements.
Detailed Description
SIMO devices use a single inductor to store energy and power multiple electrical loads. The inductor is powered during a first period of time and provides power to an electrical load connected to one of the plurality of outputs of the SIMO during a second period of time. The SIMO device may operate in a Continuous Conduction Mode (CCM) and a Discontinuous Conduction Mode (DCM). In DCM, the inductor current drops to zero and remains zero until the start of the next switching cycle. In CCM, the inductor current ramps down to a minimum inductor current (I) that remains above zero between switching cycles add )。
However, SIMO may experience inter-channel oscillations when operating in CCM. For example, the inductor current from the previous pulse period may affect the next pulse period, which results in more or less energy from the inductor than desired. This in turn may lead to erroneous pulse energy for the next pulse and may continue into oscillation. The present disclosure relates to a power converter including a SIMO device and a controller controlling I through an inductor during and between charging cycles add (e.g., a valley of inductor current). The controller also causes I to add The magnitude of the charge inductor current is affected during the charging cycle. The charge inductor current is based on a desired current level and/or voltage output corresponding to the output of the SIMO device.
Fig. 1 illustrates an example schematic diagram of a SIMO device 100 in accordance with this disclosure. The SIMO device 100 includes a plurality of transistors 102 and an inductor 104. In an embodiment, the transistor 102 may include a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), but other transistors such as DMOS devices or HEMTs may also be used. As shown, the SIMO device 100 includes a first transistor 102-1, a second transistor 102-2, a third transistor 102-3, a fourth transistor 102-4, a fifth transistor 102-5, and a sixth transistor 102-6. However, it should be understood that the SIMO device 100 may include a different number of transistors to provide additional or fewer outputs based on the configuration of the SIMO. The third transistor 102-3, the fifth transistor 102-5, and the sixth transistor 102-6 include well switching devices. If DMOS devices are used, series devices may be used instead of these individual devices to prevent unwanted body diodes from affecting operation.
SIMO device 100 receives a control signal at the gates of transistors 102-1 through 102-6 to control the charging, discharging, or holding of inductor 104. For example, based on a control signal in buck-boost mode, power is transferred to the inductor 104 using the first transistor 102-1 and the fourth transistor 102-4, and power is transferred from the inductor 104 using the second transistor 102-2 and one of the third transistor 102-3, the fifth transistor 102-5, or the sixth transistor 102-6 to provide a current to the selected output 108-1, 108-2, 108-3 that charges the respective capacitor 110-1, 110-2, 110-3. As shown, a first transistor 102-1 is connected to an input 106 to receive an input signal from a power supply 107. Similarly, buck mode may be implemented by switching 102-1 and 102-2 and selecting between 102-3, 102-5, or 102-6. Also, the boost mode may be implemented by remaining on 102-1 and then turning on 102-4. Subsequently, 102-4 is turned off and any of 102-3, 102-5, or 102-6 is turned on.
The third transistor 102-3, the fifth transistor 102-5, and the sixth transistor 102-6 are connected to outputs 108-1, 108-2, 108-3, respectively. In some examples, the outputs 108-1, 108-2, 108-3 are each connected to a corresponding capacitor 110-1, 110-2, 110-3. The capacitors 110-1, 110-2, 110-3 are charged by the inductor 104 to a desired voltage level based on the control signal. The capacitors 110-1, 110-2, 110-3 may supply power to one or more electrical loads 112-1, 112-2, 112-3 connected to the corresponding capacitors 110-1, 110-2, 110-3.
Fig. 2 illustrates an example power converter 200 according to this disclosure. The power converter 200 includes the SIMO device 100 and a controller 202. The controller 202 receives output signals from the outputs 108-1, 108-2, 108-3 and the controller 202 controls the operation of the SIMO device 100 based on these output signals. For example, the controller 202 may selectively output control signals to respective gates of the transistors 102 to control charging or discharging of the inductor 104 and/or the capacitors 110-1, 110-2, 110-3 via the outputs 204-1, 204-2, 204-3, 204-4. The outputs 204-1, 204-2, 204-3, 204-4 may be connected to the gates of one or more of the transistors 102 to control the inductor current.
The controller 202 includes a selector 206 that selects to charge the capacitors 110-1, 110-2, 110-3 based on the voltage requirements. In these embodiments, selector 206 provides a control signal that selectively causes SIMO device 100 to power capacitors 110-1, 110-2, 110-3 based on the voltage stored by capacitors 110-1, 110-2, 110-3. The selector 206 receives the comparison signal from the comparison device 207 and selects one of the outputs 108-1, 108-2, 108-3 to receive the inductor current to recharge the corresponding capacitor 110-1, 110-2, 110-3. The selector 206 may be implemented in digital logic and determines a switching sequence for recharging the capacitors 110-1, 110-2, 110-3 based on the comparison signal. In an embodiment, the selector 206 includes priority logic that selects a sequence for charging the capacitors 110-1, 110-2, 110-3 in the event that two or more capacitors need to be charged. The priority logic generates a priority signal for the selector 206 based on the load connected to the outputs 108-1, 108-2, 108-3, the relative priority of each output 108-1, 108-2, 108-3 with respect to each other, and the like.
The comparison device 207 may include one or more comparators that compare the voltages stored by the capacitors 110-1, 110-2, 110-3 with a reference voltage to determine whether the corresponding capacitors 110-1, 110-2, 110-3 need to be charged. For example, if the voltage stored by one or more of the capacitors 110-1, 110-2, 110-3 is less than the corresponding reference signal, the comparison device 207 outputs a comparison signal indicative of the voltage difference.
The selector 206 receives the comparison signal and causes the inductor 104 to power the capacitor 110-1, 110-2, 110-3 during a first time period and causes the inductor 104 to power the other capacitor 110-1, 110-2, 110-3 via the output 210 during another time period. The output 210 includes a plurality of signal lines, and each signal line may be connected to the gate of a corresponding transistor 102 to control the operation of the SIMO device 100.
Controller 202 may also cause SIMO device 100 to operate in a CCM mode or a DCM mode. When operating in CCM mode, CCM device 208 causes SIMO device 100 to maintain I between pulses add Above zero ampere (0A). Fig. 3A and 3B illustrate example graphs 300-1, 300-2 including waveforms 301-1, 301-2 that represent inductor current through a SIMO, such as SIMO device 100, during one pulse in buck mode (i.e., one cycle of selection 102-3, 102-5, or 102-6). Referring to fig. 3A, waveform 301-1 represents a charge value (q_org) provided by an inductor current in DCM. The charge value is equal to the area under triangle 302. As shown, the current provided by the inductor current starts at zero amperes and increases to a current peak (Ipk org) and then returns to zero amperes. In buck-boost mode and buck mode, the shape in fig. 3A is the same, but q_org delivered to the load goes from ipk_org to zero. The current from 0 to Ipk _ org does not flow to the output.
Referring to FIG. 3B, in buck mode, when the SIMO device is operating in CCM mode, the inductor current is at valley current I add Starting and then increasing to peak current (ipk_new), and then returning to I add To deliver the desired charge to the output. The total value of the charges is equal to the area of triangle 304 and rectangle 306. Since the inductor current is initially at I add The pulse width of Qnew is therefore narrower relative to Q_org in order to maintain the same charge delivered to 102-3, 102-5 or 102-6 per pulse. CCM device 208 is configured to generate I based on an output signal provided by a difference between outputs 108-1, 108-2, 108-3 of SIMO device 100 and a corresponding target voltage signal add . During a charging cycle, CCM device 208 calculates a charge for selected outputs 108-1, 108-2, 108-3. In one embodiment, I-based add Root Mean Square (RMS) with ipk_org to calculate inductor charging current. In another embodiment, it may be greater than I add Root Mean Square (RMS) amount with ipk_org. Similar to fig. 3A, in buck-boost mode and buck mode, the current shape of fig. 3B is the same, but q_org delivered to the load changes from ipk_org to I add . From I add The current to Ipk _ org does not flow to the output.
Fig. 4 illustrates a CCM device 208 included in the controller 202. CCM device 208 generates SIMO control signals to control the operation of SIMO device 100. For example, CCM device 208 generates a SIMO control signal to cause SIMO device 100 to operate in CCM mode or DCM mode. The SIMO control signal is provided to the transistor gate of the SIMO device 100 to control the inductor current.
In an example embodiment, CCM device 208 includes a summer device 404 that receives differential signals from differential amplifiers 406-1, 406-2, 406-3. Differential amplifier 406-1 receives the output signal from output 108-1 and the target voltage signal from input 408-1. Differential amplifier 406-2 receives the output signal from output 108-2 and the target voltage signal from input 408-2. Differential amplifier 406-3 receives the output signal from output 108-3 and the target voltage signal from input 408-3. The target voltage signal may be a preprogrammed value provided by a device such as the controller 202 and represents the desired voltage for the respective output 108-1, 108-2, 108-3.
The differential amplifiers 406-1, 406-2, 406-3 output signals indicative of the differences between the respective output signals and the target voltage signal, and optionally include a minimum function to prevent positive errors on one output from being completely cancelled by the other input (e.g., negative errors on 406-1 should not cancel positive errors on 406-2). In some examples, when the load is removed, some negative error is required to reduce I add . For rapid decrease I add The need for (c) is offset by the fact that: the power converter device 200 may include a "short circuit period" in which the inductor is shorted. For example, if no load is requesting current, 102-2 and 102-4 may be turned on for one weekAnd (5) a period. The short circuit period is still lossy and should be minimized. In some examples, equalization is required in selecting the level of the smallest function for 406-1, 406-2, and 406-3. The summer device 404 sums the signals provided by the differential amplifiers 406-1, 406-2, 406-3 and provides the summed signals to the integrator 410. However, it should be appreciated that integrator 410 may be replaced by other loop filters and/or compensation schemes associated with power conversion.
Integrator 410 receives the summed signal and the threshold signal from input 412. The threshold signal may be provided by the controller 202. In an example embodiment, the threshold signal is initialized to zero. In another embodiment, the threshold signal is a preprogrammed value based on the configuration of the controller 202. Integrator 410 integrates the summed signal and the threshold signal and outputs I at output 204-1 add 。
Signal I add As the differential amplifier 406-1, 406-2, 406-3 output signal increases, this indicates an increase in the integral of the difference between the target voltage value and the corresponding output. When the SIMO device 100 is operating in CCM mode, signal I add A minimum inductor current (e.g., valley current) maintained at the inductor 104 is determined.
CCM device 208 also includes squaring devices 414-1, 414-2, 414-3 that receive I from integrator 410 add A signal and a target current peak signal from the respective inputs 416-1, 416-2, 416-3. The target current peak signal is characterized as a programmable Direct Current (DC) signal and may be received from the controller 202. The target peak current may be static or may be adjusted based on an operational metric of the SIMO converter, such as output power level. The target current peak signal represents a target current peak setting for the respective output 108-1, 108-2, 108-3. The target current peak signal corresponds to ipk_org because when I add At the time point of zero time, the RMS calculation passes these levels to 204-2 3, 4 (sqrt (x 2+0 2) =x).
Squaring devices 414-1, 414-2, 414-3 pair I add Squaring the signal and the corresponding target current peak signal, and outputting the square value toAnd corresponding summers 418-1, 418-2, 418-3. The summers 418-1, 418-2, 418-3 sum the respective squared signals and output the summed signals of the respective squared signals to the respective square root devices 420-1, 420-2, 420-3. Square root devices 420-1, 420-2, 420-3 receive the respective summed square signals and generate signals representative of the square root of the respective summed square signals.
Square root devices 420-1, 420-2, 420-3 output square root signals at respective outputs 204-2, 204-3, 204-4. Square root signal representing I add Root Mean Square (RMS) values of the signal and the corresponding target current peak signal. Outputs 204-1, 204-2, 204-3, 204-4 are used to control the gates of the one or more transistors of SIMO device 100 to operate SIMO device 100 in a CCM mode. For example, the inductor is in I from the previous cycle add Initially, the outputs 204-2, 204-3, 204-4 provide such that the inductor current flows from I add Signal transitioning to the desired current peak and then inductor current ramping down to I determined by 204-1 add So that the inductor current for the next cycle will again be at I add Starting.
In various embodiments, squaring devices 414-1, 414-2, 414-3 may be mixers. For example, squaring devices 414-1, 414-2, 414-3 may include Gilbert cells, transconductance linear devices, and the like. In various embodiments, square root devices 420-1, 420-2, 420-3 may be transconductance linear devices or gilbert multipliers used in feedback circuits to produce square roots.
Fig. 5 illustrates another embodiment of CCM device 208. As shown in fig. 5, CCM device 208 includes analog-to-digital converter 504 and digital-to-analog converters 506-1, 506-2, 506-3. Analog to digital converter 504 receives I from integrator 410 add Signal and output I at output 508 add Digital representation of the signal.
CCM device 208 also includes squaring devices 514-1, 514-2, 514-3 that receive I from analog-to-digital converter 504 add Digital representations of the signals and target current peak signals from the respective inputs 416-1, 416-2, 416-3. Squaring device 514-1, 514-2, 514-3 pair I add The digital representation of the signal and the corresponding target current peak signal are squared and the squared values are output to corresponding summers 518-1, 518-2, 518-3. The summers 518-1, 518-2, 518-3 sum the respective squared signals and output the summed signals of the respective squared signals to the respective square root devices 520-1, 520-2, 520-3. The square root devices 520-1, 520-2, 520-3 receive the respective summed square signals and generate signals representative of the square root of the respective summed square signals.
The square root devices 520-1, 520-2, 520-3 output square root signals to digital-to-analog converters 506-1, 506-2, 506-3 at respective outputs 204-2, 204-3, 204-4. Square root signal representing I add The digital representation of the signal is related to the root mean square value of the corresponding target current peak signal. Digital-to-analog converters 506-1, 506-2, 506-3 convert the respective square root signals to analog representations of the square root signals. An analog representation of the square root signal is provided to the gates of one or more transistors of SIMO device 100 such that the inductor current flows from I add Transitioning to the desired current peak.
In various embodiments, squaring devices 514-1, 514-2, 514-3 may be multipliers such as binary multipliers. In various embodiments, square root devices 520-1, 520-2, 520-3 may be implemented in suitable combinational logic or look-up tables.
Fig. 6 illustrates another example embodiment of CCM device 208.CCM device 208 includes a up-down counter 604. In an embodiment, the up-down counter 604 receives one or more input signals from the comparison device 207. In an embodiment, the comparison device 207 includes comparators 606-1, 606-2, 606-3. Comparators 606-1, 606-2, 606-3 compare the voltage signals received from the respective outputs 108-1, 108-2, 108-3 with the respective reference voltage signals received at inputs 608-1, 608-2, 608-3. Comparators 606-1, 606-2, 606-3 output comparison signals based on comparisons at outputs 605-1, 605-2, 605-3.
The voltage signals represent voltages stored by the respective capacitors 110-1, 110-2, 110-3. The up-down counter 604 is based on a ratio of the outputs, similar to that described with reference to 406-1, 406-2, 406-3The comparison signals output by comparators 606-1, 606-2, 606-3 use a minimum count function on each input to generate I add A signal. I add The signal is output at 609.
Digital to analog converter 610-1 will I add Conversion of signals to I add A digital representation of the signal and the digital representation is output at output 204-1.
Similar to the CCM device shown in fig. 5 and described above, squaring devices 514-1, 514-2, 514-3 receive I from up-down counter 604 add Signals, and receives target current peak signals from respective inputs 416-1, 416-2, 416-3. Squaring device 514-1, 514-2, 514-3 pair I add The signal and the corresponding target current peak signal are squared and the squared values are output to corresponding summers 518-1, 518-2, 518-3. The summers 518-1, 518-2, 518-3 sum the respective square signals and output the summed signals of the square signals to the respective square root devices 520-1, 520-2, 520-3. The square root devices 520-1, 520-2, 520-3 receive the respective summed square signals and generate signals representative of the square root of the respective summed square signals.
Square root devices 520-1, 520-2, 520-3 output square root signals to digital-to-analog converters 506-1, 506-2, 506-3. Digital-to-analog converters 506-1, 506-2, 506-3 convert the respective square root signals to analog representations of the square root signals and output the analog representations at respective outputs 204-2, 204-3, 204-4. The signals output at outputs 204-2, 204-3, 204-4 are provided to gates of one or more transistors of SIMO device 100 to control the operation of SIMO device 100.
Fig. 7 illustrates an example up-down counter 604 according to an example embodiment. The up-down counter 604 includes integrators 702-1, 702-2, 702-3. The integrators 702-1, 702-2, 702-3 receive respective control signals from the outputs 605-1, 605-2, 605-3 of the charge prioritization device 206. The integrators 702-1, 702-2, 702-3 each integrate the respective control signals, and the integrated signals are output as I at 609 add 。
The foregoing description is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. The broad teachings of the disclosure can be implemented in a variety of forms. Therefore, while this disclosure includes particular examples, the true scope of the disclosure should not be so limited since other modifications will become apparent upon a study of the drawings, the specification, and the following claims. It should be understood that one or more steps within a method may be performed in a different order (or simultaneously) without altering the principles of the present disclosure. Further, while each embodiment is described above as having certain features, any one or more of those features described with respect to any other embodiment of the disclosure may be implemented in and/or combined with the features of any other embodiment, even if a combination of the features with any other embodiment is not explicitly described. In other words, the described embodiments are not mutually exclusive, and an arrangement of one or more embodiments with each other is still within the scope of the present disclosure.
Spatial and functional relationships between elements (e.g., between modules, circuit elements, semiconductor layers, etc.) are described using various terms including "connected," joined, "" coupled, "" adjacent, "" at the top of … …, "" above … …, "" below … …, "and" disposed. Unless specifically stated as "direct", when a relationship between a first element and a second element is described in the above disclosure, such relationship may be a direct relationship when no other intermediate elements are present between the first element and the second element, but may also be an indirect relationship when one or more intermediate elements are present (spatially or functionally) between the first element and the second element. As used herein, the phrase "at least one of A, B and C" should be construed to mean logic (a or B or C) that uses a non-exclusive logical or, and should not be construed to mean "at least one of a, at least one of B, and at least one of C".
In the figures, the direction of the arrows (as indicated by the arrows) generally indicates the flow of information (such as data or instructions) that is advantageous for illustration. For example, when element a and element B exchange various information but the information transmitted from element a to element B is related to the illustration, an arrow may be directed from element a to element B. This unidirectional arrow does not mean that no other information is transmitted from element B to element a. Further, for information sent from element a to element B, element B may send a request for the information to element a or receive an acknowledgement of the information.
In the present application, including the following definitions, the term "module" or the term "controller" may be replaced with the term "circuit". The term "module" may refer to, be part of, or include the following: an Application Specific Integrated Circuit (ASIC); digital, analog, or mixed analog/digital discrete circuits; digital, analog, or hybrid analog/digital integrated circuits; a combinational logic circuit; a Field Programmable Gate Array (FPGA); processor circuitry (shared, dedicated, or group) that executes code; a memory circuit (shared, dedicated, or group) storing code for execution by the processor circuit; other suitable hardware components that provide the described functionality; or a combination of some or all of the above, such as in a system-on-chip.
The module may include one or more interface circuits. In some examples, the interface circuit may include a wired or wireless interface to a Local Area Network (LAN), the internet, a Wide Area Network (WAN), or a combination thereof. The functionality of any given module of the present disclosure may be distributed among a plurality of modules connected via interface circuitry. For example, multiple modules may allow load balancing. In further examples, a server (also referred to as a remote or cloud) module may implement some functionality on behalf of a client module.
The term "code" as used above may include software, firmware, and/or microcode, and may refer to programs, routines, functions, classes, data structures, and/or objects. The term "shared processor circuit" encompasses a single processor circuit that executes some or all code from multiple modules. The term "set of processor circuits" includes processor circuits that execute some or all code from one or more modules in combination with additional processor circuits. References to "multiple processor circuits" include multiple processor circuits on a discrete die, multiple processor circuits on a single die, multiple cores of a single processor circuit, multiple threads of a single processor circuit, or combinations thereof. The term "shared memory circuit" encompasses a single memory circuit that stores some or all code from multiple modules. The term "set of memory circuits" encompasses memory circuits that store some or all code from one or more modules in combination with additional memory.
The term "memory circuit" is a subset of the term "computer-readable medium". The term "computer-readable medium" as used herein does not include transitory electrical or electromagnetic signals propagating through a medium (such as on a carrier wave); thus, the term "computer-readable medium" may be considered tangible and non-transitory. Non-limiting examples of the non-transitory tangible computer readable medium are non-volatile memory circuits (such as flash memory circuits, erasable programmable read-only memory circuits, or mask read-only memory circuits), volatile memory circuits (such as static random access memory circuits or dynamic random access memory circuits), magnetic storage media (such as analog or digital magnetic tape or hard disk drives), and optical storage media (such as CDs, DVDs, or blu-ray discs).
The apparatus and methods described in this disclosure may be practiced, in part or in whole, by special purpose computers created by configuring a general purpose computer to perform one or more specific functions that are embodied in a computer program. The above-described functional blocks, flowchart components, and other elements serve as software specifications that can be converted into computer programs by routine work of a skilled person or programmer.
The computer program includes processor-executable instructions stored on at least one non-transitory tangible computer-readable medium. The computer program may also include or be dependent on stored data. The computer program may include a basic input/output system (BIOS) that interacts with the hardware of a special purpose computer, a device driver that interacts with a particular device of a special purpose computer, one or more operating systems, user applications, background services, background applications, and the like.
The computer program may include: (i) Descriptive text to be parsed, such as HTML (hypertext markup language), XML (extensible markup language) or JSON (JavaScript object notation); (ii) assembly code; (iii) object code generated by a compiler from source code; (iv) source code for execution by the interpreter; (v) Source code for compilation and execution by a just-in-time compiler, and so forth. For example only, source code may be used from the sources including C, C ++, C#, objective-C, swift, haskell, go, SQL, R, lisp,Fortran、Perl、Pascal、Curl、OCaml、/>HTML5 (hypertext markup language 5 th revision), ada, ASP (dynamic server page), PHP (PHP: hypertext preprocessor), scala, eiffel, smalltalk, erlang, ruby, ->Lua, MATLAB, SIMULINK and->Is written in the grammar of the language.
No element recited in a claim is intended to be a means-plus-function element within the meaning of 35u.s.c. ≡112 (f) unless the element is explicitly stated using the phrase "means for … …" or in the case of a method claim using the phrase "operation for … …" or "step for … …".
Claims (14)
1. A power converter, comprising:
a Single Input Multiple Output (SIMO) device, the device comprising:
a first transistor connected to the input and to a first end of the inductor;
a second transistor connected to the second end of the inductor and the first output;
a third transistor connected to the second end of the inductor and a second output; and
a controller connected to the SIMO device and configured to: maintaining an inductor current through the inductor between charging cycles, and causing the inductor current to transition to a charging inductor current during the charging cycles,
wherein the charging inductor current is based on a difference between an output voltage signal and a target voltage signal, wherein the controller comprises an integrator configured to generate an inductor current signal corresponding to the inductor current, the inductor current signal being based on a difference between the output voltage signal and the target voltage signal provided by at least one of the first output and the second output,
wherein the controller is configured to generate a charging inductor current signal based on the inductor current signal and a target current peak signal; and is also provided with
Wherein the charging inductor current signal comprises a Root Mean Square (RMS) of the inductor current and the target current peak signal,
wherein the controller further comprises:
a squaring device configured to generate a squared inductor current signal and a squared target current peak signal;
a summer connected to the output of the squaring device and configured to generate a summed signal based on the squared inductor current signal and the squared target current peak signal; and
a square root device is connected to the output of the summer and configured to generate a Root Mean Square (RMS) of the inductor current and the target current peak signal based on the summed signal.
2. The power converter of claim 1, wherein the squaring device comprises at least one of a mixer and a multiplier.
3. The power converter of claim 1, wherein the square root device comprises a transconductance linear amplifier.
4. The power converter of claim 1, wherein the square root device comprises a look-up table.
5. The power converter of claim 1, wherein the controller further comprises:
an analog-to-digital converter connected to an output of the integrator and configured to generate a digital representation of the inductor current, wherein the squaring device is connected to an output of the analog-to-digital converter; and
a digital-to-analog converter connected to the output of the square root device and configured to generate an analog representation of the target current peak signal.
6. The power converter of claim 1, wherein the target current peak signal comprises a programmable Direct Current (DC) signal representing a target current peak setting for at least one of the first output and the second output.
7. A power converter, comprising:
a Single Input Multiple Output (SIMO) device, the device comprising:
a first transistor connected to the input and to a first end of the inductor;
a second transistor connected to the second end of the inductor and the first output;
a third transistor connected to the second end of the inductor and a second output; and
a controller connected to the SIMO device and configured to: maintaining an inductor current through the inductor between charging periods, and causing the inductor current to transition to a first charging inductor current corresponding to the first output during a first charging period and to a second charging inductor current corresponding to the second output during a second charging period,
wherein the first charge inductor current is based on a difference between a first output voltage signal at the first output and a first target voltage signal at the first output, and the second charge inductor current is based on a difference between a second output voltage signal at the second output and a second target voltage signal at the second output,
wherein the controller comprises an integrator configured to generate an inductor current signal corresponding to the inductor current, the inductor current signal based on the difference between the first output voltage signal provided by at least one of the first output and the second output and the first target voltage signal of at least one of the first output and the second output,
wherein the controller is configured to generate a first charging inductor current signal based on the inductor current signal and the target current peak signal of the first output; and is also provided with
Wherein the first charging inductor current signal comprises a Root Mean Square (RMS) of the inductor current and the target current peak signal of the first output,
wherein the controller further comprises:
a squaring device configured to generate a squared inductor current signal and a squared target current peak signal corresponding to the first output;
a summer connected to the output of the squaring device and configured to generate a summed signal based on the squared inductor current signal and the squared target current peak signal; and
a square root device is connected to the output of the summer and configured to generate a Root Mean Square (RMS) of the inductor current and the target current peak signal of the first output based on the summation signal.
8. The power converter of claim 7, wherein the squaring device comprises at least one of a mixer and a multiplier.
9. The power converter of claim 7, wherein the square root device comprises a transconductance linear amplifier.
10. The power converter of claim 7, wherein the square root device comprises a look-up table.
11. The power converter of claim 7, wherein the controller further comprises:
an analog-to-digital converter connected to an output of the integrator and configured to generate a digital representation of the inductor current, wherein the squaring device is connected to an output of the analog-to-digital converter; and
a digital-to-analog converter connected to the output of the square root device and configured to generate an analog representation of the target current peak signal.
12. A power converter as in claim 7 wherein the squaring device is connected to the output of the integrator.
13. The power converter of claim 7, wherein the target current peak signal comprises a programmable Direct Current (DC) signal representing a target current peak setting for at least one of the first output and the second output.
14. The power converter of claim 7, wherein the controller is configured to generate a second charging inductor current signal based on the inductor current signal and a target current peak signal of the second output.
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| US16/415,419 US11336178B2 (en) | 2019-01-29 | 2019-05-17 | Continuous conduction mode SIMO device |
| US16/415,419 | 2019-05-17 |
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