CN111490680A - Continuous conduction mode single-input multi-output device - Google Patents
Continuous conduction mode single-input multi-output device Download PDFInfo
- Publication number
- CN111490680A CN111490680A CN201911372223.XA CN201911372223A CN111490680A CN 111490680 A CN111490680 A CN 111490680A CN 201911372223 A CN201911372223 A CN 201911372223A CN 111490680 A CN111490680 A CN 111490680A
- Authority
- CN
- China
- Prior art keywords
- output
- signal
- inductor
- inductor current
- power converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007704 transition Effects 0.000 claims abstract description 5
- 239000003990 capacitor Substances 0.000 description 19
- 238000010586 diagram Methods 0.000 description 7
- 238000004590 computer program Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000012913 prioritisation Methods 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- ZLIBICFPKPWGIZ-UHFFFAOYSA-N pyrimethanil Chemical compound CC1=CC(C)=NC(NC=2C=CC=CC=2)=N1 ZLIBICFPKPWGIZ-UHFFFAOYSA-N 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000010979 ruby Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0083—Converters characterised by their input or output configuration
- H02M1/009—Converters characterised by their input or output configuration having two or more independently controlled outputs
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1582—Buck-boost converters
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
A power converter is disclosed. The power converter includes a Single Input Multiple Output (SIMO) device, the SIMO device comprising: a first transistor connected to the input and to a first end of the inductor; a second transistor connected to a second end of the inductor and to a first output; and a third transistor coupled to the second end of the inductor and to the second output. The power converter also includes a controller connected to the SIMO device and configured to: a minimum inductor current through the inductor is maintained between charging cycles and is caused to transition to a charging inductor current during a charging cycle. The charging inductor current is based on a difference between the output voltage signal and the target voltage signal.
Description
Cross Reference to Related Applications
This application claims the benefit of U.S. provisional application No. 62/798,129 filed on 29/1/2019. The entire disclosure of the aforementioned U.S. provisional application is incorporated herein by reference.
Technical Field
The present disclosure relates to power converters, and more particularly to single-inductor multiple-output (SIMO) devices that provide power to a powered device.
Background
The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Typically, battery powered consumer devices require more than one supply voltage level to operate. For example, a processor may operate at a first voltage level, while one or more peripheral devices may operate at a second voltage level. Accordingly, these devices incorporate power converters to convert electrical energy from one form to another. For example, a power converter may be used to convert a Direct Current (DC) or rectified Alternating Current (AC) input signal into one or more DC output signals at the same or different power levels. The power converter may include single-input multiple-output (SIMO) devices that store current in a single inductor based on an input signal and selectively discharge the stored current to a plurality of loads connected to selected outputs of the SIMO devices. SIMO devices may also be referred to as single inductance multiple output devices.
Disclosure of Invention
A power converter is disclosed. The power converter includes a Single Input Multiple Output (SIMO) device, the SIMO device comprising: a first transistor connected to the input and to a first end of the inductor; a second transistor connected to a second end of the inductor and to a first output; and a third transistor coupled to the second end of the inductor and to the second output. The power converter also includes a controller connected to the SIMO device and configured to: a minimum inductor current through the inductor is maintained between charging cycles and is caused to transition to a charging inductor current during a charging cycle. The charging inductor current is based on a difference between the output voltage signal and the target voltage signal.
In other features, the controller includes an integrator configured to generate a minimum inductor current signal based on a difference between (1) the output voltage signal provided by at least one of the first output and the second output and (2) the target voltage signal.
In other features, the controller is configured to generate a charging inductor current signal based on the minimum inductor current signal and a target current peak signal.
In other features, the charging inductor current signal comprises a Root Mean Square (RMS) of the minimum inductor current and the target current peak signal.
In other features, the controller further comprises: a squaring device configured to generate a squared minimum inductor current signal and a squared target current peak signal; a summer connected to an output of the squaring device and configured to generate a summation signal based on the squared minimum inductor current signal and the squared target current peak signal; and a square root device connected to an output of the summer and configured to generate the target current peak signal based on the summed signal.
In other features, the squaring device comprises at least one of a mixer and a multiplier.
In other features, the square root device comprises at least one of a transconductance linear amplifier and a lookup table.
In other features, the controller further comprises an analog-to-digital converter connected to an output of the integrator and configured to generate a digital representation of the minimum inductor current, and the squaring device is connected to an output of the analog-to-digital converter. The controller also includes a digital-to-analog converter connected to an output of the square root device and configured to generate an analog representation of the target current peak signal.
In other features, the target current peak signal comprises a programmable Direct Current (DC) signal representative of a target current peak setting for at least one of the first output and the second output.
A power converter is disclosed. The power converter includes a Single Input Multiple Output (SIMO) device, the SIMO device comprising: a first transistor connected to the input and to a first end of the inductor; a second transistor connected to a second end of the inductor and to a first output; and a third transistor coupled to the second end of the inductor and to the second output. The power converter also includes a controller connected to the SIMO device and configured to: a minimum inductor current through the inductor is maintained between charging cycles and is caused to transition (1) to a first charging inductor current corresponding to the first output during a first charging cycle and (2) to a second charging inductor current corresponding to the second output during a second charging cycle. The first charging inductor current is based on a difference between a first output voltage signal at the first output and a first target voltage signal of the first output, and the second charging inductor current is based on a difference between a second output voltage signal at the second output and a second target voltage signal of the second output.
In other features, the controller includes an integrator configured to generate a minimum inductor current signal based on the difference between (1) the output voltage signal provided by at least one of the first output and the second output and (2) the target voltage signal for at least one of the first output and the second output.
In other features, the controller is configured to generate a first charging inductor current signal based on the minimum inductor current signal and a target current peak signal of the first output.
In other features, the first charging inductor current signal comprises a Root Mean Square (RMS) of the minimum inductor current and the target current peak signal of the first output.
In other features, the controller further comprises: a squaring device configured to generate a squared minimum inductor current signal and a squared target current peak signal corresponding to the first output; a summer connected to an output of the squaring device and configured to generate a summation signal based on the squared minimum inductor current signal and the squared target current peak signal; and a square root device connected to an output of the summer and configured to generate the target current peak signal for the first output based on the summed signal.
In other features, the squaring device comprises at least one of a mixer and a multiplier.
In other features, the square root device comprises at least one of a transconductance linear amplifier and a lookup table.
In other features, the controller further comprises an analog-to-digital converter connected to an output of the integrator and configured to generate a digital representation of the minimum inductor current, and the squaring device is connected to an output of the analog-to-digital converter. The controller also includes a digital-to-analog converter connected to an output of the square root device and configured to generate an analog representation of the target current peak signal.
In other features, wherein the squaring device is connected to an output of the integrator.
In other features, the target current peak signal comprises a programmable Direct Current (DC) signal representative of a target current peak setting for at least one of the first output and the second output.
In other features, the controller is configured to generate a second charging inductor current signal based on the minimum inductor current signal and a target current peak signal of the second output.
Further areas of applicability of the present disclosure will become apparent from the detailed description, claims, and drawings. The detailed description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.
Drawings
The present disclosure will become more fully understood from the detailed description and the accompanying drawings, wherein:
FIG. 1 is a schematic diagram illustrating SIMO according to an example embodiment of the present disclosure;
FIG. 2 is a schematic diagram illustrating a Continuous Conduction Mode (CCM) SIMO device according to an example embodiment of the present disclosure;
FIG. 3A is a graph illustrating an example inductor current waveform when the SIMO device is operating in Discontinuous Conduction Mode (DCM);
FIG. 3B is a graph illustrating an example inductor current waveform when the SIMO device is operating in CCM;
FIG. 4 is a schematic diagram illustrating a CCM device according to an example embodiment of the present disclosure;
FIG. 5 is a schematic diagram illustrating another CCM device according to an example embodiment of the present disclosure;
FIG. 6 is a schematic diagram illustrating another CCM device according to an example embodiment of the present disclosure; and is
FIG. 7 is a schematic diagram illustrating an up-down counter and a comparison device according to an example embodiment of the present disclosure.
In the drawings, reference numbers may be repeated among the figures to identify similar and/or identical elements.
Detailed Description
SIMO devices use a single inductor to store energy and power multiple electrical loads. The inductor is powered during a first time period and provides power to an electrical load connected to one of the plurality of outputs of the SIMO during a second time period. SIMO devices may operate in Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). In DCM, the inductor current drops to zero and remains at zero until the start of the next switching cycle. In CCM, the inductor current is ramped down to a minimum inductor current (I) that remains above zero between switching cyclesadd)。
However, SIMO may be when operating in CCMInter-channel oscillation is experienced. For example, the inductor current from a previous pulse cycle may affect the next pulse cycle, which results in more or less energy from the inductor than desired. This in turn may lead to the wrong pulse energy for the next pulse and may continue into oscillation. The present disclosure relates to a power converter including a SIMO device and a controller that controls I through an inductor during and between charging cyclesadd(e.g., a valley of the inductor current). The controller also makes IaddThe magnitude of the charging inductor current is affected during the charging cycle. The charging inductor current is based on a desired current level and/or voltage output corresponding to the output of the SIMO device.
Fig. 1 illustrates an example schematic diagram of a SIMO apparatus 100 in accordance with this disclosure. The SIMO device 100 includes a plurality of transistors 102 and an inductor 104. In an embodiment, the transistor 102 may include a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), but other transistors such as a DMOS device or a HEMT may also be used. As shown, the SIMO device 100 includes a first transistor 102-1, a second transistor 102-2, a third transistor 102-3, a fourth transistor 102-4, a fifth transistor 102-5, and a sixth transistor 102-6. However, it should be understood that the SIMO device 100 may include a different number of transistors to provide additional or fewer outputs based on the configuration of the SIMO. The third transistor 102-3, the fifth transistor 102-5, and the sixth transistor 102-6 include well switching devices. If DMOS devices are used, series devices may be used instead of these individual devices to prevent unwanted body diodes from affecting operation.
The third transistor 102-3, the fifth transistor 102-5, and the sixth transistor 102-6 are coupled to outputs 108-1, 108-2, 108-3, respectively. In some examples, the outputs 108-1, 108-2, 108-3 are each connected to a corresponding capacitor 110-1, 110-2, 110-3. Capacitors 110-1, 110-2, 110-3 are charged to a desired voltage level by inductor 104 based on the control signal. The capacitors 110-1, 110-2, 110-3 may supply power to one or more electrical loads 112-1, 112-2, 112-3 connected to the corresponding capacitors 110-1, 110-2, 110-3.
Fig. 2 illustrates an example power converter 200 according to this disclosure. The power converter 200 includes the SIMO device 100 and a controller 202. The controller 202 receives output signals from the outputs 108-1, 108-2, 108-3 and the controller 202 controls the operation of the SIMO device 100 based on these output signals. For example, controller 202 may selectively output control signals to respective gates of transistors 102 to control charging or discharging of inductor 104 and/or capacitors 110-1, 110-2, 110-3 via outputs 204-1, 204-2, 204-3, 204-4. The outputs 204-1, 204-2, 204-3, 204-4 may be connected to the gates of one or more transistors 102 to control the inductor current.
The controller 202 includes a selector 206 that selects the charging of the capacitors 110-1, 110-2, 110-3 based on the voltage requirements. In these embodiments, the selector 206 provides a control signal that selectively causes the SIMO device 100 to power the capacitors 110-1, 110-2, 110-3 based on the voltage stored by the capacitors 110-1, 110-2, 110-3. The selector 206 receives the comparison signal from the comparison device 207 and selects one of the outputs 108-1, 108-2, 108-3 to receive the inductor current to recharge the corresponding capacitor 110-1, 110-2, 110-3. The selector 206 may be implemented in digital logic and determines the switching sequence for recharging the capacitors 110-1, 110-2, 110-3 based on the comparison signal. In an embodiment, the selector 206 includes priority logic that selects an order for charging the capacitors 110-1, 110-2, 110-3 if two or more capacitors require charging. The priority logic generates a priority signal for the selector 206 based on the load connected to the outputs 108-1, 108-2, 108-3, the relative priority of each output 108-1, 108-2, 108-3 with respect to each other, and so on.
The comparison device 207 may include one or more comparators that compare the voltages stored by the capacitors 110-1, 110-2, 110-3 to a reference voltage to determine whether the corresponding capacitors 110-1, 110-2, 110-3 require charging. For example, if the voltage stored by one or more of the capacitors 110-1, 110-2, 110-3 is less than the corresponding reference signal, the comparison device 209 outputs a comparison signal indicative of the voltage difference.
The selector 206 receives the comparison signal and causes the inductor 104 to supply power to the capacitors 110-1, 110-2, 110-3 during a first time period and causes the inductor 104 to supply power to another capacitor 110-1, 110-2, 110-3 via the output 210 during another time period. The output 210 includes a plurality of signal lines and each signal line may be connected to a gate of a corresponding transistor 102 to control operation of the SIMO device 100.
The controller 202 may also operate the SIMO device 100 in CCM mode or DCM mode. When operating in CCM mode, CCM device 208 causes SIMO device 100 to maintain I between pulsesaddAbove zero amperes (0A). Fig. 3A and 3B illustrate example graphs 300-1, 300-2 including waveforms 301-1, 301-2 representing inductor current through a SIMO (such as the SIMO device 100) in a pulse (i.e., one period of selection 102-3, 102-5, or 102-6) in buck mode. Referring to fig. 3A, waveform 301-1 represents the charge value (Q _ org) provided by the inductor current in DCM. The charge value is equal to the area under the triangle 302. As shown, the current provided by the inductor current starts at zero amps and increases to a current peak value (Ipk _ org) and then returns toAnd zero amperes. In buck-boost mode and buck mode, the shape in fig. 3A is the same, but Q _ org delivered to the load changes from Ipk _ org to zero. The current from 0 to Ipk _ org does not flow to the output.
Referring to FIG. 3B, in buck mode, when the SIMO device is operating in CCM mode, the inductor current is at a valley current IaddBegins, and then increases to the peak current (Ipk new), and then returns to IaddTo deliver the desired charge to the output. The total value of the charge is equal to the area of the triangle 304 and the rectangle 306. Since the inductor current is initially at IaddThus, the pulse width of Qnew is narrower relative to Q _ org in order to maintain the same charge delivered to 102-3, 102-5 or 102-6 per pulse. CCM device 208 is configured to generate I based on output signals provided by the differences between outputs 108-1, 108-2, 108-3 of SIMO device 100 and the respective target voltage signalsadd. During the charging cycle, CCM device 208 calculates the inductor charging current for the selected output 108-1, 108-2, 108-3. In one embodiment, based on IaddThe inductor charging current is calculated with the Root Mean Square (RMS) of Ipk _ org. In another embodiment, it may be greater than IaddAnd Root Mean Square (RMS) of Ipk _ org. Similar to FIG. 3A, in buck-boost mode and buck mode, the current shape of FIG. 3B is the same, but Q _ org delivered to the load is changed from Ipk _ org to Iadd. From IaddThe current to Ipk _ org does not flow to the output.
Fig. 4 illustrates CCM device 208 included in controller 202. The CCM device 208 generates SIMO control signals to control the operation of the SIMO device 100. For example, CCM device 208 generates SIMO control signals to cause SIMO device 100 to operate in CCM mode or DCM mode. The SIMO control signal is provided to the transistor gate of SIMO device 100 to control the inductor current.
In an example embodiment, CCM device 208 includes a summer device 404 that receives differential signals from differential amplifiers 406-1, 406-2, 406-3. Differential amplifier 406-1 receives the output signal from output 108-1 and the target voltage signal from input 408-1. Differential amplifier 406-2 receives the output signal from output 108-2 and the target voltage signal from input 408-2. Differential amplifier 406-3 receives the output signal from output 108-3 and the target voltage signal from input 408-3. The target voltage signal may be a preprogrammed value provided by a device, such as the controller 202, and represents a desired voltage for the respective output 108-1, 108-2, 108-3.
The differential amplifiers 406-1, 406-2, 406-3 output signals indicative of the difference between the respective output signals and the target voltage signal, and optionally include a minimization function to prevent positive errors on one output from being completely cancelled by the other input (e.g., negative errors on 406-1 should not cancel positive errors on 406-2). In some examples, when the load is removed, some negative error is required to reduce Iadd. For rapid reduction of IaddThe need for (b) is offset by the fact that: the power converter device 200 may include a "short-circuit period" in which the inductor is short-circuited. For example, if no load is requesting current, 102-2 and 102-4 may be turned on for one cycle. The short circuit period is still lossy and should be minimized. In some examples, equalization is required in selecting the level of the minimum function for 406-1, 406-2, and 406-3. The summer device 404 sums the signals provided by the differential amplifiers 406-1, 406-2, 406-3 and provides the summed signal to the integrator 410. However, it should be understood that integrator 410 may be replaced by other loop filters and/or compensation schemes related to power conversion.
Signal IaddIncreases with increasing output signal of the differential amplifiers 406-1, 406-2, 406-3, which indicates an increasing integral of the difference between the target voltage value and the corresponding output. Signal I when SIMO device 100 is operating in CCM modeaddDetermining maintenance at inductor 104Minimum inductor current (e.g., valley current).
Squaring devices 414-1, 414-2, 414-3 pairs IaddThe signal and the corresponding target current peak signal are squared and the squared values are output to respective summers 418-1, 418-2, 418-3. Summers 418-1, 418-2, 418-3 sum the respective squared signals and output the summed signals of the respective squared signals to respective square root devices 420-1, 420-2, 420-3. The square root devices 420-1, 420-2, 420-3 receive the respective summed squared signals and generate signals representing the square root of the respective summed squared signals.
Square root devices 420-1, 420-2, 420-3 output square root signals at respective outputs 204-2, 204-3, 204-4. The square root signal represents IaddThe Root Mean Square (RMS) value of the signal and the corresponding target current peak signal. The outputs 204-1, 204-2, 204-3, 204-4 are used to control the gates of the one or more transistors of the SIMO device 100 in order to operate the SIMO device 100 in CCM mode. For example, the inductor takes I from the previous cycleaddInitially, the outputs 204-2, 204-3, 204-4 are provided such that the inductor current is drawn from IaddTransition to a signal of the desired current peak and then inductor current ramps down to I determined by 204-1addSo that the inductor current of the next cycle will again be at IaddAnd starting.
In various embodiments, squaring devices 414-1, 414-2, 414-3 may be mixers. For example, the squaring devices 414-1, 414-2, 414-3 may include Gilbert cells, transconductance linear devices, and the like. In various embodiments, square root devices 420-1, 420-2, 420-3 square may be transconductance linear devices or Gilbert multipliers used in feedback circuits to produce square roots.
Fig. 5 illustrates another embodiment of CCM device 208. As shown in fig. 5, CCM device 208 includes an analog-to-digital converter 504 and digital-to-analog converters 506-1, 506-2, 506-3. The analog-to-digital converter 504 receives I from the integrator 410addSignal and output I at output 508addDigital representation of the signal.
The square root devices 520-1, 520-2, 520-3 output square root signals to digital to analog converters 506-1, 506-2, 506-3 at respective outputs 204-2, 204-3, 204-4. The square root signal represents IaddThe digital representation of the signal corresponds to the root mean square value of the corresponding target current peak signal. Digital-to-analog converters 506-1, 506-2, 506-3 convert the respective square root signals to analog representations of the square root signals. An analog representation of the square root signal is provided to the gates of one or more transistors of SIMO device 100 to cause the inductor current to flow from IaddTransitioning to the desired current peak.
In various embodiments, squaring devices 514-1, 514-2, 514-3 may be multipliers such as binary multipliers. In various embodiments, square root devices 520-1, 520-2, 520-3 may be implemented in suitable combinatorial logic or look-up tables.
Fig. 6 illustrates another example embodiment of CCM device 208. CCM device 208 includes a up-down counter 604. In an embodiment, up-down counter 604 receives one or more input signals from comparison device 207. In an embodiment, the comparison device 207 comprises comparators 606-1, 606-2, 606-3. The comparators 606-1, 606-2, 606-3 compare the voltage signals received from the respective outputs 108-1, 108-2, 108-3 with respective reference voltage signals received at the inputs 608-1, 608-2, 608-3. The comparators 606-1, 606-2, 606-3 output comparison signals based on the comparisons at the outputs 605-1, 605-2, 605-3.
The voltage signal represents the voltage stored by the respective capacitor 110-1, 110-2, 110-3. Similar to that described with reference to 406-1, 406-2, 406-3, the up-down counter 604 uses a minimum count function on each input to generate I based on the comparison signals output by the comparators 606-1, 606-2, 606-3addA signal. I isaddThe signal is output at 609.
Digital-to-analog converter 610-1 will IaddConversion of signals into IaddA digital representation of the signal and outputs the digital representation at output 204-1.
Similar to the CCM device shown in FIG. 5 and described above, the squaring devices 514-1, 514-2, 514-3 receive I from the up-down counter 604addAnd receives the target current peak signal from the respective inputs 416-1, 416-2, 416-3. Squaring devices 514-1, 514-2 and 514-3 pairs IaddThe signal and the corresponding target current peak signal are squared and the squared values are output to respective summers 518-1, 518-2, 518-3. Summers 518-1, 518-2, 518-3 sum the respective squared signals and output the summed signals of the squared signals to respective square root devices 520-1, 520-2, 520-3. Square root devices 520-1, 520-2, 520-3 receive the respective summed squared signals and generate signals representing the square root of the respective summed squared signals.
The square root devices 520-1, 520-2, 520-3 output square root signals to digital to analog converters 506-1, 506-2, 506-3. The digital-to-analog converters 506-1, 506-2, 506-3 convert the respective square root signals to an analog representation of the square root signals and output the analog representation at the respective outputs 204-2, 204-3, 204-4. The signals output at the outputs 204-2, 204-3, 204-4 are provided to the gates of one or more transistors of the SIMO device 100 to control the operation of the SIMO device 100.
Fig. 7 illustrates an example up-down counter 604 according to an example embodiment. The up-down counter 604 includes integrators 702-1, 702-2, 702-3. The integrators 702-1, 702-2, 702-3 receive respective control signals from the outputs 605-1, 605-2, 605-3 of the charge prioritization device 206. Integrators 702-1, 702-2, 702-3 each integrate a respective control signal, and the integrated signal is output as I at 609add。
The foregoing description is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. The broad teachings of the disclosure can be implemented in a variety of forms. Therefore, while this disclosure includes particular examples, the true scope of the disclosure should not be so limited since other modifications will become apparent upon a study of the drawings, the specification, and the following claims. It should be understood that one or more steps within a method may be performed in a different order (or simultaneously) without altering the principles of the present disclosure. Further, although each embodiment is described above as having certain features, any one or more of those features described in relation to any embodiment of the present disclosure may be implemented and/or combined with the features of any other embodiment, even if the combination with the features of any other embodiment is not explicitly described. In other words, the described embodiments are not mutually exclusive and the arrangement of one or more embodiments with respect to each other is still within the scope of the present disclosure.
The spatial and functional relationships between elements (e.g., between modules, circuit elements, semiconductor layers, etc.) are described using terms including "connected," joined, "" coupled, "" adjacent, "" on top of … …, "" above … …, "" below … …, "and" arranged. Unless explicitly described as "direct," when a relationship between a first element and a second element is described in the above disclosure, such relationship may be a direct relationship when there are no other intermediate elements between the first element and the second element, but may also be an indirect relationship when there are one or more intermediate elements (spatially or functionally) between the first element and the second element. As used herein, the phrase "at least one of A, B and C" should be interpreted to mean logic (a or B or C) using a non-exclusive logical or, and should not be interpreted to mean "at least one of a, at least one of B, and at least one of C.
In the drawings, the direction of arrows (as indicated by the arrows) generally indicate the flow of information, such as data or instructions, that facilitates illustration. For example, when element a and element B exchange various information but the information transmitted from element a to element B is related to the illustration, an arrow may point from element a to element B. This one-way arrow does not mean that no other information is transmitted from element B to element a. Further, for information sent from element a to element B, element B may send a request for the information to element a or receive an acknowledgement of the information.
In this application, including the definitions below, the term "module" or the term "controller" may be replaced by the term "circuit". The term "module" may refer to, be part of, or include the following: an Application Specific Integrated Circuit (ASIC); digital, analog, or mixed analog/digital discrete circuits; digital, analog, or mixed analog/digital integrated circuits; a combinational logic circuit; a Field Programmable Gate Array (FPGA); processor circuitry (shared, dedicated, or group) that executes code; memory circuitry (shared, dedicated, or group) that stores code executed by the processor circuitry; other suitable hardware components that provide the described functionality; or a combination of some or all of the above, such as in a system on a chip.
In some examples, the interface circuitry may include a wired or wireless interface to a local area network (L AN), the Internet, a Wide Area Network (WAN), or a combination thereof.
The term code, as used above, may include software, firmware, and/or microcode, and may refer to programs, routines, functions, classes, data structures, and/or objects. The term "shared processor circuit" encompasses a single processor circuit that executes some or all code from multiple modules. The term "set of processor circuits" encompasses processor circuits that execute some or all code from one or more modules, in conjunction with additional processor circuits. References to "multiple processor circuits" include multiple processor circuits on a discrete die, multiple processor circuits on a single die, multiple cores of a single processor circuit, multiple threads of a single processor circuit, or combinations thereof. The term "shared memory circuit" encompasses a single memory circuit that stores some or all code from multiple modules. The term "bank memory circuit" encompasses memory circuits that store some or all of the code from one or more modules in conjunction with additional memory.
The term "memory circuit" is a subset of the term "computer-readable medium". The term "computer-readable medium" as used herein does not include transitory electrical or electromagnetic signals propagating through a medium (such as on a carrier wave); thus, the term "computer-readable medium" may be considered tangible and non-transitory. Non-limiting examples of a non-transitory tangible computer-readable medium are a non-volatile memory circuit (such as a flash memory circuit, an erasable programmable read-only memory circuit, or a mask read-only memory circuit), a volatile memory circuit (such as a static random access memory circuit or a dynamic random access memory circuit), a magnetic storage medium (such as an analog or digital tape or a hard drive), and an optical storage medium (such as a CD, DVD, or blu-ray disc).
The apparatus and methods described in this application may be partially or completely implemented by a special purpose computer created by configuring a general purpose computer to perform one or more specific functions embodied in a computer program. The functional blocks, flowchart elements and other elements described above are used as software specifications, which can be converted into a computer program by routine work of a skilled technician or programmer.
The computer program includes processor-executable instructions stored on at least one non-transitory tangible computer-readable medium. The computer program may also comprise or rely on stored data. The computer programs may include a basic input/output system (BIOS) that interacts with the hardware of the special purpose computer, a device driver that interacts with specific devices of the special purpose computer, one or more operating systems, user applications, background services, background applications, and the like.
A computer program may include (i) descriptive text to be parsed, such as HTM L (HyperText markup language), XM L (extensible markup language), or JSON (JavaScript object notation), (ii) assembly code, (iii) object code generated from source code by a compiler, (iv) source code for execution by an interpreter, (v) source code for compilation and execution by a just-in-time compiler, and so on, by way of example only, the source code may be from a source including C, C + +, C #, Object-C, Swift, Haalell, Go, SQ L, R, L isp, Sk L, and so on,
Fortran、Perl、Pascal、Curl、OCaml、
HTM L5 (5 th revision of Hypertext markup language), Ada, ASP (dynamic Server Page), PHP (PHP: Hypertext preprocessor), Scala, Eiffel, Smalltalk, Erlang, Ruby, HawIth, Ha,
Visual
L ua, MAT L AB, SIMU L INK and
is written in the syntax of the language of (1).
No element recited in the claims is intended to be a device plus function element within the meaning of 35u.s.c. § 112(f), unless the element is explicitly recited using the phrase "means for … …" or using the phrase "operation for … …" or "step for … …" in the case of method claims.
Claims (20)
1. A power converter, comprising:
a Single Input Multiple Output (SIMO) device, the device comprising:
a first transistor connected to the input and to a first end of the inductor;
a second transistor connected to a second end of the inductor and to a first output;
a third transistor connected to the second end of the inductor and a second output; and
a controller connected to the SIMO device and configured to: maintaining an inductor current through the inductor between charging cycles, and causing the inductor current to transition to a charging inductor current during a charging cycle,
wherein the charging inductor current is based on a difference between the output voltage signal and the target voltage signal,
wherein the controller includes an integrator configured to generate an inductor current signal corresponding to the inductor current, the inductor current signal based on a difference between (1) the output voltage signal provided by at least one of the first output and the second output and (2) the target voltage signal.
2. The power converter of claim 1, wherein the controller is configured to generate a charging inductor current signal based on the inductor current signal and a target current peak signal.
3. The power converter of claim 2 wherein the charging inductor current signal comprises a Root Mean Square (RMS) of the inductor current and the target current peak signal.
4. The power converter of claim 3, wherein the controller further comprises:
a squaring device configured to generate a squared inductor current signal and a squared target current peak signal;
a summer connected to an output of the squaring device and configured to generate a summation signal based on the squared inductor current signal and the squared target current peak signal; and
a square root device connected to an output of the summer and configured to generate the target current peak signal based on the summed signal.
5. The power converter of claim 4, wherein the squaring device comprises at least one of a mixer and a multiplier.
6. The power converter of claim 4, wherein the square root device comprises a transconductance linear amplifier.
7. The power converter of claim 4, wherein the square root device comprises a look-up table.
8. The power converter of claim 4, wherein the controller further comprises:
an analog-to-digital converter connected to an output of the integrator and configured to generate a digital representation of the inductor current, wherein the squaring device is connected to an output of the analog-to-digital converter; and
a digital-to-analog converter connected to an output of the square root device and configured to generate an analog representation of the target current peak signal.
9. The power converter of claim 2, wherein the target current peak signal comprises a programmable Direct Current (DC) signal representative of a target current peak setting for at least one of the first output and the second output.
10. A power converter, comprising:
a Single Input Multiple Output (SIMO) device, the device comprising:
a first transistor connected to the input and to a first end of the inductor;
a second transistor connected to a second end of the inductor and to a first output;
a third transistor connected to the second end of the inductor and a second output; and
a controller connected to the SIMO device and configured to: maintaining an inductor current through the inductor between charging periods and causing the inductor current to transition (1) to a first charging inductor current corresponding to the first output during a first charging period and (2) to a second charging inductor current corresponding to the second output during a second charging period,
wherein the first charging inductor current is based on a difference between a first output voltage signal at the first output and a first target voltage signal of the first output, and the second charging inductor current is based on a difference between a second output voltage signal at the second output and a second target voltage signal of the second output,
wherein the controller includes an integrator configured to generate an inductor current signal corresponding to the inductor current, the inductor current signal being based on the difference between (1) the first output voltage signal provided by at least one of the first output and the second output and (2) the first target voltage signal of at least one of the first output and the second output.
11. The power converter of claim 10, wherein the controller is configured to generate a first charging inductor current signal based on the inductor current signal and a target current peak signal of the first output.
12. The power converter of claim 11 wherein the first charging inductor current signal comprises a Root Mean Square (RMS) of the inductor current and the target current peak signal of the first output.
13. The power converter of claim 12, wherein the controller further comprises:
a squaring device configured to generate a squared inductor current signal and a squared target current peak signal corresponding to the first output;
a summer connected to an output of the squaring device and configured to generate a summation signal based on the squared inductor current signal and the squared target current peak signal; and
a square root device connected to an output of the summer and configured to generate the target current peak signal for the first output based on the summed signal.
14. The power converter of claim 13, wherein the squaring device comprises at least one of a mixer and a multiplier.
15. The power converter of claim 13, wherein the square root device comprises a transconductance linear amplifier.
16. The power converter of claim 13, wherein the square root device comprises a look-up table.
17. The power converter of claim 13, wherein the controller further comprises:
an analog-to-digital converter connected to an output of the integrator and configured to generate a digital representation of the inductor current, wherein the squaring device is connected to an output of the analog-to-digital converter; and
a digital-to-analog converter connected to an output of the square root device and configured to generate an analog representation of the target current peak signal.
18. A power converter as claimed in claim 13, wherein the squaring device is connected to the output of the integrator.
19. The power converter of claim 11, wherein the target current peak signal comprises a programmable Direct Current (DC) signal representative of a target current peak setting for at least one of the first output and the second output.
20. The power converter of claim 10, wherein the controller is configured to generate a second charging inductor current signal based on the inductor current signal and a target current peak signal of the second output.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201962798129P | 2019-01-29 | 2019-01-29 | |
| US62/798,129 | 2019-01-29 | ||
| US16/415,419 US11336178B2 (en) | 2019-01-29 | 2019-05-17 | Continuous conduction mode SIMO device |
| US16/415,419 | 2019-05-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111490680A true CN111490680A (en) | 2020-08-04 |
| CN111490680B CN111490680B (en) | 2023-12-01 |
Family
ID=71731702
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911372223.XA Active CN111490680B (en) | 2019-01-29 | 2019-12-27 | Continuous conduction mode single-input multi-output device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111490680B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117240087A (en) * | 2023-11-14 | 2023-12-15 | 苏州越禾泰普数据科技有限公司 | Control method, device and system of single-input multi-output direct current-to-direct current circuit |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2153111A1 (en) * | 1994-07-01 | 1996-01-02 | Nobuhiro Kawashima | Air Conditioning Device |
| US20080231115A1 (en) * | 2007-03-16 | 2008-09-25 | Gyuha Cho | Multiple-Output DC-DC Converter |
| US20120062031A1 (en) * | 2010-09-15 | 2012-03-15 | Nxp B.V. | Control system for multi output dcdc converter |
| CN104539179A (en) * | 2015-01-16 | 2015-04-22 | 南京理工大学 | Intermittent boost converter with lowest capacitance ripple current effective value |
| CN104702132A (en) * | 2013-12-06 | 2015-06-10 | 艾默生网络能源系统北美公司 | Method and device for controlling switch tube |
| WO2018107392A1 (en) * | 2016-12-14 | 2018-06-21 | The University Of Hong Kong | A single-stage single-inductor multiple-output (simo) inverter topology with precise and independent amplitude control for each ac output |
| CN108880269A (en) * | 2015-03-06 | 2018-11-23 | 意法半导体股份有限公司 | Control method and equipment for quasi-resonance High Power Factor inverse excitation type converter |
-
2019
- 2019-12-27 CN CN201911372223.XA patent/CN111490680B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2153111A1 (en) * | 1994-07-01 | 1996-01-02 | Nobuhiro Kawashima | Air Conditioning Device |
| US20080231115A1 (en) * | 2007-03-16 | 2008-09-25 | Gyuha Cho | Multiple-Output DC-DC Converter |
| US20120062031A1 (en) * | 2010-09-15 | 2012-03-15 | Nxp B.V. | Control system for multi output dcdc converter |
| CN104702132A (en) * | 2013-12-06 | 2015-06-10 | 艾默生网络能源系统北美公司 | Method and device for controlling switch tube |
| CN104539179A (en) * | 2015-01-16 | 2015-04-22 | 南京理工大学 | Intermittent boost converter with lowest capacitance ripple current effective value |
| CN108880269A (en) * | 2015-03-06 | 2018-11-23 | 意法半导体股份有限公司 | Control method and equipment for quasi-resonance High Power Factor inverse excitation type converter |
| WO2018107392A1 (en) * | 2016-12-14 | 2018-06-21 | The University Of Hong Kong | A single-stage single-inductor multiple-output (simo) inverter topology with precise and independent amplitude control for each ac output |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117240087A (en) * | 2023-11-14 | 2023-12-15 | 苏州越禾泰普数据科技有限公司 | Control method, device and system of single-input multi-output direct current-to-direct current circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111490680B (en) | 2023-12-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5901635B2 (en) | Switched mode power converter using bridge topology and switching method thereof | |
| US11728730B2 (en) | Continuous conduction mode SIMO device | |
| US6980445B2 (en) | Power factor improving converter and control method thereof | |
| US9407147B2 (en) | Multiphase converter controller with current balance | |
| CN103683918A (en) | Switching power supply | |
| US10935582B2 (en) | Determining the equivalent series resistance of a power converter | |
| TWI796343B (en) | Pwm control scheme for providing minimum on time | |
| US10348111B2 (en) | Charging circuit and the method thereof | |
| CN110311563B (en) | DCDC circulation control device, DCDC circulation control method, electronic apparatus, and medium | |
| US20150365000A1 (en) | Full bridge dc/dc converter control techniques | |
| US20160036270A1 (en) | Systems and methods for matching an end of discharge for multiple batteries | |
| US20180019684A1 (en) | Power converter | |
| EP3624323A1 (en) | Controller for buck dc/dc converter with effective decoupling | |
| CN111490680B (en) | Continuous conduction mode single-input multi-output device | |
| US11817725B2 (en) | Charging device | |
| US9189002B1 (en) | Single-inductor power converter with buck-boost capability | |
| EP3335307B1 (en) | Device and method for processing an inductor current | |
| Lica et al. | A novel stacked step-down switching converter | |
| US9537390B2 (en) | Control circuit, control method, DC-DC converter and electronic device | |
| US20160204694A1 (en) | Power supply device | |
| RU158535U1 (en) | CONSTANT VOLTAGE CONVERTER TO CONSTANT | |
| JP7305348B2 (en) | power converter | |
| EP3716456A1 (en) | Power supply system including system performance controller and method thereof | |
| US20200381993A1 (en) | Techniques for controlling a single-inductor multiple-output (simo) switched-mode power supply (smps) | |
| JP6943209B2 (en) | Power factor improving device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |