CN111478000A - Multi-zero-point band-pass balance filter adopting double-layer circular patches - Google Patents

Multi-zero-point band-pass balance filter adopting double-layer circular patches Download PDF

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CN111478000A
CN111478000A CN202010317363.3A CN202010317363A CN111478000A CN 111478000 A CN111478000 A CN 111478000A CN 202010317363 A CN202010317363 A CN 202010317363A CN 111478000 A CN111478000 A CN 111478000A
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dielectric substrate
circular patch
port feeder
straight line
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CN111478000B (en
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张钢
刘事成
张菡茜
张可琢
丁泽宇
杨继全
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Nanjing Intelligent High End Equipment Industry Research Institute Co ltd
Nanjing University
Nanjing Normal University
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Nanjing Intelligent High End Equipment Industry Research Institute Co ltd
Nanjing Normal University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/20Frequency-selective devices, e.g. filters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/20Frequency-selective devices, e.g. filters
    • H01P1/201Filters for transverse electromagnetic waves
    • H01P1/2016Slot line filters; Fin line filters

Abstract

The invention discloses a multi-zero-point band-pass balance filter adopting double-layer circular patches, which comprises a multi-zero-point band-pass balance filter adopting double-layer circular patches, an upper-layer dielectric substrate and a lower-layer dielectric substrate, wherein the upper-layer dielectric substrate is provided with a first dielectric layer; the lower surface of the upper-layer dielectric substrate is provided with a metal grounding plate, and the upper surface of the upper-layer dielectric substrate is provided with a first circular patch, a first input port feeder line, a second input port feeder line, an upper surface first slot line and an upper surface second slot line; the metal ground plate is arranged on the upper surface of the lower-layer dielectric substrate, and the lower surface of the lower-layer dielectric substrate is provided with a second circular patch, a first output port feeder line, a second output port feeder line, a lower surface first slot line and a lower surface second slot line. Compared with the prior art, the invention designs the multi-zero band-pass balance filter of the double-layer circular patch by utilizing the resonance modes of the circular patches TM01, TM11 and TM 21. In addition, the resonant frequency can also be changed by using the slot perturbation on the patch.

Description

Multi-zero-point band-pass balance filter adopting double-layer circular patches
Technical Field
The invention relates to the technical field of microwave passive devices, in particular to a multi-zero balance filter adopting double-layer circular patches.
Background
The balanced circuit has strong resistance to environmental noise and electromagnetic interference, so the research in modern communication systems is based on document 1[ q. L iu, j.wang, g.zhang, &. lttt translation = L "&. gtt L &. ltt/t &. gtt. Zhu and w.wu," a New Design application for balanced bandwidth Filters on Right-Angled Isosceles triangle transceiver, "IEEE micro.wireless company, L et., vol.29, No.1, pp.5-7, dec.2018.]In recent years, a Balanced passband Filter composed of patch resonators is disclosed in document 2[ a.m. abbosh, "ultra wideband band Bandpass Filter," ieee micro.wireless company. L et., "vol.21, No.9, pp.480-482, sept.2011.]And document 3[ N.
Figure BDA0002459954220000011
and V.C.Bengin,“Balanced Bandpass Filter Based on Square PatchResonators,”Telecomm.Mod.Sate.Cable Broad.Serv.,vol.,no.,pp.,Oct.2015.]Document 4[ s.y.zheng, r.t.wu and Z.W. L iu. "a Balanced Bandpass Filter with TwoTransmission Zeros Based on Square Patch detectors," IEEE inter.connection.on u biquit.wire.broad., vol., No., pp., oct.2016.]And document 5[ Q. L iu, J.Wang and Y.He, "Compact Balanced band Filter Using Isoscels Right Triangular PatchResonator," Electron. L et.]
In document 2[ a.m. abbosh, "ultra wide band and band Bandpass Filter," ieee micro. wireless company, L et, vol.21, No.9, pp.480-482, sept.2011 ], a Balanced Bandpass Filter with ultra wide band performance is designed by using a wide coupling structure.
In document 3[ N.
Figure BDA0002459954220000012
and V.C.Bengin,“Balanced Bandpass Filter Based onSquare Patch Resonators,”Telecomm.Mod.Sate.Cable Broad.Serv.,vol.,no.,pp.,Oct.2015.]And document 4[ S.Y.ZHEN, R.T.Wu and Z.W. L iu. "A Balanced Bandpass Filter with Two Transmission Based on Square Board detectors," IEEEIntern.Confer.on Ubiquit.wire.Broad., vol., No., pp., Oct.2016.]A balanced bandpass filter is proposed which is composed of square patch resonators with rectangular slots. Two square patch resonators with proper port positions are cascaded on the same plane to realize the dual-mode differential band-pass filter, but the circuit size is overlarge.
Four Triangular filters With a reduced size are used in document 5[ q. L iu, j.wang and y.he, "Compact Balanced bandfilters Filter using" electron. L et ", vol.53, No.4, pp.253-254, Feb 2017 ] and document 6[ q. L iu, j.wang, &lttttranslation = L" &gttl "&ttt &. Zhu, g.zhang, f.huang and w.wu," ANew Balanced bandfilters With Improved Performance for Right-angled filters Filter using a Triangular Filter With a reduced size of one Triangular Filter, which is based on a Triangular block of a Filter With a reduced size of one Triangular Filter, see, ep 2018, ep 20111. pp.4811.
Document 6[ q. L iu, j.wang, &lttttranslation = "L" &gttl &ltt/t &gtt. Zhu, g.zhang, f.huang and w.wu, "a New balance dband plates Filter With Improved formed Performance on Right-Angled isoscelestriangle Patch reactor," IEEE micro.thermal technique, vol.66, No.11, pp.03-4813, nov.2018 ] constructed an Improved triangular Patch, an electrical wall, two magnetic walls, document 5[ q. L iu, j.wawa and y.c., "Compact plated filters Using triangular Patch, r.254, square Patch 254, p.53, square Patch, r.52, square Patch, r.53, r.52, p.53, r.53, a large square Patch, No.4, a large square Patch, a square Patch was used.
All documents use the TM11 mode of the patch resonator, and no other models have been studied, which can only be used at lower frequencies, and if the frequency is increased to a certain extent, the model is reduced to an unmachined size.
Disclosure of Invention
The invention provides a multi-zero-point band-pass balance filter adopting double-layer circular patches, which aims to solve the problem that in the prior art, a TM11 mode of a patch resonator is used, other models are not researched, the mode can only be used for lower frequency, and if the frequency is increased to a certain degree, the model can be reduced to an unmachined size.
The embodiment of the invention provides a multi-zero-point band-pass balance filter adopting double-layer circular patches, which comprises an upper-layer dielectric substrate and a lower-layer dielectric substrate;
the lower surface of the upper-layer dielectric substrate is provided with a metal grounding plate, and the upper surface of the upper-layer dielectric substrate is provided with a first circular patch, a first input port feeder line, a second input port feeder line, an upper surface first slot line and an upper surface second slot line;
the metal ground plate is arranged on the upper surface of the lower-layer dielectric substrate, and the lower surface of the lower-layer dielectric substrate is provided with a second circular patch, a first output port feeder line, a second output port feeder line, a lower surface first slot line and a lower surface second slot line.
Further, in one implementation manner, the upper dielectric substrate is a cuboid whose upper surface and lower surface are the same square, the lower dielectric substrate and the upper dielectric substrate are the same in shape, and the lower dielectric substrate and the upper dielectric substrate are vertically symmetrical with respect to the metal grounding plate;
the center of the first circular patch is consistent with the center point of the upper-layer medium substrate, the center of the second circular patch is consistent with the center point of the lower-layer medium substrate, and the straight line where the center of the first circular patch and the center of the second circular patch are located is perpendicular to the plane where the upper surface of the upper-layer medium substrate is located and the plane where the upper surface of the lower-layer medium substrate is located.
Further, in an implementation manner, the first input port feeder includes a first input microstrip conduction band, one end of the first input microstrip conduction band extends to a first side edge of the upper dielectric substrate, the other end of the first input microstrip conduction band extends to a side edge of the first circular patch, a straight line where two ends of the first input microstrip conduction band are located is perpendicular to a straight line where the first side edge is located, and a center of the first circular patch is located on a straight line where two ends of the first input microstrip conduction band are located;
the second input port feeder line comprises a second input micro-strip lead, one end of the second input micro-strip lead extends to the second side edge of the upper-layer dielectric substrate, the other end of the second input micro-strip lead extends to the side edge of the first circular patch, the straight line where the two ends of the second input port feeder line are located is perpendicular to the straight line where the second side edge is located, and the circle center of the first circular patch is located on the straight line where the two ends of the second input port feeder line are located; the first side edge and the second side edge are perpendicular to each other.
Further, in an implementation manner, the straight lines of the two ends of the first input port feeder line are perpendicular to the straight lines of the two ends of the second input port feeder line, and the straight lines of the two ends of the first input port feeder line and the straight lines of the two ends of the second input port feeder line intersect at the center of the first circular patch.
Further, in an implementation manner, the first output port feeder includes a first output microstrip conduction band, one end of the first output microstrip conduction band extends to a third side edge of the lower dielectric substrate, the other end of the first output microstrip conduction band extends to a side edge of the second circular patch, a straight line where two ends of the first output microstrip conduction band are located is perpendicular to a straight line where the third side edge is located, and a center of the second circular patch is located on a straight line where two ends of the first output microstrip conduction band are located;
the second output port feeder line comprises a second output microstrip lead, one end of the second output microstrip lead extends to the fourth side edge of the lower layer dielectric substrate, the other end of the second output microstrip lead extends to the side edge of the second circular patch, the straight line where the two ends of the second output microstrip lead are located is perpendicular to the fourth side edge, and the circle center of the second circular patch is located on the straight line where the two ends of the second output microstrip lead are located;
the third side and the fourth side are perpendicular to each other.
Further, in an implementation manner, a straight line where two ends of the first output microstrip conduction band are located is perpendicular to a straight line where two ends of the second output microstrip conduction line are located, and the straight line where two ends of the first output microstrip conduction band are located intersects with a straight line where two ends of the second output microstrip conduction line at the center of the second circular patch.
Further, in an implementation manner, straight lines where two ends of the first input port feeder line are located are perpendicular to straight lines where two ends of the second input port feeder line are located, and intersect at a midpoint of the upper-layer dielectric substrate, the upper-surface first slot line and the upper-surface second slot line are located on a diagonal line A1a2 of the upper-layer dielectric substrate, and the first input port feeder line and the second input port feeder line are located at two sides of an angular line A1a2, respectively.
Further, in an implementation manner, a straight line where two ends of the first output port feeder line are located is perpendicular to a straight line where two ends of the second output port feeder line are located, and intersects at a midpoint of the lower dielectric substrate, the first slot line of the lower surface and the second slot line of the lower surface are located on a diagonal line B1B2 of the lower dielectric substrate, and the first output port feeder line and the second output port feeder line are located on two sides of the diagonal line B1B2, respectively.
Further, in an implementation manner, a first ground slot line, a second ground slot line, a third ground slot line and a fourth ground slot line are arranged on the metal ground plate;
the first ground slot line is positioned on a metal ground plate central line D1D2, the third ground slot line is positioned on a metal ground plate central line C1C2, and the first ground slot line and the third ground slot line are axisymmetric with respect to the metal ground plate central line D1D 2;
the second ground slot line is positioned on the metal ground plate central line D1D2, the fourth ground slot line is positioned on the metal ground plate central line C1C2, and the second ground slot line and the fourth ground slot line are axisymmetric with respect to the metal ground plate central line C1C 2;
and the extension lines of the first ground slot line and the third ground slot line are perpendicular to the extension lines of the second ground slot line and the fourth ground slot line, and intersect at the center point of the metal grounding plate.
In the prior art, the TM11 mode of the patch resonator is used, and other models are not researched, but the mode can be only used for lower frequency, and if the frequency is increased to a certain degree, the model is reduced to an unmachined size. The present invention utilizes the TM21 mode of the circular patch resonator to design a balanced passband filter so that higher frequencies can be utilized in a wireless communication system. A circle has a smaller area (π r) than a square at the same radius2<4r2) And the degenerate mode of the circle is more flexible. Since the circular patch has specific boundary conditions, the proposed resonator can suppress TM01 and TM11 modes while maintaining the TM21 mode. In this case, by appropriately establishing the coupling scheme of the two-layer patch, a second-order balanced band-pass filter having three transmission zeros is constructed. Therefore, with respect to the prior art, the multi-zero bandpass balanced filter of the double-layer circular patch is designed by using the resonance modes of the circular patches TM01, TM11 and TM 21. In addition, the resonant frequency can also be changed by using the slot perturbation on the patch.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious to those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
Fig. 1 is a schematic perspective view of a multi-zero bandpass balance filter using a double-layer circular patch according to an embodiment of the present invention;
fig. 2 is a schematic plan view of a multi-zero bandpass balance filter using a double-layer circular patch according to an embodiment of the present invention;
FIG. 3 is a schematic diagram illustrating a plane dimension of a multi-zero bandpass balance filter using a double-layer circular patch according to an embodiment of the present invention;
FIG. 4 is a waveform diagram of a multi-zero bandpass balanced filter using a double-layer circular patch according to an embodiment of the present invention;
FIG. 5 is a phase diagram of a multi-zero bandpass balanced filter using a double-layer circular patch according to an embodiment of the present invention;
11-an upper dielectric substrate, 12-a lower dielectric substrate, 2-a metal ground plate, 31-a first circular patch, 32-a second circular patch, 4-a first input port feeder, 5-a second input port feeder, 61-an upper surface first slot line, 62-an upper surface second slot line, 63-a lower surface first slot line, 64-a lower surface second slot line, 7-a first output port feeder, 8-a second output port feeder, 91-a first ground slot line, 92-a second ground slot line, 93-a third ground slot line, and 94-a fourth ground slot line.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
The embodiment of the invention discloses a multi-zero-point band-pass balance filter adopting double-layer circular patches, which is applied to a front-end filtering part of a wireless communication system or a radar system, and has strong environmental noise and electromagnetic interference resistance due to the balance function.
As shown in fig. 1 and fig. 2, the present embodiment discloses a multi-zero bandpass balance filter using a double-layer circular patch, which includes an upper dielectric substrate 11 and a lower dielectric substrate 12;
the lower surface of the upper-layer dielectric substrate 11 is provided with a metal ground plate 2, and the upper surface of the upper-layer dielectric substrate 11 is provided with a first circular patch 31, a first input port feeder 4, a second input port feeder 5, an upper surface first slot line 61 and an upper surface second slot line 62;
the metal ground plate 2 is arranged on the upper surface of the lower dielectric substrate 12, and the lower surface of the lower dielectric substrate 12 is provided with a second circular patch 32, a first output port feeder 7, a second output port feeder 8, a lower surface first slot line 63 and a lower surface second slot line 64.
In the multi-zero-point band-pass balance filter adopting the double-layer circular patch, the upper dielectric substrate 11 is a cuboid whose upper surface and lower surface are the same square, the lower dielectric substrate 12 is the same as the upper dielectric substrate 11 in shape, and the lower dielectric substrate 12 and the upper dielectric substrate 11 are vertically symmetrical with respect to the metal ground plate 2;
the center of the first circular patch 31 is consistent with the center of the upper-layer dielectric substrate 11, the center of the second circular patch 32 is consistent with the center of the lower-layer dielectric substrate 12, and the straight line where the center of the first circular patch 31 and the center of the second circular patch 32 are located is perpendicular to the plane where the upper surface of the upper-layer dielectric substrate 11 is located and the plane where the upper surface of the lower-layer dielectric substrate 12 is located.
In the multi-zero-point bandpass balance filter adopting the double-layer circular patch, the first input port feeder 4 includes a first input microstrip conduction band 41, one end of the first input microstrip conduction band 41 extends to a first side 1101 of the upper dielectric substrate 11, the other end extends to a side of the first circular patch 31, a straight line where two ends of the first input microstrip conduction band 41 are located is perpendicular to a straight line where the first side 1101 is located, and a center of a circle of the first circular patch 31 is located on a straight line where two ends of the first input microstrip conduction band 41 are located;
the second input port feeder line 5 comprises a second input microstrip conductor 51, one end of the second input microstrip conductor 51 extends to the second side edge 1102 of the upper dielectric substrate 11, the other end extends to the side edge of the first circular patch 31, a straight line where two ends of the second input port feeder line 5 are located is perpendicular to a straight line where the second side edge 1102 is located, and the center of circle of the first circular patch 31 is located on a straight line where two ends of the second input port feeder line 5 are located; the first side 1101 and the second side 1102 are perpendicular to each other.
In the multi-zero-point bandpass balance filter adopting the double-layer circular patch, a straight line where two ends of the first input port feeder line 4 are located is perpendicular to a straight line where two ends of the second input port feeder line 5 are located, and the straight line where two ends of the first input port feeder line 4 are located intersects with a straight line where two ends of the second input port feeder line 5 are located at the center of the first circular patch 31.
In the multi-zero-point bandpass balance filter adopting the double-layer circular patch, the first output port feeder 7 includes a first output microstrip conduction band 71, one end of the first output microstrip conduction band 71 extends to the third side 1201 of the lower-layer dielectric substrate 12, the other end extends to the side of the second circular patch 32, a straight line where two ends of the first output microstrip conduction band 71 are located is perpendicular to a straight line where the third side 1201 is located, and the center of circle of the second circular patch 32 is located on a straight line where two ends of the first output microstrip conduction band 71 are located;
the second output port feeder line 8 comprises a second output microstrip conductor 81, one end of the second output microstrip conductor 81 extends to the fourth side 1202 of the lower dielectric substrate 12, the other end extends to the side of the second circular patch 32, the straight line where the two ends of the second output microstrip conductor 81 are located is perpendicular to the fourth side 1202, and the center of the second circular patch 32 is located on the straight line where the two ends of the second output microstrip conductor 81 are located; the third side 1201 and the fourth side 1202 are perpendicular to each other.
In the multi-zero-point bandpass balance filter adopting the double-layer circular patch, a straight line where two ends of the first output microstrip conduction band 71 are located is perpendicular to a straight line where two ends of the second output microstrip lead 81 are located, and the straight line where the two ends of the first output microstrip conduction band 71 are located intersects with a straight line where two ends of the second output microstrip lead 81 are located at the center of the second circular patch 32.
In the multi-zero-point bandpass balance filter adopting the double-layer circular patch, the straight lines at the two ends of the first input port feeder line 4 are perpendicular to the straight lines at the two ends of the second input port feeder line 5 and intersect at the midpoint of the upper-layer dielectric substrate 11, the first slot line 61 on the upper surface and the second slot line 62 on the upper surface are located on the diagonal line A1a2 of the upper-layer dielectric substrate 11, and the first input port feeder line 4 and the second input port feeder line 5 are located on two sides of the angular line A1a2 respectively.
In the multi-zero-point bandpass balance filter adopting the double-layer circular patch, a straight line where two ends of the first output port feeder line 7 are located is perpendicular to a straight line where two ends of the second output port feeder line 8 are located, and intersects with a midpoint of the lower-layer dielectric substrate 12, the first slot line 63 and the second slot line 64 on the lower surface are located on a diagonal line B1B2 of the lower-layer dielectric substrate 12, and the first output port feeder line 7 and the second output port feeder line 8 are located on two sides of a diagonal line B1B2 respectively.
In the multi-zero band-pass balanced filter adopting the double-layer circular patch according to this embodiment, the metal ground plate 2 is provided with a first ground slot line 91, a second ground slot line 92, a third ground slot line 93 and a fourth ground slot line 94;
the first ground slot line 91 is located on the center line D1D2 of the metal ground plate 2, the third ground slot line 93 is located on the center line C1C2 of the metal ground plate 2, and the first ground slot line 91 and the third ground slot line 93 are axisymmetrical with respect to the center line D1D2 of the metal ground plate 2;
the second ground slot line 92 is located on the center line D1D2 of the metal ground plate 2, the fourth ground slot line 94 is located on the center line C1C2 of the metal ground plate 2, and the second ground slot line 92 and the fourth ground slot line 94 are axisymmetrical with respect to the center line C1C2 of the metal ground plate 2;
the extension lines of the first and third ground slot lines 91 and 93 are perpendicular to the extension lines of the second and fourth ground slot lines 92 and 94, and intersect at the center point of the metal ground plate 2.
In the multi-zero bandpass balanced filter using the double-layer circular patch according to this embodiment, the upper surface first slot line 61 and the upper surface second slot line 62 affect the resonant mode TM21 to form a passband. TM01, TM11 (one pair of degenerate modes), and TM21 (the other degenerate mode) form 4 transmission zeros.
The multi-zero-point band-pass balance filter adopting the double-layer circular patch is manufactured by processing and corroding metal surfaces on the front surface and the back surface of a circuit substrate through a printed circuit board manufacturing process, so that a required metal pattern is formed, the structure is simple, the multi-zero-point band-pass balance filter can be realized on a single PCB, and the processing and integration are convenient. Meanwhile, the design not only realizes the balance function, but also realizes the function of multi-zero filtering, and the circuit space is fully utilized and the circuit volume is greatly reduced due to the adoption of the circular patch. A balanced band-pass filter with multiple zero points and good common-mode rejection performance is designed by utilizing a resonant mode TM21 of a slot line influence patch. The present invention is described in further detail below.
The structure of the multi-zero bandpass balance filter using the double-layer circular patch in this embodiment is shown in fig. 1, the top view is shown in fig. 2, and the relevant dimensions are shown in fig. 3, the matrix of the upper dielectric substrate 11 and the lower dielectric substrate 12 used is RO4003C matrix, the relative dielectric constant is 3.55, the thickness is 0.508mm, and the loss tangent is 0.0027, in conjunction with fig. 4, the dimensional parameters of the multi-zero bandpass balance filter using the double-layer circular patch are r is 8.0mm, l1 is 13mm, and W1 is 0.4mm, the total area of the multi-zero bandpass balance filter not including the input and output conduction band microstrip is 16 × 16mm2, and the corresponding length dimension of the waveguide is 0.65 λ g × 0.65.65 λ g, where λ g is the length of the waveguide with the center frequency.
The multi-zero band-pass balance filter adopting the double-layer circular patch is modeled and simulated in the electromagnetic simulation software HFSS.13.0. Fig. 4 is an S parameter of the multi-zero bandpass balance filter using the double-layered circular patch in this example, and it can be seen from the figure that the center frequency of the multi-zero bandpass balance filter using the double-layered circular patch is 6.5GHz and the 3-dB bandwidth is 0.52GHz, the return loss in the pass band is lower than 30dB, the minimum insertion loss is 0.5dB, and the common mode rejection is 40 dB. Fig. 5 shows the phase parameters of the multi-zero bandpass balance filter using the double-layer circular patch in this example, and it can be seen that the phase difference in the passband is around 180 degrees.
In summary, the multi-zero band-pass balance filter of the present embodiment employs the double-layer circular patch. The multi-zero bandpass balance filter of the double-layer circular patch is designed by utilizing the resonance modes of the circular patches TM01, TM11 and TM 21. In addition, the resonant frequency is changed by the slot perturbation on the patch. The multi-zero band-pass balance filter is very suitable for modern wireless communication systems.
The present invention provides a thought and a method of a multi-zero band-pass balance filter using a double-layer circular patch, and a method and a way for implementing the technical scheme are many, and the above description is only a preferred embodiment of the present invention, and it should be noted that, for a person skilled in the art, a plurality of improvements and embellishments can be made without departing from the principle of the present invention, and the improvements and embellishments should also be regarded as the protection scope of the present invention. All the components not specified in the present embodiment can be realized by the prior art.

Claims (9)

1. A multi-zero-point band-pass balance filter adopting double-layer circular patches is characterized by comprising an upper-layer dielectric substrate (11) and a lower-layer dielectric substrate (12);
a metal grounding plate (2) is arranged on the lower surface of the upper-layer dielectric substrate (11), and a first circular patch (31), a first input port feeder line (4), a second input port feeder line (5), an upper surface first slot line (61) and an upper surface second slot line (62) are arranged on the upper surface of the upper-layer dielectric substrate (11);
the metal grounding plate (2) is arranged on the upper surface of the lower-layer dielectric substrate (12), and the lower surface of the lower-layer dielectric substrate (12) is provided with a second circular patch (32), a first output port feeder (7), a second output port feeder (8), a lower-surface first slot line (63) and a lower-surface second slot line (64).
2. The multi-zero-point band-pass balanced filter adopting the double-layer circular patch is characterized in that the upper dielectric substrate (11) is a cuboid with the same square upper surface and the same square lower surface, the lower dielectric substrate (12) is the same as the upper dielectric substrate (11), and the lower dielectric substrate (12) and the upper dielectric substrate (11) are vertically symmetrical about the metal grounding plate (2);
the center of the first circular patch (31) is consistent with the center point of the upper-layer dielectric substrate (11), the center of the second circular patch (32) is consistent with the center point of the lower-layer dielectric substrate (12), and the straight line where the centers of the first circular patch (31) and the second circular patch (32) are located is perpendicular to the plane where the upper surface of the upper-layer dielectric substrate (11) is located and the plane where the upper surface of the lower-layer dielectric substrate (12) is located.
3. The multi-zero-point bandpass balance filter adopting the double-layer circular patch as claimed in claim 2, wherein the first input port feeder (4) comprises a first input microstrip conduction band (41), one end of the first input microstrip conduction band (41) extends to the first side (1101) of the upper dielectric substrate (11), the other end of the first input microstrip conduction band extends to the side of the first circular patch (31), a straight line where two ends of the first input microstrip conduction band (41) are located is perpendicular to a straight line where the first side (1101) is located, and a center of a circle of the first circular patch (31) is located on a straight line where two ends of the first input microstrip conduction band (41) are located;
the second input port feeder line (5) comprises a second input microstrip lead (51), one end of the second input microstrip lead (51) extends to the second side edge (1102) of the upper-layer dielectric substrate (11), the other end of the second input microstrip lead extends to the side edge of the first circular patch (31), the straight line where the two ends of the second input port feeder line (5) are located is perpendicular to the straight line where the second side edge (1102) is located, and the circle center of the first circular patch (31) is located on the straight line where the two ends of the second input port feeder line (5) are located;
the first side edge (1101) and the second side edge (1102) are perpendicular to each other.
4. The multi-zero-point band-pass balanced filter adopting the double-layer circular patch as claimed in claim 3, wherein the straight line of the two ends of the first input port feeder (4) is perpendicular to the straight line of the two ends of the second input port feeder (5), and the straight line of the two ends of the first input port feeder (4) and the straight line of the two ends of the second input port feeder (5) intersect at the center of the first circular patch (31).
5. The multi-zero-point bandpass balance filter adopting the double-layer circular patch as claimed in claim 1, wherein the first output port feeder line (7) comprises a first output microstrip conduction band (71), one end of the first output microstrip conduction band (71) extends to the third side (1201) of the lower-layer dielectric substrate (12), the other end of the first output microstrip conduction band extends to the side of the second circular patch (32), a straight line where two ends of the first output microstrip conduction band (71) are located is perpendicular to a straight line where the third side (1201) is located, and the center of the second circular patch (32) is located on the straight line where two ends of the first output microstrip conduction band (71) are located;
the second output port feeder line (8) comprises a second output microstrip lead (81), one end of the second output microstrip lead (81) extends to a fourth side edge (1202) of the lower dielectric substrate (12), the other end of the second output microstrip lead extends to a side edge of the second circular patch (32), a straight line where two ends of the second output microstrip lead (81) are located is perpendicular to the fourth side edge (1202), and the center of circle of the second circular patch (32) is located on the straight line where two ends of the second output microstrip lead (81) are located;
the third side (1201) and the fourth side (1202) are perpendicular to each other.
6. The multi-zero-point bandpass balance filter adopting the double-layer circular patch as claimed in claim 5, wherein the straight line of the two ends of the first output microstrip conduction band (71) is perpendicular to the straight line of the two ends of the second output microstrip conducting wire (81), and the straight line of the two ends of the first output microstrip conduction band (71) and the straight line of the two ends of the second output microstrip conducting wire (81) intersect at the center of the second circular patch (32).
7. The multi-zero-point bandpass balanced filter adopting the double-layer circular patch as claimed in claim 5, wherein the straight line of the two ends of the first input port feeder line (4) is perpendicular to the straight line of the two ends of the second input port feeder line (5) and intersects the midpoint of the upper dielectric substrate (11), the upper surface first slot line (61) and the upper surface second slot line (62) are located on the diagonal A1A2 of the upper dielectric substrate (11), and the first input port feeder line (4) and the second input port feeder line (5) are respectively located on two sides of the diagonal A1A 2.
8. The multi-zero-point bandpass balanced filter adopting the double-layer circular patch as claimed in claim 6, wherein the straight line of the two ends of the first output port feeder line (7) is perpendicular to the straight line of the two ends of the second output port feeder line (8) and intersects the midpoint of the lower dielectric substrate (12), the first slot line (63) and the second slot line (64) on the lower surface are located on the diagonal line B1B2 of the lower dielectric substrate (12), and the first output port feeder line (7) and the second output port feeder line (8) are respectively located on the two sides of the diagonal line B1B 2.
9. The multi-zero band-pass balanced filter using the double-layer circular patch according to claim 7 is characterized in that the metal ground plate (2) is provided with a first ground slot line (91), a second ground slot line (92), a third ground slot line (93) and a fourth ground slot line (94);
the first ground slot line (91) is positioned on a center line D1D2 of the metal grounding plate (2), the third ground slot line (93) is positioned on a center line C1C2 of the metal grounding plate (2), and the first ground slot line (91) and the third ground slot line (93) are axisymmetric with respect to the center line D1D2 of the metal grounding plate (2);
the second ground slot line (92) is positioned on the center line D1D2 of the metal ground plate (2), the fourth ground slot line (94) is positioned on the center line C1C2 of the metal ground plate (2), and the second ground slot line (92) and the fourth ground slot line (94) are axisymmetric with respect to the center line C1C2 of the metal ground plate (2);
the extension lines of the first ground slot line (91) and the third ground slot line (93) are perpendicular to the extension lines of the second ground slot line (92) and the fourth ground slot line (94), and intersect at the center point of the metal grounding plate (2).
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