CN111463171B - Method for manufacturing pattern structure - Google Patents
Method for manufacturing pattern structure Download PDFInfo
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- CN111463171B CN111463171B CN202010277209.8A CN202010277209A CN111463171B CN 111463171 B CN111463171 B CN 111463171B CN 202010277209 A CN202010277209 A CN 202010277209A CN 111463171 B CN111463171 B CN 111463171B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1005—Formation and after-treatment of dielectrics
- H01L2221/101—Forming openings in dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
Abstract
The invention discloses a manufacturing method of a graph structure, which comprises the following steps: step one, coating photoresist; carrying out gray exposure and development to form a photoresist strip-shaped photoresist pattern structure with a distribution structure with gradually changed height; etching is carried out to transfer the distribution structure with gradually changed height of each photoresist strip to each first process layer strip; step four, forming a second process layer; fifthly, carrying out a chemical mechanical polishing process to form a second graphic structure formed by the second process layer filled in the groove and the first process layer strips between the grooves; the distribution structure with gradually changing height of each first process layer strip resists the erosion generated by the chemical mechanical polishing process in the chemical mechanical polishing process. The invention can reduce the abrasion of the chemical mechanical polishing process to the graph structure, so that the graph structure is clearly contrasted and has complete structure, and the graph structure can be a photoetching mark, thereby improving the alignment precision and the measurement accuracy and improving the process reliability.
Description
Technical Field
The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly, to a method for manufacturing a pattern structure.
Background
Chemical Mechanical Polishing (CMP) is commonly used in semiconductor processes to achieve surface planarization, and particularly in Cu CMP processes of copper wire bonded dual damascene at the back end, CMP removes metal overflowing outside trenches, leaving copper isolated from each other inside trenches. Since the polishing rate of the polishing slurry is different for different materials, CMP often causes Dishing (Dishing), erosion (Erosion), etc. The following will now be described with reference to the accompanying drawings:
as shown in fig. 1A to fig. 1B, the schematic diagram of the device structure in each step of the damascene process corresponding to the manufacturing method of the existing pattern structure includes the steps of:
as shown in fig. 1A, trenches 104 and 104a and a via opening 105 are formed on a process layer, such as a dielectric layer 101, wherein the trench 104 is located in a region 101, the trench 104a and the via opening 105 are located in a region 102, the region 101 is a formation region of a mark (mark), and the region 102 is a formation region corresponding to a metal trace and a via at the bottom corresponding to a dual damascene process. Dielectric layer 101 comprises an oxide layer and dielectric layer 101 is formed on a semiconductor substrate such as a silicon substrate.
As shown in fig. 1A, a copper layer 106 is then formed to completely fill the trenches 104 and 104a and the via opening 105 and may overflow, i.e., extend outside of the trenches 104 and 104a and the via opening 105.
As shown in fig. 1B, cu CMP is performed to remove the overflowing copper layer 106. However, since the polishing rates of the polishing slurry for different materials are different, the polishing rates of copper in different regions are different, i.e., the copper polishing rate in fig. 1B is greater for the regions 101 and 102 than for the regions 101 and 102, and the polishing rate is greater closer to the center of the regions 101 and 102; eventually, a recess is formed in regions 101 and 102, as indicated by dashed circle 107.
When the above problems due to CMP occur on the mark (mark) of the lithography, damage may be caused to the mark, and the pattern contrast may be reduced. The marks comprise alignment marks (alignment marks) and overlay marks (overlay marks), and after the alignment marks and the overlay marks are damaged, overlay precision and measurement accuracy between layers are seriously influenced, and process reliability is reduced.
Fig. 2 is a top view of an alignment mark of the prior art; the alignment mark 201 is composed of a plurality of bars 202 arranged in parallel.
FIG. 3A is a top view of an existing overlay mark; the overlay mark comprises two marks of adjacent process layers, namely an external mark consisting of the bar-shaped structures 303 between the dotted line frames 301 and 302 and an internal mark consisting of the bar-shaped structures 304 inside the dotted line frame 302, and the alignment precision is generally the corresponding central position OV by measuring the offset between the external mark and the internal mark outer And OV inner The spacing therebetween.
FIG. 3B is a top view of another existing overlay mark; the overlay mark comprises marks of two adjacent process layers, namely an internal mark consisting of the bar-shaped structures 402 inside the dashed-line frame 401 and an external mark consisting of the bar-shaped structures 403 outside the dashed-line frame 401, and the registration accuracy is determined by measuring the offset between the external mark and the internal mark, which is generally the distance between the corresponding center positions.
The trenches 104 and 104A and the via opening 105 corresponding to fig. 1A are defined and etched by a photolithography process, and as shown in fig. 4A to 4B, the trenches and the via opening are schematic device structures in steps of the photolithography process corresponding to the conventional method for manufacturing a pattern structure, and the photolithography process includes the following steps:
a photoresist, here a positive photoresist as an example, is applied to the process layer 103.
As shown in fig. 4A, an exposure process is performed. In the exposure process, a photomask 501 with a pattern structure is required, the photomask 501 comprises a light-transmitting unit and a non-light-transmitting unit, and light 502 irradiates the photoresist through the light-transmitting unit during exposure. In FIG. 4A, a light intensity distribution 503 of a light ray 502 passing through a reticle 501 is shown, with maximum and minimum values of light intensity as indicated by the dashed lines for each. After exposure, the photoresist is divided into exposed regions 504b and unexposed regions 504a.
As shown in fig. 4B, after development, the photoresist corresponding to the exposed region 504B is removed, and the photoresist corresponding to the exposed region 504a remains and forms a photoresist pattern structure.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a manufacturing method of a pattern structure, which can eliminate the adverse effect on the abrasion of the pattern structure caused by the erosion effect of the chemical mechanical polishing process, and finally can improve the surface flatness of the pattern structure, so that the pattern structure is clear and complete in contrast.
In order to solve the above technical problem, the method for manufacturing a pattern structure provided by the present invention comprises the steps of:
the method comprises the steps of firstly, providing a first process layer for forming a pattern structure and coating photoresist on the first process layer.
Performing gray exposure and development to form a photoresist pattern structure, wherein the photoresist pattern structure comprises a plurality of photoresist strips and photoresist intervals; the photoresist strips in the photoresist pattern structure are provided with a distribution structure with gradually changing height, and the distribution structure with gradually changing height of the photoresist strips is arranged according to the erosion size generated by the grinding rate difference for compensating the subsequent chemical mechanical grinding.
And step three, etching the first process layer by taking the photoresist pattern structure as a mask, wherein a groove is formed at the photoresist interval by the etching process, a first process layer strip is formed at the bottom of each photoresist strip, and the distribution structure with gradually changed height of each photoresist strip is transferred to each first process layer strip by the etching process.
And fourthly, forming a second process layer to completely fill the grooves and extend to the first process layer strips outside the grooves.
Fifthly, carrying out a chemical mechanical polishing process, removing the second process layer outside each groove after the chemical mechanical polishing process is finished, enabling the second process layer to be only positioned in the groove, and forming a second graph structure by the second process layer filled in the groove and the first process layer strips between the grooves; the chemical mechanical polishing process has a difference in polishing rate between the first process layer and the second process layer and generates corresponding erosion, and the distribution structure with gradually changing strip-shaped height of each first process layer counteracts the erosion generated by the chemical mechanical polishing process in the chemical mechanical polishing process, so as to reduce the wear of the second pattern structure and improve the surface flatness of the second pattern structure.
The further improvement is that the first process layer is a dielectric layer.
In a further improvement, the second process layer is a metal layer.
In a further refinement, the material of the first process layer comprises an oxide layer.
In a further refinement, the material of the metal layer comprises copper.
In a further improvement, in the first step, the photoresist is positive photoresist.
A further improvement is that, in the gray scale exposure process in the second step, the photomask includes a light-transmitting unit and a non-light-transmitting unit, each non-light-transmitting unit defines a corresponding photoresist strip, each non-light-transmitting unit has light-transmitting property, and the light-transmitting property is set according to a required height of the corresponding photoresist strip, generally, the light-transmitting property of each non-light-transmitting unit is weak light-transmitting property. The light transmittance of each non-light-transmitting unit has a distribution structure with gradually changed light transmittance corresponding to the distribution structure with gradually changed height of the photoresist strips.
In a further improvement, the light transmittance of the non-light-transmitting unit is adjusted by phase or amplitude.
In a further improvement, in the first step, the photoresist is a negative photoresist.
A further improvement is that in the gray scale exposure process of the second step, the light shield includes light transmitting units and non-light transmitting units, each light transmitting unit defines a corresponding photoresist strip, each light transmitting unit has light blocking property, and the light blocking property is set according to a required height of the corresponding photoresist strip, and usually, the light blocking property of each light transmitting unit is weak light blocking property. The light blocking property of each non-light-transmitting unit is a distribution structure with gradually changed light blocking property corresponding to the distribution structure with gradually changed height of the photoresist strip.
In a further improvement, the light blocking properties of the light transmission unit are adjusted by phase or amplitude.
In a further refinement, the second graphical structure includes a logo.
In a further refinement, the indicia comprises alignment indicia or overlay indicia.
A further improvement is that in the third step, the etching process etches the photoresist and the first process layer simultaneously, the etching process is proportional to the etching rates of the photoresist and the first process layer, and in the region between the grooves, the etching process gradually removes the corresponding photoresist strips from low to high according to the heights of the photoresist strips and etches the first process layer in the photoresist strip removal region, so that the distribution structure with gradually changing heights of the photoresist strips is transferred to the strips of the first process layer.
In a further refinement, the first process layer is formed on a semiconductor substrate.
In a further refinement, the semiconductor substrate comprises a silicon substrate.
In a further improvement, in the fifth step, since the chemical mechanical polishing process has a polishing load effect generated in the second pattern structure region due to the difference between the polishing rates of the first process layer and the second process layer, the closer to the center of the second pattern structure, the faster the polishing rate is; the distribution structure of the photoresist strips with gradually changing heights is that the photoresist strips are closer to the center of the second graph structure, and the heights of the photoresist strips are higher.
The further improvement is that the height of the photoresist strips is gradually changed along the one-dimensional direction; or the height of the photoresist strips is gradually changed along the two-dimensional direction.
In the manufacturing process of the graph structure, the photoetching process is set in advance by combining the characteristic that the chemical mechanical grinding process can generate an erosion effect on the graph structure, gray exposure is mainly adopted for the photoetching process, so that the photoetching rubber strips in the formed photoresist graph structure have a distribution structure with gradually changed height, the erosion generated by the grinding rate difference of chemical mechanical grinding is compensated by using the distribution structure with gradually changed height of the photoetching rubber strips, the adverse effect on the abrasion of the graph structure, namely the second graph structure, caused by the erosion effect of the chemical mechanical grinding process can be eliminated, and finally the surface flatness of the graph structure can be improved, so that the graph structure is clear in contrast and complete.
The second pattern structure of the invention can be a mark such as an alignment mark or an overlay mark, and because the mark of the invention is not influenced by the erosion effect of the chemical mechanical polishing process, the mark with a clear contrast and a complete structure can be obtained finally, which is beneficial to improving the alignment precision and the measurement accuracy and improving the process reliability.
Drawings
The invention is described in further detail below with reference to the following figures and embodiments:
FIGS. 1A-1B are schematic diagrams of device structures in steps of a Damascus process corresponding to a conventional method for manufacturing a graphic structure;
FIG. 2 is a top view of a prior art alignment mark;
FIG. 3A is a top view of a prior art overlay mark;
FIG. 3B is a top view of another prior art overlay mark;
FIGS. 4A-4B are schematic diagrams of device structures in various steps of a photolithography process corresponding to a conventional method for fabricating a pattern structure;
FIG. 5 is a flow chart of a method of fabricating the exemplary structures of the present invention;
FIGS. 6A-6E are schematic device structures at various steps in a method of fabricating an exemplary graph structure in accordance with an embodiment of the present invention;
FIGS. 7A-7B are schematic device structures at various steps of a photolithography process corresponding to a method of fabricating the graph structure according to an embodiment of the present invention;
FIGS. 8A-8B are schematic device structures at various steps of a photolithography process corresponding to a method of fabricating a patterned structure according to another embodiment of the present invention.
Detailed Description
FIG. 5 is a flow chart of a method of fabricating the exemplary structures of the present invention; fig. 6A to 6E are schematic views of a device structure in each step of the method for manufacturing the exemplary structure according to the present invention; the manufacturing method of the figure structure in the embodiment of the invention comprises the following steps:
step one, as shown in fig. 6A, a first process layer 1 for forming a pattern structure is provided and a photoresist is coated on the first process layer 1.
In the embodiment of the present invention, the first process layer 1 is a dielectric layer. The material of the first process layer 1 comprises an oxide layer.
The first process layer 1 is formed on a semiconductor substrate.
The semiconductor substrate includes a silicon substrate.
The photoresist is positive photoresist.
Performing gray exposure and development to form a photoresist pattern structure, wherein the photoresist pattern structure comprises a plurality of photoresist strips 604a and photoresist intervals; the photoresist strip 604a in the photoresist pattern structure has a gradually changing height distribution structure, and the gradually changing height distribution structure of the photoresist strip 604a is set according to erosion caused by a polishing rate difference for compensating subsequent chemical mechanical polishing.
In the gray scale exposure process, the mask 601 includes light-transmitting units and non-light-transmitting units, each non-light-transmitting unit defines the corresponding photoresist strip 604a, each non-light-transmitting unit has weak light-transmitting property, and the light-transmitting property is set according to the required height of the corresponding photoresist strip 604a, generally, the light-transmitting property of each non-light-transmitting unit is weak light-transmitting property. The light transmittance of each non-light-transmitting unit has a distribution structure in which the light transmittance gradually changes, corresponding to the distribution structure in which the height of the photoresist stripes 604a gradually changes.
The light transmittance of the non-light-transmitting unit is adjusted by phase or amplitude.
As shown in fig. 6A, after the optical element 602 passes through the mask 601, the bottom photoresist is exposed, and the exposure depth of the bottom of each light-transmitting unit is deepest; the exposure depth of the bottom of each non-light-transmitting unit corresponds to the set light transmission. After exposure, the photoresist is divided into exposed regions 604b and unexposed regions 604a.
FIG. 7A also shows a distribution 603 of light intensity after the light 602 passes through the reticle 601. As can be seen from the intensity distribution 503 in fig. 4A, the bottom of the non-light-transmitting unit has a certain intensity, so that the photoresist at the corresponding depth of the bottom can be exposed.
As shown in FIG. 6B, the developing process removes all of the photoresist in exposed regions 604B, leaving only the photoresist in unexposed regions 604a to form the photoresist strips 604a.
Fig. 7B is a simplified diagram of fig. 6B.
Step three, as shown in fig. 6C, the first process layer 1 is etched by using the photoresist pattern structure as a mask, the etching process forms a trench 3 at each photoresist interval, forms a first process layer stripe 2 at the bottom of each photoresist stripe 604a, and transfers the distribution structure in which the height of each photoresist stripe 604a gradually changes to each first process layer stripe 2.
The etching process etches the photoresist and the first process layer 1 at the same time, the etching process is proportional to the etching rates of the photoresist and the first process layer 1, and in the region between the grooves 3, the etching process gradually removes the corresponding photoresist strips 604a from low to high according to the heights of the photoresist strips 604a and etches the first process layer 1 in the region where the photoresist strips 604a are removed, so that the distribution structure with gradually changed heights of the photoresist strips 604a is transferred to the first process layer strips 2.
Step four, as shown in fig. 6D, a second process layer 4a is formed to completely fill the trenches 3 and extend onto the first process layer strips 2 outside the trenches 3.
In the embodiment of the present invention, the second process layer 4a is a metal layer. Preferably, the material of the metal layer includes copper.
Step five, as shown in fig. 6E, performing a chemical mechanical polishing process, so that the second process layer 4a outside each trench 3 is removed after the chemical mechanical polishing process is completed, the second process layer 4a is only located in the trench 3, and a second pattern structure is formed by the first process layer strips 2 filled between the second process layer 4a in the trench 3 and the trench 3; the chemical mechanical polishing process has a difference in polishing rate for the first process layer 1 and the second process layer 4a and generates a corresponding erosion, and the distribution structure of the gradually changing height of each first process layer stripe 2 counteracts the erosion generated by the chemical mechanical polishing process in the chemical mechanical polishing process, so as to reduce the wear of the second pattern structure and improve the surface flatness of the second pattern structure.
The polishing load effect generated in the second pattern structure area due to the difference of the polishing rate of the chemical mechanical polishing process to the first process layer 1 and the second process layer 4a is higher, the closer to the center of the second pattern structure, the higher the polishing rate is; the distribution structure of the photoresist strips 604a formed in the second step, in which the heights gradually change, is closer to the center of the second pattern structure, and the heights of the photoresist strips 604a are higher. Preferably, the height of the photoresist strips 604a gradually changes along a one-dimensional direction; alternatively, the height of the bead 604a gradually changes in two dimensions.
The second graphical structure includes a logo.
The mark comprises an alignment mark or an overlay mark.
In the manufacturing process of the graph structure, the photoetching process is set in advance by combining the characteristic that the chemical mechanical grinding process can generate the erosion effect on the graph structure, gray exposure is mainly adopted for the photoetching process, so that the photoresist strips 604a in the formed photoresist graph structure have a distribution structure with gradually changed height, erosion generated by the difference of the grinding rate of chemical mechanical grinding is compensated by the distribution structure with gradually changed height of the photoresist strips 604a, the adverse effect on the abrasion of the graph structure, namely the second graph structure, caused by the erosion effect of the chemical mechanical grinding process can be eliminated, and finally the surface flatness of the graph structure can be improved, so that the graph structure is clear in contrast and complete.
The second graph structure of the embodiment of the invention can be a mark such as an alignment mark or an overlay mark, and because the mark of the embodiment of the invention is not influenced by the corrosion effect of the chemical mechanical polishing process, the mark with a clear contrast and a complete structure can be obtained finally, which is beneficial to improving the alignment precision and the measurement accuracy and improving the process reliability.
The manufacturing method of the figure structure in another embodiment of the invention comprises the following steps:
the difference between the manufacturing method of the pattern structure in another embodiment of the present invention and the manufacturing method of the pattern structure in the embodiment of the present invention is:
FIG. 8A to FIG. 8B are schematic views of a device structure in each step of a photolithography process corresponding to the method for manufacturing the exemplary structure according to another embodiment of the present invention; in the first step, the photoresist is negative photoresist.
As shown in fig. 8A, in the gray scale exposure process of the second step, the mask 701 includes light transmitting units and non-light transmitting units, each light transmitting unit defines the corresponding photoresist strip 704a, each light transmitting unit has light blocking property, and the light blocking property is set according to the required height of the corresponding photoresist strip 704a, generally, the light blocking property of each light transmitting unit is weak light blocking property. The light blocking property of each non-light transmitting unit has a distribution structure in which the light blocking property gradually changes corresponding to the distribution structure in which the height of the photoresist stripes 704a gradually changes.
The light blocking property of the light transmitting unit is adjusted by phase or amplitude.
As shown in fig. 8A, after the optical element 702 passes through the mask 701, the bottom photoresist is exposed, and the bottom of each non-transparent unit is not exposed; the bottom of each light-transmitting unit is also unexposed to a part of depth. After exposure, the photoresist is divided into exposed regions 704a and unexposed regions 704b.
FIG. 8A also shows a distribution 703 of light intensity after the light 702 passes through the mask 701. It can be seen that the light intensity at the bottom of the different light-transmitting cells decreases, which increases the unexposed area at the corresponding depth of the bottom.
As shown in fig. 8B, the developing process removes all the photoresist in the unexposed regions 704B, leaving only the photoresist in the exposed regions 704a to form the photoresist strips 704a.
The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.
Claims (17)
1. A method of fabricating a patterned structure, comprising the steps of:
providing a first process layer for forming a pattern structure and coating photoresist on the first process layer;
performing gray exposure and development to form a photoresist pattern structure, wherein the photoresist pattern structure comprises a plurality of photoresist strips and photoresist intervals; the photoresist strips in the photoresist pattern structure are provided with a distribution structure with gradually changed height, and the distribution structure with gradually changed height of the photoresist strips is arranged according to the erosion size generated by the grinding rate difference for compensating the subsequent chemical mechanical grinding;
etching the first process layer by taking the photoresist pattern structure as a mask, wherein a groove is formed at the photoresist interval by the etching process, a first process layer strip is formed at the bottom of each photoresist strip, and the distribution structure with gradually changed height of each photoresist strip is transferred to each first process layer strip by the etching process;
the etching process etches the photoresist and the first process layer simultaneously, the etching process is proportional to the etching rates of the photoresist and the first process layer, in the region between the grooves, the etching process gradually removes the corresponding photoresist strips from low to high according to the heights of the photoresist strips and etches the first process layer in the photoresist strip-shaped removal region, and therefore the distribution structure of the gradual change of the heights of the photoresist strips is transferred to the first process layer strips;
step four, forming a second process layer to completely fill the grooves and extend to the strips of the first process layer outside the grooves;
fifthly, carrying out a chemical mechanical polishing process to remove the second process layer outside each groove after the chemical mechanical polishing process is finished and to enable the second process layer to be only positioned in the groove, wherein a second graphic structure is formed by the second process layer filled in the groove and the first process layer strips between the grooves; the chemical mechanical polishing process has a difference in polishing rate between the first process layer and the second process layer and generates corresponding erosion, and the strip-shaped distribution structure with gradually changing height of each first process layer counteracts the erosion generated by the chemical mechanical polishing process in the chemical mechanical polishing process, so as to reduce the abrasion of the second pattern structure and improve the surface flatness of the second pattern structure.
2. The method of manufacturing a pattern structure according to claim 1, wherein: the first process layer is a dielectric layer.
3. The method of manufacturing a pattern structure according to claim 2, wherein: the second process layer is a metal layer.
4. A method for manufacturing a pattern structure according to claim 3, wherein: the material of the first process layer comprises an oxide layer.
5. The method for manufacturing a pattern structure according to claim 4, wherein: the material of the metal layer comprises copper.
6. The method of manufacturing a pattern structure according to claim 1, wherein: in the first step, the photoresist is positive photoresist.
7. The method of manufacturing a pattern structure according to claim 6, wherein: in the gray scale exposure process of the second step, the photomask comprises light-transmitting units and non-light-transmitting units, each non-light-transmitting unit defines a corresponding photoresist strip, each non-light-transmitting unit has light transmittance, the light transmittance is set according to the required height of the corresponding photoresist strip, and the light transmittance of each non-light-transmitting unit has a distribution structure with the light transmittance gradually changing corresponding to the distribution structure with the gradually changing height of the photoresist strip.
8. The method for manufacturing a pattern structure according to claim 7, wherein: the light transmittance of the non-light-transmitting unit is adjusted by phase or amplitude.
9. The method for manufacturing a pattern structure according to claim 1, wherein: in the first step, the photoresist is negative photoresist.
10. The method of manufacturing a pattern structure according to claim 9, wherein: in the gray scale exposure process of the second step, the photomask comprises light transmitting units and non-light transmitting units, the light transmitting units define corresponding photoresist strips, each light transmitting unit has light blocking performance, the light blocking performance is set according to the required height of the corresponding photoresist strip, and the light blocking performance of each light transmitting unit has a distribution structure with the light blocking performance gradually changed corresponding to the distribution structure with the gradually changed height of the photoresist strips.
11. The method for manufacturing a pattern structure according to claim 10, wherein: the light blocking property of the light transmitting unit is adjusted by phase or amplitude.
12. The method of manufacturing a pattern structure according to claim 5, wherein: the second graphical structure includes a logo.
13. The method of manufacturing a pattern structure according to claim 12, wherein: the marks comprise alignment marks or overlay marks.
14. The method for manufacturing a pattern structure according to claim 5, wherein: the first process layer is formed on a semiconductor substrate.
15. The method of manufacturing a pattern structure according to claim 14, wherein: the semiconductor substrate includes a silicon substrate.
16. The method of manufacturing a pattern structure according to claim 5, wherein: in step five, the polishing load effect generated in the second pattern structure region due to the difference between the polishing rates of the first process layer and the second process layer by the chemical mechanical polishing process is generated, and the closer to the center of the second pattern structure, the faster the polishing rate is; the distribution structure of the photoresist strips with gradually changing heights is that the photoresist strips are closer to the center of the second graph structure, and the heights of the photoresist strips are higher.
17. The method for manufacturing a pattern structure according to claim 16, wherein: the height of the photoresist strip is gradually changed along the one-dimensional direction; or the height of the photoresist strips is gradually changed along the two-dimensional direction.
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| CN102468274A (en) * | 2010-11-15 | 2012-05-23 | 中芯国际集成电路制造(上海)有限公司 | Shadow effect analyzing structure, and forming method and analyzing method thereof |
| CN105161506A (en) * | 2015-10-29 | 2015-12-16 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method and display device thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102468274A (en) * | 2010-11-15 | 2012-05-23 | 中芯国际集成电路制造(上海)有限公司 | Shadow effect analyzing structure, and forming method and analyzing method thereof |
| CN105161506A (en) * | 2015-10-29 | 2015-12-16 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method and display device thereof |
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