CN111427715A - Detection and recovery device for single chip microcomputer crash - Google Patents
Detection and recovery device for single chip microcomputer crash Download PDFInfo
- Publication number
- CN111427715A CN111427715A CN202010291063.2A CN202010291063A CN111427715A CN 111427715 A CN111427715 A CN 111427715A CN 202010291063 A CN202010291063 A CN 202010291063A CN 111427715 A CN111427715 A CN 111427715A
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- chip microcomputer
- single chip
- electrically connected
- crash
- detecting
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- 238000001514 detection method Methods 0.000 title claims description 12
- 238000011084 recovery Methods 0.000 title claims description 5
- 238000005070 sampling Methods 0.000 claims description 6
- 230000000087 stabilizing effect Effects 0.000 claims description 6
- HEZMWWAKWCSUCB-PHDIDXHHSA-N (3R,4R)-3,4-dihydroxycyclohexa-1,5-diene-1-carboxylic acid Chemical compound O[C@@H]1C=CC(C(O)=O)=C[C@H]1O HEZMWWAKWCSUCB-PHDIDXHHSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0793—Remedial or corrective actions
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Power Sources (AREA)
Abstract
The invention relates to a device for detecting and recovering the halt of a singlechip, which comprises: the power supply is electrically connected with the timing device, the timing device is electrically connected with the single chip microcomputer, and the single chip microcomputer is connected with the power supply. The device for detecting and recovering the dead halt of the single chip microcomputer can quickly detect whether the single chip microcomputer is in the dead halt state or not, quickly disconnect and awaken the dead single chip microcomputer, and improve the use reliability of the single chip microcomputer.
Description
Technical Field
The invention relates to the technical field of single-chip microcomputers, in particular to a device for detecting and recovering the halt of a single-chip microcomputer.
Background
In the prior art, the battery and the organism of intelligent equipment such as stereo set, cell-phone adopt the design of integration, in case the singlechip takes place the condition of dying, because the battery can not be dismantled, can not force the shutdown, often need very long time can make when battery power exhausts, just can shut down to restart, cause for a long time and can not use, influence the result of use.
Disclosure of Invention
The invention provides a device for detecting and recovering the dead halt of a single chip microcomputer, which can solve the problem that the single chip microcomputer cannot be used for a long time after being dead halted in the conventional sound equipment and mobile phone terminal.
In order to achieve the purpose, the invention provides the following technical scheme:
a detection and recovery device for single-chip microcomputer crash comprises: the timing device comprises a power supply 1, a timing device 2 and a single chip microcomputer 3, wherein the power supply 1 is electrically connected with the timing device 2, the timing device 2 is electrically connected with the single chip microcomputer 3, and the single chip microcomputer 3 is connected with the power supply 1.
Preferably, the timing device 2 comprises a voltage stabilizing device 4, a control device 5 and a switch 6, the voltage stabilizing device 4 is connected with the power supply 1, one end of the control device 5 is electrically connected with the single chip microcomputer 3, and the other end of the control device is electrically connected with the switch 6.
Preferably, one end of the switch 6 is electrically connected with the voltage stabilizing device 4, and the other end is electrically connected with the single chip microcomputer 3.
Preferably, the control device 5 includes a frequency division module and a signal acquisition module, the frequency division module is in signal connection with the signal acquisition module, the frequency division module is configured to divide a clock frequency into pulse signals with a fixed time interval, and the signal sampling module is configured to acquire a signal transmitted by the single chip microcomputer 3 according to the pulse signals.
Preferably, a voltage detection device is arranged on the signal sampling module, and the voltage detection device is electrically connected with the single chip microcomputer 3 and is used for detecting the voltage at two ends of the single chip microcomputer 3.
Through implementing above technical scheme, have following technological effect: the device for detecting and recovering the dead halt of the single chip microcomputer can quickly detect whether the single chip microcomputer is in the dead halt state or not, quickly cut off the power of the dead single chip microcomputer and awaken the dead single chip microcomputer, and improve the use reliability of the single chip microcomputer.
Drawings
Fig. 1 is a schematic diagram of a device for detecting and recovering the crash of a single chip microcomputer provided by the invention.
Detailed Description
In order to better understand the technical scheme of the invention, the following detailed description is made on the embodiments provided by the invention in combination with the accompanying drawings.
A detection and recovery device for single-chip microcomputer crash comprises: the timing device comprises a power supply 1, a timing device 2 and a single chip microcomputer 3, wherein the power supply 1 is electrically connected with the timing device 2, the timing device 2 is electrically connected with the single chip microcomputer 3, and the single chip microcomputer 3 is connected with the power supply 1.
In this embodiment, the power supply 1 is electrically connected to the timing device 2, the timing device 2 can reduce the voltage of the power supply 1 to a suitable value at the position of the single chip microcomputer 3 to ensure normal operation of the single chip microcomputer 3, the timing device 2 is electrically connected to the single chip microcomputer 3, the single chip microcomputer 3 is connected to the power supply 1, and the timing device 2 can receive a signal fed back by the single chip microcomputer 3, determine whether the single chip microcomputer 3 is in a dead halt state, determine whether the single chip microcomputer 3 is disconnected from the single chip microcomputer 3, and wake up the disconnected single chip microcomputer 3.
On the basis of the above embodiment, in other embodiments, more specifically, the timing device 2 includes a voltage regulator 4, a control device 5 and a switch 6, the voltage regulator 4 is connected to the power supply 1, one end of the control device 5 is electrically connected to the single chip microcomputer 3, the other end of the control device 5 is electrically connected to the switch 6, one end of the switch 6 is electrically connected to the voltage regulator 4, and the other end of the switch 6 is electrically connected to the single chip microcomputer 3.
In this embodiment, the voltage regulator 4 is connected to the power supply 1, the voltage regulator 4 may be L DO (low dropout regulator), a DCDC converter (voltage converter that converts an input voltage and then effectively outputs a fixed voltage), preferably, in this embodiment, L DO is adopted for the voltage regulator 4, one end of the control device 5 is electrically connected to the single chip microcomputer 3, the other end of the control device is electrically connected to the switch 6, one end of the switch 6 is electrically connected to the voltage regulator 4, and the other end of the switch is electrically connected to the single chip microcomputer 3, in a normal operating state of the single chip microcomputer 3, the switch 6 is connected to the single chip microcomputer 3, and the switch 6 is also connected to the control device 5, the control device 5 can receive a signal transmitted by the single chip microcomputer 3, and according to the signal, the control device 5 can control a state of the switch 6 to close or open the switch 6.
On the basis of the foregoing embodiments, in other embodiments, more specifically, the control device 5 includes a frequency division module and a signal acquisition module, the frequency division module is in signal connection with the signal acquisition module, the frequency division module is configured to divide a clock into pulse signals with fixed time intervals, and the signal sampling module is configured to perform signal acquisition according to the pulse signals.
In this embodiment, the frequency division module is configured to divide a clock into pulse signals with fixed time intervals, where the time intervals of pulse signal transmission may be 100ms, 200ms, or 400ms, the signal acquisition module acquires signals transmitted by the single chip microcomputer 3 according to the pulse signals, when the single chip microcomputer 3 crashes, the control device 5 acquires the signals transmitted by the single chip microcomputer 3, and when the time used exceeds the time interval of the pulse signals, the control device 5 controls the switch 6 and the single chip microcomputer 3 to be disconnected, and the dead single chip microcomputer 3 can recover again after being disconnected.
On the basis of the foregoing embodiments, in other embodiments, more specifically, a voltage detection device is disposed on the signal sampling module, and the voltage detection device is electrically connected to the single chip microcomputer 3 and is configured to detect voltages at two ends of the single chip microcomputer 3.
In this embodiment, when the voltage detection device detects that the motor value at the two ends of the single chip microcomputer 3 is lower than 0.7V, the control device 5 controls the switch 6 to be closed, the switch 6 is electrically connected with the single chip microcomputer 2, and the single chip microcomputer 3 starts to work normally.
The foregoing describes in detail a device for detecting and recovering from a single-chip microcomputer crash provided in the embodiments of the present invention, and for those skilled in the art, there may be variations in the specific implementation manners and the application ranges according to the concepts of the embodiments of the present invention.
Claims (5)
1. The utility model provides a detection and recovery unit of singlechip crash which characterized in that includes: the timing device comprises a power source (1), a timing device (2) and a single chip microcomputer (3), wherein the power source (1) is electrically connected with the timing device (2), the timing device (2) is electrically connected with the single chip microcomputer (3), and the single chip microcomputer (3) is connected with the power source (1).
2. The apparatus for detecting and recovering the crash of a single chip microcomputer according to claim 1, wherein the timing means (2) comprises a voltage stabilizing means (4), a control means (5) and a switch (6), the voltage stabilizing means (4) is connected with the power supply (1), one end of the control means (5) is electrically connected with the single chip microcomputer (3), and the other end is electrically connected with the switch (6).
3. The apparatus for detecting and recovering from a crash of a single chip microcomputer according to claim 2, wherein one end of the switch (6) is electrically connected to the voltage stabilizing device (4), and the other end is electrically connected to the single chip microcomputer (3).
4. The device for detecting and recovering the crash of the single chip microcomputer according to claim 3, wherein the control device (5) comprises a frequency division module and a signal acquisition module, the frequency division module is in signal connection with the signal acquisition module, the frequency division module is used for dividing a clock into pulse signals with fixed time intervals, and the signal sampling module is used for acquiring the signals transmitted by the single chip microcomputer (3) according to the pulse signals.
5. The device for detecting and recovering the crash of the single chip microcomputer according to claim 4, wherein a voltage detection device is arranged on the signal sampling module, and the voltage detection device is electrically connected with the single chip microcomputer (3) and used for detecting the voltage at two ends of the single chip microcomputer (3).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010291063.2A CN111427715A (en) | 2020-04-14 | 2020-04-14 | Detection and recovery device for single chip microcomputer crash |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010291063.2A CN111427715A (en) | 2020-04-14 | 2020-04-14 | Detection and recovery device for single chip microcomputer crash |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111427715A true CN111427715A (en) | 2020-07-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010291063.2A Pending CN111427715A (en) | 2020-04-14 | 2020-04-14 | Detection and recovery device for single chip microcomputer crash |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101710251A (en) * | 2009-12-11 | 2010-05-19 | 深圳和而泰智能控制股份有限公司 | Single chip microcomputer halt reset circuit, device and method |
| CN202995612U (en) * | 2012-12-13 | 2013-06-12 | 泉州豪杰信息科技发展有限公司 | Singlechip reset circuit |
| WO2019091468A1 (en) * | 2017-11-10 | 2019-05-16 | 深圳市银河风云网络系统股份有限公司 | Led light control device, system and control method |
-
2020
- 2020-04-14 CN CN202010291063.2A patent/CN111427715A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101710251A (en) * | 2009-12-11 | 2010-05-19 | 深圳和而泰智能控制股份有限公司 | Single chip microcomputer halt reset circuit, device and method |
| CN202995612U (en) * | 2012-12-13 | 2013-06-12 | 泉州豪杰信息科技发展有限公司 | Singlechip reset circuit |
| WO2019091468A1 (en) * | 2017-11-10 | 2019-05-16 | 深圳市银河风云网络系统股份有限公司 | Led light control device, system and control method |
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Application publication date: 20200717 |